| Commit message (Collapse) | Author | Age | Files | Lines |
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Remove CONFIG_SYSTEM_UNLOCKED and CONFIG_I2C_DEBUG from all
Zork boards.
BUG=b:138601010
BRANCH=none
TEST=none
Signed-off-by: Edward Hill <ecgh@chromium.org>
Change-Id: I846335e8402b719bbbf5711aa805b727a0902919
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2288153
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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After parsing in PE_VDM_SEND_REQUEST, store the VDM response in PE
state. The VDM child states need to access the response, and the PRL may
overwrite its copy before the child runs.
BUG=none
TEST=Enter DP mode with partner that sends Attention quickly after DP
Configure ACK
BRANCH=none
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Change-Id: I1522c9510f4fd276a5d1e92b5641424b0f466845
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2285430
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Tested-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
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Attempt to Enter Mode SOP'' with same object position and revision as
SOP' since, the port doesn't query Discover SOP'' to the cable.
BUG=b:158294748
b:150611251
BRANCH=None
TEST=Able to enter into Thunderbolt mode for active cable.
Change-Id: Ib1f58ff3bab78e1b0ace554ac63785b6e7baf192
Signed-off-by: Ayushee <ayushee.shah@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2274309
Reviewed-by: Keith Short <keithshort@chromium.org>
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Coreboot has changed to use CBI, so CONFIG_HOSTCMD_SKUID is no
longer needed and can be cleaned up.
BUG=b:138600504
BRANCH=none
TEST=none
Signed-off-by: Edward Hill <ecgh@chromium.org>
Change-Id: Ib9fc1d190d994311f2efcae77821489eddf3cea7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2288152
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
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new battery: LGC KT0030G020
BUG=none
BRANCH=master
TEST=Make sure battery can cutoff by console "cutoff" or "ectool cutoff"
Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com>
Change-Id: I57ce7ec1a7a28111953d823a68bbf4b2a59943a8
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2284508
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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JSLRVP & TGLRVP are on TCPMv1 and the PD task stack size is
overflowing for these boards hence increased the PD stack size.
BUG=none
BRANCH=none
TEST=USB, DP, TBT & USB4 are detected without stack overflow
Change-Id: I85be645f12e07b47182dde428e90c73e7b441750
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2286194
Reviewed-by: Tanu Malhotra <tanu.malhotra@intel.com>
Reviewed-by: Madhusudanarao Amara <madhusudanarao.amara@intel.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
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BRANCH=none
BUG=b:160758409
TEST=make buildall -j
Signed-off-by: Lu Zhang <lu.zhang@bitland.corp-partner.google.com>
Change-Id: Iee9219cc05321c7518e9ff374c802c0768ff497c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2287112
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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Puff has dev_key for signing RW copies because Puff used to boot
on EFS1. Puff has switched to EFS2. This patch removes dev_key.pem.
BUG=b:147298634
BRANCH=none
TEST=make BOARD=puff
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: I1b55707deb1f1773315f749f33cb0b3597b386db
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2254543
Reviewed-by: Andrew McRae <amcrae@chromium.org>
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
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This CL configures the GPIO pin on HDMI subboard(shares with
TYPE-C subboard), and plays GPIO_EC_DPBRDG_HPD_ODL on
receiving HDMI HPD events.
Also, disable the unused tasks if HDMI subboard connected.
BUG=b:154565980
TEST=ensure GPIO pins are in a valid state; ensure HDMI plug/unplug
triggers correct event.
BRANCH=master
Change-Id: Iea0014270d4d8eac67bb51354fafe75ee677d5b0
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2195722
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
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When in S3 and tablet mode, keyboard scan should be disabled and
machine should not be waked up if user press keyboard.
BUG=b:160557015
BRANCH=kukui
TEST=put machine in tablet mode, use 'powerd_dbus_suspend' to
let machine enter S3, press any key of keyboard will not
wake up the machine.
Change-Id: If98e01e512b040b7e45e40b6064cbdae5b39944e
Signed-off-by: Paul Ma <magf@bitland.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2284510
Reviewed-by: Li-jen Chen <lijen@google.com>
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
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Lid sensor uses lis2dwl.
BUG=b:160671918
BRANCH=none
TEST=make buildall -j
Signed-off-by: xiong.huang <xiong.huang@bitland.corp-partner.google.com>
Change-Id: Ibb3f871ebdae3fbdeb3e78315ea5cacd80a7427d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2284514
Reviewed-by: Diana Z <dzigterman@chromium.org>
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change C0 port ppc from SN55330 to SYV682X
BUG=b:155062762, b:155062762
BRANCH=none
TEST=make buildall PASS
Change-Id: Idf03405adfa591f9f331cae79e1f7db6780afb57
Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2284506
Reviewed-by: Keith Short <keithshort@chromium.org>
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The npcx monitor LFW (little firmware) can be used in two scenarios:
1. For npcx5 which supports the external flash and doesn't support UUT,
it is used by the openocd via servo JTAG to flash the EC image.
2. For npcx7 (and newer chips) which support the internal flash and UUT,
it is used by the UUT via UART to flash the EC image.
For case 1, the DEVALT0.bit7 (NO_F_SPI) should be cleared in order to
program the external flash. In case 2, this bit should be set because
the internal flash is used. Otherwise, the GPIOA0 (F_CS0) will also
toggles while programming the internal flash.
Before this CL, the monitor unconditionally clears this bit when
programming the flash.
In this CL, the monitor decides to set/clear this bit according to
the value of the tag filed in the monitor header.
(Assuming that when UUT is used, the target is always the internal
flash.)
BUG=none
BRANCH=none
TEST=No error for "make buildall"
TEST=Programming the internal flash via UUT, make sure the GPIOA0 doesn't
toggle with scope.
Change-Id: I9f1695351b201767cc5ed32877fb395c1e459bc8
Signed-off-by: CHLin <CHLIN56@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2272419
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: CH Lin <chlin56@nuvoton.com>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: CH Lin <chlin56@nuvoton.com>
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Apply CL:2278598 to drawcia.
BUG=none
BRANCH=none
TEST=make buildall -j
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Change-Id: I726fe9595963a40f56d09cb390f46cc91debbf34
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2286429
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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Adds EC_CODEC_I2S_RX_RESET to reset I2S RX because it is not sure that
the I2S RX is always disabled when the kernel booting. For example, it
will keep enabled if the kernel crashes while cros_ec_codec is used.
BRANCH=none
BUG=b:158316196
TEST=Able to reset I2S RX from the kernel.
Change-Id: I461e5a3c73a4066a9ceb097fc5320aef98d81db4
Signed-off-by: Yu-Hsuan Hsu <yuhsuan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2284503
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Tzung-Bi Shih <tzungbi@chromium.org>
Tested-by: Yu-Hsuan Hsu <yuhsuan@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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Commit sha 57b95363c05bdab7b7e57d553a9514128393247d
Reverting a CL that was a temporary fix while a real
solution was found. This will now be implemented with
the following CLs
https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2282691
https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2282699
https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2283697
BUG=none
BRANCH=none
TEST=make buildall
Signed-off-by: Denis Brockus <dbrockus@google.com>
Change-Id: I76b92388f5ee5bae4bdb945a82f18eb3df3ab1fd
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2284728
Tested-by: Denis Brockus <dbrockus@chromium.org>
Auto-Submit: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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With TCPCI being changed to allow TCPM to control
the DBG_ACC enable instead of the TCPC, it is
probably a good idea to actually toggle the bit
for any TCPC that uses this signal for internal
logic.
BUG=b:160253746
BRANCH=none
TEST=verify DBG and nonDBG attaches
Signed-off-by: Denis Brockus <dbrockus@google.com>
Change-Id: Ifb91afa0127689e0ca371e64495d80f30bf93c26
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2283697
Tested-by: Denis Brockus <dbrockus@chromium.org>
Auto-Submit: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
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On attach, it was recommended we set enable
AutoDischargeDisconnect before setting RoleCtrl
BUG=b:160253746
BRANCH=none
TEST=See if this helps with the servo_v4 SRC->SNK
Signed-off-by: Denis Brockus <dbrockus@google.com>
Change-Id: Ib962c1ccf21e6f3d0ac1e644198e24b2288e7f91
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2282699
Tested-by: Denis Brockus <dbrockus@chromium.org>
Auto-Submit: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
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Set TCPC_CONTROL.DebugAccessoryControl = 1 to control by TCPM,
not TCPC. If TCPC is left in control, then it will enable VBus
when Sink Debug accessory device is detected (which is during
AttachWait.SRC). We want to instead control this ourselves from
TCPM.
BUG=b:160253746
BRANCH=none
TEST=dut-control servo_v4_role:snk (with CL:2276463 reverted)
Signed-off-by: Edward Hill <ecgh@chromium.org>
Change-Id: Ib71f2b76949eeb25e24669e5bf297123d2685be3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2282691
Tested-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Amit Maoz <amit.maoz@nuvoton.corp-partner.google.com>
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As of board revision 1, there is a GPIO to enable Vbus for the type-A
port. Turn this GPIO on when we're booted, and off when the system is
shut down. This pin is NC on revision 0, so it should be fine to set
regardless of hardware version.
BRANCH=None
BUG=b:160336151
TEST=on waddledee rev 1, able to use flash drive plugged into MB
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Idc1ae5fd05b904b01bc56bd8dd2a69d34caee9ef
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2283943
Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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BRANCH=None
BUG=b:160362315
TEST=on waddledee proto 1, no leakage is observed on PP3300_SOC_A
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I4ec568d77b80343a958d486a84dbda93a4f7c423
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2278598
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Will Arthur <wda@google.com>
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The current limit needs to be set in the PPC prior to the FRS happening.
Currently the current limit is left at default, which can cause
overcurrents on an FRS event. Eventually, we should check to make sure
we can source the required current before enabling FRS.
BUG=b:148144711
TEST=make buildall
TEST=check that the current limit is updated to 3A when we receive a
sink caps message supporting FRS
BRANCH=none
Signed-off-by: Eric Herrmann <eherrmann@chromium.org>
Change-Id: I5f369786b3a57e7c06bb861076a88242216c2041
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2277213
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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This functionality is available in both RO and RW.
BRANCH=none
BUG=b:146793000
TEST=make -j buildall
Signed-off-by: Sam Hurst <shurst@google.com>
Change-Id: Iace11bd64fe9db2fd7ff14827cb412dae1abcbca
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2216407
Reviewed-by: Wai-Hong Tam <waihong@google.com>
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This patch add for factory keyboard connector test.
BUG=none
BRANCH=none
TEST=Short keyboard pins and make sure "ectool kbfactorytest" works.
Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com>
Change-Id: I9c2c2ae176af63bae811263e0533ac8925a6f130
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2241073
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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add bb retimer for C0/C1 port
BUG=b:151978872
BRANCH=master
TEST=Use console "i2cscan" get usb_0_mix/usb_0_mix and bb to read bb
retimer register.
Change-Id: I832265a69b30beca6e49840f90333abd6b297ec7
Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2282724
Commit-Queue: Keith Short <keithshort@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
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Request voltage always keep at 4320mV when cycle_count is over than 600.
We need at a zone for it.
BUG=b:153272421
BRANCH=kukui
TEST=make -j BOARD=kakadu
TEST=make buildall
Signed-off-by: Scott Chao <scott.chao@bitland.corp-partner.google.com>
Change-Id: I8d065a607226a39335e3a663ddf7a179ff73a0db
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2282739
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
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Make board_get_version() actually reads and caches adc instead of
always return 0.
BUG=b:160296496
TEST=`version` command in ec console
BRANCH=master
Signed-off-by: Ting Shen <phoenixshen@google.com>
Change-Id: I3d298de889bbcb11c8fcd8867e7158d6c71465cf
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2278491
Tested-by: Ting Shen <phoenixshen@chromium.org>
Auto-Submit: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
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Implement the EC LED code dependent on spec.
BUG=b:160542345
BRANCH=master
TEST=manual
1. Check battery LED on full charging / Charging / Discharging.
2. Check power LED on S0/suspend/S5.
3. Check "ectool led" command for battery and power LED control.
Signed-off-by: Michael5 Chen <michael5_chen1@pegatron.corp-partner.google.com>
Change-Id: Ibbb5b97a368805267a28f0da6ec7c9684a2ce3bc
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2280869
Reviewed-by: Edward Hill <ecgh@chromium.org>
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add bb retimer for C0/C1 port
BUG=b:155062762, b:155062762
BRANCH=none
TEST=make buildall PASS
Change-Id: I1da93b58eae4c28a8f7a7192518a130f80b848d9
Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2275516
Reviewed-by: Keith Short <keithshort@chromium.org>
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There was a missing USB_PD_DEBUG_LABELS which didn't allow setting the
USB_PD_DEBUG_LEVEL to 0.
BUG=none
TEST=make with CONFIG_USB_PD_DEBUG_LEVEL 0
BRANCH=none
Signed-off-by: Eric Herrmann <eherrmann@chromium.org>
Change-Id: Ibd3676d3b53e37e852e938023edc20a5f49afd5e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2283128
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
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Added a function to set the PE ready state based on the power role.
BUG=b:156749387
BRANCH=None
TEST=make buildall -j
Signed-off-by: Ayushee <ayushee.shah@intel.com>
Change-Id: I8d4026a3faed61606f01f71c4cd7b424d92a816a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2278720
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
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BRANCH=none
BUG=none
TEST=builds
Signed-off-by: Jett Rink <jettrink@chromium.org>
Change-Id: I2beaa8b74b313d225b9166f324d2b44cb0aa59ce
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2276317
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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Use the same prefix for all debug statements, namely C#:
BRANCH=none
BUG=none
TEST=build
Signed-off-by: Jett Rink <jettrink@chromium.org>
Change-Id: Iaa1524dfc1f8a9136259b6193b99e8d2229925f4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2276316
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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Child run functions execute before parent fun functions, not after. Make
additional minor corrections and clarifications.
BUG=none
TEST=make buildall
BRANCH=none
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Change-Id: Ic1b345e42269c9086f77bb6d9fe54d3f91b1002e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2277210
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Parse received VDM responses initially in parent state
PE_VDM_SEND_REQUEST and record the result. Handle that result in a
state-specific way in state-specific run functions.
Reduce flash size by 40 bytes on average (volteer RW: 28 bytes).
BUG=b:158572770
TEST=Observe discovery and DP/TBT setup traffic
BRANCH=none
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Change-Id: I46bbee663c713cbcef40df8bf39359a26c8d5e32
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2274643
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Terrador is fan less, remove fan function.
BUG=b:151978872
BRANCH=master
TEST=make buildall success.
Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com>
Change-Id: Iebb74fac4ae60d20ce16073df6539df544ba7fc0
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2279151
Reviewed-by: Keith Short <keithshort@chromium.org>
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This commit checks if the port supports Thunderbolt speed before entering
into Thunderbolt alternate mode.
BUG=b:160273134
BRANCH=None
TEST=Tested on Volteer board with a USB3 DB, Thunderbolt dock enters
into USB+DP mode.
Signed-off-by: Ayushee <ayushee.shah@intel.com>
Change-Id: I5c8497eaf20d505d2e863f010a57acc6d455b9b1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2277498
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
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Increase dedede board PD stack sizes to prevent overflow.
BRANCH=none
BUG=b:155813111
TEST=make -j buildall
Signed-off-by: Sam Hurst <shurst@google.com>
Change-Id: I061bf8e53c0f2dfe8ca5617f562bd99ed510d467
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2283693
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Add two additional stack sizes for tasks that need more
stack space.
BRANCH=none
BUG=b:155813111
TEST=make -j buildall
Manual: Changed waddledee's TypeC ports0 and 1 to
ULTRA_STACK_SIZE and TRENTA_STACK_SIZE and
make -j buildall without errors.
Signed-off-by: Sam Hurst <shurst@google.com>
Change-Id: I927d5b978c705f49d1b3a85a09c4020d7fd9ee84
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2280486
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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The TUSB422 does not officially support FRS. support is being added to
workaround bugs in the SYV682.
BUG=b:148144711
TEST=Check that FRS is signaled to the TCPM from the TUSB422 driver when
CONFIG_USB_PD_FRS_TCPC is set
TEST=make buildall
BRANCH=none
Change-Id: I4c8fefbf0f01b327f345d4b4f09b6c422aaa2e5d
Signed-off-by: Eric Herrmann <eherrmann@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2278354
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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The SYV682X source current limit is not a hard current limit, but rather
will clamp the current to the setpoint. It still generates an interrupt,
but will not cut off the channel until thermal shutdown. Disabling the
channel at thermal shutdown isn't acceptable for safety reasons.
Instead, disable the channel and signal overcurrent to the TCPM if the
overcurrent status remains for 100ms.
BUG=b:159161457,b:160335402,b:148144711
TEST=Check that we don't trip overcurrent with devices which spike VBUS
TEST=With a load which exceeds the source setpoint, confirm that VBUS is
disabled after 100ms +/- 10ms once the current passes the setpoint.
TEST=make buildall
BRANCH=none
Change-Id: I8121b91e9c3b6aa6b9eee05d34012c0ab063bdfc
Signed-off-by: Eric Herrmann <eherrmann@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2277881
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
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BUG=b:156749387
BRANCH=None
TEST=make buildall -j
Signed-off-by: Ayushee <ayushee.shah@intel.com>
Change-Id: I8ecffd3084de472ec3d145c3ff69df1ca2d89a56
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2278562
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
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For boards that do not support Thunderbolt compatible speed, shouldn't
support USB4 speed as well.
Hence this commit returns USB_R30_SS_U2_ONLY speed for boards not
supporting Thunderbolt compatible speed.
BUG=b:160273134
BRANCH=None
TEST=Tested on Volteer with USB3 DB, able to enter into USB+DP mode with
USB4 port partner and cable.
Signed-off-by: Ayushee <ayushee.shah@intel.com>
Change-Id: I14335ea28f0082b0f222ea2299b0d63e66e17697
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2277826
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
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BRANCH=none
BUG=b:148296085
TEST=view in gitiles
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: Ia8dde9ce8dd605777ca8eaf92fa16076bda3ef5a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2254993
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Undef CONFIG_KEYBOARD_VIVALDI to fix function keys
BUG=b:160269938
BRANCH=none
TEST=Ctrl+Alt+F2 can enter VT2
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Change-Id: Ifdd1982892c25f1773336632d9594a95f44fdcc6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2279811
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
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Port power swap has to be done only when there is a battery and
no battery cutoff
BUG=b:149460624
BRANCH=none
TEST=1.Remove battery, connect charger on typec port
boot the DUT and after boot the DUT connect docking station
on another typec port. expected result is no reboot observed
2.Connect battery, connect charger on typec port
boot the DUT and after boot the DUT connect docking station
on another typec port. expected result is no reboot observed.
Signed-off-by: Madhu M <madhu.m@intel.corp-partner.google.com>
Change-Id: Iacfae4ecc2e30c6bee5a19aaed030d59efc61e36
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2259522
Reviewed-by: Madhusudanarao Amara <madhusudanarao.amara@intel.com>
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
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1.If cycle count > 300, set Charge Voltage=4320,
cycle count > 600, set Charge Voltage=4300,
cycle count > 1000, set Charge Voltage=4250
2.If charging over 48 hours and Charge Voltage > 4.25V,
set Charge Voltage = 4.25V
3.If charging over 2 hours,battery voltage over 4.1V and
battery temperature over 45°C, switch to discharge mode and
set Charge Voltage = 4.1V
BUG=b:153272421
BRANCH=kukui
TEST=make -j BOARD=kakadu
TEST=make buildall
Signed-off-by: Scott Chao <scott.chao@bitland.corp-partner.google.com>
Change-Id: I4968308b984f08a58491586a90b0b239eec07328
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2280865
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
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Config the EC battery setting depend on battery spec.
BUG=b:160412962
BRANCH=master
TEST=manual
1. Check EC log found battery.
2. Check battery cutoff maode (ectool batterycutoff at-shutdown)
3. Check battery Discharging FET status when battery full.
Signed-off-by: Michael5 Chen <michael5_chen1@pegatron.corp-partner.google.com>
Change-Id: Ia17721bb6a9d968842a3e5e2bfdbd8d68cc84c4e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2279343
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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Add EC_KB_BL_EN to enable/disable keyboard backlight when enter S0/S3.
BUG=none
BRANCH=master
TEST=check keyboard backlight can on/off when in S0/S3..
Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com>
Change-Id: I54399eda3c4b313f3ccc7af91f966042e3f8cebd
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2280862
Reviewed-by: Keith Short <keithshort@chromium.org>
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The driver function to set FRS enable only exists if
CONFIG_USB_PD_FRS_PPC is enabled, so we must also make its callers
conditional in the same way. For consistency, also revise the TCPC
FRS code paths to be conditional.
BUG=b:146393213
BRANCH=None
TEST=make buildall
Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Change-Id: I3fb14c711dd2abdf6ef77d469b2103f37daac182
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2276125
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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