| Commit message (Collapse) | Author | Age | Files | Lines |
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Increases Volteer RO and RW flash spaces by 7088 bytes each. This is the
net gain after including the init_rom layer.
BUG=b:160330682
BRANCH=none
TEST=make buildall
TEST=On volteer run "ectool motionsense" and "ectool motionsense
lid_angle". Verify both RO and RW images.
TEST=Program RO image with predecessor CL:2311268. Program this CL into
AP firmware image and verify EC software sync updates to RW image.
TEST=Verify BMI260 operation with CONFIG_CHIP_INIT_ROM_REGION disabled
using volteer_tcpmv1 board.
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: I6849b6c9e96756266528b39ab5e53268dce2a13c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2311756
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: caveh jalali <caveh@chromium.org>
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The presubmit message that checks for 'make buildall' having been run
suggests using 'make buildall -j', which can cause an unbounded number
of processes to be started, especially as the number of EC targets have
increased. Suggest a more reasonable value.
BUG=none
TEST=Check presubmit output.
BRANCH=none
Change-Id: Ie35a545dc1c4d58a3ad9d0ed0233c62ab5a92464
Signed-off-by: Andrew McRae <amcrae@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2366324
Reviewed-by: Andrew McRae <amcrae@chromium.org>
Reviewed-by: Mike Frysinger <vapier@chromium.org>
Commit-Queue: Andrew McRae <amcrae@chromium.org>
Tested-by: Andrew McRae <amcrae@chromium.org>
Auto-Submit: Andrew McRae <amcrae@chromium.org>
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At default, CONFIG_FPU option isn't enabled. But currently,
FPU extension is always enabled when building FW image.
This will cause problem if hardware doesn't support the extension
and floating-point instructions are generated. So we fix it.
BUG=none
BRANCH=none
TEST=Floating-point instructions are used for floating point
operation if CONFIG_FPU is enabled. Otherwise, library
routines are used.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Change-Id: Ifb77bd0cca1158ca7f6637fa9ec025ac8712bbfd
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2227779
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
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Set CONFIG_SYV682X_HV_ILIM to 5.5A on Dood.
BUG=b:161965761
BRANCH=octopus
TEST=make BOARD=dood
TEST=Use ppc_dump <port> to check the setting correct.
Signed-off-by: Yu-An Chen <yu-an.chen@quanta.corp-partner.google.com>
Change-Id: I582b122f72511a60136380efdfb7e8a61e4be38a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2366322
Tested-by: Yu-An Chen <yu-an.chen@quanta.corp-partner.google.com>
Tested-by: Henry Sun <henrysun@google.com>
Reviewed-by: Henry Sun <henrysun@google.com>
Commit-Queue: Henry Sun <henrysun@google.com>
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Description taken from crrev/2337430:
TPMs with old firmware version cannot detect AP initiated reset eg. AP
gets reset when CSE Lite SKU jumps from RO to RW. Enable AP reset
command handler so that AP can request EC to perform the reset. This
will lead to TPM detecting the AP reset.
BUG=b:162290856
TEST=FAFT EC tests
BRANCH=puff
Signed-off-by: Andrew McRae <amcrae@google.com>
Change-Id: I2c3b805b2099e6cc5fff8dc945b575a89ef04465
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2366313
Tested-by: Edward O'Callaghan <quasisec@chromium.org>
Commit-Queue: Andrew McRae <amcrae@chromium.org>
Commit-Queue: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
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Increased stack size for these tasks:
CHIPSET, PD_C0, and PD_C1
BUG=none
BRANCH=none
TEST=No panic of stack overflow on ampton.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Change-Id: Ibb40661f2e4abbd1dd0ac9a99ace271ea87c4b6e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2362380
Reviewed-by: Diana Z <dzigterman@chromium.org>
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FORCE_PWR GPIO is used for keeping the BB retimer in active state during
f/w updating. On TGLRVP, control to enable the FORCE_PWR GPIO was given
to EC to support the I2C based F/W updating. I2C based f/w updating is
deprecated and the LSx interface is POR hence the FORCE_PWR GPIO control
is given to AP now. Thus, removing the FORCE_PWR GPIO from EC driver.
BUG=b:165214747
BRANCH=none
TEST=make buildall -j
Change-Id: If9bb7199a68c93f704f698552e5594a58bd68f7c
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2363334
Reviewed-by: Ayushee Shah <ayushee.shah@intel.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
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Whenever we change state, we should continue to wake the USB
statemachine task up until is settles into a steady state were it is
waiting/polling on a timer or event.
BRANCH=none
BUG=b:163152687
TEST=Ran GRL PD3.0 test on Trembyle and did not see any regressions. It
did make a few tests pass that were failing before due to timing issues.
Signed-off-by: Jett Rink <jettrink@chromium.org>
Change-Id: Idc3c1ae8d92a0f6a5cd4b82f9db6d7138d143f77
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2356954
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
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Make it clear that there are multiple function calls happening instead of
a single statement with multiple parameters.
BRANCH=none
BUG=none
TEST=builds. No actual code change
Signed-off-by: Jett Rink <jettrink@chromium.org>
Change-Id: I1c01a40794e0c2dc08be205ac953f42bdc9298be
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2363465
Commit-Queue: Edward Hill <ecgh@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
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Store the number of valid identity VDOs that were received for use
later.
BRANCH=None
BUG=b:165264379
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I54f991c862c4b6589edff2476a79b5c3a8b69b4b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2363416
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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Add FRS_EN default low for mb/db typec port.
BUG=b:163167407
BRANCH=master
TEST=Check system can power on with AC only.
Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com>
Change-Id: I4ddf88811be214247908ba370718311ed6e5f576
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2359626
Reviewed-by: Keith Short <keithshort@chromium.org>
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In Asurada rev1, BC1.2 detection enable pin (EN_USB_C0_BC12_DET)
is connected directly to VBUS. Thus, two thing changed in software
side:
1. Don't need CONFIG_MT6360_BC12_GPIO anymore.
The config is still kept to support rev0.
2. VBUS detach won't trigger BC1.2 detection.
Driver implementation for rev0 board triggers BC1.2 detection
even if we already know charger is removed. And wait for MT6360
return "no charger" result to update charge manager. This CL
changes its behavior to skip BC1.2 detection when possible.
BUG=b:159583342
TEST=manually
BRANCH=master
Signed-off-by: Ting Shen <phoenixshen@google.com>
Change-Id: Ifa5366a592bc7199df85ea5489eab5010322448f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2294533
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
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This patch add a configuration of BASE_ACCEL
to read BASE_ACCEL values in S3
BUG=b:160750560
BRANCH=none
TEST=execute accelread in ec console
Signed-off-by: AlvinCC_Hsu <alvincc_hsu@compal.corp-partner.google.com>
Change-Id: Iac83ea448297c15d49c0e8df43e26194905bb65a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2359627
Reviewed-by: Wai-Hong Tam <waihong@google.com>
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Remove LED_SIDESEL_4_L function and config.
BUG=b:163167407
BRANCH=master
TEST=make buildall success.
Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com>
Change-Id: I5fe952668543f3671c91da2b138e416a8f8e671c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2359625
Reviewed-by: caveh jalali <caveh@chromium.org>
Commit-Queue: caveh jalali <caveh@chromium.org>
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BUG=none
BRANCH=none
TEST=No error on the command of get EC protocol info.
Signed-off-by: tim <tim2.lin@ite.corp-partner.google.com>
Change-Id: I08d87bd20e60520c891f1b99d78ff91c1e89b2cb
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2359613
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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uut maintains a mapping table to look up the internal flash size with
the device id (chip variant.) This CL adds a new entry in the table for
npcx7m7fc.
BRANCH=none
BUG=b:163910671
TEST=pass "make buildall"
TEST="./build/npcx7_evb/util/uartupdatetool --port=pts/15
--baudrate=115200 --read-flash --file=<file_name>"
"diff ./build/npcx7_evb/ec.bin <file_name>"
Signed-off-by: CHLin <CHLin56@nuvoton.com>
Change-Id: I09d8763f5f54d364ecafd17135d8ea00de89da30
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2355158
Tested-by: CH Lin <chlin56@nuvoton.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: caveh jalali <caveh@chromium.org>
Commit-Queue: CH Lin <chlin56@nuvoton.com>
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BRANCH=none
BUG=b:163910671
TEST=pass "make buildall".
TEST=with related CLs, switch to different chip variant in build.mk;
build and flash the image; make sure each EC image can boot up on
the internal testing board of different chip variant.
Signed-off-by: CHLin <CHLin56@nuvoton.com>
Change-Id: I6575b23bbeda2a4a7912352c15f1537aba4c93bc
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2355157
Tested-by: CH Lin <chlin56@nuvoton.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: caveh jalali <caveh@chromium.org>
Commit-Queue: CH Lin <chlin56@nuvoton.com>
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Add the following changes:
1. add CHIP_VARIANT_NPCX7M7WC in the npcx7 chip configuration files to
define what (RAM, flash, features...) are supported in npcx7m7fc.
2. add the chip id and chip revision id of npcx7m7fc
BRANCH=none
BUG=b:163910671
TEST=pass "make buildall"
TEST=with related CLs, change CHIP_VARIANT to npcx7m7fc in
board/npcx7_evb/build.mk; flash image and run on the internal testing board of
npcx7m7fc; make sure the EC can boot up; check the chip ID and chip
revision ID are correct by console command "version".
Signed-off-by: CHLin <CHLin56@nuvoton.com>
Change-Id: Ibef17148eeba71bbbb63145064a5fa398c0118dc
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2355156
Tested-by: CH Lin <chlin56@nuvoton.com>
Reviewed-by: caveh jalali <caveh@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: CH Lin <chlin56@nuvoton.com>
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BUG=none
BRANCH=firmware-kukui-12573.B
TEST=make sure battery led is showing battery state on system S3.
make sure power led is showing white on S0.
make sure power led is blinking white on S3.
make sure power led is OFF on S5/G3.
Signed-off-by: Tommy Chung <tommy.chung@quanta.corp-partner.google.com>
Change-Id: Ia257a8adc923dd87be304d6070d18550147e4fef
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2359614
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
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This CL is derived from CL published on Volteer.
Change-Id: Iff6fa572c5660b67152f9930b9bad9f82ff6c6ee
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2360454
BUG=none
BRANCH=none
TEST='etool apreset' resets the AP
Change-Id: Ie2dd1fcd55dfdc42bd75a8c9b6846bce2f149b98
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2361103
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Sooraj Govindan <sooraj.govindan@intel.corp-partner.google.com>
Commit-Queue: Keith Short <keithshort@chromium.org>
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Configure unused GPIOs as inputs to save power in deep sleep states.
BUG=b:162318932
BRANCH=none
TEST=make buildall
TEST=flash waddledoo
put device into S0iX or other low power state
measure system and EC power consumption
Signed-off-by: Brian Nemec <bnemec@chromium.org>
Change-Id: Ie29c15d1c4947fe3d6665c66df476ac6b9ed943d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2358903
Reviewed-by: Evan Green <evgreen@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Currently, it seems that charging is terminated for some reason. This
commit simply enables the end of charge interrupts such that we can
log when this event occurs on the EC console.
BUG=b:160918663
BRANCH=None
TEST=Build and flash waddledee; verify that the EOC interrupts are
detected and that the log prints are emitted when they fire.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: I113133146f678748071b94511521baf35e818e0d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2358902
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
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Implement the calibration code for the gyroscope which is ported over
from AOSP's https://android.googlesource.com/device/google/contexthub/+/refs/heads/master/firmware/os/algos/calibration/gyroscope/
BUG=b:138303429,b:137204366,chromium:1023858
TEST=Added unit tests
BRANCH=None
Signed-off-by: Yuval Peress <peress@chromium.org>
Change-Id: Ic1ab2efb66565cda0a96c9c06722136fb184df77
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2244934
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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This reverts commit 8db6eb89540a0ca72e29633ffbfd1eac10d6ad6a.
Reason for revert: See chromium:1073960
Original change's description:
> power: Don't boot after waking up from hibernation
>
> When a device shuts down and is idle for 60 mins (configurable), EC
> enters hibernation. When an AC adapter is plugged, the system boots.
> This is not expected behavior and not consistent with the behavior
> that the system stays off on AC plug-in before hibernation.
>
> This patch fixes the above inconsistency by storing AP_OFF flag before
> entering hibernation after 60 mins idle in S5.
>
> Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
>
> BUG=chromium:1073960
> BRANCH=none
> TEST=Verified Bloog stays off after waking up from hibernation on
> AC plug-in.
>
> Change-Id: I097bee97164284dd4c35f8bf9389c76319fd676a
> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2176555
> Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org>
> Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
> Auto-Submit: Daisuke Nojiri <dnojiri@chromium.org>
Bug: chromium:1073960
Change-Id: I2792dd6d868118ffcba533a3cdb5195cc7d71b76
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2363099
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org>
Auto-Submit: Daisuke Nojiri <dnojiri@chromium.org>
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This reverts commit 4aacf83506fd959d1341e29b664f6e4fe97824cb.
Reason for revert: See chromium:1073960
Original change's description:
> system: Clear AP_IDLE when waking up from hibernation by AC
>
> Currently, AP_IDLE is set when EC is left idle in G3. This makes the AP
> stay off after EC wakes up from hibernation (for any wake-up source).
> This makes a board require another power button press to boot the
> system from hibernation.
>
> This change makes RO clear AP_IDLE unless AC is present. When AC is
> present, EC doesn't hibernate. So, AC presence infers the EC woke
> up from hibernation by AC. That is, if the system wakes up by a power
> button press, AP_IDLE is cleared and AP will be turned on (unless it's
> overwritten by AP_OFF).
>
> Tested as follows on Trembyle:
> 1. Put DUT in hibernation.
> 2. Wake up DUT and observe:
> a. When waking up by power button, AP is turned on.
> b. When waking up by lid open, AP is turned on.
> c. When waking up by AC, AP is left idle.
>
> BUG=b:157077589, chromium:1073960
> BRANCH=none
> TEST=See above.
>
> Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
> Change-Id: Ie5020bbe50ad489f4e3010820681cc57ff51b941
> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2236589
Bug: b:157077589
Bug: chromium:1073960
Change-Id: Id92d0d3657a622338581cb111d3925cbc11bf168
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2363080
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org>
Auto-Submit: Daisuke Nojiri <dnojiri@chromium.org>
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Copying TCPMv1 behavior, debounce VBUS at the completion of a SRC to SNK
swap to allow the TCPC/PPC to update the VBUS state following receipt of
the PS_RDY message from the partner.
BUG=b:162347811
BRANCH=none
TEST=make buildall
TEST=Force power role swaps and observe no false disconnects.
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: Ia0644cde64d14044b7e291bf582b68ac4278af0a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2363411
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
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In a device without battery plugged, EC has to wait PD to negotiate to
at least 7.5W. Some charger takes a bit longer to negotiate a PD
contract and misses the timeout. AP won't autoboot. This CL increases
the timeout.
BRANCH=None
BUG=b:165027088, b:150240129
TEST=Unplugged the battery, plugged a PD charger, and AP booted up.
Change-Id: I775f87c2a7c25a3c160bd97d09bbbc1d617095b4
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2360435
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
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This will allow userspace to turn PoE ports off and on.
BUG=b:163786867
TEST=manual
BRANCH=none
Change-Id: Ib9716c5ebc6806f79c8cf85843b93d8c1ff0cba3
Signed-off-by: Jeff Chase <jnchase@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2354544
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
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* BMI160 Base ACC+Gyro
* BMA253 in the LID
BUG=none
BRANCH=firmware-kukui-12573.B
TEST=ectool motionsense to make sure sensors work.
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Change-Id: Iab6dcee5b4226750c649b6a61126ec188ff3a960
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2348733
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
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This patch adds battery parameter as following:
1. DynaPack ATL
2. DynaPack COSMX
3. SIMPLO COSMX
4. SIMPLO HIGHPOWER
5. SAMSUNG SDI
6. COSMX
BUG=none
BRANCH=firmware-kukui-12573.B
TEST=make sure battery charging, battery cutoff works.
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Change-Id: I70a1668f612e45b852406e60e3196a25e032d625
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2359615
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
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This patch adds battery parameter as following:
1. DynaPack ATL
2. DynaPack COSMX
3. SIMPLO COSMX
4. SIMPLO HIGHPOWER
5. SAMSUNG SDI
6. COSMX
BUG=none
BRANCH=firmware-kukui-12573.B
TEST=make sure battery charging, battery cutoff works.
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Change-Id: Ifc3fa4dfdeebb21460ee46572bb9475d607b58de
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2348735
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
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Allow ecst tool to compose the correct firmware header for npcx7m7fc.
BRANCH:none
BUG=b:163910671
TEST=pass "make buildall"
TEST=with the related CLs, change CHIP_VARIANT to npcx7m7fc in
board/npcx7_evb/build.mk; "BOARD=npcx7_evb make";
check the image can be built and the image header is correct.
Signed-off-by: CHLin <CHLin56@nuvoton.com>
Change-Id: If1eb6bc34e53c1ddd9e8f049414dc1e307e6d2c3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2355155
Tested-by: CH Lin <chlin56@nuvoton.com>
Tested-by: Keith Short <keithshort@chromium.org>
Reviewed-by: caveh jalali <caveh@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: CH Lin <chlin56@nuvoton.com>
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change motion sensor base accel and gyro config,
and rotations matrices of lid accel and base.
BUG=b:162940877
BRANCH=none
TEST=Using ectool 'motionsense' verified lid angle now goes
from 0 to 360 and swtiches to tablet mode after crossing 200
threshold.
Change-Id: I2073ed7d64604d4c3a53ee5d9d11ab930840d0dd
Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2352965
Reviewed-by: Keith Short <keithshort@chromium.org>
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CL:2334389 broke the make debug output for the kukui_scp and
flapjack_scp boards. The actual EC image was not affected.
This change also cleans up the #ifdef usage to consolidate assignment of
the output sections into one place.
BUG=b:164696005
BRANCH=none
TEST=make buildall
TEST=Run "util/compare_board.sh -b cortex-m"
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: If69cb492e2aa5f1181e27be24ee66f63cc74ff62
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2359492
Reviewed-by: caveh jalali <caveh@chromium.org>
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Align the CONFIG_USB_PD_TRY_SRC_MIN_BATT_SOC to the value of
BATTERY_LEVEL_CRITICAL, which is 5%.
The BATTERY_LEVEL_CRITICAL is 5% that means EC will send battery-
critical host event when the battery level <= 5%.
CrOS PD policies state that the system doesn't source power to
any external USB devices when AP is shutdown.
So the current CONFIG_USB_PD_TRY_SRC_MIN_BATT_SOC 1% default has
no point. When the battery level is <= 5%, AP should be shutdown
soon and the system should not be a source, so should not enable
Try.SRC.
Also change the comparison from
soc >= CONFIG_USB_PD_TRY_SRC_MIN_BATT_SOC
to
soc > CONFIG_USB_PD_TRY_SRC_MIN_BATT_SOC
as the battery critical check is
soc <= BATTERY_LEVEL_CRITICAL.
BRANCH=None
BUG=b:165057418
TEST=Plugging a PD charger to a board with the battery level very low,
the system boots up (was failed),
Change-Id: If6b11feacd62fd003e13b1756eb5c33d2f9bbce4
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2360543
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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For ITE variants of dedede, lower the EEPROM i2c speed to 400 kHz. This
allows more options for EEPROM parts, but still gives a good speed for
flashing the EC.
BRANCH=None
BUG=b:163846709
TEST=on drawlat, flash and verify CBI can still be read from the EC
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Id7d8190c80e7ff7b75ac0a25af12e7b137ddaaca
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2360457
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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This command is needed so that the EC can perform an SoC-level cold
reset after the CSE Lite jumps from its RO to its RW image.
BUG=b:162977697
BRANCH=none
TEST=`ectool apreset` works
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: Iff6fa572c5660b67152f9930b9bad9f82ff6c6ee
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2360454
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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This commit fixes up an error where two parameters were swapped when
enabling linear mode.
BUG=b:155224387
BRANCH=None
TEST=Build and flash waddledee, verify that linear mode is enabled.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: Id8d28dfafe1ce6f676e0662c1f5de481237fea76
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2358901
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
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Add USBA retimer power control to HDMI retimer power control function to
turn retimers off in S3.
BUG=b:162747874
BRANCH=None
TEST=None
Signed-off-by: Josie Nordrum <josienordrum@google.com>
Change-Id: I449322726f9d5d59c9281359ebdbb890c5931f8f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2352420
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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Add FRS_EN default low for mb/db typec port.
BUG=b:163167407
BRANCH=master
TEST=Check system can power on with AC only.
Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com>
Change-Id: Ie63b0804fed15d006b578bbfd5303196a9168634
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2359610
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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Remove LED_SIDESEL_4_L function and config.
BUG=b:163167407
BRANCH=master
TEST=make buildall success.
Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com>
Change-Id: I91fa57f08b2d6033d4153ed6867bb95fb3811173
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2352957
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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Rename the current usb_pe_drp test to usb_pe_drp_old. There will be
a new usb_pe_drp test that uses mocks and we will move the tests over
in a controlled fashion.
BUG=b:163421994
BRANCH=None
TEST=`TEST_LIST_HOST=usb_pe_drp_old make runhosttests` works.
Signed-off-by: Paul Fagerburg <pfagerburg@google.com>
Change-Id: I2e0f79eb793d888109d00a96567042356c770502
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2357519
Tested-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Paul Fagerburg <pfagerburg@chromium.org>
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_Noreturn was added in C11 and the convenience macro "noreturn" is
specified by stdnoreturn.h:
https://en.cppreference.com/w/c/language/_Noreturn.
BRANCH=none
BUG=none
TEST=make buildall -j
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: I30361bb5290cea1c776a7356f7e3a68edf1f8e39
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2324816
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
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_Noreturn was added in C11 and the convenience macro "noreturn" is
specified by stdnoreturn.h:
https://en.cppreference.com/w/c/language/_Noreturn.
We need our own implementation of the header since we don't include the
compiler's builtins.
BRANCH=none
BUG=none
TEST=make buildall -j
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: Ie6c83e5ed0c331fc14a7f6092dae6220ba20cd54
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2324815
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
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Enable C0/C1 port
BUG=b:160741783
BRANCH=none
TEST=Check TBT and USB4 are working at Gen3 speed.
Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com>
Change-Id: I4e1dd919a0ca35277a95b86eba0ae58db837d31d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2342947
Reviewed-by: Keith Short <keithshort@chromium.org>
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For chip it8xxx2 series and it8320dx, we set embedded flash clock
48MHz as default.
BUG=none
BRANCH=none
TEST=build all
Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw>
Change-Id: I100d70fbf80430ae98fa14c557886c4a37d8b93a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2355164
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Tested-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
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add panel id 0x06 for PANEL_LM_SSM1.
Modified initial setting:
offset = 2, data = 0x46
offset = 5, data = 0x87
BUG=b:162909856
BRANCH=kalista
TEST=make buildall; PANEL_ID and oz554 setting are correct for
the new panel
Change-Id: Ia74e3911b05efdf35ada1d2d28484fba5293aa95
Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2346084
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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This patch modify standard reference of base
and lid accel sensors
BUG=b:160750560
BRANCH=none
TEST=execute ectool motionsense to get values
Signed-off-by: AlvinCC_Hsu <alvincc_hsu@compal.corp-partner.google.com>
Change-Id: I227aa694061f4c77d3d5836a0a8375a682b598a9
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2348235
Reviewed-by: Wai-Hong Tam <waihong@google.com>
Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com>
Tested-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com>
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Set syv682x HV_ILIM when source path enable.
BUG=b:161762373
BRANCH=master
TEST=Use ppc_dump <port> to check the setting correct.
Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com>
Change-Id: I3443762654244e1289700d57acff1c646eb5e66f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2316176
Reviewed-by: Keith Short <keithshort@chromium.org>
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Due to thermal concerns, current on C1 will be limited to 2.0 A on board
version 0.
BRANCH=None
BUG=b:161942987
TEST=on drawcia, plug charger into C1 and verify that the input current
limit is set to 2.0 A
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I66ca0cb095f62c05a7e649b018e4b7b72aa36726
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2341650
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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