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* grunt: Add PWMs for battery / charger LEDsstabilize-10323.31.Bstabilize-10323.30.Bstabilize-10323.29.Bfactory-soraka-10323.BSimon Glass2018-01-183-2/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Connect these up so that we can test the hardware. BUG=b:71902053 BRANCH=none TEST=manually on EC: > pwm PWM channels: 0: 0% 1: 100% 2: 100% > pwm 1 50 Setting channel 1 to 50 1: 50% > pwm 2 50 Setting channel 2 to 50 2: 50% > pwm 1 10 Setting channel 1 to 10 1: 10% See that the colours changes orange/blue Change-Id: I9bc3f4c0eb033f58d7bfe524ba99f8dd2e177eef Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/865101 Reviewed-by: Edward Hill <ecgh@chromium.org>
* CBI: Allow get command to reload data from EEPROMDaisuke Nojiri2018-01-183-4/+25
| | | | | | | | | | | | | | | | | | This patch adds CBI_GET_RELOAD flag to EC_CMD_GET_CROS_BOARD_INFO command. When the flag is set, the command will be forced to read data from EEPROM even, ignoring the data cached by the previous read. This allows ectool to verify a write was successful without reboot. BUG=b:70294260 BRANCH=none TEST=ectool cbi set 0 0x1234 && ectool cbi get 0 1 Change-Id: I3e7ced5be56a74c605870a4c0622c0a2f47963bb Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/874155 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* CBI: Retry read and cache the resultDaisuke Nojiri2018-01-181-12/+19
| | | | | | | | | | | | | | | This patch makes read_board_info retry to read CBI on error. The successive calls will be immediately returned with the cached result. This will avoid attempting reads doomed to fail. BUG=b:70294260 BRANCH=none TEST=ectool cbi get 0 Change-Id: Iacd9cc38bab814af9188c4557c2ee751c421e3a3 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/872259 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* grunt: Enabling backlight lid control moduleJett Rink2018-01-182-8/+14
| | | | | | | | | | | | | Enabling backlight control module with active low mode enabled. BUG=b:72007261 BRANCH=none TEST=Booted grunt board and verified lid sensor toggles backlight Change-Id: I14a6eec01c4cda6fcb4b821b9a4b6f266b8fe78b Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/872234 Reviewed-by: Edward Hill <ecgh@chromium.org>
* scarlet: Use TCPC to detect if AC is presentPhilip Chen2018-01-182-1/+5
| | | | | | | | | | | | | | | | | | | | | After VBUS is up, there is a delay of ~500ms for rt946x to determine 'VBUS is ready'. But we need charger_task to detect AC presence and then set a proper sleep time immediately. When using fusb302 to detect VBUS, I almost don't see any delay. BUG=b:71520398 BRANCH=none TEST=Confirm BATTERY LED turns on immediately when AC is plugged in a Scarlet in G3. Change-Id: If1d6d40081b5822eeb9e012115f8deef172def37 Signed-off-by: Philip Chen <philipchen@google.com> Reviewed-on: https://chromium-review.googlesource.com/869420 Commit-Ready: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* charge_state_v2: Wake charger task when we start/stop providing powerNicolas Boichat2018-01-181-0/+5
| | | | | | | | | | | | | BRANCH=none BUG=b:65697962 TEST=On wand, battery information is quickly updated after (un)pluging AC on lid (otherwise we might have to wait up to 60 seconds). Change-Id: I2bd457ba4d38aa4c99638a2576a4132406416de2 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/859401 Reviewed-by: Shawn N <shawnn@chromium.org>
* fpsensor: fix test buildVincent Palatin2018-01-181-5/+6
| | | | | | | | | | | | | | | | Disable the private fp driver calls for test binaries. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=b:70320279 TEST=make BOARD=meowth_fp tests Change-Id: I16f241a33ead3ea29e7aa955512e05e679a0c551 Reviewed-on: https://chromium-review.googlesource.com/873923 Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* grunt: Add support for I2C bus 5Simon Glass2018-01-182-0/+2
| | | | | | | | | | | | | | | | | | | | This is used by the keyboard backlight driver. Add support for it so we can use this chip. BUG=b:69379749 BRANCH=none TEST=manual: boot AP gpioset KB_BL_EN 1 i2cscan See that bus 5 shows 0x6c now Change-Id: I37dd497688f7d280119bf2a226e23bee35063e0c Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/871135 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* util: flash_ec: Add support to flash npcx7_evb with npcx7m7x chipCHLin2018-01-182-2/+32
| | | | | | | | | | | | | | | | | | | | This CL modified the flash_ec and openocd script to support flashing npcx7m7x chip on npcx7_evb. BRANCH=none BUG=none TEST=Change CHIP_VARIANT to npcx7m7w in board/npcx7_evb/build.mk; "BOARD=npcx7_evb make"; Move npcx7_evb from array BOARDS_NPCX_7M6X_JTAG to BOARDS_NPCX_7M7X_JTAG in util/flash_ec; Connect servo JTAG to npcx7 EVB; "./util/flash_ec --board=npcx7_evb"; Make sure the programing succeed and EVB bootup. Change-Id: I9d448f55321330cbe9a7103d2b617617963ea307 Signed-off-by: CHLin <CHLIN56@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/858989 Commit-Ready: CH Lin <chlin56@nuvoton.com> Tested-by: CH Lin <chlin56@nuvoton.com> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* stm32/usb: Add logic to detect stuck controller in usb_wakeNicolas Boichat2018-01-181-1/+28
| | | | | | | | | | | | | | | | | | | | | | When we tried to go back to sleep immediately after receiving a spurious USB resume event, the controller would get stuck in an unrecoverable state. Hopefully we fixed the resume logic, but this code would catch other cases, and recover the base. BRANCH=none BUG=b:35775088 BUG=b:67766202 BUG=b:71688150 TEST=With badly implemented resume logic (e.g. call usb_resume_deferred directly from usb_resume), with USB autosuspend enabled on soraka, short D+/D- lines. Next wake event from staff shows "USB stuck", and then USB interface recovers. Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Change-Id: I7463a37682723be195bd6a72ea5d76c21bb6cb9a Reviewed-on: https://chromium-review.googlesource.com/868094 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* stm32/usb: Handle spurious wakes in usb_resumeNicolas Boichat2018-01-181-7/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | Sometimes, usb_resume gets called, but the D+/D- lines do not indicate an actual resume event (e.g. during ESD discharge). Reference manual tells we should go back to sleep if state is 10 or 11. However, setting FSUSP and LP_MODE in this interrupt routine seems to lock the USB controller (see b/35775088 and b/71688150). Instead, we do it in a deferred routine. The host must assert the reset condition for 20ms, so reading D+/D- after ~3ms should be safe (there is no chance we end up sampling during a bus transaction). BRANCH=none BUG=b:35775088 BUG=b:67766202 BUG=b:71688150 TEST=On staff, with USB autosuspend enabled on soraka, short D+/D- lines, which causes a spurious wake event. After that remote wake-up still works. TEST=Repeat test with ESD discharge. TEST=Repeat test with plugging/unplugging of USB-C monitor. Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Change-Id: I0f2697d1fa5b68356fd8a4fc16eaab5eadad9086 Reviewed-on: https://chromium-review.googlesource.com/868093 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Add more debugging to run_host_testVincent Palatin2018-01-181-0/+7
| | | | | | | | | | | | | | | | | | | | | | If a host test fails, record the execution state of the EC host process. This is an attempt to provide a hint whether the test was blocked on I/O, if so it might be in 'D' state (but it might have recovered too late too). Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=chromium:715011 TEST=run 'make runtests -j', then run it again with TIMEOUT reduced to 1 see it fail on 'kb_scan' and 'interrupt' tests with the trace containing '*** test [...] in state Ssl+ ***' Change-Id: I4590a4b84a2aba8d385d3ef911d5d0186e8ce2e3 Reviewed-on: https://chromium-review.googlesource.com/859771 Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* backlight: Adding support for active low GPIO signalJett Rink2018-01-183-4/+31
| | | | | | | | | | | | | BUG=b:72007261 BRANCH=none TEST=Verified with grunt board (with is active low) Change-Id: I9a58148b8d92065bec982071ed1d97a466197e9a Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/872233 Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org>
* flash_ec: Support NPCX_INT_SPI using CCD.Aseda Aboagye2018-01-181-8/+35
| | | | | | | | | | | | | | | | | | | | | | A few things needed to be moved around in order for flashing the npcx7 to work over CCD. This commit makes those changes and fixes a small bug with the serial number parameter for raiden devices. (It just needed a space). It also fixes using just a SuzyQable to flash. BUG=b:71548795 BRANCH=None TEST=`./util/flash_ec --board meowth` with a servo_v4 and verify that flashing is successful. TEST=Repeat above test with a servo_v2. TEST=Repeat above test with a servo_micro. TEST=Repeat above test with a SuzyQable. Change-Id: I8ff22fb1d2a5fe7af2ad30a14bf896dbae65c024 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/851354 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* CBI: Add host command to set board infoDaisuke Nojiri2018-01-183-2/+144
| | | | | | | | | | | | | This patch adds host command to write board information in EERPOM. BUG=b:70294260 BRANCH=none TEST=Run ectool cbi set <type> <value> to write BOARD_VERSION, OEM_ID, and SKU_ID. Enable WP and verify cbi set command fails. Change-Id: I39536d146313408ace666f350a107d89b331bf7a Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/865570
* CBI: Add host command to get board infoDaisuke Nojiri2018-01-183-0/+116
| | | | | | | | | | | | | This patch adds host command to get board info from EEPROM. BUG=b:70294260 BRANCH=none TEST=Run ectool cbi get <type> to get board version, OEM, SKU Change-Id: I41a84d3eea6da9d88fa8122db36dcd1df515842d Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/865161 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* CBI: Add cbi-utilDaisuke Nojiri2018-01-182-0/+344
| | | | | | | | | | | | | | | | | | | | | | | | | | | | cbi-util is a build command line tool, which creates a blob containing board information. When invoked with '--show' option, it prints the information stored in a blob and validates the data. BUG=b:70294260 BRANCH=none TEST=Run the command as follows: $ cbi-util --create /path/to/cbi.bin \ --board_version 0xabcd --oem_id 2 --sku_id 3 --size 256 $ cbi-util --show /path/to/cbi.bin CBI blob: /path/to/cbi.bin BOARD_VERSION: 0.1 (0xab.cd) OEM_ID: 2 (0x02) SKU_ID: 3 (0x03) Data validated successfully $ cbi-util --create /path/to/cbi.bin \ --board_version 0xabcd --oem_id 2 --sku_id 3 Missing required arguments $ cbi-util --create /path/to/cbi.bin --board_version 0xabcde Invalid --board_version Change-Id: I7e7b439c50943523039c3cafda3bdf7d08962c61 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/860961 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* CBI: Read board info from EEPROMDaisuke Nojiri2018-01-186-0/+203
| | | | | | | | | | | | | | | This patch adds Cros Board Info APIs. It reads board info from EEPROM. This patch sets CONFIG_CBI for Fizz to make it use CBI. BUG=b:70294260 BRANCH=none TEST=Read data from EEPROM. Change-Id: I7eb4323188817d46b0450f1d65ac34d1b7e4e220 Reviewed-on: https://chromium-review.googlesource.com/707741 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* npcx7: Add definition/configuration for npcx7m6xb/npcx7m7wCHLin2018-01-176-10/+54
| | | | | | | | | | | | | | | | | | | | | | | | In this CL, we add the following changes to support the CHIP_VARIANT npcx7m6xb and npcx7m7w: 1. Define the code RAM, data RAM, BBRAM base address/size. 2. Initialize the wov.c file for WoV driver development. (It will be compiled only when CHIP_VARIANT=npcx7m7w in the build.mk and CONFIG_WAKE_ON_VOICE is defined in board.h) 3. Fix the the incorrect offset of PWDWN_CTRL7 register. BRANCH=none BUG=none TEST=No build errors for make buildall. TEST=Change CHIP_VARIANT to npcx7m7w/npcx7m6xb in board/npcx7_evb/build.mk; "BOARD=npcx7_evb make"; Check ec image can be built. Flash the image on EVB; make sure EVB bootup. Change-Id: I87bccb9097f8f0a6c67f96a8d90adf201ae9e773 Signed-off-by: CHLin <CHLIN56@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/858637 Commit-Ready: CH Lin <chlin56@nuvoton.com> Tested-by: CH Lin <chlin56@nuvoton.com> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* stm32/usb: usb_wake: Update STM32_USB_CNTR with interrupts offNicolas Boichat2018-01-171-1/+5
| | | | | | | | | | | | | | | | | STM32_USB_CNTR may be written from both interrupt context, and usb_wake (not necessarily in interrupt context). Let's disable interrupts to make sure the operation is atomic. BRANCH=none BUG=b:35775088 BUG=b:67766202 BUG=b:71688150 TEST=Flash hammer, hammer can wake from USB autosuspend Change-Id: I9c2a3259902ecb759a6d0d89c7746c7aa72ae73d Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/744282 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* cr50:ap_state: reenable detect ap on interruptMary Ruthven2018-01-171-4/+8
| | | | | | | | | | | | | | | | | | | | | | | ap_state doesn't disable/enable the detect ap interrupt correctly. This means cr50 is mostly just polling the AP state. Cr50 may not realize the AP is up until almost a second after it first turned on. This change reenables the detect ap on interrupt while debouncing the AP state or if Cr50 thinks the AP is off, so cr50 can more quickly detect the transition from off to on. This issue doesn't affect devices that detect the AP with TPM_RST_L, because we never disable the TPM_RST_L interrupt and that handler calls ap_on_deferred directly. BUG=b:71866206 BRANCH=cr50 TEST=run power_state:rec on Dru and make sure there are no tpm irq timeouts. Change-Id: I67388f9dce94fb22efe5755a0de563e5af42f8f5 Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/869410 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* ectool: battery: Allow negative present currentNicolas Boichat2018-01-171-3/+2
| | | | | | | | | | | | | | | Battery interface over host command is different, as it allows negative current values to indicate discharge, let's not fail in that case. BRANCH=none BUG=b:65697620 TEST=ectool battery 1 does not fail when battery is discharging. Change-Id: I89ca750e24706f55a0589201aeaf9fea50f3132f Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/869552 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* meowth_fp: add flashing scriptVincent Palatin2018-01-171-0/+72
| | | | | | | | | | | | | | | | | Simple shell to flash the FP MCU firmware from the AP through the STM32 DFU mode (over the SPI interface). Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=b:71986991, b:36125319 TEST=run flash_fp_mcu on Meowth and see a new FP MCU is flashed Change-Id: I99af754b3ed4916ee04a800859f1b28feb640de1 Reviewed-on: https://chromium-review.googlesource.com/866840 Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* ectool: add servo v2 spi supportVincent Palatin2018-01-176-2/+373
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a new transport for ectool to send host command V3 over the Servo v2 SPI interface using libftdi. Build this new communication mechanism only for the 'build' architecture as it has a dependency on libftdi, the new ectool binary is called ectool_servo. Fix the 'build' tools build if they don't have a source file matching their binary name. The serial number of the servo board can be passed in the 'name' parameter, e.g. : sudo ectool_servo --name=905537-00474 version Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=b:70320279 TEST=with ZerbleBarn connected to a servo V2, run: sudo ectool_servo version Change-Id: Ia7067d465a42f76695fed5932f32fac9a6d0988e Reviewed-on: https://chromium-review.googlesource.com/864164 Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* power/rk3399: Change power-off sequence for KD panelPhilip Chen2018-01-161-1/+1
| | | | | | | | | | | | | | | | | We should turn off PP3300_S0 and then PP1800_S0 to meet KD panel spec. PP3300_S0 has to be on in S3_WoUSB, so PP1800_S0 also has to be on - let's move PP1800_S0_EN to s0s3_usb_wake_power_seq. BUG=b:71057948 BRANCH=none TEST='suspend_stress_test' for 10+ cycles without seeing things go wrong Change-Id: Ic44411062b4c9e857b9f8ca6565550ba8bd2f950 Signed-off-by: Philip Chen <philipchen@google.com> Reviewed-on: https://chromium-review.googlesource.com/862254 Commit-Ready: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Philip Chen <philipchen@chromium.org>
* glkrvp: Enable eSPI instead of LPC including eSPI VW based SCI/SMIShamile Khan2018-01-163-3/+9
| | | | | | | | | | | | | | BUG=None BRANCH=None TEST=GLKRVP can boot to OS when a coreboot image with eSPI enabled is flashed. Change-Id: Ia534bdbbe517c53ba2e0beafc41b421872f1e33d Signed-off-by: Shamile Khan <shamile.khan@intel.com> Reviewed-on: https://chromium-review.googlesource.com/818196 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* power: introducing pwr_avg console commandRuben Rodriguez Buchillon2018-01-166-0/+85
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | pwr_avg provides an average voltage, current, and power over the last 1 minute. It's up to the battery drivers to implement this functionality. This change allows us to have better power tracking while minimizing the power impact on the EC, because - the pwr_avg command only needs to be called once every minute, and is short, thus less expensive to parse on ECs without a UART buffer - the work done to keep the avg is partially done by the batteries already and it's just a question of retrieving it. undefined on wheatley since no power debugging planned on that board. usage: > pwr_avg mv = 7153 ma = -605 mw = -4327 BUG=chromium:752320 BRANCH=None TEST=make buildall -j Change-Id: Id1a3479d277aedf90dfa965afb4ee9136654b1cf Signed-off-by: Ruben Rodriguez Buchillon <coconutruben@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/823884 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* grunt: Enable TCPC + PPC interrupts and overcurrent GPIOsEdward Hill2018-01-162-3/+23
| | | | | | | | | | | BUG=b:69378796 BRANCH=none TEST=PD still works on both ports Change-Id: I6c9d378483d141db821da2a717cf1256099b01ec Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/867234 Reviewed-by: Aaron Durbin <adurbin@google.com>
* grunt: Set source current limit to enable 3A outputEdward Hill2018-01-161-4/+8
| | | | | | | | | | | | | Call ppc_set_vbus_source_current_limit to enable 3A output. BUG=b:69378796 BRANCH=none TEST=connect PD sink and see 5V 3A on both ports Change-Id: Ia38ebcb3b1b3d1148a00b3050fcda2bd2cf73af5 Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/866158 Reviewed-by: Justin TerAvest <teravest@chromium.org>
* grunt: Don't return error when disabling all charge portsEdward Hill2018-01-161-8/+4
| | | | | | | | | | | | | | | | | | charge_manager_refresh() asserts that board_set_active_charge_port(CHARGE_PORT_NONE) returns EC_SUCCESS, so if port 1 on Grunt's daughter board is disconnected, the EC gets stuck in an assert crash loop. Just printing the error and continuing seems like a better way to handle the missing port. BUG=b:71955904 BRANCH=none TEST=grunt with no daughter board doesn't assert Change-Id: I8a0f79e45c7b564794498cfc41bcc4acd8fd231f Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/866214 Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Justin TerAvest <teravest@chromium.org>
* nautilus: support BC1.2 on USB Type-A portYB.Ha2018-01-153-2/+21
| | | | | | | | | | | | | | support BC1.2 on USB Type-A port BUG=b:71775046 BRANCH=none TEST=build/flash nautilus Change-Id: Iff9e95d06c0498d8f093d508bc50a0754e973c37 Reviewed-on: https://chromium-review.googlesource.com/858979 Commit-Ready: YongBeum Ha <ybha@samsung.com> Tested-by: YongBeum Ha <ybha@samsung.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* wand: Enable CONFIG_CHARGE_RAMP_HWNicolas Boichat2018-01-141-0/+2
| | | | | | | | | | | | | | | Enable ramping by default. Follow-up CL will have EC-EC master tell the slave if it's necessary to ramp. BRANCH=none BUG=b:71840796 TEST=lux fully charged, in S0ix, wand connected. Connect old BC1.2 charger, see that the charger is not browning out anymore. Change-Id: I5f1052257db4c581bcb700c7f0306f14f792ea03 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/863349 Reviewed-by: Shawn N <shawnn@chromium.org>
* battery: Add support for reading base battery through host commandNicolas Boichat2018-01-142-12/+163
| | | | | | | | | | | | | | | | | | | | This adds support for EC_CMD_BATTERY_GET_STATIC and EC_CMD_BATTERY_GET_DYNAMIC host commands, that can currently only fetch the base battery information using index = 1. In the future, all battery information can be passed to AP using these host commands (i.e. lid could provide its own battery information on index = 0). BRANCH=none BUG=b:65697620 TEST=ectool battery shows lid battery information (no change) TEST=ectool battery 1 shows base battery information Change-Id: Ib819e4917b3acc337348764f6cc2aa7380bed700 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/863863 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* grunt: Fix ENABLE_BACKLIGHT to be active lowEdward Hill2018-01-144-5/+29
| | | | | | | | | | | | | | BUG=b:71806495 BRANCH=none TEST=backlight turns on in S0 Change-Id: Ib9271d6cbe9befdf4ed492a9c2b676452e5f4d9b Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/865155 Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Justin TerAvest <teravest@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* grunt: Enable BMI160 gyro interruptsEdward Hill2018-01-142-1/+8
| | | | | | | | | | | | | | | Setup bmi160_interrupt and enable in board_init. BUG=b:69379621 BRANCH=none TEST=none Change-Id: I80d08146367af0b91d8d9ac1495c85fe8edd0203 Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/864827 Reviewed-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* grunt: Add CONFIG_VBOOT_HASHEdward Hill2018-01-141-7/+4
| | | | | | | | | | | | | | | The vboot hash calculation needs to be enabled for EC software sync. BUG=b:64935726 BRANCH=none TEST=see hash on console Change-Id: I2d26ef997fc9ed803e80cc716a518a2834632269 Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/864826 Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Aaron Durbin <adurbin@google.com>
* rainier: final fix for accel orientation.Ege Mihmanli2018-01-121-2/+2
| | | | | | | | | | | | | | Rainier has landscape orientation and last patch was 90 degrees off in its base rotation value. BUG=b:71753415 TEST=Flash ec on rainier and tilt device. BRANCH=None Signed-off-by: Ege Mihmanli <egemih@google.com> Change-Id: I1d0837b2391ec4d0051c6c9af984d801264fe64c Reviewed-on: https://chromium-review.googlesource.com/865803 Reviewed-by: Shawn N <shawnn@chromium.org>
* meowth: zoombini: Check for battery disconnect.Aseda Aboagye2018-01-122-0/+46
| | | | | | | | | | | | | | | | | | | | | | This commit enables support for reviving a battery from disconnect while also providing the code to detect if the batteries are disconnected or not. The disconnection code behaves similarly to some other battery packs used in Chromebooks. BUG=b:71515229 BRANCH=None TEST=Flash zoombini; cut off battery; apply AC and verify that we do not leave safe mode until the battery is no longer "disconnected". TEST=Repeat above test for meowth. TEST=Cutoff the battery and apply AC and verify that board wakes up from cutoff. Change-Id: I52fe91bd6522901671ad5a302bfa0ca27e5f5aa0 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/864830 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* grunt: Add I2C support for the BMI160Simon Glass2018-01-121-0/+2
| | | | | | | | | | | | | | | | | We need to enable I2C_PORT_ACCEL so that the driver supports I2C transfers. BUG=b:71877225 BRANCH=none TEST=On EC console: > accelinit 1 > accelread 1 With this CL we avoid an error Change-Id: I9b7018ef9615992d91fbf8685832ff73c3cc1172 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/863206 Reviewed-by: Edward Hill <ecgh@chromium.org>
* grunt: Enable the CPU temperature sensorSimon Glass2018-01-122-0/+6
| | | | | | | | | | | | | | | | | | | | Set this up so we can measure the CPU temperature. BUG=b:71868256 BRANCH=none TEST=on EC: > temps Charger : 312 K = 39 C SOC : 321 K = 48 C CPU : 331 K = 58 C CPU shows 58 C (which seems a lot cooler than it actually is) Change-Id: Ia625e36b95a566aa436eff751c2ebf5863d984ad Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/862885 Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Justin TerAvest <teravest@chromium.org>
* grunt: rename volume GPIOsEdward Hill2018-01-122-4/+2
| | | | | | | | | | | BUG=b:64935726 BRANCH=none TEST=press volume buttons, see console messages Change-Id: I327a166e05bd815acc66d2f6e30fe8ae9d6d1cce Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/864825 Reviewed-by: Simon Glass <sjg@chromium.org>
* meowth_fp: enable the hostcmd interfaceVincent Palatin2018-01-124-2/+6
| | | | | | | | | | | | | | | | | Use the SPI1 controller as the host command slave interface. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=b:67081508 TEST=On reworked Meowth board with ZerbleBarn connected to the PCH SPI bus, use to the kernel cros_ec interface to communicate with the MCU. Change-Id: Ia7bdc72677cda2752a0849266282d2a779980152 Reviewed-on: https://chromium-review.googlesource.com/860933 Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* stm32: add SPI slave support for STM32H7Vincent Palatin2018-01-122-11/+51
| | | | | | | | | | | | | | | | | | Update the host command support on the STM32 SPI slave for the STM32H7 silicon. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=b:67081508 TEST=with a servo v2 connected to ZerbleBarn, send host commands v3 through the servo FTDI SPI interface. Change-Id: I26ff4b6a3a45e446cd16e9da43c6932c24c37256 Reviewed-on: https://chromium-review.googlesource.com/839864 Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* gsctool: add options to control ccdVadim Bendebury2018-01-121-10/+133
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The user needs to be able to unlock/open/lock CCD in addition to setting the CCD password. This patch adds command line options for these three CCD subcommands. They all are communicated to the TPM using the same vendor command. 'open' and 'unlock' subcommands could require the user to enter the password. This is indicated by the appropriate vendor command return code. If return code of 'open' or 'unlock' subcommand indicates the need for physical presence, the utility starts polling the Cr50 prompting the user to press the power button when the chip expects it. Some input parameters sanity checks are added to make sure that the user does not request mutually exclusive actions. BRANCH=none BUG=b:62537474 TEST=verified that CCD can be unlocked and opend with and without password, with and without PP required. Change-Id: Iea229a220e9f3d2f5d07cebdaebcb9b297939310 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/861209 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* ccd: add distinct return code to indicate that password is requiredVadim Bendebury2018-01-122-2/+3
| | | | | | | | | | | | | | | | | | When user is trying to execute 'ccd open' or 'ccd unlock' and password is set, the return error code does not allow to tell the reason for the command failure. Let's add a distinct return code to indicate this condition so that the user can supply password. BRANCH=cr50 BUG=b:62537474 TEST=verified along with the accompanying gsctool modifications. Change-Id: I286f87ab12114cd7dd7ebcdf0e321f7a24723367 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/861208 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* gsctool: allow password handling function to run on different subcommandsVadim Bendebury2018-01-121-6/+15
| | | | | | | | | | | | | | | | | | | | | With the upcoming addition of ability to manage CCD using gsctool, it is necessary to send user password in several CC_CCD subcommands. This patch modifies the password handler to allow the user to specify the subcommand code to use. VENDOR_RC_IN_PROGRESS is added to the list of acceptable return codes, as this is what could be returned in response to 'ccd unlock' or 'ccd open'. BRANCH=none BUG=b:62537474 TEST=verified that password still could be set and cleared from the CLI and gsctool Change-Id: Ic58f344a728897fb535cd9b7bedd47d28b30f5f8 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/861207 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* ccd: use async TPM reset where requiredVadim Bendebury2018-01-121-7/+27
| | | | | | | | | | | | | | | | | | | | | When TPM is wiped out on 'ccd open', the TPM reset could be invoked on the TPM task context, if physical presence verification was not required, or on the hooks task context, if PP was required. This patch makes sure that the proper TPM reset is invoked depending on the context. Also fixing the return value in ccd_command_wrapper(), because it is expected to be from the ec_error_list enun, and this is what is returned in the vendor command error response payload. BRANCH=cr50 BUG=b:62537474 TEST=verified that TPM and device reset happen smoothly in both cases when 'ccd open' requires and does not require PP. Change-Id: I1935fc90b386bb8f2158001e153da371fca22d03 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/861206 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* ccd: 'pp polling' vendor command optionVadim Bendebury2018-01-122-0/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When implementing 'ccd open' and 'ccd unlock' through gsctool, we need to be able to pass to the host the state of the physical presences state machine regarding the expected user action (pressing the PP button). Two new VENDOR_CC_CCD subcommands are being added: CCDV_PP_POLL_OPEN and CCDV_PP_UNLOCK. In response to these commands, the Cr50 always returns VENDOR_RC_SUCCESS return code and a single byte payload showing the CCD and PP state: - CCDPP_CLOSED - PP process is not running, CCD closed. Maybe user missed a button press deadline. - CCDPP_AWAITING_PRESS (self explanatory) - CCDPP_BETWEEN_PRESSES (self explanatory) - CCDPP_PP_DONE - CCD is opened/unlocked (as per user request), PP process succeeded. BRANCH=cr50 BUG=b:62537474 TEST=with the upcoming change to gsctool verified that PP states are properly conveyed to the user. Change-Id: I97b1fef4440eea93c5c5ac01b7c60bfce9a4595c Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/861001 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* ccd: do not allow 'unlock' from console unless password is setVadim Bendebury2018-01-121-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | CCD management policies explicitly prohibit running the 'unlock' command from the Cr50 CLI unless CCD password is set. This patch enforces the policy. BRANCH=cr50 BUG=b:62537474 TEST=ran the following commands on the Cr50 console: > ccd State: Locked Password: none ... > ccd unlock Cann't unlock without password Access Denied Usage: ccd [help | ...] > Change-Id: I5a14a54049a233e86e097064ff235e9b7a8bbb86 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/861000 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* ccd: add 'in progress' return valueVadim Bendebury2018-01-122-7/+14
| | | | | | | | | | | | | | | | | | | | | | | | Depending on device configuration and compile time options, CCD commands 'open' and 'unlock' could either be executed immediately, or require the user to take the device through physical presence state machine. As these commands execute through TPM vendor commands, there needs to be a different return value indicating that the command action is not finished and PP process is in progress. Let's add another vendor command return value, and do not consider it a failure if vendor command returns this value in response to 'ccd open' or 'ccd unlock'. BRANCH=cr50 BUG=b:62537474 TEST=took an Eve through 'ccd open' sequence Change-Id: Ie62ccfb4319a13b6fb6c1c854a0ea26beb9f517c Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/860999 Reviewed-by: Randall Spangler <rspangler@chromium.org>
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