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* nocturne: Remove CONFIG_SYSTEM_UNLOCKED.stabilize-11005.BAseda Aboagye2018-08-251-3/+0
| | | | | | | | | | | | | | BUG=b:113127952 BRANCH=firmware-nocturne-10984.B TEST=Enable HW/SW WP, plug in a PD charger, verify no PD communication is done in RO. Change-Id: Idc9219c70662b1b51e228863e2bd51a72cecb2b1 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/1188929 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* servo_v4: clear bbram PD state on rebootNick Sanders2018-08-251-0/+6
| | | | | | | | | | | | | | | Preserved bbram state causes failure to reinit on reboot. Clear on board init. BRANCH=None BUG=b:111573811 TEST=PD reinits on reboot. Change-Id: Ifdf98b5793cb99e2900ac5dc53263a86317b6b07 Signed-off-by: Nick Sanders <nsanders@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1187883 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Fleex: Modify shipping mode register and FETelthanhuang2018-08-251-10/+9
| | | | | | | | | | | | | | | | | | | | | | | status register and data Modify LGC/BYD board_battery_info of shipping mode reg_addr and LGC/BYD/Simplo FET status of reg_addr/reg_mask BUG=b:112322236,b:112237278 BRANCH=none TEST=Use "ectool batterycutoff", system can shutdown. Plugin AC can power on system and battery return BATTERY_NOT_DISCONNECTED. Change-Id: I0d7a2b2c9d27a058b67f7b48970aaaab2ebee9b8 Signed-off-by: elthanhuang <elthan_huang@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1170669 Commit-Ready: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Tested-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Scott Collyer <scollyer@chromium.org>
* bd99992: add some more register definitionsCaveh Jalali2018-08-242-6/+18
| | | | | | | | | | | | | | | | | this adds definitions for some additional PMIC registers we're using in our codebase. BUG=b:112732855 BRANCH=none TEST=flashed atlas with new EC build Change-Id: Ibad7b11b3770f00c925c2d8fc3b24109147aa643 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1187899 Commit-Ready: caveh jalali <caveh@chromium.org> Tested-by: caveh jalali <caveh@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: caveh jalali <caveh@chromium.org>
* cheza: Use BC1.2 to detect VBUS presentWai-Hong Tam2018-08-241-1/+1
| | | | | | | | | | | | | | | | | | | There are several ways to detect VBUS present. Using the BC1.2 to detect is through a GPIO. It is more effective than talking to the TCPC chip over I2C comm. Change the config from CONFIG_USB_PD_VBUS_DETECT_TCPC to CONFIG_USB_PD_VBUS_DETECT_CHARGER. BRANCH=none BUG=b:112179392 TEST=Plugged and unplugged charger to port-0 and port-1. Verified the charging state correct. Change-Id: I9dd69cd17099b5794988efca9d8c7a82af3614a5 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/1170126 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* chip/npcx: Make check_reset_cause() staticSimon Glass2018-08-241-3/+2
| | | | | | | | | | | | | | | This function is not called from outside this file so make it static. Also drop a pointless comment, and rename the function since the 'system' prefix suggests it is defined in system.h (which it is not). BUG=chromium:876737 BRANCH=none TEST=make -j50 BOARD=grunt Change-Id: Ic429fb1da2e56e1888e008f4739c90e8ed2c1947 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1184975 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* ec3po: quit console & interpreter loop when parent process changes.Ruben Rodriguez Buchillon2018-08-242-6/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Right now, when the parent process dies ungracefully - say kill -9 - then the interpreter, and console processes remain active. This leads to bugs in the servod implementation from holding on to sockets, to reinitialization issues of a new instance on the same servod device. This change quits the loops inside console & interpreter as soon as the parent pid changes (i.e. the parent dies). BRANCH=None BUG=chromium:841121 TEST=sudo servod -b soraka ps aux | grep servod >xxxxx servod >xxxxy servod >xxxyx servod >xxxaa grep servod sudo kill -9 xxxxx ps aux | grep servod >xxxab grep servod Before this, just kill -9 on the main thread did not take the children with it. Change-Id: I547bd92bf8732bff8aef2b72840417c809ba27d6 Signed-off-by: Ruben Rodriguez Buchillon <coconutruben@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1186299 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Nick Sanders <nsanders@chromium.org>
* power/mt8183: Power sequence from S5, not G3Nicolas Boichat2018-08-241-19/+22
| | | | | | | | | | | | | | | | | | | The previous code was switching on the AP on G3 to S5 transition, this causes problems as there is a 10s timeout in the S5 to G3 transition, so we would not be able to boot the AP from S5. The only difference now between S5 and G3, is the case where the PMIC fails to shut down properly: we only enter G3 if the PMIC shuts down as expected. BRANCH=none BUG=b:109850749 TEST=make BOARD=kukui -j Change-Id: I260146e6d4622a76ad3a53d67fdde43a8669697c Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1181008 Reviewed-by: Wai-Hong Tam <waihong@google.com>
* cheza: Configure ANX3429 interrupt as open-drainWai-Hong Tam2018-08-234-1/+16
| | | | | | | | | | | | | | | | | This interrupt pin by default is a push-pull. It causes leak to EC VSPI power during EC watchdog reset. As in our design, we use this interrupt pin as open-drain. Should configure the register to make it open-drain. BRANCH=none BUG=b:112906111 TEST=Flashed the EC image to Cheza rev-2 board. Typed "reboot" command and then EC reset properly. Change-Id: Iee5db3cb5b5291778d97dee4fc70369d34344ce7 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/1185871 Reviewed-by: Alexandru M Stan <amstan@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* octopus: update bip for lower power hibernateJett Rink2018-08-233-24/+52
| | | | | | | | | | | | | | | | | | | | Pulled hibernate_wake_pins into each EC variant because the 4/5 item array was getting pretty fractured. Bip EC now wakes up based on PPC interrupts instead of AC_PRESENT. This allows the PPCs to disable the SNK FET (and all OVP circuitry). The power won't get from the USB-C connector to the battery charger until the EC wakes up, but that isn't an issue. BRANCH=none BUG=b:111006203,b:111520593 TEST=bip PD_A rail is 3.97mW during hiberate with this CL stack Change-Id: I2d08ca5bb2b0b7181c7a0f0c5894b8f59ccbd85f Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1166184 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* sn5s330: add low power modeJett Rink2018-08-234-22/+106
| | | | | | | | | | | | | | | | Add a low power mode method for PPCs behind a new config. Implement the low power method for SN5S330 based off of TI AE recommendation. BRANCH=none BUG=b:111520593,b:111006203 TEST=CL stack produce lower power during bip hibernate Change-Id: Icd22f88a8f65c2cd5ab1c95b0750b1eb61e91923 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1166183 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* tcpc/mt6370: Fix state debouncing when enable auto-toggling w/o battery.Yilun Lin2018-08-232-11/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | mt6370 updates CC pin information to different registers according to whether it is DRP toggling or not. When DRP toggling: CC information will update to CC_STATUS 0x1D When DRP not toggling: CC information will update to ROLE_CTRL 0x1D However, there is a situation that when we are enabling CONFIG_USB_PD_DUAL_ROLE_AUTO_TOGGLE: When we detach the battery, and plug type-c port to boot EC, the type-c port is already connected, before auto-toggling is on. mt6370 here updates CC information to ROLE_CTRL 0x1D, rather than CC_STATUS. So here, we should determine where to retrieve the CC information dynamically. BRANCH=None BUG=b:112113303 TEST=w/ battery: check state transition behaves correctly when sourcing and sinking. TEST=w/o battery: check state transition behaves correctly when sinking. Change-Id: Icf9e39f68aedb43a8fceba5d31795126a433d547 Signed-off-by: Yilun Lin <yllin@google.com> Reviewed-on: https://chromium-review.googlesource.com/1177465 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Yilun Lin <yllin@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* tcpm:it83xx: GRL-USB-PD TDA2.1.2.1 BMC testRuibin Chang2018-08-231-0/+22
| | | | | | | | | | | | | | | | | | According to BMC signaling scheme of PD3.0 spec, we should set different Rx threshold in SRC and SNK role for well performance of receiving data. So we add these settings and can pass GRL-USB-PD compliance TDA2.1.2.1 test item. BUG=none BRANCH=none TEST=GRL-USB-PD compliance test. Change-Id: Ie4fccaa362a83462e57237ed4f0cbe5683da2fea Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw> Reviewed-on: https://chromium-review.googlesource.com/1170721 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* usb-pd: Exit DP mode before shutdownDaisuke Nojiri2018-08-232-1/+23
| | | | | | | | | | | | | | | | | | | | | | On start-up, the tcpm tries to discover identity and enter amodes. When system reboots, this makes already entered modes re-entered. This causes some devices to malfunction. This patch makes the tcpm exit DP mode if it's already entered. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=chromium:799535,b:79185392 BRANCH=none TEST=Verify picture is displayed on external monitor after suspend/resume, shutdown/power-on via D6000, Hoho, Aplle HDMI adapter, StarTech DP adapter, Dingdong with Vayne. Change-Id: I1fd577e12eaa5a81a0ae0242d38863dc211ac8bc Reviewed-on: https://chromium-review.googlesource.com/1100165 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* cr50: only enable rbox wakeup during sleepMary Ruthven2018-08-236-17/+44
| | | | | | | | | | | | | | | | | | | | | | | Enable rbox wakeups before entering any form of sleep. Disable them immediately on resume. Without rbox wakeups enabled during normal operation, we don't need to worry about clearing them after every rbox interrupt. In TOT we missed clearing the power button rbox wakeup. This was causing cr50 to wake up immediately after entering regular sleep. It caused a ton of pmu interrupts and prevented cr50 from staying asleep. With this change cr50 enters enters sleep and deep sleep normally. It only resumes when there's a real wakeup. BUG=none BRANCH=cr50 TEST=verify power button can still wake cr50 from sleep and deep sleep. Run firmware_Cr50DeviceState with TOT Change-Id: I56bf81c19a6e32750dc9d21be7f27188635dd662 Signed-off-by: Mary Ruthven <mruthven@google.com> Reviewed-on: https://chromium-review.googlesource.com/1180572 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Mary Ruthven <mruthven@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* usb_pd_protocol: Correct pd command help.Yilun Lin2018-08-231-5/+20
| | | | | | | | | | | | | | | After CL:1096654 merged, the command help should also be updated. TEST=make flash_ec BOARD=kukui; see pd's help message. BRANCH=None BUG=b:72557427 Change-Id: Id5eefbded520c906f79548171337b57ab16fe6d9 Signed-off-by: Yilun Lin <yllin@google.com> Reviewed-on: https://chromium-review.googlesource.com/1179489 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Yilun Lin <yllin@chromium.org> Reviewed-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org>
* kukui/emmc: Disable eMMC emulation when not neededNicolas Boichat2018-08-232-17/+80
| | | | | | | | | | | | | | | | | | | | | | | | When AP is off, or after it has booted, disable eMMC emulation, to save power. We also add a new sleepmask bit SLEEP_MASK_EMMC to make sure the EC does not deep sleep when emulating eMMC (timing is very critical). We only try to emulate for 5 seconds after boot, after which we shut down the SPI controller. 5 seconds is enough for multiple boot attempts by the AP. BRANCH=none BUG=b:110907438 TEST=Power up kukui, apshutdown, powerb, repeatedly, see that AP always boots up properly. TEST=EC power consumption in S5/G3 drops from ~6mW to 0.6mW. Change-Id: I32cc11418faa695ccf340784acbe7fa99bf74d8c Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1181009 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Yilun Lin <yllin@chromium.org>
* kukui: Hack away SPI1_NSS on rev0Nicolas Boichat2018-08-231-4/+11
| | | | | | | | | | | | | | | | | We have an interrupt conflict between SPI1_NSS and EMMC_CMD on rev0, let's only enable EMMC_CMD for now. rev1 fixes the issue by tying EMMC_CMD to A15 as well. BRANCH=none BUG=b:110907438 TEST=make BOARD=kukui -j Change-Id: I4d3649d5ff07c778279c832be71d74410b2d4c40 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1123660 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Yilun Lin <yllin@chromium.org>
* Move fuzzing tests into a fuzz subfolder.Allen Webb2018-08-2210-11/+56
| | | | | | | | | | | | | BRANCH=none CQ-DEPEND=CL:*664115 BUG=chromium:876582 TEST=make -j buildall && make -j buildfuzztests Change-Id: Iade5e5138f495e6b3b99ec16f1a467861ade5537 Signed-off-by: Allen Webb <allenwebb@google.com> Reviewed-on: https://chromium-review.googlesource.com/1180179 Reviewed-by: Mattias Nissler <mnissler@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* kukui: Update GPIO for board rev1.Yilun Lin2018-08-223-10/+53
| | | | | | | | | | | | | | | | | | kukui has many GPIO pin changes in rev1. Getting idea from oak, we use BOARD_REV=n to support building images for different board revisions. BOARD_REV defaults to 0 for now. TEST=make BOARD=kukui -j TEST=make BOARD=kukui -j; modify BOARD_REV=1, make BOARD=kukui -B -j BUG=b:80159522, b:112616655 BRANCH=None Change-Id: I49624d541eb9cc50c5d48abaa8699485b64bac28 Signed-off-by: Yilun Lin <yllin@google.com> Reviewed-on: https://chromium-review.googlesource.com/1135880 Commit-Ready: Yilun Lin <yllin@chromium.org> Tested-by: Yilun Lin <yllin@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* CEC: Cleanup the API for the CEC buffer handlersStefan Adolfsson2018-08-224-139/+185
| | | | | | | | | | | | | | | | Since this now lives in common/, make it look a bit nicer. Signed-off-by: Stefan Adolfsson <sadolfsson@chromium.org> BUG=b:80288314 BRANCH=none TEST=emerge-fizz chromeos-ec && make -j runtests Change-Id: I2fb10e2524af13c776ea067d8a24b4cd552c9ecb Reviewed-on: https://chromium-review.googlesource.com/1073416 Commit-Ready: Stefan Adolfsson <sadolfsson@chromium.org> Tested-by: Stefan Adolfsson <sadolfsson@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* CEC: Add unit tests for buffer handlingStefan Adolfsson2018-08-225-2/+159
| | | | | | | | | | | | | | | | | | Makes sure that we don't have and that we don't introduce buffer overflows in the CEC buffer handling. Signed-off-by: Stefan Adolfsson <sadolfsson@chromium.org> BUG=b:80288314 BRANCH=none TEST=make -j runtests Change-Id: Iad5f79add99e2582e60f0d11ed53a27ac67e8b8c Reviewed-on: https://chromium-review.googlesource.com/1073415 Commit-Ready: Stefan Adolfsson <sadolfsson@chromium.org> Tested-by: Stefan Adolfsson <sadolfsson@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Zhongze Hu <frankhu@google.com>
* CEC: Make buffer handling code unit testableStefan Adolfsson2018-08-224-158/+191
| | | | | | | | | | | | | | | | | | | Moving code to common/ to be able to write some unit test. The API in cec.h will be refactored in a later commit since it does not look so nice for a common API. However, it is better to do the refactoring after the unit tests are in place Signed-off-by: Stefan Adolfsson <sadolfsson@chromium.org> BUG=b:80288314 BRANCH=none TEST=emerge-fizz chromeos-ec Change-Id: I2d675689cc40248d74bf812bd6c86125d681767d Reviewed-on: https://chromium-review.googlesource.com/1073414 Commit-Ready: Stefan Adolfsson <sadolfsson@chromium.org> Tested-by: Stefan Adolfsson <sadolfsson@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* build.mk: specify corebook_sdk by CROSS_COMPILE_corebook_sdk_*Wei-Han Chen2018-08-221-1/+4
| | | | | | | | | | | | | | | CQ-DEPEND=CL:1180950 BUG=chromium:851727,b:65441143 BRANCH=none TEST=cros_run_unit_tests --packages chromeos-ec TEST=make buildall -j Signed-off-by: Wei-Han Chen <stimim@chromium.org> Change-Id: I12ee0c9e0090212d1b4ca2ddb240439dea1c7f4b Reviewed-on: https://chromium-review.googlesource.com/1180951 Tested-by: Wei-Han Chen <stimim@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Commit-Queue: Wei-Han Chen <stimim@chromium.org>
* ICL: Fix the timeout value for SUS_SLP_L in G3S5 stateScott Collyer2018-08-221-3/+7
| | | | | | | | | | | | | | | | | | | | | | | | The function power_wait_signals_timeout() expects the timeout value to be in usec, but a value in msec was being passed in. In addition, measuring on a system shows that the signal wait is ~150 msec, so increased the timeout value to 250 mSec. BUG=b:112913718 BRANCH=none TEST=Verfied that with this change I no longer see the console message: SLP_SUS_L didn't go high! Assuming G3. powerinfo shows: > powerinfo [2470.263452 power state 3 = S0, in 0x003f] Change-Id: I6564cbab638b80234a2574f3f700d1f33c516de1 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1184330 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
* DragonEgg: Enable/disable battery learn mode based on ACScott Collyer2018-08-221-0/+43
| | | | | | | | | | | | | | | | | | | | | | This CL is a software workaround for an issue with the bq25710 charger. There is an issue with the converter control loop not being biased correctly when it starts switching. This leads to a reverse current (from battery to charger). To avoid this issue, the switching converter is turned off when AC is not present, then only enalbed 200 msec after AC presence is detected. BUG=b:112372451 BRANCH=none TEST=Veried that reverse buck/boost not present with this CL and that charger still functions as expected. Change-Id: I4d3a975e3c0e24cdf7f13fdab69da32ccd70a428 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1168597 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* common: add API to expose detachable "base" stateDmitry Torokhov2018-08-226-1/+70
| | | | | | | | | | | | | | | | | | On some detachables, when base is attached, we know right away that the device should transition from tablet to clamshell mode. However on other detachables we need additional information (i.e. base position) before we decide whether to transition in/out of tablet mode. For such detachables let's allow them to signal a new "base attached" switch event, so that the rest of the stack is not confused. BUG=b:73133611 BRANCH=nocturne TEST=Build and boot Change-Id: I9be3450cba52bf9f0bad8333402f68b0c7903090 Signed-off-by: Dmitry Torokhov <dtor@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1176801 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* atlas: update ALS scale factorCaveh Jalali2018-08-221-2/+2
| | | | | | | | | | | | | | | | | | this fixes the ALS reading scale factor so we actually get a decent range of values based on ambient light intensity. this scale factor still needs to be calibrated, but is a good guess based on nocturne. BUG=b:112784910,b:112863863 BRANCH=none TEST="accelinfo on" on EC console now reports sensible readings from the ALS Change-Id: I540b1557523a725786013155e276eafd5993e036 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1180613 Commit-Ready: Caveh Jalali <caveh@google.com> Tested-by: Caveh Jalali <caveh@google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* bmi160: End IRQ handler if sensor isn't powered.Aseda Aboagye2018-08-221-1/+6
| | | | | | | | | | | | | | | | | | | It's possible for the interrupt to be triggered and then when the bottom half of the interrupt handler gets a chance to run, the sensor isn't powered anymore. This commit simply has the loop terminate early if the board indicates that the bus the sensor is on is no longer powered. BUG=b:111683988 BRANCH=nocturne TEST=Verify if IRQ handler is called when sensor is not powered, the irq_handler loop terminates. Change-Id: Iaf395902bb4b46a5b6d750c99767c4c36b1e7a99 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/1182879 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* nocturne: Enable CONFIG_I2C_BUS_MAY_BE_UNPOWEREDAseda Aboagye2018-08-222-0/+10
| | | | | | | | | | | | | | | | The sensor power rail is unpowered in S5, therefore enable this config option. BUG=b:111683988 BRANCH=Nocturne TEST=Verify that board_is_i2c_port_powered() is called. Change-Id: I5605c860efc61307627f7aff270e2a1414ded57b Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/1182878 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* i2c: Don't try to unwedge unpowered busses.Aseda Aboagye2018-08-223-0/+29
| | | | | | | | | | | | | | | | | | | | | | | If an i2c bus is known to be unpowered, we should not spend time trying to unwedge it. It's futile, so stop trying. This commit adds a config option, CONFIG_I2C_BUS_MAY_BE_UNPOWERED which can be defined by a board if a bus may be unpowered during runtime. BUG=b:111683988 BRANCH=nocturne TEST=Verify that unwedge attempts are skipped if the bus is deemed unpowered. Change-Id: Ice12b3957121be476ef0173a86f239f183010b47 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/1182877 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* common: add BASE_CHANGE hookDmitry Torokhov2018-08-218-0/+30
| | | | | | | | | | | | | | | Add a hook to act when a detachable device is connected/disconnected from a base. BUG=b:73133611 BRANCH=nocturne TEST=Test with evtest that an event is sent to the AP. Change-Id: I21103fff88f19a197124095ee229eebb178dcf3d Signed-off-by: Dmitry Torokhov <dtor@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1180538 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* touchpad_elan: Fix the trace number accessing for width/hight propertyKT Liao2018-08-211-2/+2
| | | | | | | | | | | | | | | | | | | Base on Elan I2C driver and Elan touchpad spec, the x trace number of touching object is in the low nibble of byte. And y trace number is in the high nibble. This is a minor bug and difficult to find in operation. I fix the byte accessing to make it right in palm detection Signed-off-by: KT Liao <kt.liao@emc.com.tw> BRANCH=poppy BUG=None TEST=Test hammer in EVTEST and check MAJOR/MINOR Change-Id: I83e5e1f224eaf815914e7001234cdc1b1af22660 Reviewed-on: https://chromium-review.googlesource.com/659478 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* gpio.wrap: add *_R[OW] macros for easier pin configuration.Yilun Lin2018-08-211-0/+49
| | | | | | | | | | | | | TEST=make BOARD=kukui -j BUG=b:80159522 BRANCH=None Change-Id: Iea32d39923d88baaacc2973dd71615b1bacfada3 Signed-off-by: Yilun Lin <yllin@google.com> Reviewed-on: https://chromium-review.googlesource.com/1182702 Commit-Ready: Yilun Lin <yllin@chromium.org> Tested-by: Yilun Lin <yllin@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* Fleex: Update EC GPIOs for Fleex EVTDiana Z2018-08-212-7/+38
| | | | | | | | | | | | | | | | | | This change sets GPIO83 to the new USB_C0_PD_RST. The GPIO flags are set according to whether the board is a proto (where it is acting as USB_OTG and needs to be open drain) or EVT (where it is an active-high signal). This also adds CAM_SOC_EC_SYNC as an input for now. BRANCH=None BUG=b:112458646 TEST=Loaded onto fleex proto to verify proto board was detected and USB_OTG set to open drain Change-Id: Iffa4762f46d545a0431a27f2c1893f219695d367 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1180354 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* uart_buffering: expose interface to support non-host commandWei-Han Chen2018-08-202-46/+96
| | | | | | | | | | | | | | | | | | | UART buffer could only be accessed by host command. For detachable devices, we don't want to enable all host commands. Refactor and expose an API to support accessing UART buffer directly, host command is not necessary. BRANCH=none BUG=b:70482333 TEST=tested on whiskers TEST=tested on nocturne Signed-off-by: Wei-Han Chen <stimim@chromium.org> Change-Id: I8a9bbad23fbd3c02df54cd7b5d59b0e8376756ac Reviewed-on: https://chromium-review.googlesource.com/1177094 Commit-Ready: Wei-Han Chen <stimim@chromium.org> Tested-by: Wei-Han Chen <stimim@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* ectool: Fix ADC read return value.Aseda Aboagye2018-08-201-1/+3
| | | | | | | | | | | | | | | | | | This commit fixes a bug with the ectool adcread command. For successful reads, it was returning a non-zero return code. BUG=b:76155036 BRANCH=None TEST=Use `ectool adcread` on non-existent ADC channel, verify return code is non-zero. Use it on a valid channel, verify the return code is 0. Change-Id: Ida8208bf100a3d66bd132770fb352678f408560c Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/1181173 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org>
* stack_analyzer_unittest: Unit test of analyze disassembly for Andes instructionstabilize-10985.Btim2018-08-201-2/+100
| | | | | | | | | | | | | | | | | | | | | | | | | Write a rough disassembly with Andes instruction in stack_analyzer_unittest.py which rough disassembly is analyzed by stack_analyzer.py to get some results. If these results are the same with expect results, the unit test will pass. In the rough disassembly, the file format is added in the second line, because the stack analyzer will be looking for the word of 'arm' or 'nds' in the line, and then get the corresponding Analyzer class. BUG=b:111746842 BRANCH=none TEST=./extra/stack_analyzer/run_tests.sh Change-Id: I3acbfb199f762a4e89ea95f6254628871a5beb5d Signed-off-by: tim <tim2.lin@ite.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1174331 Commit-Ready: Tim2 Lin <tim2.lin@ite.corp-partner.google.com> Tested-by: Tim2 Lin <tim2.lin@ite.corp-partner.google.com> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* stack_analyzer: EC stack analyzer for Andes instruction architecturetim2018-08-201-38/+194
| | | | | | | | | | | | | | | | | | | | | Add the related stack instructions analysis for Andes architecture to calculate stack frame sizes of functions and find the maximum calling path with maximum stack usage in stack analyzer tool. The second line in each disassembly will present this core architecture, so we can be looking for the word of 'arm' or 'nds' in the line and then get the corresponding Analyzer class. BUG=b:111746842 BRANCH=none TEST=make BOARD=${BOARD} SECTION=RO or RW analyzestack Change-Id: I8414920ddee97ce913519ef878f770e6e3118ef7 Signed-off-by: tim <tim2.lin@ite.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1174332 Commit-Ready: Tim2 Lin <tim2.lin@ite.corp-partner.google.com> Tested-by: Tim2 Lin <tim2.lin@ite.corp-partner.google.com> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* Revert "meowth_fp: Enable CONFIG_ROLLBACK_MPU_PROTECT"Nicolas Boichat2018-08-201-3/+0
| | | | | | | | | | | | | | | | | This reverts commit 331eaf99ce5376332442f2f1d83d277c6104bbb6, as it breaks flashrom. We'll want to reenable this after we fix flashrom. BRANCH=none BUG=b:111330723 BUG=b:112740263 TEST=/usr/sbin/fp_updater.sh works Change-Id: I3b1fc54a5f60f76f7d39481b1d7b90587c794c01 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1180789 Reviewed-by: Nicolas Norvez <norvez@chromium.org>
* kukui: PMIC_WATCHDOG_L should follow status of PMIC_WATCHDOG_LAyo Wu2018-08-201-2/+2
| | | | | | | | | | | | | | BUG=b:112741115 BRANCH=none TEST=make flash_ec BOARD=kukui -j TEST=waveform in b:112741115 Change-Id: I53798356714289276a5fdaed9f6190a247a1db7d Signed-off-by: Ayo Wu <ayowu@google.com> Reviewed-on: https://chromium-review.googlesource.com/1179494 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* keyboard: Move keyboard_special (lightbar demo) to samus/board.cHung-Te Lin2018-08-203-54/+55
| | | | | | | | | | | | | | | | | | Currently the keyboard_special has only one function - to enter demo or easter egg mode if lightbar task is running. However, only Samus has lightbar so we should not waste time doing keyboard_special on all boards. The better approach is to use the new CONFIG_KEYBOARD_SCANCODE_CALLBACK and provide the lightbar demo check inside samus board.c. BUG=None TEST=make buildall -j BRANCH=None Change-Id: Ie8ab994b5439309663328a75680d45230a6eaeea Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1168702 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Revert "nocturne_fp: [HACK] Disable STOP mode by default"Nicolas Boichat2018-08-191-3/+0
| | | | | | | | | | | | | | | | | | This reverts commit 158e785ffa1cbab14023bcdef506ff49654ea2a5. BRANCH=none BUG=b:75105319 TEST=powerd_dbus_suspend => See that idlestats deep-sleep value increases. TEST=flashrom works. Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Change-Id: Ib675c559193809d861cf64215b485cf9e30abd19 Reviewed-on: https://chromium-review.googlesource.com/1177404 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Nicolas Norvez <norvez@chromium.org> Reviewed-by: Nicolas Norvez <norvez@chromium.org>
* touchpad_st: handle new domeswitch APIWei-Han Chen2018-08-192-16/+10
| | | | | | | | | | | | | | | | In latest ST firmware, domeswitch level is already reported, there is no domeswitch_chg anymore. BRANCH=none BUG=b:70482333 TEST=manual on device Signed-off-by: Wei-Han Chen <stimim@chromium.org> Change-Id: I6ce21f48ec8aa62a4167a86581acd2e2abee7ce6 Reviewed-on: https://chromium-review.googlesource.com/1177524 Commit-Ready: Wei-Han Chen <stimim@chromium.org> Tested-by: Wei-Han Chen <stimim@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* stm32mon: don't set UART attributes when programming over Cr50Vadim Bendebury2018-08-181-14/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | When EC console is connected over a Cr50 UART to USB bridge, there is no need to try setting up UART properties of the interface device as in this case the settings will not propagate to the target. BRANCH=none BUG=b:62539385 TEST=connect a Scarlet device over SuzyQ to the host and source the following script: vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv echo gpioset EC_FLASH_SELECT 1 > /dev/ttyUSB0 echo bitbang 2 57600 even > /dev/ttyUSB0 echo ecrst pulse > /dev/ttyUSB0 sleep 2 <path to>/stm32mon -d /dev/ttyUSB2 -u -U -e -c -w <path to>/ec.bin echo gpioset EC_FLASH_SELECT 0 > /dev/ttyUSB0 echo bitbang 2 disable > /dev/ttyUSB0 echo ecrst pulse > /dev/ttyUSB0 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Change-Id: I5feeaffbc25c029fe6b5d8fa712d5927d00e26ce Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1175317 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* nocturne: Turn on UHALL_PWR_EN by default.Aseda Aboagye2018-08-181-1/+1
| | | | | | | | | | | | | | | | UHALL_PWR_EN needs to be enabled when the EC comes out of reset so that the top hall sensor is active when the EC boots. BUG=b:112110598 BRANCH=None TEST=Verify after EC reset that UHALL_PWR_EN is high. Change-Id: If0370dc462cb74b3f1b9bfb67aff7b9bc9c6e261 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/1180493 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* touchpad_st: fix heatmap modeWei-Han Chen2018-08-181-2/+6
| | | | | | | | | | | | | | | | The rx_buf was set incorrectly in heat map mode. Also add debug messages to help debugging. BRANCH=none BUG=b:70482333 TEST=test on full system, enable heatmap Signed-off-by: Wei-Han Chen <stimim@chromium.org> Change-Id: I325a9b7983a16634b95eecdc592c59222e48c7aa Reviewed-on: https://chromium-review.googlesource.com/1177093 Commit-Ready: Wei-Han Chen <stimim@chromium.org> Tested-by: Wei-Han Chen <stimim@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* cheza: Don't need to set the switchcap register on initWai-Hong Tam2018-08-171-10/+0
| | | | | | | | | | | | | | The switchcap register should be OTP'ed. BRANCH=none BUG=b:77957956 TEST=On the rev-2 board, power cycle the board, check the switchcap register having a proper value. Change-Id: I558301772404618a1d189a567ea61e743f403e84 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/1179975 Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* bobba: update EC GPIOs for Bobba EVTDiana Z2018-08-174-14/+14
| | | | | | | | | | | | | | | | | | | | - added volume button inputs to bobba's GPIO interrupts - removed USB_OTG pin from the baseboard code since it is unused - changed USB_OTG to USB_C0_PD_RST - added CAM_SOC_EC_SYNC as input for now Since most of the bobba protos use yorp firmware, it seems unlikely we will need to support the proto boards with this change. BRANCH=None BUG=b:112354316 TEST=builds Change-Id: I5a05a55ae731a6cdf293e93535c9256e5eb67520 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1178480 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* nocturne: Enable TCPC low power modePuthikorn Voravootivat2018-08-171-0/+2
| | | | | | | | | | | | | | | BUG=b:112037915 BRANCH=none TEST=Lower power in S0ix "TCPC Enter Low Power Mode" log in ec console TCPC exit/enter low power mode when plug/unplug charger Change-Id: Iff44a3a54c3bb44b4d1d3f6ffa9c83689175e5ed Signed-off-by: Puthikorn Voravootivat <puthik@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1168110 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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