summaryrefslogtreecommitdiff
Commit message (Collapse)AuthorAgeFilesLines
* i2c: Do not attempt bus clear on split xfer failurestabilize-11101.BJonathan Brandmeyer2018-09-251-12/+9
| | | | | | | | | | | | | | | | | | | | If a split transaction fails after its first half, the chip driver has a few options for dealing with the bus state. It can either release the bus by sending a stop bit, or it can leave the bus busy and use a repeated start for the next transaction. ChromeEC does not support multimaster I2C, so either condition is acceptable. TEST=boot a bip with a battery disconnected. Observe that the bus reset error path is not taken when attempting to read the battery identification registers. BRANCH=none BUG=b:116603165, b:112862656 Change-Id: Ieb29233b0701edc2135707247b15a637e9d4d25b Signed-off-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1243707 Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Scott Collyer <scollyer@chromium.org>
* power_button_x86: Check init-on timeout since PB task start timeFurquan Shaikh2018-09-231-2/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When PB state machine is in PWRBTN_STATE_INIT_ON, it first checks if current time (i.e. time since EC reset) is greater than CONFIG_POWER_BUTTON_INIT_TIMEOUT (which is typically 1 second). If yes, then it assumes that it is not okay to bring the AP out of reset (possibly because battery, charger and PD are not initialized in time). However, in case of manual recovery using power and volume buttons, user could be holding the buttons for > 30 seconds. This is required to allow user to request recovery with hardware reinitialization. In such cases, it is not right to check for current time against the timeout value of 1 second. Instead, the timeout should be considered since EC started all the tasks. This change records the timestamp when power button task starts and then uses that time to calculate the actual timeout in PWRBTN_STATE_INIT_ON. BUG=b:113165243 BRANCH=nocturne TEST=None Change-Id: Ifd5211cbd1a2fa56c9affcf656df65b11192c519 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1226228 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* servo_updater: account for versions starting with v2Vadim Bendebury2018-09-221-3/+6
| | | | | | | | | | | | | | With resent base tag update the hardcoded version number pattern in servo_updater.py needs to be adjusted. BRANCH=none BUG=b:112475211 TEST=TBD Change-Id: If3b18f563ff48eb98db95864d8f2298ead04495d Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1237714 Reviewed-by: Nick Sanders <nsanders@chromium.org>
* stm32h7/nocturne_fp: Enable RDP level 1, tie it to flash protection statusNicolas Boichat2018-09-226-21/+95
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Prevent flash readout, using RDP field in option byte. When RDP is defined, it makes no sense to be able to unlock RO, as that'd allow flashing arbitrary RO that could read back the rest of the flash, so we just tie EC_FLASH_PROTECT_RO_AT_BOOT and RDP protection. This also means we can't unlock the flash after it has been finalized (without removing WP and using BOOT0/stm32mon to mass erase the chip). Also, in flash_mp_mcu, call stm32mon with -U, to unlock flash for read-back first (which disables RDP and triggers a mass erase if RDP was enabled). Finally, load spidev before putting releasing reset, which makes reflashing more reliable. BRANCH=nocturne BUG=b:111330723 TEST=cp flash_mp_mcu read_mp_mcu, replace stm32mon line with: "stm32mon -u -p -s ${SPIDEV} -r rb.bin" dut-control fw_wp_state:force_off => Check that read_mp_mcu works dut-control fw_wp_state:force_on ectool --name=cros_fp flashprotect enable ectool --name=cros_fp reboot_ec => RDP is now on dut-control fw_wp_state:force_off => Check that read_mp_mcu does not work anymore TEST=Add -U to stm32mon line above in read_mp_mcu, check that readback only gets blank data. TEST=In EC console, check that RDP bits are indeed not 0xaa: Before: rw 0x5200201c => 0x07d6aaf0 After: rw 0x5200201c => 0x07d600f0 TEST=flash_mp_mcu still works (does a flash erase that removes RDP protection) Change-Id: Ifbe37ecafbf23f48d4a3cc17933130b7b104b728 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1222094 Commit-Ready: Nicolas Norvez <norvez@chromium.org> Tested-by: Nicolas Norvez <norvez@chromium.org> Reviewed-by: Nicolas Norvez <norvez@chromium.org>
* fpsensor: validate args of EC_CMD_FP* commandsNicolas Norvez2018-09-222-46/+65
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - More thorough validation of the arguments passed to host commands. - Remove obsolete EC_CMD_FP_SENSOR_CONFIG host command. - Some console commands can't be used on locked systems. BRANCH=nocturne BUG=b:116065496 TEST=enroll finger TEST=unlock with finger TEST=Capture ectool --name=cros_fp fpmode capture vendor; ectool --name=cros_fp waitevent 5 10000; ectool --name=cros_fp fpframe raw > /tmp/fp.raw /usr/local/opt/fpc/fputils.py --png /tmp/fp.raw TEST=MQT ectool --name=cros_fp fpmode capture qual; ectool --name=cros_fp waitevent 5 10000; ectool --name=cros_fp fpframe raw > /tmp/fp.raw; /usr/local/opt/fpc/fputils.py --mqt /tmp/fp.raw TEST=Reset_pixel ectool --name=cros_fp fpmode capture test_reset; ectool --name=cros_fp fpframe > /tmp/test_reset.pnm TEST=Checkerboard ectool --name=cros_fp fpmode capture pattern0; ectool --name=cros_fp waitevent 5 500; ectool --name=cros_fp fpframe > /tmp/pattern0.pnm ectool --name=cros_fp fpmode capture pattern1; ectool --name=cros_fp waitevent 5 500; ectool --name=cros_fp fpframe > /tmp/pattern1.pnm Change-Id: I3c9aa4749ffd77c73f8ca52cddbcc0e8ca6ae48c Signed-off-by: Nicolas Norvez <norvez@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1239247 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* fpsensor: safer argument checkingNicolas Norvez2018-09-221-13/+34
| | | | | | | | | | | | | | | Ensure that size/offset parameters passed from the AP can't overflow the buffer, and that their sum doesn't either. Clearer parameter checking. BUG=b:73337313 BUG=b:116065496 BRANCH=nocturne TEST=enroll/match Change-Id: I73600c7d5874329c9a5f19b1bf88603e97d02c7d Signed-off-by: Nicolas Norvez <norvez@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1234750 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* rammus: Implement keyboard backlight enable controlmichael_chen2018-09-212-0/+3
| | | | | | | | | | | | | | | | | | | | Implement keybaord backlight enable control Enable keyboard backlight when system from S3 to S0. Disable keyboard backlight when system from S0 to S3. BUG=None BRANCH=ToT TEST=Manual. When system power on, using console command kblight to check keyboard backlight. When system power off/suspend, check keyboard backlight. Change-Id: I9a69664eb0cbd41c16cc90d3698c6375ddc02d9c Signed-off-by: michael_chen <michael5_chen@pegatroncorp.com> Reviewed-on: https://chromium-review.googlesource.com/1198944 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: michael chen <michael5_chen@pegatroncorp.com> Reviewed-by: Zhuohao Lee <zhuohao@chromium.org>
* rammus: Implement LED functionmichael_chen2018-09-212-66/+105
| | | | | | | | | | | | | | | | | | | Implement power and charge LED function. BUG=b:111815820 BRANCH=ToT TEST=Manual. Build and flash EC on rammus board. Verify power LED behavior under power on/off/suspend. Verify charge LED behavior under Battery full/charging/Error and DC only Change-Id: I8bed644554c4dab853085613ddcc9e3d3417b9c2 Signed-off-by: michael_chen <michael5_chen@pegatroncorp.com> Reviewed-on: https://chromium-review.googlesource.com/1198902 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: michael chen <michael5_chen@pegatroncorp.com> Reviewed-by: Zhuohao Lee <zhuohao@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* glados: Remove battfake command from RODaisuke Nojiri2018-09-211-0/+3
| | | | | | | | | | | | | This CL removes battfake console command from RO to fix space issue. BUG=chromium:876107 BRANCH=none TEST=buildall Change-Id: Ib07c8729318424af3af7b46bdd1f9e5ea59580a8 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1239239 Reviewed-by: Jett Rink <jettrink@chromium.org>
* aes-gcm: set tag size to 16 bytes in perf testNicolas Norvez2018-09-211-1/+1
| | | | | | | | | | | | | | Use a 16-byte tag instead of 12 bytes. BRANCH=nocturne BUG=b:111160949 TEST=make BOARD=nocturne_fp test-aes -j TEST=make run-aes Change-Id: I9d1d28ec2049590b407eb9ea64d412c29d46b20b Signed-off-by: Nicolas Norvez <norvez@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1239237 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* grunt: Disable ec_feature kbbacklit by SKUID for barlaDevin Lu2018-09-211-1/+2
| | | | | | | | | | | | | Disable kbbacklit support for barla. BUG=b:115882609 BRANCH=grunt TEST=make buildall -j. Change-Id: I966938bad94e1c63757a55df750fdbca862b671e Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/1235475 Reviewed-by: Edward Hill <ecgh@chromium.org>
* npcx: Don't clear IBBR bit via a read-modify-write sequenceCHLin2018-09-212-3/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | In npcx5/npcx7m6g/npcx7m6f, clearing the IBBR bit in the BKUP_STS register is not hazardous because the register only implements the IBBR bit. In npcx7m6fb/npcx7m7wb, the register implements two more bits (VSBY_STS/VCC1_STS). Using read-modify-write operation to clear IBBR bit will also clear these two bits unexpected if they are set. It is fine at this time because the firmware does not rely on these two new bits for any purpose. But it will be better to change it in case these two bits are used in the future. This CL also clears VSBY_STS/VCC1_STS bit (for npcx7m6fb/npcx7m7wb) when power-on reset. BRANCH=none BUG=none TEST=No build error for make buildall; Check IBBR(VSBY_STS/VCC1_STS) are cleared at initial when power-on reset. Check warining messages are printed and IBBR bit is cleared (in function system_check_bbram_on_reset and bbram_valid). Change-Id: I6dc1f5d7f35f9d591db62d1b022ea7b8d92f5b92 Signed-off-by: CHLin <CHLIN56@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/1235733 Commit-Ready: CH Lin <chlin56@nuvoton.com> Tested-by: CH Lin <chlin56@nuvoton.com> Reviewed-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org>
* rollback: Unlock rollback before writing to itNicolas Boichat2018-09-211-4/+5
| | | | | | | | | | | | | | | | | | | | Unprotect the MPU before we write to the rollback block, else the EC crashes. BRANCH=nocturne BUG=b:116216642 TEST=ectool --name=cros_fp reboot_ec; sleep 0.5; \ ectool --name=cros_fp rwsigaction abort && \ ectool --name=cros_fp addentropy reset && \ ectool --name=cros_fp reboot_ec TEST=Flash EC RW with rollback version 1, no crash, rollback version is incremented Change-Id: I2f7a057d4a94be97c52a8acaa4b9d864cabf280c Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1236917 Commit-Ready: Nicolas Norvez <norvez@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* fpsensor: only 1 encryption per secondNicolas Norvez2018-09-211-0/+9
| | | | | | | | | | | | | | | | Prevent userspace from constantly hammering the EC for new encrypted messages to avoid IV collision. BUG=b:114160734 BUG=b:73337313 BRANCH=nocturne TEST=Frequent consecutive touches, see EC_RES_BUSY being returned when two matches are very close. Change-Id: I9c81b4a21e289bf48fbfcbba50cd2a7ab83db38a Signed-off-by: Nicolas Norvez <norvez@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1215542 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* fpsensor: add a version to the template formatNicolas Norvez2018-09-212-0/+25
| | | | | | | | | | | | | | The first 2 bytes of the metadata structure contain the version of the format of that structure. BRANCH=nocturne BUG=b:73337313 TEST=enroll/logout/unlock Change-Id: I1838791603df11fdefb373105617f83eec116f89 Signed-off-by: Nicolas Norvez <norvez@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1235413 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* fpsensor: Encrypt the FP templates with HW keyNicolas Norvez2018-09-214-36/+237
| | | | | | | | | | | | | | | | | | | | | We use AES-GCM crypto to encrypt the FP templates between the AP and the MCU. For every single template, we generate a nonce/salt that is updated on every template update (i.e. when the AP requests an encrypted template). We then derive the symmetric key using HMAC-SHA256 and encrypt/decrypt the template. Design doc at go/cros-fp-dd BUG=b:73337313 BRANCH=nocturne TEST=enroll a finger, log out, log back in, unlock the device. TEST=retrieve MQT frame on unlocked system Change-Id: I29c66c6dc660242a423af02066f5aba671613300 Signed-off-by: Nicolas Norvez <norvez@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1194999 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* aes-gcm: Adapt AES-GCM to build for ECNicolas Boichat2018-09-218-335/+446
| | | | | | | | | | | | | | | | | | | | | Update header, C code, trim unnecessary bits. Also add a test with vectors taken from BoringSSL tests. BRANCH=none BUG=b:111160949 TEST=make run-aes -j TEST=make BOARD=nocturne_fp test-aes -j flash_fp_mcu aes.bin runtest => pass (C implementation speed: 909555 us for 1000 iterations) (ASM implementation speed: 596690 us for 1000 iterations) Change-Id: Ief54a8441d26ba44de4c3ac81e203cab7472269f Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1141446 Commit-Ready: Nicolas Norvez <norvez@chromium.org> Reviewed-by: Nicolas Norvez <norvez@chromium.org>
* cbi: allow fields to be resizedJett Rink2018-09-201-6/+22
| | | | | | | | | | | | | | | | | Since we now have a dynamically sized CBI field (DRAM), it is more convenient to be able to resize fields. We accomplish this by deleting the old field and adding the field at the end, after copying all of the data forward. BRANCH=none BUG=b:116075074 TEST=Updated various CBI fields and watch them move to the end. tested updating the last field and middle fields Change-Id: Icb9b3cb36445d8e78315f9fd3a74483ff2d52ebf Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1234747 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* Fizz: Remove remote temp sensor 2Daisuke Nojiri2018-09-202-8/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Fizz has been shipped with TMP431, which has only one remote sensor. This patch removes the one which doesn't exist on the boards. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=chromium:880705 BRANCH=none TEST=Verify local and remote sensor report expected temperatures. Verify the fan spins as expected. > temps TMP431_Internal : 304 K = 31 C 37% TMP431_Sensor_1 : 301 K = 28 C $ ectool temps all 0: 304 K 1: 301 K Change-Id: I2346444f1331faaf32b407a18ba96302b7a166e6 Reviewed-on: https://chromium-review.googlesource.com/1234735 Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> (cherry picked from commit d8de510aa7bdfb7c43621c7d48b7ca3ab372e3c7) Reviewed-on: https://chromium-review.googlesource.com/1234746 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* rollback: Add host command to query rollback informationNicolas Boichat2018-09-203-0/+56
| | | | | | | | | | | | | | | | | | | | | | | Rollback id will be useful to check that the secret has actually been wiped. Min rollback version and RW rollback version might be useful in the future. BRANCH=nocturne BUG=b:115733483 TEST=ectool --name=cros_fp rollbackinfo => Rollback block id: X ectool --name=cros_fp reboot_ec; sleep 0.5; \ ectool --name=cros_fp rwsigaction abort && \ ectool --name=cros_fp addentropy reset && \ ectool --name=cros_fp reboot_ec ectool --name=cros_fp rollbackinfo => Rollback block id: X+2 Change-Id: I039d26d302d3a12b0d41acca34aa28d4a2dd096d Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1226126 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Nicolas Norvez <norvez@chromium.org>
* driver/led/lm3630a: Only set brightness after 100+ms.Nicolas Boichat2018-09-201-6/+16
| | | | | | | | | | | | | | | | | | | | On whiskers, after setting up the banks, the backlight blinks for a short duration (~100ms). This can be prevented by setting the brightness only ~100ms after setting up the rest of the registers. We probably do not want to sleep for too long in the init function, so set the brightness in a deferred function. BRANCH=nocturne BUG=b:111010124 TEST=Connect whiskers, see that backlight does not blink. TEST=Backlight control is still functional. Change-Id: Ie7490ea1f9f6731ede3efba63e6793525c5ea786 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1126698 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Revert "driver/led/lm3630a: Configure 261ms startup ramp time"Nicolas Boichat2018-09-202-17/+0
| | | | | | | | | | | | | | This reverts commit 5a09049c5cc9a30ddfbe69e11b833146d8f5f04f, which does not appear to fully work... BRANCH=nocturne BUG=b:111010124 TEST=N/A Change-Id: Ibf27ff27d8da685009377ef7a6c66ed86f279229 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1234749 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* chgmgr: Allow charge_manager_update_charge to accept NULLDaisuke Nojiri2018-09-2010-61/+39
| | | | | | | | | | | | | | | | | | | | | | | | | Currently, charge_manager_update_charge does not handle NULL pointer for struct charge_port_info any differently. It's not sanity-checked either (thus memory access violation can occur). This patch will make charge_manager_update_charge accept NULL pointer and set available current and voltage to zero. This also helps callers' intentions be clear because callers can explicitly specify NULL (instead of passing a pointer to chg = {0}, which is initialized somewhere else). Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=none BRANCH=none TEST=buildall Change-Id: I518662ab6a3a07f93da5d34cf62a6f856884f67d Reviewed-on: https://chromium-review.googlesource.com/1226125 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* Make USB_PD_POWER_INFO detect inactive supplierDaisuke Nojiri2018-09-201-15/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, CMD_USB_PD_POWER_INFO does not report a supplier if the available current is 0. This causes a dedicated charger (a barrel jack adapter) to be ignored by the command if it's not the active supplier. This change allows a supplier which has 0 current to be reported by the command as long as there is no other supplier with positive current on the same port. With this change, the host can detect a BJ adapter's physical presence regardless of its charging status. In other words, a supplier with positive current always supersedes whatever supplier with zero current. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=chromium:841944,b:111667665,b:111777351 BRANCH=none TEST=Verify ectool usbpdpower 1 return 'Port 1: Disconnected' and 'Port 1: SNK (not charging)' without and with a BJ adapter connected respectively on Fizz. Change-Id: I22ba5f147209177c0c9cac87a123d4c3d0f2ec68 Reviewed-on: https://chromium-review.googlesource.com/1217607 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* chgmgr: Set available voltage to 0 on disconnectDaisuke Nojiri2018-09-207-29/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, available current is consistently set to zero when a supplier is disconnected across BC 1.2 drivers, PD task, usb charger task but voltage is set to zero only in some places. This patch will set available voltage consistently to 0 on disconnected ports. This change should have no impact externally or internally because currently ports are treated as a disconnected port as long as available current is zero. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=chromium:841944 BRANCH=none TEST=Verify ectool usbpdpower 1 return 'Port 1: Disconnected' and 'Port 1: SNK (not charging)' without and with a BJ adapter connected respectively on Fizz. Verify ectool usbpdpower prints 'Disconnected' and 'SNK Charger PD' on Vayne without and with USB-C charger, respectively. Verify ectool usbpdpower prints 'Disconnected' and 'SNK Charger Type-C' on Vayne without and with a phone USB-C charger, respectively. Change-Id: I9aca575a4a4240ec1f669c55437decaedf758a77 Reviewed-on: https://chromium-review.googlesource.com/1222092 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* aes-gcm: Baseline implementation from BoringSSLNicolas Boichat2018-09-206-0/+1863
| | | | | | | | | | | | | | | | | | | | | | Copied over from upstream BoringSSL at commit 859679518d3433cdd0dd6cf534bd7bdb2a32dd60 . cp boringssl/crypto/fipsmodule/modes/gcm.c \ third_party/boringssl/common/gcm.c cp crypto/fipsmodule/modes/internal.h \ third_party/boringssl/include/aes-gcm.h => Remove non-GCM definitions perl boringssl/crypto/fipsmodule/modes/asm/ghash-armv4.pl \ > third_party/boringssl/core/cortex-m/ghash.S BRANCH=none BUG=b:111160949 TEST=none Change-Id: I34702ff315c8c44e6f4868243058700aaf026099 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1141445 Reviewed-by: Adam Langley <agl@chromium.org>
* aes: Adapt AES code to build for ECNicolas Boichat2018-09-2011-188/+262
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Update header, C code, and tweak the assembly for ARMv7-M. Rename aes_now_* functions to AES_* to avoid the need for a separate wrapper. Also add a test with FIPS-197 test vectors, and speed test. BRANCH=none BUG=b:111160949 TEST=make run-aes -j TEST=make BOARD=nocturne_fp test-aes -j flash_fp_mcu aes.bin runtest => pass (C implementation speed: 11977 us for 1000 iterations) (ASM implementation speed: 5815 us for 1000 iterations) Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Change-Id: I2048aae73decccb893bc1724b2617b0b902dd992 Reviewed-on: https://chromium-review.googlesource.com/1120340 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Adam Langley <agl@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* aes: Baseline implementation from BoringSSLNicolas Boichat2018-09-208-0/+2495
| | | | | | | | | | | | | | | | | | | | | | | Copied over from upstream BoringSSL at commit 859679518d3433cdd0dd6cf534bd7bdb2a32dd60 . cp boringssl/LICENSE third_party/boringssl/LICENSE cp boringssl/src/crypto/fipsmodule/aes/aes.c \ third_party/boringssl/common/aes.c cp boringssl/include/openssl/aes.h \ third_party/boringssl/include/aes.h perl boringssl/crypto/fipsmodule/aes/asm/aes-armv4.pl \ > third_party/boringssl/core/cortex-m/aes.S BRANCH=none BUG=b:111160949 TEST=none Change-Id: Ia1fbb57b23e039ca5dec3d56984c83c19b7d6cd6 Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1120339 Reviewed-by: Adam Langley <agl@chromium.org>
* g: fix i2cm NACK processingVadim Bendebury2018-09-201-2/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When g i2c master controller encounters a NACK it seems to stop processing instruction set included in the INST register and leaves SCL low holding up the bus. Issuing an explicit STOP request in this situation makes sure that the controller completes the NACKed access cycle. BRANCH=cr50, cr50-mp BUG=b:112283593, b:113906660 TEST=verified that when running i2cscan the NACKed cycles complete properly, and the command could be ram multiple times. On dragonegg: > i2csc Scanning 0 master................................................. 0x60................ 0x80. 0x82. 0x84. 0x86............. 0xa0............................................... > i2csc Scanning 0 master................................................. 0x60................ 0x80. 0x82. 0x84. 0x86............. 0xa0............................................... > Change-Id: I7ffff5f32c9f57eb2672318fc8ebd9f74441445d Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1200078 Reviewed-by: Scott Collyer <scollyer@chromium.org>
* meep: Add clamshell Suspend LED BehaviorZick Wei2018-09-209-14/+28
| | | | | | | | | | | | | | | | | | | | Meep and Mimrock use same mother board, Mimrock is clamshell sku only have Charge LED. To meet LED spec: System without Power LED, Suspend/S0ix without charge blink White on Charge LED(1 sec on, 1 sec off). BUG=none BRANCH=none TEST=manual Set cbi sku id to clamshell sku, Check Charge LED will blink(1 sec on, 1 sec off), when system is Suspend/S0ix without charge. Change-Id: Ib443d6176d929aad4b65c1cb0d4b40c102e6f67e Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1226830 Reviewed-by: Jett Rink <jettrink@chromium.org>
* Careena: Disable motion sensorsJonathan Brandmeyer2018-09-193-10/+4
| | | | | | | | | | | | | | | | | The body frame motion sensor will not be installed for Careena. BUG=b:115649135 TEST=observe that the EC does not attempt to initialize any of its motion sensors in the EC log. BRANCH=grunt Signed-off-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org> Change-Id: I0e7c2e9e39d290c21f20b766da4347a2e2902942 Reviewed-on: https://chromium-review.googlesource.com/1231474 Commit-Ready: Jett Rink <jettrink@chromium.org> Tested-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* driver/led/lm3630a: Configure 261ms startup ramp timeNicolas Boichat2018-09-192-0/+17
| | | | | | | | | | | | | | | | | | | | | | It appears that, on startup, LM3630A starts by assuming some high input PWM value, so when the brightness is set to 0xff, it first drives the output, and slowly dims it as the PWM input LPF takes effect (takes about 50ms). We workaround this issue by adding a 261ms start-up ramp, to prevent LM3630A from driving backlight right after the brightness value is set. AFAICT, this has no effect on the user, even when transitioning from off to on backlight, as the ramp only applies when the brightness is first set. BRANCH=nocturne BUG=b:111010124 TEST=Connect whiskers, no backlight blip Change-Id: Ia4dafe9a54aa40a4eae865581a06670e94eb6364 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1230973 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* touchpad_st: handle error type 0xffWei-Han Chen2018-09-191-0/+22
| | | | | | | | | | | | | | | | | | | When ST touchpad is down, or the SPI interface is not working properly (either hardware or software issue), we might receive events filled with 0xff. In this case, try if resetting touchpad can bring it back. To prevent infinite reboot, if the touchpad is not recovered after 3 reboots, stop it. BRANCH=nocturne BUG=None TEST=manual on device Signed-off-by: Wei-Han Chen <stimim@chromium.org> Change-Id: I8d2a8f0f4aa305af11f14a63f0bc4d53c2c23a49 Reviewed-on: https://chromium-review.googlesource.com/1230393 Commit-Ready: Wei-Han Chen <stimim@chromium.org> Tested-by: Wei-Han Chen <stimim@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* Bobba: Support new SKU IDTino Liu2018-09-191-2/+3
| | | | | | | | | | | | | | | SKU ID of Bobba360, Sparky360: 9, 10, 11, 12, 25, 26 BUG=b:112442777 BRANCH=none TEST=compile pass Change-Id: Idd85c48a1dc7bc663d91fc3b909a86e699aad622 Signed-off-by: Tino Liu <tino.liu@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1229474 Tested-by: Ryan Zhang <ryan.zhang@quanta.corp-partner.google.com> Reviewed-by: Ryan Zhang <ryan.zhang@quanta.corp-partner.google.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* phaser: enable to measure the Vbus voltage of PD ports via ADC channelnickchen2018-09-193-0/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Measure the Vbus voltage of port 0 (USB_PD_PORT_ANX7447) via ADC 9, measure the Vbus voltage of port 1 (USB_PD_PORT_PS8751) via ADC 4. BUG=b:115997207 BRANCH=none TEST=check log output of `ectool usbpdpower` for 4 cases are all correct case1. Adapter plugged in only port0 (motherboard): Port 0: SNK Charger PD 14932mV Port 1: Disconnected case2. Adapter plugged in only port1 (sub-board): Port 0: Disconnected Port 1: SNK Charger PD 14850mV case3. Adapter plugged in both two ports (port0 first, then port1): Port 0: SNK Charger PD 14877mV Port 1: SNK (not charging) Charger PD 5000mV case4. Adapter plugged in both two ports (port1 first, then port0): Port 0: SNK (not charging) Charger Unknown 5000mV Port 1: SNK Charger PD 14905mV Change-Id: Icae0abecbcbee6af5f7167fcefd969c322947a26 Signed-off-by: nickchen <nickchen@ami.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1233094 Commit-Ready: Nick Chen <nickchen@ami.corp-partner.google.com> Tested-by: Nick Chen <nickchen@ami.corp-partner.google.com> Tested-by: Xiong Huang <xiong.huang@bitland.corp-partner.google.com> Reviewed-by: Justin TerAvest <teravest@chromium.org>
* rammus: Fix PD port 0 reset control behaviormichael_chen2018-09-182-5/+5
| | | | | | | | | | | | | | | | | | Because the GPIO USB_PD_RST_C0_L is high active. When USB_PD_RST_C0_L is high, the PD port 0 i2c communication will fail. BUG=None BRANCH=ToT TEST=Manual. Using consol command "i2cxfer r16 0 0x52 0x00" to read TCPC port 0 VID is ok. Change-Id: I998669f85770672478a4c9131f7b5a767ffd6773 Signed-off-by: michael_chen <michael5_chen@pegatroncorp.com> Reviewed-on: https://chromium-review.googlesource.com/1198905 Commit-Ready: michael chen <michael5_chen@pegatroncorp.com> Tested-by: michael chen <michael5_chen@pegatroncorp.com> Reviewed-by: Zhuohao Lee <zhuohao@chromium.org>
* ss-mux: remove unused port_addr initializationv2.0.0Jett Rink2018-09-1724-46/+8
| | | | | | | | | | | | | | | | | | | We do not need to set the port_addr variable most places because the SS-MUX is also the TCPC and the tcpc_config_t information is used instead. Remove unused variable setting to avoid confusion. BRANCH=none BUG=none TEST=buildall. phaser USB-C communication (and muxs) still work which is a nominal case for all of these changes. Change-Id: I72ee5da251956eb133091974e8dce5ac7f8787c6 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1200064 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Edward Hill <ecgh@chromium.org>
* Reland "meowth_fp: Enable CONFIG_ROLLBACK_MPU_PROTECT"Daisuke Nojiri2018-09-171-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 8661ac5938ed9b96750cac5c6f6bf4edd1009d08. Reason for revert: b:112740263 has been fixed by cl:1214864. Original change's description: > Revert "meowth_fp: Enable CONFIG_ROLLBACK_MPU_PROTECT" > > This reverts commit 331eaf99ce5376332442f2f1d83d277c6104bbb6, as it > breaks flashrom. > > We'll want to reenable this after we fix flashrom. > > BRANCH=none > BUG=b:111330723 > BUG=b:112740263 > TEST=/usr/sbin/fp_updater.sh works > > Change-Id: I3b1fc54a5f60f76f7d39481b1d7b90587c794c01 > Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> > Reviewed-on: https://chromium-review.googlesource.com/1180789 > Reviewed-by: Nicolas Norvez <norvez@chromium.org> CQ-DEPEND=CL:*674690 Bug: b:111330723, b:112740263 Change-Id: I4c304c6fb49d0ac948d878a78d85f41961206c4c Reviewed-on: https://chromium-review.googlesource.com/1226916 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* octopus: enable PSL for all NPCX variantsJett Rink2018-09-177-15/+24
| | | | | | | | | | | | | | | | | All NPCX variants support PSL mode in hardware now; enable this at the baseboard level. This is adding support for Bobba; other boards are unaffected BRANCH=none BUG=b:115677776 TEST=bobba goes into PSL Change-Id: I38974371b101c42841e4f11ba72b466415c754d9 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1227050 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Justin TerAvest <teravest@chromium.org>
* yorp: increase TCPC i2c speedDiana Z2018-09-171-2/+2
| | | | | | | | | | | | | | | | | Yorp and other NPCX octopus variants should be able to use 400k speeds on their TCPC i2c ports with the recent changes that went into the nxp driver. BRANCH=None BUG=b:78554726 TEST=Loaded onto yorp proto 2 and confirmed that charging and display on ports 0 and 1 work with 400k speed Change-Id: I73f4e175184c9d4f791ea5b84dc91ba6821ce8a7 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1185890 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* gsctool: refactor USB interfaceVadim Bendebury2018-09-175-171/+235
| | | | | | | | | | | | | | | | | | | | | | | | Communications with Cr50 exposed USB endpoints could be needed by other utilities, in particular, ./util/iteflash when it is extended to operate over Cr50. This patch moves USB interface functions into a separate file in the ./util directory and makes USB endpoint coordinates run time variables, so that the user of the interface can connect to various endpoints. Some refactoring is required to allow using the generic USB transfer function. BRANCH=none BUG=b:75976718 TEST=verified that gsctool still operates properly - updated a Cr50, read Cr50 version number, etc. Change-Id: I3d77a93932f5395fff0f5823f0dd79e1d1d670c8 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1198345 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* isl923x: initially disable autonomous chargingJett Rink2018-09-172-0/+14
| | | | | | | | | | | | | | | | | | | We do not use autonomous charging since it is automatically disabled when ever we set the current limits manually (which we always do). Allowing autonomous charging for the short period during initialization can cause current over protection events on devices with 2S batteries. BRANCH=none BUG=b:114318779 TEST=meep can boot without battery from daughter board USB-C port without boot looping Change-Id: Id50517d7e34bb5be171fe8b781b3ccf835db1f88 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1227411 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Justin TerAvest <teravest@chromium.org>
* usb-c: add high priority tasks for interruptsJett Rink2018-09-1718-16/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To all boards that have space, add the PD tasks that handle interrupts in parallel. This is the last change for go/usb-pd-slow-response-time. BRANCH=none BUG=b:112088135 TEST=buildall. This works on grunt and octopus. This CL is more of a clean up for ToT to ensure that newly copied boards use the correct paradigm. Below is the space taken up by this change: build/atlas/RW/space_free_flash shrank by 212 bytes: (64796 to 64584) build/atlas/RW/space_free_ram shrank by 1408 bytes: (33568 to 32160) build/cheza/RW/space_free_flash shrank by 200 bytes: (205716 to 205516) build/cheza/RW/space_free_ram shrank by 1408 bytes: (38208 to 36800) build/coral/RW/space_free_flash shrank by 212 bytes: (87980 to 87768) build/coral/RW/space_free_ram shrank by 1400 bytes: (2564 to 1164) build/dragonegg/RW/space_free_flash shrank by 276 bytes: (142136 to 141860) build/dragonegg/RW/space_free_ram shrank by 1640 bytes: (24704 to 23064) build/elm/RW/space_free_flash shrank by 204 bytes: (24644 to 24440) build/elm/RW/space_free_ram shrank by 528 bytes: (8972 to 8444) build/eve/RW/space_free_flash shrank by 216 bytes: (83748 to 83532) build/eve/RW/space_free_ram shrank by 1408 bytes: (1824 to 416) build/fizz/RW/space_free_flash shrank by 184 bytes: (17576 to 17392) build/fizz/RW/space_free_ram shrank by 736 bytes: (11648 to 10912) build/glkrvp/RW/space_free_flash shrank by 248 bytes: (92432 to 92184) build/glkrvp/RW/space_free_ram shrank by 1408 bytes: (45088 to 43680) build/kukui/RW/space_free_flash shrank by 160 bytes: (32364 to 32204) build/kukui/RW/space_free_ram shrank by 520 bytes: (11260 to 10740) build/meowth/RW/space_free_flash shrank by 240 bytes: (72232 to 71992) build/meowth/RW/space_free_ram shrank by 1408 bytes: (34496 to 33088) build/nami/RW/space_free_flash shrank by 360 bytes: (82016 to 81656) build/nami/RW/space_free_ram shrank by 1408 bytes: (2656 to 1248) build/nocturne/RW/space_free_flash shrank by 216 bytes: (62756 to 62540) build/nocturne/RW/space_free_ram shrank by 1408 bytes: (34368 to 32960) build/rainier/RW/space_free_flash shrank by 180 bytes: (45468 to 45288) build/rainier/RW/space_free_ram shrank by 528 bytes: (13516 to 12988) build/rammus/RW/space_free_flash shrank by 200 bytes: (91284 to 91084) build/rammus/RW/space_free_ram shrank by 1408 bytes: (1920 to 512) build/reef_mchp/RW/space_free_flash shrank by 212 bytes: (51048 to 50836) build/reef_mchp/RW/space_free_ram shrank by 2120 bytes: (27420 to 25300) build/reef/RW/space_free_flash shrank by 224 bytes: (84564 to 84340) build/reef/RW/space_free_ram shrank by 1408 bytes: (2208 to 800) build/rowan/RW/space_free_flash shrank by 204 bytes: (29668 to 29464) build/rowan/RW/space_free_ram shrank by 528 bytes: (9300 to 8772) build/scarlet/RW/space_free_flash shrank by 156 bytes: (29464 to 29308) build/scarlet/RW/space_free_ram shrank by 520 bytes: (11100 to 10580) build/zoombini/RW/space_free_flash shrank by 276 bytes: (66816 to 66540) build/zoombini/RW/space_free_ram shrank by 2112 bytes: (37376 to 35264) Compared 208 of 208 files. 38 files changed. Total size change: -27484 bytes. Average size change: -723 bytes. Change-Id: Ifbea67ee4d460fb197a1601d0951169f2f2b5b3b Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1220667 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org>
* pd: Check for dual-role partner when TOGGLE_OFF/FORCE_SINKEdward Hill2018-09-171-29/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Charging via hub with the ANX3429 TCPC sometimes fails when the system is in S5/G3. Both the hub and the ANX3429 are auto-toggling, so source and sink roles depend on the timing of the connection. Charging will fail when the hub expects the ANX3429 to be a source, but the drp_state in S5/G3 is TOGGLE_OFF/FORCE_SINK. Ideally we wouldn't use auto-toggle when drp_state is TOGGLE_OFF/FORCE_SINK, but with the ANX3429 TCPC, auto-toggle can't be prevented in low power mode. To fix this, try being a sink in case the connected device is dual-role. 100 ms is enough time for a dual-role partner to switch from sink to source. If the connected device is sink-only, then we will attempt SNK_DISCONNECTED twice (due to debounce time), then return to low power mode (and stay there). After 200 ms, reset ready for a new connection. Move the next_state selection out into a function since things were getting very narrow inside PD_STATE_DRP_AUTO_TOGGLE. BRANCH=none BUG=b:72007056 TEST=sink device + ANX3429: low power mode TEST=sink device + PS8751: low power mode TEST=charger via hub + ANX3429: starts charging (20/20 tries) TEST=charger via hub + PS8751: starts charging (all tests with Grunt in G3) Change-Id: I097dcace96bc6e6e9cfab279bcbded50ef9951e3 Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1194678 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* pd: Don't auto toggle when DRP state is not dual role.Edward Hill2018-09-172-39/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When in PD_STATE_DRP_AUTO_TOGGLE, we were always enabling DRP auto-toggle, even when drp_state is PD_DRP_TOGGLE_OFF or PD_DRP_FORCE_SINK, which prevents us from acting as source. This caused an infinite loop of entering and exiting low power mode when a sink-only device was plugged into a PS8751 port when the system is in S5/G3. To fix this, only enable DRP auto-toggle when drp_state allows us to be dual-role. One problem with doing this is that the ANX3429 doesn't support low power mode with auto-toggle disabled. Luckily, the ANX3429 will stay in low power mode when a sink-only device is connected. BRANCH=none BUG=b:72007056,b:111663127 TEST=sink device + ANX3429: low power mode [1] TEST=sink device + PS8751: low power mode [1] TEST=charger via hub + ANX3429: 50% chance fail to charge [2] TEST=charger via hub + PS8751: starts charging (all tests with Grunt in G3) [1] dut-control pp3300_tcpc_mw -> 3.5 [2] b/72007056 still remains to be fixed. Change-Id: Id190a3daa78847871288e66d8f229a485a6522e3 Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1194352 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* pd: Ensure TCPC exits low power modeEdward Hill2018-09-172-12/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Ensure the TCPC is awake when leaving PD_STATE_DRP_AUTO_TOGGLE and when there is a new PD event to handle. Move the exit_low_power_mode() call from the PD_STATE_DRP_AUTO_TOGGLE case statement into set_state(), to catch all possible paths that exit the state. Add a new exit_low_power_mode() call to the top of the main task loop if there is a new event to handle. This allows the exit_low_power_mode() call to be removed from pd_update_dual_role_config() (since PD_EVENT_UPDATE_DUAL_ROLE is included in PD_EXIT_LOW_POWER_EVENT_MASK). Clear PD_FLAGS_LPM_REQUESTED when PD_FLAGS_LPM_ENGAGED is cleared in handle_device_access() and wake the PD task to ensure we will make another pass through the main task loop (and check the CC lines) before deciding to enter low power mode again. BRANCH=none BUG=b:111663127,b:112039224 TEST=PD and TCPC low power still work on Grunt Change-Id: I99063ce0d02af65de74f4c6f73f7a15600d2eac9 Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1225352 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* pd: Change tcpm_set_drp_toggle() to tcpm_enable_drp_toggle()Edward Hill2018-09-176-18/+9
| | | | | | | | | | | | | | | Change tcpm_set_drp_toggle() to tcpm_enable_drp_toggle(), since enable=0 was unused. BRANCH=none BUG=b:111663127 TEST=PD and TCPC low power still work on Grunt Change-Id: I760a067b11984a579261deac856419d46400497b Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1194353 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* pd: Add PD_FLAGS_LPM_TRANSITIONEdward Hill2018-09-173-26/+21
| | | | | | | | | | | | | | | Add PD_FLAGS_LPM_TRANSITION and use this to allow the PD task to call tcpc_read/tcpc_write from tcpm_enter_low_power_mode() and tcpm_init(). BRANCH=none BUG=b:111663127 TEST=PD and TCPC low power still work on Grunt Change-Id: I12ddb58667c171068e1be6d136f22f2062959c8c Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1194351 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* pd: Cleanup lpm_debounce_deadlines and tasks_waiting_on_resetEdward Hill2018-09-171-9/+14
| | | | | | | | | | | | | | | Move lpm_debounce_deadlines and tasks_waiting_on_reset into struct pd_protocol. BRANCH=none BUG=b:111663127 TEST=PD and TCPC low power still work on Grunt Change-Id: Ied7777175f0b9a8efbda42ecbc4b9147d5564649 Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1194350 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* pd: Cleanup request_low_power_mode() and pd_set_drp_toggle()Edward Hill2018-09-171-26/+4
| | | | | | | | | | | | | | | Replace request_low_power_mode() with set/clear of PD_FLAGS_LPM_REQUESTED. Remove pd_set_drp_toggle() since it was only called from one place. BRANCH=none BUG=b:111663127 TEST=PD and TCPC low power still work on Grunt Change-Id: I7692d9101f2ba44ad395a8b71b62f63bc00b8404 Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1194349 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
View Lorry Controller Status