| Commit message (Collapse) | Author | Age | Files | Lines |
... | |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
The declaration of nvmem_wipe_cache is now inside the extern "C"
section and a definition was added to cr50_fuzz.
BRANCH=None
BUG=None
TEST=make -j buildall
Change-Id: Ie7401d8880e7982c84fa6a5df5015cbd145fc6d1
Signed-off-by: Allen Webb <allenwebb@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1370746
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Manoj Gupta <manojgupta@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
In older Nuvoton EC chips (prior NPCX5), the Semaphore register is
mapped to offset 0 of the Shared RAM Window by default. We usually
disable it in the driver by setting SHCFG[7:6] both to 1 if we want to
disable the Semaphore mechanism. However, in NPCX5 and later chips,
this behavior is deprecated (the Semaphore register is not mapped to
offset 0 of the Shared RAM Window by default).
These bits (including bit 5) were removed. The driver should keep these
bits at their default state. Otherwise, the Semaphore mechanism may not
work as expected.
BRANCH=none
BUG=b:73018524
TEST=pass make buildall.
TEST=build and flash reef/grunt/yorp image, stress test the host command
and host event, no symptom occurs.
Change-Id: I63031f3957d0485f18fb8c4f1b13ad56c2dc5804
Signed-off-by: CHLin <CHLIN56@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/1383675
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: CH Lin <chlin56@nuvoton.com>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Mulin Chao <mlchao@nuvoton.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Kukui is the first project with Chromium OS EC based SCP. This is an
base board to develop SCP functionalities.
BRANCH=none
BUG=b:114326670
TEST=manual
make BOARD=kukui_scp -j
Change-Id: I65897d5439e88cebdc6543e5a8e07cd5657303e7
Signed-off-by: Rong Chang <rongchang@chromium.org>
Signed-off-by: Yilun Lin <yllin@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1208772
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Yilun Lin <yllin@chromium.org>
Reviewed-by: Yilun Lin <yllin@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
SCP is a Cortex-M4 based sensor hub in Mediatek SoC. This change adds
the chip folder and system level drivers.
BRANCH=none
BUG=b:114326670
TEST=manual
make BOARD=kukui_scp -j
copy ec.bin to /lib/firmware/scp.img
echo 'stop' > /sys/class/remoteproc/remoteproc0/state
echo 'start' > /sys/class/remoteproc/remoteproc0/state
check EC uart console
Change-Id: I6629149f352184108fa520e80b59fd2ce94c76f7
Signed-off-by: Rong Chang <rongchang@chromium.org>
Signed-off-by: Yilun Lin <yllin@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1208770
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Yilun Lin <yllin@chromium.org>
Reviewed-by: Yilun Lin <yllin@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Enable cache CR0.CD and CR0.NW
Trackpad frame processing improved with cache on.
BUG=b:120885570
TEST=check overall performance improvement including
TP frame processing.
Change-Id: I18d27b28255d5775c71b7562e18a1d102ee35feb
Signed-off-by: Kyoung Kim <kyoung.il.kim@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1378659
Commit-Ready: Rong Chang <rongchang@chromium.org>
Tested-by: Rong Chang <rongchang@chromium.org>
Reviewed-by: Rong Chang <rongchang@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This incorporates the fuzz targets into buildall and adds a quick
sanity check to each fuzz target to make sure it exits successfully for
an empty input.
This adds roughly 5.88 seconds to "make -j buildall" (This includes an
addtionally target that will be enabled in a later CL).
time make -j buildall # BEFORE
real 1m19.519s
user 23m9.220s
sys 5m1.690s
time make -j buildall # AFTER
real 1m25.399s
user 23m35.753s
sys 5m12.609s
BRANCH=None
BUG=None
TEST=make -j buildall
Change-Id: Ib77a57297ee896569c509d0c8c998552d2a3a76c
Signed-off-by: Allen Webb <allenwebb@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1370934
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Define the default_fp_ctx[] for initial FP state as
static variable.
BRANCH=none
BUG=b:120582727
TEST=Succesfully compile for ISH target
Change-Id: Iac60a814ab7a9c3090b47472adebf05b1341c5fb
Reported-by: Caveh Jalali <caveh@google.com>
Signed-off-by: Rushikesh S Kadam <rushikesh.s.kadam@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1365155
Commit-Ready: Caveh Jalali <caveh@google.com>
Reviewed-by: Caveh Jalali <caveh@google.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This patch makes system_can_boot_ap return true for systems which
can be powered only by a fixed AC power (e.g. barrel jack AC adapter).
Such systems do not need to check a battery percentage or AC power.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=none
BRANCH=none
TEST=buildall
Change-Id: Icd59b508e944c43253d416da78d0f1a87fedb13d
Reviewed-on: https://chromium-review.googlesource.com/1301935
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This patch fixes build errors for devices which don't use DRP ports.
pd_restart_tcpc is called within DRP context. So, the static definition
has to be excluded accordingly.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=
BRANCH=none
TEST=buildall
Change-Id: I51decb0a2071230da3cdd91139f77d94b685ca5f
Reviewed-on: https://chromium-review.googlesource.com/1300616
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
BUG=b:119174492
BRANCH=octopus
TEST=None
Change-Id: I978bebd91f1098d4de799e2cceff0df6e1af3f3c
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1380712
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
BUG=none
BRANCH=octopus
TEST=check the led behavior when battery error
Change-Id: I9680b7011bb88e5e064f67ae3625534945b5dff7
Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/1381597
Commit-Ready: James Chao <james_chao@asus.corp-partner.google.com>
Tested-by: James Chao <james_chao@asus.corp-partner.google.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
If the image supports TCPC low power mode, then we already
initialized the devices after exiting low power mode. No need
to check again.
BRANCH=none
BUG=chromium:875274
TEST=On an octopus board, PS8751 and ANX3447 work with TCPC smoke test
of plugging/unplugging
Change-Id: I54e9038db87f9cf998431263df0cf8fa254bde83
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1379705
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
It is observed that CRO.TS may be set prior to main
ISH FW entry. In such case, an ESC instruction such
as fninit assembly instruction for FPU initialization,
will cause a fault.
The execution handlers are not setup this early in
FW initialization phase, and will lead to ISH CPU
reset.
This patch resets the TS flag in early FW initilization.
BRANCH=none
BUG=b:120051132
TEST=Test host FW loading for main ISH FW.
Change-Id: I7e330e2d1f39cc4a349f308ec0d046c19db281de
Signed-off-by: Rushikesh S Kadam <rushikesh.s.kadam@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1316702
Commit-Ready: Caveh Jalali <caveh@google.com>
Reviewed-by: Caveh Jalali <caveh@google.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Linker script verifies flash size and layout when generating firmware
binary. This configuration macro removes FLASH section and asserts.
BRANCH=none
BUG=b:114326670
TEST=make buildall -j
Change-Id: I3c9ce6f930260d780839e52b45055f88cc22f85f
Signed-off-by: Rong Chang <rongchang@chromium.org>
Signed-off-by: Yilun Lin <yllin@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1208771
Commit-Ready: Yilun Lin <yllin@chromium.org>
Tested-by: Yilun Lin <yllin@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
"time in exceptions" looks unreasonable after > 4294s (when 32-bit
microsecond timer wraps around).
This is because core/cortex-m/task.c:svc_handler records time
exc_start_time just before the interrupt handler for 32-bit
timer interrupt runs, so the high word of the system clock
(clksrc_high) is not updated yet (while the low 32-bits already
wrapped around). After the handler runs, clksrc_high is updated,
so there appear to be a 4294s gap between the 2 measurements.
Fix this by recording the low 32-bit timer value only. There will
never be more than 4294s between exceptions, and this fixes the
wrap-around issue as well.
BRANCH=none
BUG=chromium:914208
TEST=Flash kukui (cortex-m0) and kukui_scp (cortex-m), let system
run for 4300+s, no more accounting error in "Time in exceptions".
Change-Id: If52855ef093ac1a1d38432555694c83742feb8f1
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1372876
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Fix compilation error generated with CONFIG_FPU disabled.
BRANCH=none
BUG=b:120051489
TEST=Disable CONFIG_FPU and verify code compiles fine.
Change-Id: I0ddfe610a33cc2bdebebed4e149afbfa92f2543a
Reported-by: Sadashiva Rao Pv <sadashiva.rao.pv@intel.com>
Signed-off-by: Rushikesh S Kadam <rushikesh.s.kadam@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1316701
Reviewed-by: Caveh Jalali <caveh@google.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
When tcpc detect type-c plug in (cc lines voltage change),
it will interrupt fw to wake pd task, so task can react
immediately.
BRANCH=None
BUG=None
TEST=GRL USBPD test
Change-Id: I194b2fcad1d0c62dde2d3296753abd47af8feea6
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/1333207
Reviewed-by: Jett Rink <jettrink@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Previously we tried to perform i2c communication with the TCPC when it
was in low power mode and only if the i2c transaction failed did we wait
for the device to wake up. Now that the PS8751 will respond to i2c
transaction (ACK them) when it is in LPM, ensure the init happers before
we start talking to the device to handle an interrupt.
BRANCH=none
BUG=b:118063849,b:121109893
TEST=verify that plug and unplug for PS8751, ANX3429, and ANX3447 LPM
still works.
Change-Id: I8c18195e55ee6d04af7d4ff24230a3bd2d147d53
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1375102
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
this enables active discharge on all 12 power rails controlled by the
ROHM ROP PMIC.
BUG=b:120619543
BRANCH=none
TEST=discharge behavior verified by sajedfarzam@
Change-Id: I842dbdcc1eab596230e12130dca272a1f449e268
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1371226
Commit-Ready: caveh jalali <caveh@chromium.org>
Tested-by: caveh jalali <caveh@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
On TPM disabling, AUTH/SEED/PROOF data in TPM persistent data set
and the loaded objects shall be cleared for better security.
CQ-DEPEND=CL:1362203
BRANCH=cr50
BUG=b:119221935
TEST=Tested manually on eve-campfire dual boot dut.
Checked S3 resume from short|long suspend on Windows.
Checked Warm reboot from Windows to Chrome OS.
Checked Warm reboot from Windows to Windows.
Checked Chrome OS login info preserving.
Change-Id: I8e03f6242cf04e7c824ee54cca99413eb809edea
Signed-off-by: Namyoon Woo <namyoon@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1372029
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Andrey Pronin <apronin@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
As we have replaced all all CONFIG_ISH_xx flags in in chip/ish/* files with
CHIP_FAMILY and CHIP_VARIANT, abandoning original CONFIG_ISH_xx flags.
BRANCH=none
BUG=b:112385410
TEST=Test host FW loading for main ISH FW.
Change-Id: Ie0635a49585d456504bd1027406c5d6929dc5a8c
Signed-off-by: Shine Liu <shine.liu@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1367011
Commit-Ready: Caveh Jalali <caveh@google.com>
Tested-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Caveh Jalali <caveh@google.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Replace all CONFIG_ISH_xx flags in chip/ish/* files with CHIP_FAMILY and
CHIP_VARIANT. Which provides more structural defines between ISH generations.
BRANCH=none
BUG=b:120295222 b:112385410
TEST=Test host FW loading for main ISH FW.
Change-Id: Ica92eee11034447c9f0828aa986fb1736d20cf27
Signed-off-by: Shine Liu <shine.liu@intel.com>
Signed-off-by: li feng <li1.feng@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1367010
Commit-Ready: Caveh Jalali <caveh@google.com>
Tested-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
To accommodate the changes coming to ISH chip generations including CHIP_FAMILY
and CHIP_VARIANT instead of current defines of CONFIG_ISH_xx.
BRANCH=none
BUG=b:120295222, b:112385410
TEST=Test host FW loading for main ISH FW.
Change-Id: I03af74aa1b45cd4d1f030489a171506064721b3c
Signed-off-by: Shine Liu <shine.liu@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1367009
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Also fix misspelling.
BRANCH=none
BUG=none
TEST=make buildall -j
Change-Id: I6e17407be36abd83567a2e09ae1c2684e1bc5090
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1378907
Reviewed-by: Jett Rink <jettrink@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Currently, pd_log assumes charge manager exists, thus, build fails
if CONFIG_CHARGE_MANAGER is undefined because charge_manager_save_log
is missing. This patch fixes it.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=none
BRANCH=none
TEST=buildall
Change-Id: I36156e7b376717a53e8a2cab7483b5150b4f2d61
Reviewed-on: https://chromium-review.googlesource.com/1300615
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Currently, if try.src is enabled, the TCPM doesn't debounce for
SNK connection.
This patch makes the TCPM wait for tPDDebounce when detecting
SNK connection after switching from SNK to SRC for try.src.
BUG=b:115464001
BRANCH=none
TEST=On Sona, verify picture is shown on HP s240.via USB-C
TEST=On Sona, verify picture is shown on HP s240 via Hoho.
Change-Id: I4f91bfca4f829f051d1c33f88f3664fad9b83e9f
Reviewed-on: https://chromium-review.googlesource.com/1297035
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Currently, hardware ramping (= voltage regulation) is automatically
disabled for USB-C power supplier (HARGE_SUPPLIER_PD & _TYPEC).
This patch allows USB-C suppliers to get voltage regulation. It prevents
the input voltage of weak suppliers from drooping.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=b/80163913,b/120238339
BRANCH=none
TEST=Verify Vayne get charged by PD and Type-C adapters.
TEST=Verify on Vayne input current limit is set to adapters' limit.
Change-Id: Ideecac911822ffca33be1755846febfcb822f734
Reviewed-on: https://chromium-review.googlesource.com/1377564
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This patch consolidates keyboard factory tests, which are currently
duplicated under the chip directories.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=none
BRANCH=none
TEST=buildall
Change-Id: I1ab8bc96808e1c284d991d3c2f1f82a37329676e
Reviewed-on: https://chromium-review.googlesource.com/1378654
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This patch fix the keyboard malfucntion with KBD_KSO2 line after
executed "ectool kbfactorytest".
BUG=none
BRANCH=octopus
TEST=make sure keyboard works after executed "ectool kbfactorytest"
on meep.
Change-Id: I33c22e59a01884ff6c961161e189583a6c3673a3
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/1373389
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
When state transits from TryWait.SNK to Unattached.SNK,
the timeout value is 10~20ms (tPDDebounce). This define
in USB Type-C 1.3 spec Figure 4-16.
BRANCH=None
BUG=None
TEST=GRL USBPD test
Change-Id: If736daf1ef9e74f07a571a2f1adb12a928415c2b
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/1333217
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Add option to scale the sensor data. Each axis can be scaled
differently.
If the sensor does not support setting scale, return an error.
BUG=b:112957338
BRANCH=nocturne
TEST=Compile, load, check setting calibscale returns an error.
Change-Id: Ib6aac39f22ddcbff5f3e45830f8029811a4ed1ad
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1279185
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
board_is_ramp_allowed is replaced by chg_ramp_allowed and
no longer called.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=none
BRANCH=none
TEST=buildall
Change-Id: Iedf760567b4034ce7317a0d2479eb7ee937b4680
Reviewed-on: https://chromium-review.googlesource.com/1377342
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This addresses a cross compilation bug for fuzzing targets where
CROSS_COMPILE was always ''.
BRANCH=None
BUG=chromium:911310
TEST=USE="ubsan asan fuzzer" ./build_packages \
--board=amd64-generic --skip_chroot_upgrade chromeos-ec &&
(cd ../platform/ec && unset BOARD && make -j buildall)
Change-Id: I1c0b99f4ecef1e6ddec489568ccb13a8e8f5fb85
Signed-off-by: Allen Webb <allenwebb@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1363541
Reviewed-by: Manoj Gupta <manojgupta@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
The IRQ handler for bmi160 continues to loop until all of the interrupt
reasons are handled; however, if the read fails the interrupt variable
will be in an unknown state. We can either return early if there was an
error or we can set the interrupt variable to 0 before the read call.
Either way the loop exits.
BRANCH=none
BUG=b:119093572
TEST=On Bobba360 with a solid repro case of the watchdog reset, this
change avoids the watchdog reset.
Change-Id: I482f074b6e9e7c183def8ce17157ed28ca96b1c9
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1378908
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-by: Enrico Granata <egranata@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
To 'successfully' flash sweetberry the 1s timeout is not sufficient.
Increase to 2s.
BRANCH=None
BUG=b:120449224
TEST=manual test
sudo servo_updater --board sweetberry
...
offset: writable at 0x40000
sending 0xb580 bytes to 0x40000
-------
update complete
image updated
...
Change-Id: I38bf8c852caf97069fcf67f4b77f9c0a30008235
Signed-off-by: Ruben Rodriguez Buchillon <coconutruben@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1369507
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This patch fixes a race condition in the BMI160 driver w.r.t. reading
from the FIFO.
The previous code was reading the FIFO length, adding 1 byte to it and
then reading that much data into a static buffer. This works well if no
new samples are added to the FIFO between reading the length and reading
the payload. But, if the BMI pushes a new sample in the FIFO, the read will
not return an empty frame header, but instead fill in the first byte of the
new sample, which is - however - incomplete and will be retransmitted.
However, because the buffer we process is static, if things align just
right, it is possible for that header to be parsed as a valid sample,
since we do not clear the buffer and we assume the entire 64 bytes of
it are valid and processable.
Fix this issue by maintaining a pointer to the end of the read-in FIFO
buffer and using that - instead of the static bp + sizeof - to calculate
how much data we can actually process from the FIFO.
BUG=b:120508077
BRANCH=poppy,octopus
TEST=Starting from CL:1367013 and CL:1370689, adding an
`msleep(2)` between reading last_interrupt_timestamp
and calling load_fifo(), observe that the kernel sees
more sensor events than should be present given the
sample rate selected. Observe that some of those have
repeated payload values.
With this change, the number of samples seen at the kernel
side is compatible with the chosen sample rate and no samples
have incorrectly repeating payloads. It is possible to also
make this more obvious by setting the buffer to contain an
incorrect value before reading from the FIFO, and observing
that no samples contain that incorrect value.
Change-Id: I57124756d51b8acf04630020c1ffb934f471735f
Signed-off-by: Enrico Granata <egranata@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1372027
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
In it83xx chip, the file of spi.c is renamed
to spi_master.c, and the related config is
renamed too.
BUG=none
BRANCH=none
TEST=none
Change-Id: Ia696e62afa2ff06da68a3e4af685615b1dbcc8e9
Signed-off-by: tim <tim2.lin@ite.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/1372870
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Tim2 Lin <tim2.lin@ite.corp-partner.google.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This patch moves oz554 LED driver code from Karma.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=none
BRANCH=none
TEST=buildall
Change-Id: Ia2808563b9c113e5ea3376f9327dff2578e20906
Reviewed-on: https://chromium-review.googlesource.com/1366015
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Fix reference point according to the bmi160 and bmm150 datasheet and
kukui p1 board file.
Also, minor fix for typos and incorrect variable naming.
TEST=1.) Run arc++ sensor apps. Run "ectool motionsense odr 2 10000" to
enable magnetometer manually. See that the magnetometer is moved
accordingly.
2.) Flip kukui and see that the UI also flips accordingly.
BUG=b:120467401
BRANCH=None
Change-Id: If4091366cde3a98bf08aec5b81f6f48595fdc8f5
Signed-off-by: Yilun Lin <yllin@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1369504
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Yilun Lin <yllin@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
VENDOR_CC_IMMEDIATE_RESET has either uint16_t argument or none.
The argument is a time delay in millisecond unit.
If it has no argument, then Cr50 resets H1 immediately without
any delay.
BUG=b:120485010
BRANCH=cr50
TEST=none
Change-Id: I33aaacbb0a0532aa84f39a8cd51d0d54fa2d281a
Signed-off-by: Namyoon Woo <namyoon@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1361998
Commit-Ready: Joel Kitching <kitching@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
-Added support to scale 12MHz to 1MHz
-Fixes the timestamp issue
-Changes under CONFIG_ISH_30
ISH 3.0 has 12MHz Main counter
ISH 4.0 has 32KHz Main counter
BUG=none
BRANCH=master
TEST=On Soraka board modified for ISH, ensure
clock tick happens correctly. Ensure ISH
probe and sensor info is seen in kernel logs
Change-Id: Ib5d8a48bf99d1398a0424596399abd7df431e07a
Signed-off-by: Naresh Solakni <naresh.solanki@intel.com>
Signed-off-by: Sadashiva Rao Pv <sadashiva.rao.pv@intel.com>
Signed-off-by: Kyoung Kim <kyoung.il.kim@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/686434
Commit-Ready: Caveh Jalali <caveh@google.com>
Tested-by: Kyoung Il Kim <kyoung.il.kim@intel.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Kyoung Il Kim <kyoung.il.kim@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
The ITE based octopus boards have a PS8751 acting as a USB mux on at
least one port. Since these boards have GPIOs hooked up to the PS8751
reset pin(s), we should reset the chips on startup. This should help
in rare error cases, for example if the chip is hung up.
BUG=b:120087080
BRANCH=octopus
TEST=loaded onto apel board version 0, ran several EC reboots and
verified the DB USB-C and USB-A ports functioned well
Change-Id: I04279e5e12996deedf4d22b2be2aa2f9909f4852
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1372028
Reviewed-by: Jett Rink <jettrink@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
BUG=b:119565385
BRANCH=None
TEST=flash_fp_mcu <bin> and make sure bin was updated with:
ectools --name=cros_fp version
Change-Id: I99673a3fff1e69845f0dd817ac5dfe41f4b85708
Signed-off-by: Shelley Chen <shchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1370745
Commit-Ready: Shelley Chen <shchen@chromium.org>
Tested-by: Shelley Chen <shchen@chromium.org>
Reviewed-by: Nicolas Norvez <norvez@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
For the accelinfo EC console command this code prints number of motion
sensors count also. With this, we can get number of sensors connected
on DUT before testing them individually by test scripts.
BUG=none
BRANCH=none
TEST=Manually tested on Bobba convertible and clamp-shell,
can get the correct number of sensors connected on the board.
Change-Id: If1de15756db8718d7e95997fc83593ed55fa29a3
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1372508
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
To accomondate upcoming arcada_ish board, changing MNG_HC_FW_READY from 8 to 3
BRANCH=none
BUG=b:120295222
TEST=Test host FW loading for main ISH FW.
Change-Id: Ibee24cb01c6078177ba9ef1ad30c360a3157a84e
Signed-off-by: Shine Liu <shine.liu@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1367012
Commit-Ready: Caveh Jalali <caveh@google.com>
Tested-by: Caveh Jalali <caveh@google.com>
Reviewed-by: Caveh Jalali <caveh@google.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
In S5, we disable the 5V, so the overcurrent detection is not needed.
Disabling its pull-up prevents any current leak.
BRANCH=none
BUG=b:118342484
TEST=Checked the GPIO flag in S0 and S5. Can't verify on real hardware
due to the wrong GPIO pin.
Change-Id: Ib9a0c7abdc7bae820cbfa92f9c7a7e704079e077
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1370891
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
ec_commands.h is often synced with the Linux sources, so it's nice to
sanity-check it.
CQ-DEPEND=CL:1336039
BRANCH=none
BUG=chromium:621123
TEST=.../pre-upload.py
Change-Id: I56645e613f8689c26ddf6ded1325e270be35da8a
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1330107
Reviewed-by: Randall Spangler <rspangler@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Based on task analysis for fleex, all npcx octopus boards are having
their tasks increased to VENTI size, with the exception of the USB_CHG
and KEYPROTO tasks, which appear to be doing well as-is.
BUG=b:112309201
BRANCH=octopus
TEST=builds, runs on fleex and phaser, fleex stack analysis looks better
Change-Id: I68971cfe2e1dbaf8b83f9ef13bfeb4786b32dbc6
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1368009
Reviewed-by: Jett Rink <jettrink@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This patch swaps the forwardslash-pipe key (scancode=0x56) with the
right control key (scancode=0xe014) if UK2 bit in SKU ID is enabled.
evtest produces:
type 1 (EV_KEY), code 86 (KEY_102ND), value 1
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=b:117827249
BRANCH=none
TEST=Verify forwardslash key produces keycode=0x1d on Syndra with UK2.
TEST=Verify '\' and '|' are printed on OS (with input method = UK).
TEST=Run emerge-nami chromeos-ec
Change-Id: Ibbaeccd12cfc09d913ecfe1172218297c3d7341a
Reviewed-on: https://chromium-review.googlesource.com/1366307
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
The BMI160 will clear the FIFO watermark/full interrupt when the FIFO
crosses the threshold condition - which happens upon reading from it
in load_fifo(). As a result of this, and the fact that the soft IRQ
handler for the BMI160 tries to loop until it has finished serving all
interrupt causes, there are possibilities for a race condition such as
the following to occur:
read timestamp, value is t0
read interrupt cause: it's a watermark interrupt
load fifo(t0): this clears the interrupt, allowing a new one to happen
read timestamp, value is still t0
a watermark interrupt happens at t1
read interrupt cause: watermark
load fifo(t0)
At this point, the fifo will process events at t1 as-if they had happened
at t0, which is bad and causes incorrect timestamps on the AP side.
This changes moves reading the timestamp value as close as possible
to load_fifo, and in a relative order where a new watermark interrupt
cannot happen, which ensures the timestamp and the FIFO data for it
are synchronized
BUG=b:120508077
TEST=on Bobba and Nocturne, observe that no events happen
where an identical "a" time matches two distinct (b,c) times
BRANCH=nocturne,bobba
Change-Id: I454b257366bccf2b9e4d78df5dc005a8ad7313a0
Signed-off-by: Enrico Granata <egranata@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1367013
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
|