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* Revert "Servo v4: reduce RO flash size"Todd Broch2019-03-062-8/+2
| | | | | | | | | | | | | | | | | | | | | This reverts commit 590a45db85507787af77cf6bfc8ae63499cbf1cc. BRANCH=none BUG=b:124465253 TEST=manual, Running sudo servo_updater -b servo_v4 --force -f build/servo_v4/ec.bin sudo servo_updater -b servo_v4 --force -f build/servo_v4/ec.bin passes without failure, servo_updater.ServoUpdaterException: usb_updater2 exit with res = 3 Change-Id: Ied9939192c30342bb6314e6dccfcd56d950659ab Signed-off-by: Todd Broch <tbroch@google.com> Reviewed-on: https://chromium-review.googlesource.com/1497438 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Todd Broch <tbroch@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* cr50: CCD flags not read correctly on first factory bootKeith Short2019-03-061-4/+10
| | | | | | | | | | | | | | | | | | | | | | | | During the first factory boot flow, the CCD flags are not read correctly. In this boot path, the ccd_config_loaded flag is not set until after the first calls to HOOK_CCD_CHANGE. Changed ccd_load_config() to always call HOOK_CCD_CHANGE after setting ccd_config_loaded flag. Changed ccd_save_config() so that it doesn't call HOOK_CCD_CHANGE if the ccd_config_loaded flag is not set. BUG=b:126971514 BRANCH=cr50 TEST=Erase the board ID, peform rollback to 0.0.22, and then upgrade to 4.14 firmware. On Wilco, confirmed that GPIO_FACTORY_MODE(GPIO_I2C_SCL_INA) is driven high during first factory boot flow. Change-Id: Ib6764085d2911abe330c7e580fd6b31bbfe6f89d Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1496679 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* scratch_reg: reorganize BOARD_ALL_PROPERTIESMary Ruthven2019-03-061-5/+11
| | | | | | | | | | | | | | | | List one board property per line and alphabetize the list, so the BOARD_ALL_PROPERTIES definition is more readable. BUG=none BRANCH=cr50 TEST=none Change-Id: Ic0a8d83b380c4f61c89c54535a1c350daf4ae39f Signed-off-by: Mary Ruthven <mruthven@google.com> Reviewed-on: https://chromium-review.googlesource.com/1481656 Commit-Ready: Mary Ruthven <mruthven@chromium.org> Tested-by: Mary Ruthven <mruthven@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* cr50: use closed loop reset based on board propertyMary Ruthven2019-03-063-10/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the closed loop reset when cr50 needs to reset the device. Cr50 expects the board to reset in three places: board_reboot_ap, board_reboot_ec, or during init after any cr50 reset other than deep sleep. This change modifies these to use the closed loop reset if the board property is set. In board_reboot_ap and board_reboot_ec it calls board_closed_loop_reset instead of doing the normal reset steps if the board property is set. In init_ap_detect call board_closed_loop_reset if cr50 just resumed from any reset other than hibernate. Don't trigger the tpm_rst_isr manually. BUG=b:123544145 BRANCH=cr50 TEST=manual Flash firmware that supports resetting the AP when EC_RST_L is asserted. Reboot cr50 and verify deferred_tpm_rst_isr is only called after tpm_rst_asserted. Open Cr50. Verify the AP is reset Flash old Mistral firmware which seems to take around 12 seconds for the warm reset to happen. Boot the AP. Reboot cr50 while the AP is up. The AP wont reset for a while. While the AP is still up, verify Cr50 keeps EC_RST_L asserted, the AP state is Unknown, and tpm commands fail while the AP is in this state. Eventually the AP resets. Make sure the TPM becomes usable again and the AP state is on. Change-Id: I6f0e8728717f1ed35c96b2669f1796078ebf93f7 Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1447001 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* cr50: add closed loop reset property to mistralMary Ruthven2019-03-061-1/+2
| | | | | | | | | | | | | BUG=b:123544145 BRANCH=cr50 TEST=make buildall -j Change-Id: I39309c73957f0698b573342880a083d14077519f Signed-off-by: Mary Ruthven <mruthven@google.com> Reviewed-on: https://chromium-review.googlesource.com/1480712 Commit-Ready: Mary Ruthven <mruthven@chromium.org> Tested-by: Mary Ruthven <mruthven@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* cr50: add no ina support board propertyMary Ruthven2019-03-064-11/+24
| | | | | | | | | | | | | | | | | | Mistral also uses the ina pins as gpios. Add a board property for no ina support. Use that instead of the closed source set board property for the usb_i2c_enable code. BUG=b:124949444 BRANCH=cr50 TEST=flash on mistral. Make sure EN_PP3300_INA_L isn't asserted when ccd is enabled. Change-Id: If06a65bc4a1ef7b374a44fc53d65ea5daed336df Signed-off-by: Mary Ruthven <mruthven@google.com> Reviewed-on: https://chromium-review.googlesource.com/1480711 Commit-Ready: Mary Ruthven <mruthven@chromium.org> Tested-by: Mary Ruthven <mruthven@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* cr50: set ap state to unknown while waiting for resetMary Ruthven2019-03-061-0/+3
| | | | | | | | | | | | | | | While cr50 is waiting to see the AP reset, set the state to unknown. BUG=b:123544145 BRANCH=cr50 TEST=firmware_Cr50DeviceState Change-Id: I33f5758a6e3c41bd1c9d0c69ced8685365005a28 Signed-off-by: Mary Ruthven <mruthven@google.com> Reviewed-on: https://chromium-review.googlesource.com/1447000 Commit-Ready: Mary Ruthven <mruthven@chromium.org> Tested-by: Mary Ruthven <mruthven@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* tpm_registers: check if_stop has been initialized before calling itMary Ruthven2019-03-061-1/+3
| | | | | | | | | | | | | | | | | It's possible tpm_stop will be called before the interface has been registered. Don't call if_stop unless it has been initialized. BUG=none BRANCH=cr50 TEST=none Change-Id: I45b6d11553ce0eda5b097184a5be81f8b79726aa Signed-off-by: Mary Ruthven <mruthven@google.com> Reviewed-on: https://chromium-review.googlesource.com/1480710 Commit-Ready: Mary Ruthven <mruthven@chromium.org> Tested-by: Mary Ruthven <mruthven@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* cr50: add a closed loop reset functionMary Ruthven2019-03-063-5/+37
| | | | | | | | | | | | | | | | | | | Add a function that asserts EC_RST_L until TPM_RST_L gets asserted. Disable sleep using SLEEP_MASK_AP_RUN while waiting for the AP reset. Disable tpm communications using tpm_stop until the AP is reset. BUG=b:123544145 BRANCH=cr50 TEST=run 'ecrst cl' on mistral, scarlet, and soraka. Make sure the sleepmask is cleared correctly and the TPM works after the reset is complete. Change-Id: I5971b45b7a69fd24887a7c22ee7984972b7828ae Signed-off-by: Mary Ruthven <mruthven@google.com> Reviewed-on: https://chromium-review.googlesource.com/1444411 Commit-Ready: Mary Ruthven <mruthven@chromium.org> Tested-by: Mary Ruthven <mruthven@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* cr50: use interrupts for ap_stateMary Ruthven2019-03-064-67/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ap_state machine as is is pretty hard to modify as it's implemented now. The state machine has to have certain states set at certain points to handle AP detection properly and it is very slow to detect AP off. It takes a second and it will only detect AP off if TPM_RST_L stays asserted for 1 second. This change modifies ap_state.c to use interrupts instead of polling, so it can detect when the AP is off immediately and wont miss any resets. This is required for the new closed loop reset feature. Cr50 has to be able to detect all AP resets and it can't take 1 second for cr50 to determine the AP is off. We used polling because we had to use APTX_CR50RX to detect AP state for a while. The UART level changes a lot. Processing all of the interrupts really impacted CCD uart, so we couldn't use interrupts to detect the state. We had to poll. AP UART isn't used to detect AP state anymore on any platforms, so it's ok to switch to interrupts now. APTX_CR50RX is still used for ap uart detection in ap_uart_state.c. This change doesn't modify that at all. BUG=b:123544145 BRANCH=cr50 TEST=Make sure suspend and reboot stress tests still work on a bob and a soraka. Check that Cr50 detects the AP state correctly. Change-Id: I80eb97aecffe460b7857e66e7204a55b72c9dd47 Signed-off-by: Mary Ruthven <mruthven@google.com> Reviewed-on: https://chromium-review.googlesource.com/1446999 Commit-Ready: Mary Ruthven <mruthven@chromium.org> Tested-by: Mary Ruthven <mruthven@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* gsctool: make sure programmed image size is properly alignedVadim Bendebury2019-03-061-0/+6
| | | | | | | | | | | | | | | | | Flash driver of the g chip requires that the size of the programmed area is evenly divisible by 4. This patch makes sure that gsctool complies with this requirement. BRANCH=none BUG=b:127295653 TEST=without this patch attempts to update Cr50 to an image built from ToT fails, with this patch the same image programs just fine. Change-Id: I064d22130a56e9e703f728bc898fd5de82d365d4 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1499657 Reviewed-by: Namyoon Woo <namyoon@chromium.org> Reviewed-by: Andrey Pronin <apronin@chromium.org>
* cr50: use board prop to mask straps if config is ambiguousMary Ruthven2019-03-051-6/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Cr50 tries to determine SPI vs I2C by checking that there are pullups on only the I2C or SPI straps. If there are pullups on both, it can't use the straps to determine SPI vs I2C, so it just defaults to the default board properties (I2C and PLT_RST_L). This change uses last board properties to determine I2C vs SPI if the straps can't be used to make this determination. The actual strap pins are only connected to the pullup or pulldown being used for the straps. It's pretty likely these strap readings are correct. The unused straps are connected to the AP which can interfere with these readings if it has a pullup on any of these signals. This change uses the last board property configuration to determine I2C vs SPI and mask unused straps to try and remove signals the AP is interfering with. If this masked config isn't valid, then cr50 will still fall back to using I2C and PLT_RST_L. BUG=b:124777847 BRANCH=cr50 TEST=manual flash mistral. Reboot cr50. Make sure it doesn't switch to I2C config # Verify cr50 selects spi Ambiguous strap config. Use spi based on old brdprop. Use DBG image to set invalid I2C and SPI board property settings rollback to the image that checks if I2C and SPI brdprop settings are invalid. Verify Mistral can't find a valid strap and uses I2C. Use DBG image to select SPI and I2C board properties. Make sure this is rejected as invalid. # enable writing to long life scratch 1 rw 0x40000128 2 # write old board properties with i2c and spi rw 0x40000130 (OLD_BRDPROP | 3) for mistral - rw 0x40000130 0x811143 # rollback to image that checks old board properties if # straps are ambiguous rollback # Verify Mistral doesn't use old AP bus setting and # defaults to the default properties. Invalid strap pins! Default properties = 0x42 Use DBG image to select neither the SPI or I2C board property. Make sure this is rejected as invalid. # enable writing to long life scratch 1 rw 0x40000128 2 # write old board properties without i2c or spi rw 0x40000130 (OLD_BRDPROP & ~3) for mistral - rw 0x40000130 0x811140 # rollback to image that checks old board properties if # straps are ambiguous rollback # Verify Mistral doesn't use old AP bus setting and # defaults to the default properties. Invalid strap pins! Default properties = 0x42 Use dbg image to modify board properties to select I2C. rollback and make sure Cr50 continues using I2C. # enable writing to long life scratch 1 rw 0x40000128 2 # write old board properties with i2c for mistral - rw 0x40000130 0x811142 # write old board properties with i2c rollback # Verify cr50 selects i2c Ambiguous strap config. Use i2c based on old brdprop. Change-Id: I409e2f3ab1339aafe450b35259adc3c4c5d870ae Signed-off-by: Mary Ruthven <mruthven@google.com> Reviewed-on: https://chromium-review.googlesource.com/1483816 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Mary Ruthven <mruthven@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* flash_ec: do not mark NEED_SERVO 'no' for it83xxNamyoon Woo2019-03-051-1/+1
| | | | | | | | | | | | | | | | Servod is required to flash it83xx chip. BUG=b:124388894 BRANCH=none TEST=manually ran flash_ec. $ ./util/flash_ec --board=dragonegg --image ${IMG} Change-Id: I50e8599e8fedce6dd51bc217128dd8142557269b Signed-off-by: Namyoon Woo <namyoon@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1500892 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Matthew Blecker <matthewb@chromium.org>
* i2c:xfer i2cwrite invalid in ec consoleTony Zou2019-03-051-16/+16
| | | | | | | | | | | | | | | | | | | In command xfer i2cwrite port addr offset value 16bit offset and 8bit offset call the wrong i2c write interfacefix it. BRANCH=none BUG=b:126820386 TEST=1:) Build flapjack EC and flash to DUT , in ec console can read/write i2c device correctly. 2:) Build kukui EC , build pass. Change-Id: Ib3aa058ae0917fe62f38bc500a8227d6e36dbab1 Reviewed-on: https://chromium-review.googlesource.com/1496676 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Tony Zou <zoutao@huaqin.corp-partner.google.com> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* npcx: pwm: Use DCRn greater than CTRn to present its duty cycle is zero.Mulin Chao2019-03-053-21/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In npcx pwm driver, it turns off pwm module directly when its duty cycle is set to zero. But we saw pwm signal isn't turned off by the following sequence: 1. pwm_set_raw_duty(ch, 0); 2. pwm_enable(ch, 1); Please notice setting zero in DCRn doesn't mean duty cycle is zero. (NPCX duty cycle: ( (DCRn+1) / (CTRn+1) ) x 100). Hence in step 2, we can observe a very low duty cycle once the driver enables pwm module. According to figure. 24 in npcx5's datasheet, setting DCRn greater than CTRn means that the result of 16-bits comparator is always false. It equals the duty cycle is zero. This CL adopts this method to present it and removes the dependency between pwm_enable()/ pwm_get_enabled() and pwm_set_raw_duty()/pwm_get_duty(). In order to make sure DCRn can be greater than CTRn, we also defined the PWN maximum duty cycle is (0xFFFF -1) since both DCR and CTR are 16-bits registers. BRANCH=none BUG=b:123552920 TEST=No build errors for npcx5/7 series. Test pwm console command on npcx5/7 evbs by the following sequence. 1. pwm_set_raw_duty(ch, 0); 2. pwm_enable(ch, 1); And no symptoms are observed. PWM_CONFIG_ACTIVE_LOW flag is tested also and no symptom occurred. Test fan control by faninfo & fanset console commands. Connect Sunon 4-pins PWM fan and evb by following steps: 1. Connect PWM0 to PWM pin of fan. 2. Connect TA1_TACH1 and 3.3 PU on Tacho pin of fan. 3. Connect 5V and GND pins of fan to power supply. No symptoms are observed. Change-Id: I92517ff0bf3e027ae191be00112cd71ec4b55a2b Signed-off-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/1475096 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* core/minute-ia: Add __ram_free to link scriptNicolas Boichat2019-03-051-4/+2
| | | | | | | | | | | | | | | | | | Use __ram_free instead of defining a fake FLASH region in the linker script. This reverts commit 6fd1d521e48 ("core/minute-ia: Add FLASH memory configuration"). BRANCH=none BUG=b:123327630 TEST=make BOARD=atlas_ish -j shows *** 592328 bytes in RAM still available on atlas_ish **** Change-Id: Iacce7924dd867024e5381e31f1afb12d13305f3a Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1496686 Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
* Makefiles.rules: Fix free space message on boards with no flashNicolas Boichat2019-03-051-3/+7
| | | | | | | | | | | | | | | | | | | | | | kukui_scp has no flash, so let's just print the leftover space in RAM instead. BRANCH=none BUG=b:123327630 TEST=make buildall -j 2>&1 | grep "still available" | sort > avail before and after this change, only this line changes: *** -29956 bytes in flash and 468976 bytes in RAM still available on kukui_scp **** *** 468976 bytes in RAM still available on kukui_scp **** TEST=kukui_scp does not appear in "Tightest boards' RW flash" summary. TEST=make savesizes/newsizes still reports changes in RAM space on kukui_scp Change-Id: I4e17a142777ae20bb8e8c66b5402edf2838250a3 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1496685 Reviewed-by: Stefan Reinauer <reinauer@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
* kukui_scp: Add rpmsg name service.Peter Shih2019-03-044-0/+31
| | | | | | | | | | | | | | | | rpmsg name service provide a way for firmware to announce available rpmsg channels and its IPI id to AP, without AP having to hard-code all the IPI ids. BUG=b:120953723 TEST=manually BRANCH=none Change-Id: I8ec539a45b58f20e70a798ede4abaad5a7bb4360 Signed-off-by: Pi-Hsun Shih <pihsun@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1389986 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Yilun Lin <yllin@chromium.org>
* makefile: add manifest header supportJett Rink2019-03-042-1/+66
| | | | | | | | | | | | | | | | | | The ISH FW image needs to have a static manifest header prepended to built ISH image before it can be loaded on to hardware. The header we prepend is static and is the bare minimum to make the corresponding shim loader work correctly. BRANCH=none BUG=b:122371717,b:124788278 TEST=ec.bin output will chain load properly when sent to the kernel driver. Change-Id: I5458782d70308c99e297b823fd085a74480d252e Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1490671 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* flash_ec: remove some boards from BOARDS_IT83XXNamyoon Woo2019-03-021-3/+0
| | | | | | | | | | | | | | | | | | Servod already knows ec_chip of ampton, bip and dragonegg is 'it83xx'. CQ-DEPEND=CL:1493037 BUG=b:125837387 BRANCH=none TEST=manually ran flash_ec on bit, dragonegg with servo_v2 $ ./util/flash_ec --board=bip --image ${IMG} $ ./util/flash_ec --board=dragonegg --image ${IMG} Change-Id: Ibd2faa5cffdacf30b89935203f4343e3a064a408 Signed-off-by: Namyoon Woo <namyoon@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1496198 Reviewed-by: Wai-Hong Tam <waihong@google.com>
* flash_ec: remove board-to-mec1322 conversion logicNamyoon Woo2019-03-021-10/+0
| | | | | | | | | | | | | | Servod already knows ec_chip of chell, glados and strago is 'mec1322'. CQ-DEPEND=CL:1493037 BUG=b:125837387 BRANCH=none TEST=none Change-Id: I49dba2b33aaab40b9e86354cca5b7c5f22ab59a6 Signed-off-by: Namyoon Woo <namyoon@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1496162 Reviewed-by: Wai-Hong Tam <waihong@google.com>
* flash_ec: remove board-to-LM4 conversion logicNamyoon Woo2019-03-021-8/+0
| | | | | | | | | | | | | | | | | Servod already knows ec_chip of Samus is 'lm4'. CQ-DEPEND=CL:1493037 BUG=b:125837387 BRANCH=none TEST=manually ran flash_ec on samus with servo_v2. $ ./util/flash_ec --board=samus --image ${IMG} Change-Id: Ib87a4231d5c19bf2da0e3e115ab9ce9b76cc8517 Signed-off-by: Namyoon Woo <namyoon@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1495475 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Wai-Hong Tam <waihong@google.com>
* flash_ec: remove some boards from BOARDS_STM32.Namyoon Woo2019-03-021-9/+0
| | | | | | | | | | | | | | | | | | Servod already knows ec_chip of big, blaze, elm, flapjack, hammer, kitty, kukui, oak, and scarlet is 'stm32'. CQ-DEPEND=CL:1493037, CL:1491936 BUG=b:125837387 BRANCH=none TEST=manually ran flash_ec on scarlet with suzy_Q. $ ./util/flash_ec --board=scarlet --image ${IMG} Change-Id: I1f7a2b3aa6e63c5b22d22de3d23cf9cbb0585910 Signed-off-by: Namyoon Woo <namyoon@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1496382 Reviewed-by: Wai-Hong Tam <waihong@google.com>
* flash_ec: remove some boards from BOARDS_NPCX_SPINamyoon Woo2019-03-021-10/+0
| | | | | | | | | | | | | | | | | | | | | | Servod already knows ec_chip of coral, eve, fizz, lux, nami, nautilus, poppy, rammus, reef and soraka is 'npcx_spi'. CQ-DEPEND=CL:1493037 BUG=b:125837387 BRANCH=none TEST=manually ran flash_ec on coral with servo_v2, servo_micro and suzy_Q. $ ./util/flash_ec --board=coral --image ${IMG} ran flash_ec on soraka with suzy_Q. $ ./util/flash_ec --board=soraka --image ${IMG} Change-Id: Iade21152d37c520ea4ab2053675a203e987d7ffb Signed-off-by: Namyoon Woo <namyoon@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1496197 Reviewed-by: Wai-Hong Tam <waihong@google.com>
* common/usb_pd_protocol: Set port in LPM at the start of initKarthikeyan Ramasubramanian2019-03-011-0/+8
| | | | | | | | | | | | | | | | | | | | | During initialization, PD ports are not marked as in Low Power Mode. This causes other tasks not to wait before the TCPC is initialized leading to invalid state information. Set the ports as in Low Power Mode at the start of initialization, so that other tasks wait until the TCPC is initialized and ready. BUG=chromium:934332, b:124131293 BRANCH=octopus TEST=Ensure that the system boots to ChromeOS. Ensure that the device detects the USB stick attached to servo v4 at recovery mode with or without the power pass through and boots from it. Change-Id: Id4963fc0540ab092bb5be20cada64fe34a9272de Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://chromium-review.googlesource.com/1492531 Commit-Ready: Karthikeyan Ramasubramanian <kramasub@chromium.org> Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* flash_ec: get ec_chip from servodNamyoon Woo2019-03-011-4/+21
| | | | | | | | | | | | | | | | | | | | | Get ec_chip info from servod, and use it in case ec chip is not listed in the board-to-chip conversion array, and if --chip is not given in the command line. CQ-DEPEND=CL:1491936 BUG=b:125837387 BRANCH=none TEST=manually ran flash_ec. $ ./util/flash_ec --board=samus --image ${IMG} $ ./util/flash_ec --board=coral --image ${IMG} $ ./util/flash_ec --board=grunt --image ${IMG} $ ./util/flash_ec --board=bip --image ${IMG} Change-Id: I68e7bcd38510c4d01f4427e1d8be3df50d6e65e0 Signed-off-by: Namyoon Woo <namyoon@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1493037 Reviewed-by: Wai-Hong Tam <waihong@google.com>
* .clang-format: add more style optionsVadim Bendebury2019-03-011-0/+2
| | | | | | | | | | | | | | | | | These options direct the formatter to enforce style which is closer to the EC codebase status quo: - no single line functions - avoid function return type on a separate line BRANCH=none BUG=none TEST=ran clang-format and observed desired behavior Change-Id: I62012f58483f11c46925f2c6c4c6fff72b9e90f8 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1496204 Reviewed-by: Raul E Rangel <rrangel@chromium.org>
* .clang-format: sort included style optionsVadim Bendebury2019-03-011-6/+6
| | | | | | | | | | | | | | This is a no-op change making it easier to look up included style options. BRANCH=none BUG=none TEST=none Change-Id: I5bc1e2c436ffbfef8bd1b28acf77fc34f180f39c Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1496203 Reviewed-by: Raul E Rangel <rrangel@chromium.org>
* ec: Add directory local configuration for EmacsJack Rosenthal2019-03-011-0/+4
| | | | | | | | | | | | | | | | | | Since ec uses Linux kernel code style, this adds support for a feature in emacs to use a specific code style in a directory and its subdiretories. Looks like this technique is used in a few other spots in chromium code. BUG=None BRANCH=none TEST=Emacs 26.1 recognizes and uses just fine Change-Id: Ic8007accf6746cb1a4c2ca0050fa06884d598da3 Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1493036 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Raul E Rangel <rrangel@chromium.org>
* ec: Cleanup ish config optionsMathew King2019-03-019-545/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | Remove all ISH related CONFIG_* options except for: CONFIG_HOSTCMD_HECI: This will be used to enable the host command interface using HECI. Similar to CONFIG_HOSTCMD_LPC or CONFIG_HOSTCMD_ESPI. arcada_ish uses this config. CONFIG_HID_HECI: This will be used to enable a HID interface using HECI. It is compatible with the intel-ish-hid kernel driver. atlas_ish uses this config. Also remove ipc.c the functionality it has been superceded by ipc_heci.c. BUG=b:123634700 TEST=Built and tested on a arcada device Verified that atlas_ish builds BRANCH=none Change-Id: I9d97693e2beca1c9fec8c4f17bd3706b0ea8e795 Signed-off-by: Mathew King <mathewk@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1490551 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* flash_ec: support flash ITE over ccd with servod.Namyoon Woo2019-03-011-27/+70
| | | | | | | | | | | | | | | | | | | | | | | | | | flash_ec now can program ITE EC in CCD mode with servod. Same command line can be used either for servo_v2 or Suzy-Q. CQ-DEPEND=CL:1479874, CL:1481974 BUG=b:124388894 BRANCH=none TEST=manually ran on Bip and DragonEgg. [servod launch] [BIP] sudo servod -b octopus_ite ./util/flash_ec --board=bip --image ${IMG_BIP} # suzy-q ./util/flash_ec --board=bip --image ${IMG_BIP} # servo_v2 [DRAGONEGG] sudo servod -b dragonegg # for dragonegg ./util/flash_ec --board=dragonegg --image ${IMG_DRA} # suzy-q ./util/flash_ec --board=dragonegg --image ${IMG_DRA} # servo_v2 Change-Id: I78abfd6b7c07c0cdcaa75fd67580e14797f49d67 Signed-off-by: Namyoon Woo <namyoon@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1481829 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Matthew Blecker <matthewb@chromium.org>
* iteflash: relocate "disable watchdog"Namyoon Woo2019-03-011-12/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Watchdog should be disabled no matter iteflash sent the special waveform or not. BUG=b:124976364 BRANCH=none TEST=manually ran iteflash or flash_ec on duts with ITE EC. [Bip with Servo V2] $ ./util/flash_ec --board=bip --image ${IMG} [Bip with CCD without ServoD] <send 0x00 at 0xF0 address to trigger special waveform> $ ./build/bip/util/iteflash -W 0 -c ccd -e -w ${IMG} -m [Bip with CCD without ServoD] $ ./build/bip/util/iteflash -W 1 -c ccd -e -w ${IMG} -m [DragonEgg with Servo V2] $ ./util/flash_ec --board=dragonegg --image ${IMG} [DragonEgg with CCD without ServoD] <send 0x00 at 0xF0 address to trigger special waveform> $ ./build/dragonegg/util/iteflash -W 0 -c ccd -e -w ${IMG} [DragonEgg with CCD without ServoD] $ ./build/dragonegg/util/iteflash -W 1 -c ccd -e -w ${IMG} Change-Id: I29ab2a4073e21c6d5c16c8dc8166b81c9630a404 Signed-off-by: Namyoon Woo <namyoon@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1479874 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Matthew Blecker <matthewb@chromium.org>
* motion: Add config variable to fill LPC sense dataGwendal Grignou2019-03-013-7/+13
| | | | | | | | | | | | | | | | | | Writing sense data in LPC area is required for: - X86 host - unit tests. Add a CONFIG_ variable to make it explicit. BUG=b:120346412 BRANCH=None TEST=Buildall, emerge-* chromeos-ec Change-Id: Ib3db6ec4e53cba3057162d300de943b6c86bfcfe Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1491913 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* hatch: Remove CONFIG_USB_PD_VBUS_MEASURE_NOT_PRESENTPhilip Chen2019-03-011-1/+0
| | | | | | | | | | | | | | CL:1479877 has enabled bq25710 charger to measure VBUS. BUG=b:124968142 BRANCH=none TEST=build Change-Id: Id08797e6c668acc96a4fc6c7805e1bd01885b0be Signed-off-by: Philip Chen <philipchen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1496159 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Scott Collyer <scollyer@chromium.org>
* config: Enable CONFIG_USB_PD_VBUS_MEASURE_CHARGER for bq25710Philip Chen2019-03-011-1/+2
| | | | | | | | | | | | | | | | With CL:1479876, bq25710 supports VBUS measurement, and thus CONFIG_USB_PD_VBUS_MEASURE_CHARGER should be turned on for boards using bq25710. BUG=b:124968142 BRANCH=none TEST=verify VBUS measurement via 'ectool usbpdpower' Change-Id: I2166ec89d140895599dc740215d9aeb039b70178 Signed-off-by: Philip Chen <philipchen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1479877 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Scott Collyer <scollyer@chromium.org>
* bq25710: Add support for Vbus measurement by ADCPhilip Chen2019-03-012-35/+83
| | | | | | | | | | | | | | | | This CL factors out some existing ADC code to bq25710_adc_start() and then use it to implement charger_get_vbus_voltage(). BUG=b:124968142 BRANCH=none TEST=verify VBUS measurement via 'ectool usbpdpower' Change-Id: Ifd3108d459bef02acd20d6a6959fd586fc3a9ca6 Signed-off-by: Philip Chen <philipchen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1479876 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Scott Collyer <scollyer@chromium.org>
* ec: typo correctionsJack Rosenthal2019-03-011-2/+2
| | | | | | | | | | | | | | | | | | | This corrects a typo reported by a user. (counnect -> connect) As well, another typo in a comment. (detays -> delays). Thanks dnojiri@ BUG=chromium:731005 BRANCH=none TEST=Manually verified the change did not break build Change-Id: Ie9be8cdee1b847c9a2fd5aa9a924e7b4e35f8230 Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1487011 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Raul E Rangel <rrangel@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Ampton: Correct HPD GPIOsDiana Z2019-03-011-2/+2
| | | | | | | | | | | | | | | | | | Since ampton is using parade as its USB mux on both ports, both HPD lines are inputs. This misconfiguration didn't cause any issues with the EC driving the GPIOs high because they were set as open drain, but does make it impossible to read the HPD level with "gpioget". BRANCH=octopus BUG=None TEST=on apel, verified that gpioget now returns correct level for HPD pins when displays are plugged and unplugged Change-Id: I0ef628cf7ea68884f97a080ba825d780f7feee41 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1492853 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* cr50: Update error codes returned from U2F_SIGN.Louis Collard2019-03-011-1/+1
| | | | | | | | | | | | | | | | The U2F spec requires us to differentiate between failure to sign due to lack of user presence, and invalid key handles. This change updates the error codes returned to allow this. BUG=b:123161715 BRANCH=none TEST=local tests on soraka Change-Id: I654afbe76eb3673c2f8da14988211874f9c4f4e9 Signed-off-by: Louis Collard <louiscollard@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1485033 Reviewed-by: Andrey Pronin <apronin@chromium.org>
* Flapjack: Remove unnecessary console commands to create flash spaceDaisuke Nojiri2019-03-011-0/+7
| | | | | | | | | | | | | | | | | | | | | | | The following commands will be removed. CONFIG_CMD_APTHROTTLE CONFIG_CMD_DEVICE_EVENT CONFIG_CMD_I2C_XFER CONFIG_CMD_IDLE_STATS CONFIG_CMD_HCDEBUG Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b/126733372 BRANCH=none TEST=buildall Change-Id: I506b04c8d54d383bd9646e485ddc810d5fe155f3 Reviewed-on: https://chromium-review.googlesource.com/1495474 Commit-Ready: Kirtika Ruchandani <kirtika@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Kirtika Ruchandani <kirtika@chromium.org>
* cleanup: updating comment for ISHJett Rink2019-03-011-1/+1
| | | | | | | | | | | | | | ISH should stand for integrated sensor hub not Intel sensor hub BRANCH=none BUG=none TEST=builds Change-Id: I9e96eea8deb2d95a4d54b42b1253cb44793089a5 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1495234 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Gwendal Grignou <gwendal@google.com>
* ec: cleanup: Add CONFIG_RTCJack Rosenthal2019-03-018-6/+15
| | | | | | | | | | | | | | | | | | This allows the chipset task to print RTC information, without requiring CONFIG_CMD_RTC to be enabled. BUG=chromium:649851 BRANCH=none TEST=Built and flashed on grunt (careena), confirmed RTC state printed when the power state was changed, but without RTC command present Change-Id: I6b11c4d2822117c57febdacf299a865710ed1edd Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1490672 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Raul E Rangel <rrangel@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* ec: Add print-chip-variant targetJack Rosenthal2019-03-011-0/+4
| | | | | | | | | | | | | | | | In order to properly place ISH firmware at the correct path, the chromeos-ish ebuild needs information on the CHIP_VARIANT make variable. This adds a simple target to print the value of that variable. BUG=b:122371717 BRANCH=none TEST=ran Makefile with BOARD set and target, got correct value Change-Id: I882660aea19bf92e74072740d7d30574e81b0cb5 Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1487112 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* COMMIT-QUEUE: add cheza and flapjack to pre-cqBrian Norris2019-03-011-1/+2
| | | | | | | | | | | | | | | I've seen these fail a few times in the last few weeks in the CQ. That shouldn't happen. BRANCH=none BUG=none TEST=none Change-Id: I7ac16973ee2d11a8e5ea272f20d2ee4d9209b557 Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1495396 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Fleex: Implement new polymer battery parametermatt_wang2019-02-282-0/+177
| | | | | | | | | | | | | | | | | | | | | Fleex support BYD/LGC/SIMPLO/SWD new polymer battery This patch makes EC configure battery parameters differently based on manufacturer name. BUG=b:122944526 BRANCH=octopus TEST=Verify BYD/LGC/SIMPLO/SWD polymer battery can charge/discharge and can do battery-cutoff via ectool "batterycutoff" and can wake up from drain battery/battery-cutoff Change-Id: Id5db1653cb4d2c36143b45abfa2472fe20c1edfb Signed-off-by: matt_wang <matt_wang@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1490797 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Matt Wang <matt_wang@compal.corp-partner.google.com> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Matt Wang <matt_wang@compal.corp-partner.google.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* ec: Fix response size returned by new U2F functions.Louis Collard2019-02-281-7/+23
| | | | | | | | | | | | | | | There were several bugs in how the response size was set, this change fixes them. BUG=b:123161715 BRANCH=none TEST=test_that firmware_Cr50U2fCommands Change-Id: Id532099746c43a7b6a21d0342d668a033e20d4d6 Signed-off-by: Louis Collard <louiscollard@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1475103 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Andrey Pronin <apronin@chromium.org>
* ec: Update U2F_ATTEST function for new-style key handles.Louis Collard2019-02-282-24/+36
| | | | | | | | | | | | | | | | | | | | | | The existing implementation of this function was intended for old-style key handles, and needs to be replaced with a new implementation for new-style key handles that incorporate user secrets. For bonus points, the existing implementatation is actually broken, and performs no verification, so will blindly attest to anything, which is Not Good. BUG=b:124237003 BRANCH=none TEST=test_that firmware_Cr50U2fCommands Change-Id: I9b4a487707acf81da39e6495adb42e277f2fdb4a Signed-off-by: Louis Collard <louiscollard@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1475102 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Marius Schilder <mschilder@chromium.org> Reviewed-by: Andrey Pronin <apronin@chromium.org>
* motion: Wake up motion task when sampling rate changesGwendal Grignou2019-02-281-0/+4
| | | | | | | | | | | | | | | | | | | | Wake up motion task to evacuate pending samples to the host as soon as the sampling rate changes. It is required for CST testSanitizedContinuousEventsUidIdle to pass, it assumes only new samples will be present. BUG=b:111422556,b:124085261 BRANCH=eve TEST=cheets_CTS_P.9.0_r2.x86.CtsSensorTestCases passes on eve-arcnext. (cherry picked from commit e18316ecc7f7f6d7226fc741570a94c5024d42e8) Reviewed-on: https://chromium-review.googlesource.com/1217604 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Change-Id: I34e51c0db42fe1a8d5abc91c6d80bcce974da099 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1470773 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
* motion: Change ODR only within the motion sensor taskGwendal Grignou2019-02-281-41/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | When changing ODR for one sensor, we insert a timestamp in the FIFO. That timestamp can be misinterpreted by other sensor while in batch mode, condensing all events in a small timezone. Also, it can lead the motionsense stack to insert timestamp from the past. (cherry picked from commit f62f2ebbecb131956a5edc4bf60c094bc67972a1) Conflicts: common/motion_sense.c Integrate changes on top of CL/1450288. Now there is guarantee the ODR "flush" event is between 2 streams of sensor data with different ODR. BUG=b:111422556,chromium:562245,b:124085261 BRANCH=none TEST=Check cheets_CTS_P.9.0_r2.x86.CtsSensorTestCases pass on meep. Reviewed-on: https://chromium-review.googlesource.com/1204692 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Change-Id: If76aa3abcedbe463321ccbb1c183dc16edda8693 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1470772 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Enrico Granata <egranata@chromium.org>
* motion_sense: send ODR events to the APEnrico Granata2019-02-282-6/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commits enables the EC to send a motion sense event to the AP when a sensor's ODR is changed. This is done in a way that is backwards compatible on the AP side, in order to enable previous kernels to continue to work (albeit at a loss of new functionality) with up-to-date ECs. Since clients are not required to use a FLUSH when changing ODR, it is possible for the sensor ring to get in a state where it is spreading based on out-of-date delay information, which we observed leading to spreading of overly large intervals, and thus too far into the future. This patch ameliorates that by causing an ODR change to implicitly flush the batching history. BUG=b:123700100 TEST=run CTS sensor tests, observe the sensor ring not spreading too far into the future due to a period change BRANCH=bobba Change-Id: I5a881e9fc5ddb1dbe6690c455d43dc20bffe889a Signed-off-by: Enrico Granata <egranata@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1450288 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
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