| Commit message (Collapse) | Author | Age | Files | Lines |
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Copy from kukui, update the mux info which would be used by AP.
TEST=1. Modify dts, and enable extcon-usbc-cros-ec kernel module
2. cat /sys/devices/platform/*/extcon/extcon0/state, and see
when DP plugged:
USB=0
USB-HOST=1
DP=1
when DP unplugged:
USB=0
USB-HOST=1
DP=0
BUG=b:130338464
BRANCH=None
Change-Id: I3ac00e47426d56bf926943d04b91f40391d98deb
Reviewed-on: https://chromium-review.googlesource.com/1564492
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Jessy Jiang <jiangchao5@huaqin.corp-partner.google.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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FAFT no longer needs a workaround to make a DUT detect a USB drive in
recovery mode. See chromium:779260 and CL:1545543 for more info.
This saves about 1.4 kB.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=b/129746223,b/127720872
BRANCH=none
TEST=buildall
Change-Id: If6d7348f97cef02e68e162c22d00a24db5459d69
Reviewed-on: https://chromium-review.googlesource.com/1560339
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Set D0i2 and D0i3 latency values to reasonable safe values,
so that we can start exercising D0ix & see power benefits.
We shall fine tune further at later stage.
BUG=b:130032204
TEST=Verify Power numbers in active & S0ix state
BRANCH=none
Change-Id: I1cf29dd71f81036894a58009d027fecc9288d037
Signed-off-by: Rushikesh S Kadam <rushikesh.s.kadam@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1558150
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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First wave projects don't have any board with keyboard backlight so the
GPIO - KB_BL_PWR_EN should be configured by macro of UNIMPLEMENTED
instead of output direction.
BRANCH=octopus
BUG=b:130329644
TEST=buildall
Change-Id: I5c37b4b5ec3eb3f629c6d494064a6a27a3a1417c
Signed-off-by: Marco Chen <marcochen@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1564493
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Battery led is green when charging is stopped,
AC is connected and system is S5.
BUG=b:130334341
TEST=Build & flash EC then check battery led.
Change-Id: Ib31a94ba5ad9a7e78cc87a3bf1980638ae9599c3
Signed-off-by: YongBeum Ha <ybha@samsung.com>
Reviewed-on: https://chromium-review.googlesource.com/1563873
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Since SCP is not a feature that EC can "support", change the wording of
the comment to explain better.
BUG=None
BRANCH=None
TEST=None
Change-Id: I77ad7df0235b6e034047831c602c3017647f2870
Signed-off-by: Pi-Hsun Shih <pihsun@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1560933
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
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Add more IDs per request from vendor.
BRANCH=None
TEST=make BOARD=kukui_scp
BUG=None
Change-Id: I03dc7d98d11ebf386ebd3b7d6fb691af5c707bcd
Signed-off-by: Yilun Lin <yllin@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1563250
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Yilun Lin <yllin@chromium.org>
Reviewed-by: Erin Lo <erin.lo@mediatek.com>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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Currently, buildall prints only free spaces in RW flash. This patch
makes it print smallest free spaces in RO flash as well.
If the board doesn't have RO (i.e. #undef CONFIG_FW_INCLUDE_RO), it'll
be ignored.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=b/129746223
BRANCH=none
TEST=buildall
Change-Id: I953cb6fd998c3868e54be2ea3c2ce0ab51275b64
Reviewed-on: https://chromium-review.googlesource.com/1554841
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Removes stepping_stone regions, and move ROM_BASE from 0x800 to 0x0.
stepping_stone region is to smooth SCP's bringing up stage for
being compatible with both original and new implementation.
Now that we have done the kernel side driver implementation,
we can earn more SRAM space by removing the stepping_stone.
TEST=run SCP on kukui, and see it boots.
BRANCH=None
BUG=b:120825336
Change-Id: I253904592fa0187f627b2eaa3f5d12a17db9960f
Signed-off-by: Yilun Lin <yllin@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1563871
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Yilun Lin <yllin@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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DRAM symbols should be specified with __SECTION(dram) so that they
can be put into DRAM sections.
TEST=None
BRANCH=None
BUG=b:122058243
Change-Id: Ib8ba9054f27016424faa37d8b20e1f7e93a58c9f
Signed-off-by: Yilun Lin <yllin@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1563870
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Yilun Lin <yllin@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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While we figure out how to fix the root cause for missing interrupts, we
can at least get ourselves out of the back scenario by proactively
checking if there is a pending IOAPIC interrupt that the LAPIC does not
know about.
BRANCH=none
BUG=b:129937881
TEST=ISH communication does not permanently lock up
Change-Id: I766b2764748ae85b17992b3c0020ba7fb4e11693
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1566472
Reviewed-by: Mathew King <mathewk@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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The AP needs a way to pair request and response messages as they come in
asynchronously or late. This does not help the normal case, but the error
case when the responses get behind.
BRANCH=none
BUG=b:130039715
TEST=See that kernel messages get dropped instead of error because of
mismatched size (which is a signal that responses were getting paired up
incorrectly)
Change-Id: I7ddee42aac03429e4fc6cccd47527cf4776cff04
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1560651
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Rushikesh S Kadam <rushikesh.s.kadam@intel.com>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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BUG=b:112837404
BRANCH=None
TEST=manually ran stm32mon or flash_ec on scarlet and DragonTalon.
1. stm32mon via Servo V4 type-C at 57600 bps on scarlet.
$ ./util/flash_ec --board scarlet --image ${IMG} \
--bitbang_rate 57600 --verbose
2. stm32mon via Servo V4 type-C at 9600 bps on scarlet.
which tends to fail for NACK or timeout.
$ ./util/flash_ec --board scarlet --image ${IMG} \
--bitbang_rate 9600 --verbose
3. flash_ec via Servo Micro on scarlet
$ ./util/flash_ec --board scarlet --image ${IMG} --verbose
4. flash_ec on DragonTalon via Servo V2 and Servo Micro
respectively.
$ ./util/flash_ec --board hatch_fp --image ${IMG} --verbose
Full log can be found at http://gpaste/5439133910564864
Change-Id: I3c8e8c81d9d12475f5722eaacc932dc1244625d5
Signed-off-by: Namyoon Woo <namyoon@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1540496
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Matthew Blecker <matthewb@chromium.org>
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BRANCH=none
BUG=b:124388894
TEST=checked the document through Gitiles.
Change-Id: I11fe46a8900ec59edee799157358698e4c0e1cc6
Signed-off-by: Namyoon Woo <namyoon@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1555026
Reviewed-by: Matthew Blecker <matthewb@chromium.org>
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BRANCH=none
BUG=b:124996507
TEST=Read HWID from fingerprint sensor (slave) on hatch_fp
Change-Id: I344d7e4a5afec1f7c23f45aca593159ba67e89ed
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1558937
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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iteflash is a flash tool for ITE EC, and needs to be installed
in labstations. iteflash should belong to host-util like other
EC flash tools.
BUG=b:130036463
BRANCH=None
TEST=built and ran iteflash on Ampton using servo_v2, servo_micro
and Suzy-Q.
Change-Id: If711a26f7d6d3979332b9064313a7e1b87cd594a
Signed-off-by: Namyoon Woo <namyoon@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1560143
Reviewed-by: Matthew Blecker <matthewb@chromium.org>
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Read/return LCM_ID (from P0d onward) as part of SKU_ID while
preserving the compatibility of older boards.
BUG=b/129569858
TEST=LCM info should only be printed from P0d onward.
BRANCH=none
Change-Id: I053982f27fc7e6cc95c626b2d40bddff9ba37bfc
Signed-off-by: YH Lin <yueherngl@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1553578
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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This patch makes Flapjack read BATT_ID using board_read_id. There is
no functional changes.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=b/126770302
BRANCH=none
TEST=Buildall
Change-Id: Iae60f36d6df25cb1aa910fecd721d0740ebe29c0
Reviewed-on: https://chromium-review.googlesource.com/1559104
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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For some reasons functions dealing with the Cr50 console are using the
'uart_ec' prefx. This patch renames them to match the actual use.
BRANCH=cr50, cr50mp
BUG=none
TEST=make buildall -j still succeeds.
Change-Id: Ifc216fdfa1adf42e96e491b65250d1cfa73f8cd4
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1551690
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
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Compiler complains about debug_mode_blink_led defined but not used.
Fix this.
BUG=None
TEST=make
BRANCH=None
Change-Id: I6f5431d0867bc4f37bc1e74d48f4b124305d4012
Signed-off-by: Ting Shen <phoenixshen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1559100
Commit-Ready: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Yilun Lin <yllin@chromium.org>
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- check |argc| before accessing argv[1]
- remove redundant variables/assignments
BRANCH=None
BUG=None
TEST=ectool --name=cros_fp fpseed => fails
TEST=ectool --name=cros_fp fpseed aabb => fails (only 4 bytes)
TEST=ectool --name=cros_fp fpseed aabb...aabb => succeeds
Change-Id: I515de53a2ee3b934da2e930e32d0680375488711
Signed-off-by: Nicolas Norvez <norvez@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1558970
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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b:129805553 demonstrates that the time jumps by 2^32 us twice during
boot. This appears to have been caused by leftover interrupts that
have not been cleared while the system was booting triggering T0.
In addition, b:124890290 discusses that the LRE bit should not be set
in HPET configuration, and the do-while loop introduced in CL:1457597
is no longer needed if the settling spin-lock is placed before arming
the timer. This resolves that
BRANCH=none
BUG=b:124890290,b:12980553
TEST=timer appears to be working reliably for 24 hours on arcada, no
time jumps
Change-Id: Ib0c6b8c9c7e8fe2111a312b9c48061b296178c72
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1548505
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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When building with CR50_SQA defined, the resulting image is supposed
to allow transitioning the H1 chip it is running on from pre-pvt to MP
track. This should include preserving the Board ID value, but setting
the board id flags to zero, and erasing the INFO1 RW map, because
older MP image could have a less restrictive mask.
The rest of the INFO1 space should be preserved.
Sometimes there is a need to set flags to a non-zero value and migrate
from MP to pre-pvt. This would be possible if image is compiled with
CR50_SQA set 2 or a larger numeric value.
This patch creates a structure describing the layout of the INFO1
space and modifies the 'eraseflashinfo' command to behave differently
depending on the build time configuration.
In addition to erasing the INFO1 RW map:
- when CR50_DEV is set - everything but INFO1 RO map is erased
- when CR50_SQA is set to 1, the board ID flags are set to zero, and
INFO1 RW map is erased.
- when CR50_SQA is set to 1, the board ID flags can be set to a value
which would not lock out the currently running image and INFO1 RW
map is erased.
With these modifications the 'eraseflashinfo' command can be used
instead of 'bid force_pvt', and previously erased INFO1 RO map is
preserved.
BRANCH=none
BUG=none
TEST=tried running 'eraseflashinfo' in three kinds of images
(CR50_DEV=1, CR50_SQA=1, and CR50_SQA=2) and with various board
ID flags set in the image header, and observed the desired
behavior.
Change-Id: Icf26dc3a4a4bb6fac2fcec630749c81aa46e16ae
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1549981
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
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This prevents the system from negotiating power or reenabling
dualrole after it's turned off in board.c.
BUG=b:129882930
BRANCH=servo
TEST=cc snkdts stays snk.
Change-Id: I0a05eb9e8073cec7da884e071e023bcddadb130f
Signed-off-by: Nick Sanders <nsanders@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1553308
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Ruben Rodriguez Buchillon <coconutruben@chromium.org>
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This patch removes PD state names from RO image to save some space.
Before:
91656 build/flapjack/RO/ec.RO.flat
107632 build/flapjack/RW/ec.RW.flat
After
90312 build/flapjack/RO/ec.RO.flat
107632 build/flapjack/RW/ec.RW.flat
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=b/129746223,b/127720872
BRANCH=none
TEST=buildall
Change-Id: I84f2cb9e685724c88f8637a86a5fbbeeeff09671
Reviewed-on: https://chromium-review.googlesource.com/1551584
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: YH Lin <yueherngl@chromium.org>
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This patch removes console commands from RO which are not used by FAFT.
Before:
122824 Apr 5 14:27 build/flapjack/RO/ec.RO.flat
108260 Apr 5 14:28 build/flapjack/RW/ec.RW.flat
After:
120712 Apr 5 14:27 build/flapjack/RO/ec.RO.flat
108260 Apr 5 14:27 build/flapjack/RW/ec.RW.flat
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=b/129746223,b/127720872
BRANCH=none
TEST=buildall
Change-Id: I4534fed108845fe562255179ac90b5bee8ce5bbc
Reviewed-on: https://chromium-review.googlesource.com/1551583
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Callers of send_heci don't need to all implement retry
logic for a unavailable bus. Ensure the send call blocks
until the bus is ready.
This is not a complete fix for b:129937881 since I still
saw issue with this change. This change is still worthwhile.
BRANCH=none
BUG=b:129937881
TEST=Bus failure between ISH and AP is greatly improved
with this change.
Change-Id: Ia493b28146b30813fd737da341e7277e130ad619
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1554844
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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We only want to send single HECI packets as a response to the AP. 120
bytes should be enough for all commands.
The EC_CMD_CONSOLE_READ Host command was consistently using 2 HECI
packets and this seems to cause issues in the kernel driver.
Also setting a guard variable in a more protected way
BRANCH=none
BUG=b:129937881
TEST=Lock up is much less frequent but not completely gone.
Change-Id: Ifd9dbfdb053fee9894a876fa689f9adf7766fdd5
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1553306
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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If we failed to send communication to the AP, we should log it. We
should also log the disconnection path.
BRANCH=none
BUG=none
TEST=Verify console message when HC fails
Change-Id: I82a2209740c3813da64abb5c0eb4033c924c8007
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1554843
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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EC_INT_L on hatch is a push-pull line driven by EC and going to SoC
GPIO. Having this driven high in G3 results in leakage on PP3300_A_SOC
rail. This change configures EC_INT_L to drive it low on entering S5
and re-configures it to drive high on exiting S5.
BUG=b:129306003
BRANCH=None
TEST=Verified that SLP_S0_L, EC_INT_L and SYS_RESET_L are pulled low
in G3.
Change-Id: I9b00eef72762b9d16afc42723e8985d752f83c55
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1553562
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Rachel Nancollas <rachelsn@google.com>
Reviewed-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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This also removes the placeholder code for a dut-control command that does
not actually exist yet.
BRANCH=none
BUG=b:79684405,b:130165933
TEST=Ran flash_ec using Servo v4 -> Servo Micro -> Ampton.
With i2c-pseudo loaded and servod running, reflashing worked.
With i2c-pseudo unloaded and servod running, the new error message
was written stderr and flash_ec exited non-zero as desired.
Change-Id: Icfa4f4a894eda6c683a2d1cef4a87b3ac3a0a359
Signed-off-by: Matthew Blecker <matthewb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1558371
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
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This is copied from coreboot with added support for empty defines. We
should favor using this macro instead of using #ifdef. The macro will
evaluate to 0 if the option is not defined. This allows all the code to
be compiled and then the optimizer will remove the sections of code that
won't ever run. This way we don't end up with #ifdef sections with
invalid syntax because no one ever tests that specific permutation.
e.g.,
if (IS_ENABLED(CONFIG_USBC_SS_MUX)) {
...
}
There are currently spots where #ifdefs are nested 3 levels deep. This
makes it very hard to follow the code.
BUG=none
TEST=Added some code that uses the macro and verified it executes when
the config value is defined, and doesn't when it's not.
Change-Id: I796b899f7cbbd3067ea3a4d52527d980c68935c9
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1553573
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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According to the PD spec, in a Power Role swap, the initial source must
change its termination from Rp to Rd prior to sending the PS_RDY control
message. This commit fixes a bug where we were changing our termination
*after* sending the PS_RDY control message.
BUG=b:113207208, b:116340006
BRANCH=firmware-nocturne-10984.B,master
TEST=Plug in charge thru hub with charger plugged into nocturne, verify
PR swap succeeds and the CC lines don't float to vOpen.
TEST=Plug in Pixel phone into nocturne, do a PR swap, verify that the CC
lines don't float to vOpen.
Change-Id: If041595baa77d2494c4caff3660151329bfd4926
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/1381633
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
(cherry picked from commit 31dfe0b1a6b43b01bc89f45e6d3a4ac78b823959)
Reviewed-on: https://chromium-review.googlesource.com/1388845
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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This policy causes USB 3 to disconnect when doing DP negotiation. If
negotiation results in DOCK then the USB 3 lines are reconnected
resulting in renegotiating the USB device again.
There are other chromebooks already doing the same thing. e.g., oak.
BUG=b:123310411
TEST=Tried a test with a monitor and with a USB-C hub with HDMI.
Verified that the extra disconnect is gone.
Change-Id: I907e19689ff608ab2608e973875410cf94bb0053
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1553572
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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I had missed a piece of feedback from Karthik about initializing
the sleep transitions member of the resume response to avoid
returning uninitialized data from the EC. This is especially important
if CONFIG_POWER_S0IX_FAILURE_DETECTION is not selected, because then
it will *always* return uninitialized data. This drives the kernel nuts,
since it has no way to know if that config is on or not.
BUG=b:123716513
BRANCH=none
TEST=Test suspend with kernel support for this message, and the
EC config both on and off.
Change-Id: Id35bfe2730327b08f451a4d84277a13e47380a61
Signed-off-by: Evan Green <evgreen@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1551687
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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For sizes, see:
See https://www.st.com/resource/en/reference_manual/dm00180369.pdf
Section 3.3 Embedded Flash Memory
We read the Flash size data register to get the actual size:
See https://www.st.com/resource/en/reference_manual/dm00180369.pdf
Section 31 Device electronic signature
BRANCH=none
BUG=b:126455006,b:124996507
TEST=make BOARD=hatch_fp -j
./build/host/util/stm32mon -b 115200 -d /dev/pts/24 \
-u -e -w ./build/hatch_fp/ec.bin
Change-Id: I105840150cde68c7c7579d44c8d8c43b6b567233
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1541818
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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On STM32F4 we need to set the "request channel" for the SPI RX and TX
DMAs. Add the "request channel" to the dma_option of the SPI RX and TX
when the MCU is operating in SPI slave mode.
BRANCH=None
BUG=b:124996507
TEST=make BOARD=hatch_fp -j
TEST=flash Hatch FPMCU, "ectool --name=cros_fp version" works
Change-Id: I791e39306b088ea28f950d6d5bff11c29828d294
Signed-off-by: Nicolas Norvez <norvez@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1545072
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
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It's simply a bad idea to describe a macro in multiple locations.
It'll make it hard to change. It'll be difficult to keep all
locations in sync.
This patch replaces the comment duplicated in all ec.tasklist with
a pointer to the CONFIG_TASK_LIST definition. The macro will be
described in a single place (just like all/most other macros).
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
BUG=none
BRANCH=none
TEST=buildall
Change-Id: Id658b9d68e742e4334c692b804d9c98c8de21313
Reviewed-on: https://chromium-review.googlesource.com/1551579
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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The kernel tries to sync the fw clock every 20 seconds and it adds noise
to the ISH console log since the ISH does not support fw clock sync.
BRANCH=none
BUG=none
TEST=console message no longer appears every 20 seconds.
Change-Id: I3650d81407c43b85d6c49f53f0633b945cc748cc
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1557886
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
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Currently, in doorbell clearing IRQ handler, IRQ status bit clearing
happens after the handler sends an item in tx queue. This prevents the next
doorbell clearing interrupt if host clears the doorbell for the item just
sent by the handler but before the handler clears the status bit.
so clearing IRQ status bit should happen before sending an item.
BRANCH=none
BUG=b:129937881
TEST=tested on Arcada platform
Change-Id: I84a487c0cd9edf2af41acad1163c6f6ed91588ba
Signed-off-by: Hyungwoo Yang <hyungwoo.yang@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1557853
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Hyungwoo Yang <hyungwoo.yang@intel.corp-partner.google.com>
Reviewed-by: Enrico Granata <egranata@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Implement Chocodile Charge-Through Vconn Powered firmware for mcu
using new Type-C/PD State machine stack.
BUG=b:115626873
BRANCH=none
TEST=manual
Charge-Through was tested on an Atlas running a DRP USB-C/PD state
machine with CTUnattached.SNK and CTAttached.SNK states.
Signed-off-by: Sam Hurst <shurst@chromium.org>
Change-Id: I847f1bcd2fc3ce41e66edd133a10c943d5e8c819
Reviewed-on: https://chromium-review.googlesource.com/1225250
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Sam Hurst <shurst@google.com>
Reviewed-by: Stefan Reinauer <reinauer@google.com>
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enabled D0i-3 low power mode and reset_prep and D3 features
BUG=b:122364080
BRANCH=none
TEST=tested on arcada
Change-Id: I6c3949a7ac229a3f33cd75bd103e343f8e9a26f9
Signed-off-by: Hu, Hebo <hebo.hu@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1536487
Commit-Ready: Rushikesh S Kadam <rushikesh.s.kadam@intel.com>
Commit-Ready: Hebo Hu <hebo.hu@intel.corp-partner.google.com>
Tested-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Hebo Hu <hebo.hu@intel.corp-partner.google.com>
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1: fixed module size not round up with page issue
2: fixed wrong kernel binary file issue, ISH only support RW image at current
3: add aontask binary into ec.bin
BUG=b:122364080, b:120682121
BRANCH=none
TEST=tested on arcada
Change-Id: I786169c32b0e2c50cbe6ad7bf476ae9c56ea1d09
Signed-off-by: Hu, Hebo <hebo.hu@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1545073
Commit-Ready: Hebo Hu <hebo.hu@intel.corp-partner.google.com>
Tested-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Yuval Peress <peress@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Hebo Hu <hebo.hu@intel.corp-partner.google.com>
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1: reset and reset_prep implemented
2: D3 flow implemented
BUG=b:122364080
BRANCH=none
TEST=tested on arcada
Change-Id: Ie6bacd89e2363578d85157dfb1dd8b56e2828d05
Signed-off-by: Hu, Hebo <hebo.hu@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1536486
Commit-Ready: Hebo Hu <hebo.hu@intel.corp-partner.google.com>
Tested-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Hebo Hu <hebo.hu@intel.corp-partner.google.com>
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1: D0i1(TCG) and D0i2(TCG + SRAM retention) implemented
2: D0i3 (TCG + SRAM power off) implemented
BUG=b:122364080
BRANCH=none
TEST=tested on arcada
Change-Id: I851d7c138b056a92d1616622e7cbfdfb94d86e5c
Signed-off-by: Hu, Hebo <hebo.hu@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1531772
Commit-Ready: Hebo Hu <hebo.hu@intel.corp-partner.google.com>
Tested-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Hebo Hu <hebo.hu@intel.corp-partner.google.com>
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AON PM framework including:
1: AON task skeleton
2: task switching between main FW and AON task
3: 'idlestats' console command for D0ix statistic information
4: D0ix entrance in idle task
BUG=b:122364080
BRANCH=none
TEST=tested on arcada
Change-Id: Iefa9e067892d5c42d9f0c795275fe88e5a36115b
Signed-off-by: Hu, Hebo <hebo.hu@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1510518
Commit-Ready: Rushikesh S Kadam <rushikesh.s.kadam@intel.com>
Commit-Ready: Hebo Hu <hebo.hu@intel.corp-partner.google.com>
Tested-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Hebo Hu <hebo.hu@intel.corp-partner.google.com>
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When bc1.2 detection is completed, it will update the available charge
for the supplier type which was detected. When bc1.2 is powered down
(upon CC detach), the charge manager needs to be informed that the
available charge for this supplier type is 0,
This CL modifies the pi3usb9201 driver to store the most recent bc1.2
detection supplier type for each port. When the bc1.2 chip is powered
down, then the charge manager can be properly updated.
BUG=b:129435454
BRANCH=none
TEST=Connected, then removed charger to both ports 0 and 1. The
checked status via ectool:
localhost ~ # ectool usbpdpower
Port 0: Disconnected
Port 1: Disconnected
Change-Id: Ic6ae27bb498d2a82389803019f948bc11e3dec23
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1545076
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
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We were clearing the tpm in two different ways. There was one
implementation in factory_mode.c and one in wp.c. This change merges the
two, so there's only one board_wipe_tpm.
While modifying the wipe tpm code from factory_mode.c I noticed the
factory_enable_failed stuff is maybe a bit more complicated than
necessary. I opened a bug for cleaning that up(b/129956462). It wont be
addressed in this change.
BUG=none
BRANCH=none
TEST=Run the processes that wipe the tpm
open ccd.
enable factory mode from vendor command.
run rma open process
Change-Id: Ia76df19f7d9e4f308f3f1a7175f130f1ef7249a2
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1535156
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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BRANCH=none
BUG=b:79684405,b:124388894
TEST=Viewed the document through Gitiles, verified formatting.
Change-Id: I95ffccca3d7b88f4ab478e85bc1af252813100ff
Signed-off-by: Matthew Blecker <matthewb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1549982
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The script now unconditionally attempts to (re)install the module, even if
it is already loaded. (This also removes a message which had a typo,
mistakingly referring to i2c-dev instead of i2c-pseudo.)
The script no longer attempts to load i2c-dev, since servod does that now.
The script now runs "make clean" before "make" .
The header comment no longer references a section of the README that was
never checked in.
BRANCH=none
BUG=b:79684405
TEST=I ran the install script in various scenarios:
1) No i2c-pseudo module loaded or installed.
2) i2c-pseudo module loaded but not installed.
3) i2c-pseudo module installed but not loaded
4) i2c-pseudo module loaded and installed.
In all cases the module was (re)installed and either left loaded
(if applicable), or loaded (if not previously loaded).
The script does not attempt to unload and re-load the module when
re-installing only for simplicity.
Change-Id: I5f2677b92406b8a49d229bc84d2efcca5504f501
Signed-off-by: Matthew Blecker <matthewb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1552245
Reviewed-by: Nick Sanders <nsanders@chromium.org>
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