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* volteer: add USB3 daughterboard supportstabilize-12881.B-masterCaveh Jalali2020-02-044-8/+97
| | | | | | | | | | | | | | | | | The USB3 daughterboard uses a ps8815 TCPC. If the CBI FW_CONFIG tag indicates that such a daughterboard is present, set up the ps8815 as the 2nd TCPC in the system. BRANCH=none BUG=b:144397088 TEST=in combination with additional patches, was able to update TCPC firmware Change-Id: I50ee57f5aa2efa0b6dbc562f968587f4fe03236c Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2013656 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* TCPMv2: Remove tcpm_init from usb_prl state machineSam Hurst2020-02-041-1/+0
| | | | | | | | | | | | | | | | | | | The tc state machine configures the ss mux and then starts the usb_prl state machine and when usb_prl starts, it calls tcpm_init, resulting the ss mux being disabled. BUG=b:147255678 BUG=chromium:1046851 BRANCH=none TEST=make -j buildall manual: plugged in USB3 Patriate USB drive and lsusb -v. Result was bcdUSB 3.10 Change-Id: I8510979739cac47098af48f46eae9e429f7502d0 Signed-off-by: Sam Hurst <shurst@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2036592 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* honeybuns: Initial skeleton EC imageScott Collyer2020-02-048-0/+214
| | | | | | | | | | | | | | | This CL contains a skeleton image as a starter for honeybuns. BUG=b:148492715 BRANCH=none TEST=make BOARD=honeybuns and verify that image builds successfully Change-Id: I05c8b6bb4fa1f1a781ab4d9e8a43026373c2ab50 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2032199 Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Scott Collyer <scollyer@chromium.org>
* Link libcryptoc to on-device tests if neededYicheng Li2020-02-041-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | If a board has CONFIG_LIBCRYPTOC, the on-device tests for that board should have libcryptoc linked, otherwise building the on-device tests will fail. BRANCH=nocturne BUG=b:146059617 TEST=make -j BOARD=nocturne_fp tests (Flash build/nocturne_fp/test-aes.bin to device) (Connect to UART console) runtest (Repeat for test-sha256.bin, test-sha256-unrolled.bin) TEST=make -j BOARD=hatch_fp tests (Flash build/hatch_fp/test-aes.bin to nucleo-f412zg device) (Since it's nucleo I changed the UART config when building) (Connect to UART console) runtest (Repeat for test-sha256.bin, test-sha256-unrolled.bin) Change-Id: Ifb9f9fa562066224e305b78f3525282bb1da3c0a Signed-off-by: Yicheng Li <yichengli@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2018057 Reviewed-by: Tom Hughes <tomhughes@chromium.org>
* morphius: add trackpoint reset sequenceZick Wei2020-02-043-1/+25
| | | | | | | | | | | | | | Add trackpoint reset sequence follow spec. BUG=b:145575366 BRANCH=none TEST=make buildall Change-Id: I5334e5a83606115cdce3da908ef4a54851107058 Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2032547 Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* TCPMv1/v2: Move DFP alternate mode functions to common fileVijay Hiremath2020-02-043-74/+49
| | | | | | | | | | | BUG=b:148528713 BRANCH=none TEST=make buildall -j Change-Id: I34bf543b381fc9e4f858a48d3d1568de42438509 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2032725 Reviewed-by: Keith Short <keithshort@chromium.org>
* TCPMv1/v2: Move dfp_discover_modes() to common fileVijay Hiremath2020-02-044-29/+22
| | | | | | | | | | | BUG=b:148528713 BRANCH=none TEST=make buildall -j Change-Id: I83c6dca9652a9c613849b292b4c2329da3f9d424 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2032161 Reviewed-by: Keith Short <keithshort@chromium.org>
* TCPMv1/v2: Move dfp_consume_modes() to common fileVijay Hiremath2020-02-044-33/+26
| | | | | | | | | | | BUG=b:148528713 BRANCH=none TEST=make buildall -j Change-Id: I0a587a68b5c814595d78905f1cdd611f710f2182 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2032160 Reviewed-by: Keith Short <keithshort@chromium.org>
* TCPMv1/v2: Move dfp_consume_svids() to common fileVijay Hiremath2020-02-044-79/+48
| | | | | | | | | | | BUG=b:148528713 BRANCH=none TEST=make buildall -j Change-Id: I3ba96a803fa68d800a3ca41b4ac31e43325c0266 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2032159 Reviewed-by: Keith Short <keithshort@chromium.org>
* TCPMv1/v2: Move dfp_consume_identity() to common fileVijay Hiremath2020-02-047-68/+39
| | | | | | | | | | | BUG=b:148528713 BRANCH=none TEST=make buildall -j Change-Id: I5b0bbd553cbe4fc76478b1c89b0f3f391f074a27 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2032158 Reviewed-by: Keith Short <keithshort@chromium.org>
* TCPMv1/v2: Move pd_dfp_exit_mode() to common fileVijay Hiremath2020-02-044-148/+82
| | | | | | | | | | | BUG=b:148528713 BRANCH=none TEST=make buildall -j Change-Id: I9d6a219ae031ed9954819c12563867e07bcc8668 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2032157 Reviewed-by: Keith Short <keithshort@chromium.org>
* TCPMv1/v2: Move pd_dfp_enter_mode() to common fileVijay Hiremath2020-02-044-162/+127
| | | | | | | | | | | BUG=b:148528713 BRANCH=none TEST=make buildall -j Change-Id: Id1d3e8bc27d895a53b53a77cf1c8fd36c69b47dc Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2032156 Reviewed-by: Keith Short <keithshort@chromium.org>
* TCPMv1/v2: Move pd_dfp_dp_get_pin_mode() to common fileVijay Hiremath2020-02-044-103/+62
| | | | | | | | | | | | BUG=b:148528713 BRANCH=none TEST=make buildall -j Change-Id: I9192762e7eba55d659d1ad282e62ad3849e41b65 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2032155 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* common: mag_cal: Trigger online calibration with more samplesGwendal Grignou2020-02-041-2/+2
| | | | | | | | | | | | | | | | | | | | | | | For the online calibration to work, sensor data must be collected while the device is in different positions. The current implementation starts calibration after 25 samples/1 second. It means the device should done a figure 8 - or close to it - in that lapse of time. This is fine for phones or small devices, but not for heavy convertible. Increase the batch size to at least 50 samples or 2 seconds of collection. BUG=b:144027014 BRANCH=reef TEST=Pass RVCVXCheckTestActivity verifier test. (cherry picked from commit 2ef4580322d1041c6492ea33058fd4b139d36180) Change-Id: I78d1b943c23eaa9a29831ad4344c8be36ea00b79 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2034677 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Yuval Peress <peress@chromium.org>
* driver: bmm150: Fix commentGwendal Grignou2020-02-041-1/+1
| | | | | | | | | | | | | | Fix cut and paste error. BRANCH=reef BUG=none TEST=compile (cherry picked from commit 7b2f6cffa2e9710fe8bf0e66e20fc70bf1fb2a7f) Change-Id: I60cc7bb7b08491927a7ac03c769dda03f8765b81 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2034676 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* common: mag_cal: Re-add bias inversionGwendal Grignou2020-02-042-9/+9
| | | | | | | | | | | | | | | | | | | Sensors add offset to raw value. kaza_compute calculate the bias (the hard iron) and it has to be remove from the raw value. Invert the vector in magnetometer calibration code. Fixes: 994af4a65fa7e ("common: mag_cal: update magnetometer to leverage kasa") BUG=b:144027014 BRANCH=none TEST=Check that after successful online calibration, value reported to the host are closer to 0 than before calibration. Change-Id: I6cfd711c82287b1c877912e85d84d2725b063cb2 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2034675 Reviewed-by: Yuval Peress <peress@chromium.org>
* usb_pd TCPMv1: Maintain independent MessageId for SOP''Ayushee2020-02-033-43/+78
| | | | | | | | | | | | | | | | | | | This patchset enables checking and storaging the MessageId counter received from the SOP'' messages. Since SOP*(Cable) communication and SOP(Port Partner) have separate MessageID counters, it is necessary to store separate messageIDs to avoid the the incoming packets from getting dropped. BUG=b:148481858 BRANCH=None TEST=Tested on Volteer, able to maintain separate MessageId count for SOP, SOP' and SOP'' communication. Change-Id: Id3a29594c5f9b354ecb650c6d351b16883d2126b Signed-off-by: Ayushee <ayushee.shah@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2032344 Reviewed-by: Keith Short <keithshort@chromium.org>
* Fleex: Reduce switching period in Buck-Boost mode of ISL9238Matt_Wang2020-02-031-1/+20
| | | | | | | | | | | | | | | | | This patch reduces buck-boost mode switching frequency of ISL9238 to half. It can be improve power efficiency. BUG=b:147856200 BRANCH=octopus TEST=ectool i2cread 0x12 0x4C bit<1> from 0 to 1 Change-Id: Iba9c76b36ee672c1830e34ab37c87c1b0ba9db21 Signed-off-by: Matt_Wang <Matt_Wang@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2028869 Reviewed-by: Matt Wang <matt_wang@compal.corp-partner.google.com> Reviewed-by: Marco Chen <marcochen@chromium.org> Tested-by: Matt Wang <matt_wang@compal.corp-partner.google.com> Commit-Queue: Marco Chen <marcochen@chromium.org>
* morphius: enable audio codecZick Wei2020-02-031-0/+4
| | | | | | | | | | | | | | | | | Clone from CL:1988031 Enables audio codec with following features: - DMIC - I2S_RX BRANCH=none BUG=none TEST=make buildall Change-Id: I068210a2607ae7a6fd63bfce5e68ecf2b7e0c072 Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2032548 Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* dartmonkey/bloonchipper: Add private version tagCraig Hesling2020-02-011-1/+1
| | | | | | | | | | | | | | | | This enables the private git directory version string inclusion for dartmonkey and bloonchipper. This should have been added when we transitioned to the new naming scheme. BRANCH=hatch BUG=none TEST=BOARD=dartmonkey ./util/getversion.sh TEST=BOARD=bloonchipper ./util/getversion.sh Change-Id: Ib24cf96869f11bb8c4391ed7abb02c4abbe3abd8 Signed-off-by: Craig Hesling <hesling@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2032790
* nocturne_fp/hatch_fp: Fix getversion without privateCraig Hesling2020-02-011-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Public builds do not have the private directory, thus they cannot have a valid private version tag. Without this fix, the following errors were emitted during build and the build VERSION would have an invalid private version tag appended to it: ./util/getversion.sh: line 114: pushd: ./private: No such file or directory ./util/getversion.sh: line 124: popd: directory stack empty The invalid version would end up being the same git version as the root repository, since the pushd fails. An alternative would be to detect that the directory did not exist and add a does-not-exist private VERSION tag, but I feel that that simply degrades/taints a public build. Furthermore, other boards may want a missing directory to cause an build error/warning. BRANCH=nocturne,hatch BUG=none TEST=BOARD=nocturne_fp ./util/getversion.sh # Observe the #define VERSION line TEST=BOARD=hatch_fp ./util/getversion.sh # Observe the #define VERSION line TEST=make BOARD=nocturne_fp TEST=make BOARD=hatch_fp Change-Id: I242e19d35f34599639dee7e74ffd4199f6b34c89 Signed-off-by: Craig Hesling <hesling@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2032789
* Trogdor: Print when someone's trying to use AP_RST_REQAlexandru M Stan2020-02-013-1/+6
| | | | | | | | | | | | | | | | | | AP_RST_REQ is deprecated, but it would be nice to know if the AP is trying to misuse this signal. Add it back in as a power signal interrupt. BRANCH=None BUG=b/148238496 TEST=With kernel sandbox 200123-wip-tree: * run "halt" on the AP console * this will assert the AP_RST_REQ signal * you can see EC talk about it: DEPRECATED_AP_RST_REQ => 1 * but cold reboot still doesn't happen Change-Id: I8be10367afa7742642b793dc50e90964eb0b12c1 Signed-off-by: Alexandru M Stan <amstan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2029203 Reviewed-by: Wai-Hong Tam <waihong@google.com>
* Trogdor: Separate the interrupt handlers of WARM_RESET_L and POWER_GOODWai-Hong Tam2020-02-013-14/+27
| | | | | | | | | | | | | | | | | | | | | The original one interrupt handler for two signals will cause a false-postive for the WARM_RESET_L release case, during a transition state that POWER_GOOD goes low but WARM_RESET_L is still high. Use two interrupt handlers for WARM_RESET_L and its pull-up rail POWER_GOOD. It is clear that what signal triggers the interrupt. BRANCH=None BUG=b:148478178 TEST=Called "dut-control warm_reset:on sleep:0.2 warm_reset:off" and saw the message "Long warm reset ended, cold resetting to restore sanity" once. Change-Id: I5a14f91c0dbfacd6a70d01d45f3e8de2b6c6a1cc Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2031647 Reviewed-by: Alexandru M Stan <amstan@chromium.org> Tested-by: Alexandru M Stan <amstan@chromium.org>
* trogdor: Add more prints in the power sequenceAlexandru M Stan2020-02-011-1/+5
| | | | | | | | | | | | | | | | | For two of the complicated cases in the power sequence, the ec is being very chatty but it's hard to understand why it's doing certain things (or if there was an exception). Add more prints to be clearer. BRANCH=None TEST=releasing warm reset via servo should have an extra print on why it's going to S5 and back to S0 TEST="apreset" with bad AP firmware will cause EC to complain BUG=b/148188311 Change-Id: I2d53dfc553639ecec0792d78676b0899e3e76780 Signed-off-by: Alexandru M Stan <amstan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2023404 Reviewed-by: Wai-Hong Tam <waihong@google.com>
* Trogdor: Rename AP_SUSPEND and add its power signal interruptWai-Hong Tam2020-02-013-1/+7
| | | | | | | | | | | | | | | | | Rename the GPIO from AP_SUSPEND_L to AP_SUSPEND as it is active high. Add its power signal interrupt for easily checking the change. Enable the config of the debug command powerindebug. BRANCH=None BUG=b:146470739, b:148149387 TEST=Checked the AP_SUSPEND power signal status on EC coonsole. Change-Id: I4fb5684abb6a3367f5ebc54624f286d8c564d91c Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2023279 Commit-Queue: Alexandru M Stan <amstan@chromium.org> Tested-by: Alexandru M Stan <amstan@chromium.org> Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* Trogdor: Remove the IN_POWER_GOOD power-on trigger in S5/G3Wai-Hong Tam2020-02-011-25/+0
| | | | | | | | | | | | | | | | | This trigger is not necessary for production use case. Remove it. BRANCH=None BUG=b:147818450 TEST=sysjump to RW, checked that AP keeps the same state. TEST=Tested reboot ap-off, checked that AP off from reset. TEST=Tested commands: apreset, power off, power on, apshutdown. Change-Id: Ia7ebd9d56ed70ec902224bff7d6308bc37e7fa1e Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2018040 Commit-Queue: Alexandru M Stan <amstan@chromium.org> Tested-by: Alexandru M Stan <amstan@chromium.org> Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* PS8818: use read/modify/write for regs with reserved bitsDenis Brockus2020-02-013-55/+86
| | | | | | | | | | | | | | | | | | PS88xx has a tendency to document undocumented register bits as reserved. Some of these are reserved and others should not be reset to 0 and should remain the value they were previously. The gain control appears to be of the latter type on the PS8818 BUG=b:146394157 BRANCH=none TEST=verify USB-C1 DP and USB connections Change-Id: Ia67824c9b2676ad9984e4a8535ddd37bb8f2190b Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2033304 Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* TCPMv1: Add support for Thunderbolt active cablesAyushee2020-01-313-45/+142
| | | | | | | | | | | | | | | | | | | | | | | | For entering into Thunderbolt-Compatible mode with active cable, the port sends Enter mode command for SOP', SOP'' (if the cable has a SOP'' controller) and SOP respectively. If the port doesn't receive GoodCRC from Enter Mode SOP'', the port resets the cable characteristic and exits the Thunderbolt-Compatible mode discovery. This CL enables SOP'' communication with the cable plug and adds support to enter into Thunderbolt-compatible mode with active cables. BUG=b:140643923 BRANCH=None TEST=Able to enter into Thunderbolt-Compatible mode for active cables. Change-Id: Iea0c652043933047e0158265c911775d4afe5758 Signed-off-by: Ayushee <ayushee.shah@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2001938 Reviewed-by: Diana Z <dzigterman@chromium.org>
* ps8802: fix redriver configurationDenis Brockus2020-01-313-23/+269
| | | | | | | | | | | | | | | | | | | | | | | | in driver Added software IN_HPD control Added compile time optional debug in board specific tune function in usb_retimer Added gain control Added display lane control NOTE: PS8802 has reserved register bits that are being used internally, so be cautious just hitting these with 0, i.e. use field update to set a value to retain the old reserved fields BUG=b:146394157 BRANCH=none TEST=verify USB-C1 DP and USB connections Change-Id: I0b539df15fade509058492d6ab73a7b3ca9181df Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2031646 Reviewed-by: Edward Hill <ecgh@chromium.org>
* Revert "deltaur: initial add"Jett Rink2020-01-315-136/+0
| | | | | | | | | | | | Going down a different path. This board is no longer needed This reverts commit 200021e4613277c9dc806edffde9d560bd659d1a. Change-Id: Ib074fcc6845ba0a414222499d1355e18a888c583 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2033306 Commit-Queue: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* test: add repeating deferred testJett Rink2020-01-311-0/+26
| | | | | | | | | | | | | | | Adding simple unit test that ensures that a deferred call can call itself and won't repeat forever. I thought this might be a problem, but it wasn't. We might as well add this code as a unit test. BRANCH=none BUG=none TEST=test passes Change-Id: Ie9791606e4a401821594df122481f22d87eadbbd Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2025073 Reviewed-by: Diana Z <dzigterman@chromium.org>
* ps8818: fix redriver configurationDenis Brockus2020-01-314-9/+200
| | | | | | | | | | | | | | | | | | | in driver Added software IN_HPD control Added compile time optional debug in board specific tune function in usb_retimer Added gain control Added DP lane control BUG=b:146394157 BRANCH=none TEST=verify USB-C1 DP and USB connections Change-Id: Ida0cc243413b8fa469d3edb706040535e4a3f0e0 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2031645 Reviewed-by: Jett Rink <jettrink@chromium.org>
* Juniper: Add new LGC batteryDavid Huang2020-01-312-0/+29
| | | | | | | | | | | | | | | | Add new battery: LGC KT0020G010. BUG=b:148625782 BRANCH=master TEST=Make sure battery can cutoff by console "cutoff" or "ectool batterycutoff" and resume by plug in adapter. Change-Id: I24cb91642863ab881f4debd5b61de8045d973112 Signed-off-by: David Huang <David.Huang@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2032549 Reviewed-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: David Huang <david.huang@quanta.corp-partner.google.com> Tested-by: David Huang <david.huang@quanta.corp-partner.google.com>
* kappa: enable ledDevin Lu2020-01-314-6/+77
| | | | | | | | | | | | | | | This patch is enabling led temporally for incoming build. Will add gpio control for led after CL:1712887 merged. BUG=b:146844869 BRANCH=kukui TEST=make sure led is showing amber while battery is charging. make sure led is showing white after battery was fully charged. Change-Id: I5b55bbed45360807dceca9fe2896084619fb900a Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2009540 Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* puff: Fix a typo in the VBUS ADC config.Sam McNally2020-01-311-1/+1
| | | | | | | | | | | | | | | Matching the SNS_PP3300 entry, the |factor_div| field should multiply by the voltage divider numerator rather than divide. BRANCH=none BUG=b:148634825 TEST=make buildall; ectool usbpdpower reports correct voltage Change-Id: I1dd654229f027852ca818410d4883bd4daab55ae Signed-off-by: Sam McNally <sammc@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2032544 Commit-Queue: Peter Marheine <pmarheine@chromium.org> Reviewed-by: Peter Marheine <pmarheine@chromium.org>
* waddledoo: Change PP1050_ST power goodAseda Aboagye2020-01-314-13/+5
| | | | | | | | | | | | | | | | | | The power good for VCCST is actually now a digital signal as opposed to an analog signal that it used to be. This commit updates the waddledoo GPIO configuration to account for this fact. BUG=b:148169171 BRANCH=None TEST=`make -j BOARD=waddledoo`; flash waddledoo, verify EC boots okay. Change-Id: I0fe64c07705fa3652b79414a3ec451ebf7204aae Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2028354 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* driver: bmi160: Fix rounding error in set_offset() and get_offset()Ching-Kang Yen2020-01-313-8/+26
| | | | | | | | | | | | | | | | | | | | | The original set_offset() and get_offset() codes in the driver/accelgyro_bmi160 use simple divisions to write the data. The more times the set_offset() and get_offset() is used, the data will get closer to 0. Fixing it by replacing simple division to round_divide(), division that round to nearest, in the common/math_util.c. BRANCH=octopus BUG=b:146823505 TEST=Testing on octopus:ampton on branch [firmware-octopus-11297.B]. Checking the data did not rounding to 0. Change-Id: Ide9df9e32fc501e63d6f952cb8254df7662afd23 Signed-off-by: Ching-Kang Yen <chingkang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2002998 Reviewed-by: Gwendal Grignou <gwendal@chromium.org> Commit-Queue: Gwendal Grignou <gwendal@chromium.org>
* jinlon: add dual fan control by ecDevin Lu2020-01-318-10/+265
| | | | | | | | | | | | | | | | This patch allows the ec to manage two fans. Currently common/thermal.c cannot monitor more than 1 fan at the same time. This CL implements a board-specific thermal policy with multiple fans. BUG=b:141259174 BRANCH=hatch TEST=thermal team verified thermal policy is expected. Change-Id: I6ababcb0795408e8062b7605bc749e23b8bde45a Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1936077 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
* dratini: change thermal configuration for DVTDevin Lu2020-01-311-7/+7
| | | | | | | | | | | | | | | | | BUG=b:147792204 BRANCH=hatch TEST=manually remove dptf control then do following: make sure system shutdown when over 75 degree with temp sensor 1. make sure system shutdown when over 70 degree with temp sensor 2. make sure fan works when over 40 degree with temp sensor 1. make sure fan fully on when over 70 degree with temp sensor 1. make sure fan works when over 40 degree with temp sensor 2. make sure fan fully on when over 55 degree with temp sensor 2. Change-Id: I51de773107df248b393e04e5ee6755a06712728c Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2002992 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
* usb_pd TCPMv1: Maintain independent MessageID for SOP PrimeAyushee2020-01-313-9/+68
| | | | | | | | | | | | | | | | | | | This patchset enables storage of MessageId counter received from the cable plug. Since SOP*(Cable) communication and SOP(Port Partner) have separate MessageID counters, it is necessary to store separate messageIDs to avoid the the incoming packets from getting dropped. BUG=b:148481858 BRANCH=None TEST=Tested on Volteer, able to maintain separate MessageId count for SOP and SOP' communication. Change-Id: Iac2dc616f99a9e19914588e59441df8b09068afa Signed-off-by: Ayushee <ayushee.shah@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2026650 Reviewed-by: Keith Short <keithshort@chromium.org>
* volteer: Enable USB4.0 modeVijay Hiremath2020-01-311-0/+3
| | | | | | | | | | | | BUG=b:140819518 BRANCH=none TEST=With Gatkex creek 3 device volteer can enter to USB4.0 mode Change-Id: Ib20c14db42cae413322ca060c961fd67088a1a09 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Signed-off-by: Ayushee <ayushee.shah@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1984608 Reviewed-by: Keith Short <keithshort@chromium.org>
* tglrvp: Enable USB4.0 modeVijay Hiremath2020-01-311-0/+3
| | | | | | | | | | | | BUG=b:140819518 BRANCH=none TEST=With Gatkex creek 3 device TGLRVP can enter to USB4.0 mode Change-Id: If4dadf4d146f80b9f41be1fafb283c0aa5fbf2e8 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Signed-off-by: Ayushee <ayushee.shah@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1976683 Reviewed-by: Keith Short <keithshort@chromium.org>
* Burnside bridge retimer: Add USB4 mode bitsAyushee2020-01-312-22/+37
| | | | | | | | | | | | | | | | | | | | | | | | | Intel burnside bridge retimer supports the ability to train the link and operate both USB4 Gen2(10Gbps) and USB4 Gen3(20Gbps) Adding the following fields in the configuration register of the retimer to USB4 mode: 1. Active cable - Active/passive cable 2. Cable type - Optical or Electrical 3. Active link training - Unidirectional or bidirectional link training 4. USB4 cable speed - 10Gbps/20Gbps active/passive cable 5. USB4 Generation - 3rd Generation or 4th Generation Thunderbolt cable BRANCH=None BUG=b:140819518 TEST=Able to configure the retimer in USB4 mode on TGLRVP Change-Id: I3d6bfd92eccc4881dac2b892926aafc2281e2a12 Signed-off-by: Ayushee <ayushee.shah@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1926383 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
* TCPMv1: Add support for USB4.0Ayushee Shah2020-01-319-28/+580
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | USB4 is based on the Thunderbolt 3 protocol specification. It supports 40 Gbit/s throughput, is compatible with Thunderbolt 3, and backwards compatible with USB 3.2, USB 2.0. USB4.0 PD Flow: Ref: USB Type-C Cable and Connector Specification 2.0 Figure 5-1 USB4 Discovery and Entry Flow Model USB PD Explicit Contract Discover ID SOP -------- USB4 compatible? | -------------yes------------|------No----- Exit USB4 Discovery | Discover ID SOP' --------- Product type | Passive cable----------|----Active Cable---USB4? | | | (Not implemented in this CL) USB Signaling ----------------------- | | | | USB4 with USB4 active cable Exit USB4 | Discovery --------------------------------------------- | | | | USB4 Gen3 USB3.2 Gen2 USB3.2 Gen1 USB2.0 | | | | Enter USB4 with | Enter USB4 with Exit USB4 Discovery USB4 Gen3 | USB4 Gen1 Passive cable | Passive cable | DFP Gen3 capable? | ------yes---- |---------No-------- | | Discover SVID SOP Enter USB4 with USB3.2 Gen2 Passive Cable | Discover SVID SOP' | Discover Mode SOP | Discover Mode SOP' --------Is TBT3? | -----yes----|-----No---- | | Enter USB4 with TBT3 Enter USB4 with TBT Gen3 passive cable Gen2 passive cable BUG=b:140819518 BRANCH=None TEST=With Gatkex creek 3 device, TGLRVP can enter to USB4.0 mode Change-Id: Id861661c66c53a0a32679388bb7e2e81aae3ceb5 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Signed-off-by: Ayushee <ayushee.shah@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1926382 Reviewed-by: Diana Z <dzigterman@chromium.org>
* ioexpander: Fix IOEX_INT after ioex_signal numbering changeEdward Hill2020-01-312-3/+4
| | | | | | | | | | | | | | | Fix ioex_is_valid_interrupt_signal() and IOEX_INT() to account for IOEX_SIGNAL_START correctly. BUG=none BRANCH=none TEST=ioex_enable_interrupt() returns success Change-Id: I8f13fa8f2d645aae565ac1062eab4a4d0968c4bc Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2031649 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* flash_ec: no stderr redirection in flashrom runNamyoon Woo2020-01-301-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes stderr redirection in running flashrom to flash-size, so that flash_ec log would contain more information on error cases. It could be verbose even for success case, but flash_ec script would take the last output in number as SPI_SIZE. BUG=none BRANCH=none TEST=manually ran flash_ec with Suzy-Q and Servo_Micro on reef. - success case $ ./util/flash_ec --chip=npcx_spi --image ${IMG} --verbose INFO: EC build system didn't recognize . Assuming no baseboard. INFO: Using ccd_cr50. ... INFO: Running flashrom: sudo /usr/sbin/flashrom -p raiden_debug_spi:target=EC, serial=0580300D-91984377 --flash-size flashrom v0.9.9 : : on Linux 5.2.17-1rodete3-amd64 (x86_64) flashrom v0.9.9 : : on Linux 5.2.17-1rodete3-amd64 (x86_64) bus=0x01,address=0x43 | Cr50 INFO: Programming EC firmware image. INFO: Running flashrom: ... - failure case: servo_micro was not connected to the dut. $ ./util/flash_ec --chip=npcx_spi --image ${IMG} --verbose INFO: EC build system didn't recognize . Assuming no baseboard. INFO: Using servo_v4_with_servo_micro. ... INFO: Running flashrom: sudo /usr/sbin/flashrom -p raiden_debug_spi:serial=SNCQ03109 --flash-size flashrom v0.9.9 : : on Linux 5.2.17-1rodete3-amd64 (x86_64) flashrom v0.9.9 : : on Linux 5.2.17-1rodete3-amd64 (x86_64) bus=0x01,address=0x17 | Servo Micro No EEPROM/flash device found. ERROR: Failed to determine chip size! INFO: Restoring servo settings... dut-control --port=9999 cold_reset:off dut-control --port=9999 spi1_vref:off dut-control --port=9999 spi1_buf_en:off dut-control --port=9999 cold_reset:on dut-control --port=9999 cold_reset:off Change-Id: I642f62081e92bec68d01dcf4e2a4bb71a0131163 Signed-off-by: Namyoon Woo <namyoon@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2031644 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* USB PD: set last rx'd msg ID as invalid before executing soft resetTim Wawrzynczak2020-01-301-0/+1
| | | | | | | | | | | | | | | | | | | | | If the last message ID received was a 0, then executing "pd N soft" on the EC shell would incorrectly mark the next message received as a repeat message. This change resets the last received message ID to the invalid value before executing the soft reset. BUG=b:146811519 BRANCH=firmware-hatch-12672.B TEST=Executing "pd 0 swap power pd 0 soft" while connected as a SNK to a servo V4 no longer results in a loop because the message was not marked as a repeat any more. Change-Id: I754d1d3ed9f7a4a5163b0f3cd4bb844f47e0ccc7 Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2028359 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* hatch: Use GPIO and host event when generating MKBP eventsTim Wawrzynczak2020-01-301-1/+1
| | | | | | | | | | | | | | | | | For waking the system from suspend, the plan is to use the host event (SCI) to perform the wakeup, and use the GPIO for IRQ signalling, following nocturne's example. BUG=b:144122000 BRANCH=firmware-hatch-12672.B TEST=with corresponding coreboot change, verify that the AP will wake on connection of a DisplayPort monitor. Change-Id: Ifcd144777b7e40941327958ccfb931c8a7137887 Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2031264 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Scott Collyer <scollyer@chromium.org>
* c2d2: initial c2d2 addJett Rink2020-01-309-4/+1098
| | | | | | | | | | | | | | | | | C2D2 is a debug board bring that uses an 8-pin debug header that is pin compatible with the em100 flash emulator. BRANCH=none BUG=b:145314772 TEST=UART communication for EC and H1 TEST=UART flashing of EC TEST=SPI reading and writing TEST=Automatic Vref detection for UART upon connect and disconnect Change-Id: I023994ed78942f2307e4adb802b5cc96afdf7e24 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1991849 Reviewed-by: Diana Z <dzigterman@chromium.org>
* npcx: Add driver support for PS/2 interfaceCHLin2020-01-3010-6/+506
| | | | | | | | | | | | | | | | | | | | | | Morphius connects the trackpoint device to EC via the PS/2 interface. To support it, we implemented the chip level PS/2 driver in this CL. The PS/2 driver can be used on all series of NPCX EC chips (NPCX5/7). BUG=b:145575366 BRANCH=none TEST=No error for "make buildall" TEST=Apply this and related CLs, connect npcx5/npcx7 EVBs to standard PS/2 keyboards and PS/2 device emulator with different channels. Verify that the PS/2 write/read transaction can keep working for several hours without issue. Change-Id: I5bae313db2d697999c2da5cf33478be2da754b8c Signed-off-by: CHLin <CHLIN56@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1982302 Tested-by: CH Lin <chlin56@nuvoton.com> Commit-Queue: Edward Hill <ecgh@chromium.org> Auto-Submit: CH Lin <chlin56@nuvoton.com> Reviewed-by: Edward Hill <ecgh@chromium.org>
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