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* asurada: enable C0/C1 USBPDEric Yilun Lin2020-05-145-8/+135
| | | | | | | | | | | | | | | | | | This CL enable it81202 on-chip TCPC at C0 and C1 port. The functionality is not completed yet (TODO: PPC). C0: on the main board. C1: on the subboard. BRANCH=master BUG=b:152562604 TEST=ensure C0 and C1 can do PD-comm (SNK and SRC) Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Change-Id: Ia8a2e557fd376a05f422bc1139abfd78be0c2b58 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2192466 Reviewed-by: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Ayo Wu <ayowu@google.com>
* ioex: Initialize IO expander for early sysjumpDaisuke Nojiri2020-05-141-2/+2
| | | | | | | | | | | | | | | | | | When EFS triggers sysjump, IO expander is currently not initialized. This patch will make IO expander initialized in RW if sysjump is triggered by EFS. IO expander initalization should be skipped only for late sysjump. BUG=b:156101251, chromium:1072743 BRANCH=none TEST=Verified the bug is fixed. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: I25b173aa4cae9c3de5ae6bac0d5c40216ef466b6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2200244 Reviewed-by: Edward Hill <ecgh@chromium.org>
* system: Add EC_RESET_FLAG_EFSDaisuke Nojiri2020-05-145-0/+23
| | | | | | | | | | | | | | | | | This patch adds EC_RESET_FLAG_EFS. It indicates EC jumped to RW by successfully running EFS. system_jumped_late can be used to avoid running some code twice (once in RO and again in RW). Such code is currently (wrongly) guarded by system_jumped_to_this_image. BUG=b:156101251, chromium:1072743 BRANCH=none TEST=Verified the bug is fixed. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: I58fc18510b2f95dfd116cbacba09875cb7cf5051 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2200245
* puff: Determine BJ power based on fw config.Sam McNally2020-05-142-13/+34
| | | | | | | | | | | BUG=b:154657629 TEST=make buildall -j; chgsup reports current according to fw config BRANCH=none Change-Id: Ieea86484ee49e056c368a6e764a217958bae3835 Signed-off-by: Sam McNally <sammc@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2198816 Reviewed-by: Andrew McRae <amcrae@chromium.org>
* volteer: Enable EFS2Daisuke Nojiri2020-05-141-0/+2
| | | | | | | | | | | | | | This patch enables EFS2 for volteer. BUG=b:152998236 BRANCH=none TEST=Verify system boots and software sync works. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: I7af9f0c5abbda4fea613d39c1981f5995acf76b4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2196955 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* VCONN: Request Vconn swap if power state transitions above G3madhusudanarao amara2020-05-141-0/+6
| | | | | | | | | | | | | | | | | | | | To communicate with cable plug VCONN is required and the VCONN is typically provided by 5V rail. When the DUT is below S5, 5V rail is down & VCONN sourcing is disabled. Hence need to re-enable the VCONN sourcing when the power state transition happens from G3 to higher state. BUG=b:156174498 BRANCH=none TEST=Connect TBT device in G3 behind DP port connected to external monitor. Observed TBT alt mode after wakeup Signed-off-by: madhusudanarao amara <madhusudanarao.amara@intel.corp-partner.google.com> Change-Id: I011b33f2f7cd56669f84781c5d1ad014e00387ef Signed-off-by: madhusudanarao amara <madhusudanarao.amara@intel.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2194157 Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* endeavour: add pse initJeff Chase2020-05-144-2/+184
| | | | | | | | | | | | | | | | Endeavour has an onboard PoE PSE controller. This change initializes the controller and sets per port maximum power. BRANCH=none BUG=b:155863756 TEST=build + boot, various pse commands Change-Id: I1505917f6fac8a569f40102162b0d036e8079a36 Signed-off-by: Jeff Chase <jnchase@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2189562 Reviewed-by: Joe Tessler <jrt@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* risc-v: add comments about not needing 16-byte stack frame alignmentDino Li2020-05-133-7/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since we are not actually executing on a stack frame that is not 16-byte aligned, we are following the guidance (linked below). Add comments for future developers to explain why. Also, saving system stack pointer in the switch to function since the isr function takes special care to not over write the stack pointer when we are already using the system stack. According to documentation, the stack frame should be 128-bit aligned upon entering function boundaries. "In the standard RISC-V calling convention, the stack pointer sp is always 16-byte aligned" from https://riscv.org/specifications/isa-spec-pdf/ "The stack grows downwards (towards lower addresses) and the stack pointer shall be aligned to a 128-bit boundary upon procedure entry" from https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md See also documentation issues discussing this https://github.com/riscv/riscv-elf-psabi-doc/issues/21 BRANCH=none BUG=none TEST=ITE RISC-V FPU implementation still works Signed-off-by: Jett Rink <jettrink@chromium.org> Change-Id: I3460e6ee2b68c7793c72517e7d2d9bc645aaea65 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2173119 Tested-by: Dino Li <Dino.Li@ite.com.tw> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* test: Add rollback unit testTom Hughes2020-05-137-0/+135
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This test only runs on device and requires manual verification that a memory access violation occurred. Note that bloonchipper region 1 on dragonclaw fails as indicated in tests below. BRANCH=none BUG=b:155229277, b:151105339 TEST=Compile and flash bloonchipper on dragonclaw with region 0 "runtest" on console => Reboots with "Data access violation, mfar = 8020000" => PASS TEST=Compile and flash bloonchipper on dragonclaw with region 1 "runtest" on console => Memory is successfully read => FAIL TEST=Compile and flash dartmonkey on dragontalon with region 0 "runtest" on console => Reboots with "Data access violation, mfar = 80c0000" => PASS TEST=Compile and flash dartmonkey on dragontalon with region 1 "runtest" on console => Reboots with "Data access violation, mfar = 80e0000" => PASS Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I3e9cc568a0b16c6091d96c4373798fe4de4ab65b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2190829 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Commit-Queue: Nicolas Boichat <drinkcat@chromium.org>
* tcpmv2: hard reset AutoDischarge enable only when neededDenis Brockus2020-05-121-3/+6
| | | | | | | | | | | | | | | | | | | | | The allow unattach path is common code in PE and it gets called even if we are not doing Hard Reset. This can change AutoDischarge to be incorrect during a PR Swap. So guard this code to only being performed if we are actually in a Hard Reset. BUG=none BRANCH=none TEST=check Hard Reset and PR Swap Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: Ie7e9084d41432d6c449aaaa189b3a55d0dd7f780 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2196642 Tested-by: Denis Brockus <dbrockus@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* tcpmv2: Add AutoDischarge for CT connectionsDenis Brockus2020-05-121-0/+3
| | | | | | | | | | | | | | | | | Added AutoDischarge to CT.SNK connections. BUG=none BRANCH=none TEST=Verify USBC is still working Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: Ida3ce6b13d8e922034087b5d07db04191efc7127 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2194264 Commit-Queue: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org> Tested-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org>
* Zork: Use FW_CONFIG for IOEX_HDMI_CONN_HPD_3V3_DB.Edward Hill2020-05-129-3/+48
| | | | | | | | | | | | | | | | Use FW_CONFIG to only enable IOEX_HDMI_CONN_HPD_3V3_DB interrupt when appropriate. BUG=b:156046102 BRANCH=none TEST=none Signed-off-by: Edward Hill <ecgh@chromium.org> Change-Id: Ib12943e6ebbbd9af9c46ac548921aea5eb96f504 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2195187 Reviewed-by: David Huang <david.huang@quanta.corp-partner.google.com> Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* Zork: Use FW_CONFIG for IOEX_MST_HPD_OUT.Edward Hill2020-05-128-33/+129
| | | | | | | | | | | | | | | | | Move mst_hpd_interrupt() out of variant_trembyle.c into individual boards. Use FW_CONFIG to only enable IOEX_MST_HPD_OUT interrupt when appropriate. BUG=b:156046102 BRANCH=none TEST=none Signed-off-by: Edward Hill <ecgh@chromium.org> Change-Id: I3f188088254208f01aea2094b7f2b57590b0d91b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2195186 Reviewed-by: David Huang <david.huang@quanta.corp-partner.google.com> Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* asurada: keep vbat voltage when not chargingTing Shen2020-05-121-1/+2
| | | | | | | | | | | | | | | | | | On asurada, Vbat is also used to supply power to the system. This CL keeps Vbat outputs 6V even if battery not present. Otherwise, Vbat will drop to VOLTAGE_MIN(~=2V) and causes system down. BUG=b:154303178 TEST=able to boot without battery BRANCH=none Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: I5daa7b6c377ab696b2cf2c84a07b7535d2c44dca Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2179143 Reviewed-by: Eric Yilun Lin <yllin@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org>
* asurada: enable battery cut-offTing Shen2020-05-122-2/+3
| | | | | | | | | | | | | | | add CONFIG_BATTERY_CUT_OFF and set correct cut-off command BUG=b:150341271 TEST=`cutoff` command in ec-console works BRANCH=none Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: I757990df5b0c71e4d522c9bbf53ca900590b4fe9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2164467 Commit-Queue: Ting Shen <phoenixshen@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
* asurada: set uart_rx gpio to hi-zTing Shen2020-05-121-2/+2
| | | | | | | | | | | | | | | remove pull-down to save power BUG=b:154279402 TEST=flash ec over ccd BRANCH=none Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: I876e4b967bd15b4129dc6777c440ecb82dcb8119 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2164466 Commit-Queue: Ting Shen <phoenixshen@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
* ppc/sn5s330: set the deglitch time to 1000 us for PP2James_Chao2020-05-121-4/+8
| | | | | | | | | | | | | | | | | | | | | | | Some type-c device (eg. ASUS MB16ACE) and dongle (eg. Hub-type-c-promate-0001) can't be detect when system resume from S5. After modulating PPC parameter PP1_ILIM_DEGLITCH_0 from 200us to 1ms, those devices can be detect work normally. BUG=b:155109735 BRANCH=octopus TEST=Check the devices can work normally 1.Promate Hub-type-c-promate-0001 2.Apple USB-C Digital AV Multiport Adapter 3.Dell S2718D 4.MONITOR-PHILIPS-258B6QU 5.BENQ EW3270U 6.ASUS MB16ACE,MX27UC 7.LG-34WK95U-W Change-Id: I8a62cb309055b8e64babf1d447eacacc518f9bbd Signed-off-by: James_Chao <james_chao@asus.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2193251 Reviewed-by: Diana Z <dzigterman@chromium.org>
* usb_pd_alt_mode_dfp: Move pd_set_svids_discoveryAbe Levkoy2020-05-121-9/+8
| | | | | | | | | | | | | Place it next to the other SVIDs accessor functions. BUG=none TEST=make buildall BRANCH=none Change-Id: I1ddfd5cc1d4617671e78c6405ddecc3d27be16fc Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2194260 Reviewed-by: Keith Short <keithshort@chromium.org>
* TCPMv2: Discover cable plug modesAbe Levkoy2020-05-121-0/+6
| | | | | | | | | | | | | | | Enter PE_INIT_VDM_Modes_Request with transmit type SOP', following cable-plug (SOP') SVID discovery. BUG=b:152420269,b:152419795 TEST=Attach port partner via cable; TCPM sends SOP' modes request and TEST=then continues with mode entry. BRANCH=none Change-Id: I62be147e7809ee3955c1db7704e965f576176f67 Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2174468 Reviewed-by: Diana Z <dzigterman@chromium.org>
* TCPMv2: Discover cable plug SVIDsAbe Levkoy2020-05-121-0/+10
| | | | | | | | | | | | | | | Enter PE_INIT_VDM_SVIDs_Request with transmit type SOP', following cable cable-plug (SOP') identity discovery. BUG=b:152420269,b:152419795 TEST=Attach port partner via cable; TCPM sends SOP' SVIDs Request, then TEST=continues with enter-mode process. BRANCH=none Change-Id: Icaf08e0849380bd48ae1a6eec32fa22eb4ac470f Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2174467 Reviewed-by: Diana Z <dzigterman@chromium.org>
* TCPMv2: Implement mode discovery for port partnerAbe Levkoy2020-05-123-10/+266
| | | | | | | | | | | | | | | | Implement PE_INIT_VDM_Modes_{Request,ACKed,NAKed}. Store mode discovery state for each discovered SVID and provide accessors for that state. Consider transmit type when consuming modes. BUG=b:152420269,b:152419795 TEST=Attach port partner; TCPM discovers modes for previously discovered TEST=SVIDs and then continues with discovery/mode-entering process. BRANCH=none Change-Id: I72a605fa500e7eea0a5fa3b65a74d8b567a78751 Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2174466 Reviewed-by: Diana Z <dzigterman@chromium.org>
* strago: Disable Vivaldi keyboardAbe Levkoy2020-05-121-0/+1
| | | | | | | | | | | | | | | BUG=none TEST=make buildall BRANCH=none Strago predates Vivaldi and does not need custom top-row keys. This is just keep strago building at ToT; do not pick this onto a release branch. Change-Id: Ic1b769cee89150c5f13049c995754cc77f7e7651 Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2189961
* TCPMv2: Use CMD_DISCOVER_IDENT during discoveryAbe Levkoy2020-05-121-4/+4
| | | | | | | | | | | | | | | | enum vdm_cmd is redundant with the CMD_DISCOVER_* macros in usb_pd.h and will no longer be needed after pe_do_port_discovery is replaced. Remove uses of enum vdm_cmd from the new VDM request states. BUG=none TEST=make buildall BRANCH=none Change-Id: I068fa3a1f9208953b18b1bf765a0adfa54ad8df0 Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2178092 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* TCPMv2: Add new state for SVID discovery flowAbe Levkoy2020-05-121-1/+120
| | | | | | | | | | | | | | | Implement PE_INIT_VDM_SVIDs_Request. Enter this state from PE_{SRC,SNK}_Ready if identity discovery succeeded. Subsequently, continue with discovery via PE_DO_PORT_DISCOVERY. BUG=b:152419850,b:152418267 TEST=Attach port partner; TCPM discovers SVIDs and continues discovery BRANCH=none Change-Id: Ic8a4e08ab0d2bfbeb7541c662f7503c74c22bcf5 Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2174465 Reviewed-by: Diana Z <dzigterman@chromium.org>
* TCPMv2: Define fields for SVID discovery stateAbe Levkoy2020-05-126-83/+172
| | | | | | | | | | | | | | | Index discovery results by SOP type and track SVID discovery state for each type. Define accessors for this state and modify existing accessors to be SOP-type-aware. BUG=b:152419850,b:152418267 TEST=make buildall; attach port partner; observe discovery via Twinkie BRANCH=none Change-Id: I24ee19aac087c5752a3a822ab2b0c9da7a55af1b Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2174464 Reviewed-by: Diana Z <dzigterman@chromium.org>
* hatch: Remove the board keyscan_config definition and use the defaultWai-Hong Tam2020-05-1114-34/+0
| | | | | | | | | | | | | | | | | | | The keyscan_config is the same as the default. Don't define the board custom keyscan_config. For the board.h, most of them have duplicated definitions from the baseboard.h. Remove them by the script: $ grep -rl 'BASEBOARD:=hatch' * | cut -f1 -d/ | xargs -IX sed -i \ '/#define CONFIG_KEYBOARD_BOARD_CONFIG/d' X/board.h BRANCH=hatch BUG=b:156007029 TEST=Build all the hatches boards, no error. Change-Id: Ib02550708d533ced77f5fad05b074291b66dd4fc Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2194160 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
* keyboard_scan: Update the default scan delay to compensate H1 signal delayWai-Hong Tam2020-05-111-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The default value of the keyboard scan delay was measured at around 2013. That time H1 hadn't been introduced. The keyscan lines go straightforward to the keyboard matrix. In recent Chrome OS clamshell/convertible devices, the KSO2 line goes through H1. It adds more signal delay for inverting the signal. The default keyboard scan rate seems too fast for the KSO2 line. When an user presses Refresh key (KSO2, KSI2), EC iterates to assert the next KSO3, KSO2 still remains asserted that causes T key (KSO3, KSI2) detected unexpectedly. Most of the boards override this default value. But a board, which just uses the default value, may have this Refresh-triggering-T bug. People debug the same issue over and over again. Should update the default value and save people time. BRANCH=None BUG=b:156007029, b:155696516 TEST=Press Refresh key, only Refresh key detected, no sign of T key. Change-Id: I5a9ee8058adcac123fdd5500d478913926b00497 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2190953 Reviewed-by: Alexandru M Stan <amstan@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
* util: Remove unnecessary halt in gdbinitTom Hughes2020-05-111-2/+0
| | | | | | | | | | | | | | The reset on the line before is sufficient. BRANCH=none BUG=none TEST=none Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I7eef41a4263764375ff1c8a16bb462edf7b3209c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2190820 Commit-Queue: Craig Hesling <hesling@chromium.org> Reviewed-by: Craig Hesling <hesling@chromium.org>
* ec: fix `make coverage` code coverage reportingPaul Fagerburg2020-05-115-12/+40
| | | | | | | | | | | | | | | | | | | | | | | Fixed problems that were preventing us from building the unit tests with code coverage testing via `make coverage`. * Changed test_util so that programs will cleanly exit on SIGTERM. * Changed run_host_test to wait for the child process to exit, and only proc.kill() if it times out, so the child process will generate code coverage output files on exit. * Changed Makefile.toolchain to use the --coverage flag for both compile and link. * Changed build.mk and Makefile.rules to exclude certain tests from code coverage because they were causing failures either during the individual stage of code coverage, or generating the overall report. BUG=b:143065231 BRANCH=none TEST=`make coverage` produces results Signed-off-by: Paul Fagerburg <pfagerburg@chromium.org> Change-Id: I8575013551ce1dba3fd249cd933a3cf6d110db8d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2186853 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* tcpmv2: warm start DBG_ACC_SNK correctlyDenis Brockus2020-05-112-3/+25
| | | | | | | | | | | | | | | | | | | DBG_ACC_SNK connections are warm starting in ATTACHED_SNK and this is not correct. Added BBRMFLG to keep track and jump back to the correct SNK entry state. BUG=none BRANCH=none TEST=connect a DBGACC and reboot should reconnect DBGACC Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: I4a17c2487a18ed0e4d58954e8d5ade08b4d44fff Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2191815 Tested-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org>
* asurada: detect subboard typeEric Yilun Lin2020-05-113-3/+60
| | | | | | | | | | | | | | | | | There are two different subboard configurations on Asurada: 1. Type-C 2. HDMI and they can be distinguished by EC_X_GPIO3. BRANCH=master BUG=b:154565980 TEST=ensure Type-C subboard is detected. Change-Id: Ic7dfeaee8b0f6e84e1f2e598dc93deb773bee059 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2167124 Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* asurada: configure hibernate wake source.Eric Yilun Lin2020-05-112-7/+9
| | | | | | | | | | | | | | We have three wake sources: power button, lid open, and ACOK. it81202 doesn't need EC_RST_ODL as a wake source. BRANCH=master BUG=b:150341271 TEST=test power button, lid open event can wake the system up. Change-Id: I4f919de661e9b2ee6caaf172f008cb608ea02b64 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2178693 Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* damu: fix battery cutoffScott Chao2020-05-111-1/+1
| | | | | | | | | | | | | BUG=b:156209241 BRANCH=kukui TEST=make -j BOARD=damu TEST=make buildall TEST=ectool batterycutoff Signed-off-by: Scott Chao <scott.chao@bitland.corp-partner.google.com> Change-Id: Ie2555d7f3254c193d9d76289f53b4833708c6c0f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2193252 Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* casta: Configure number of PD ports basing on SKU IDPatryk Duda2020-05-111-0/+21
| | | | | | | | | | | | | | | | | | | | | Bluebird board contains only one Type-C port. This patch implements limiting number of available Type-C ports basing on SKU ID. Also obtaining SKU ID was implemented by fetching it from EEPROM, similarly to garg board. BUG=b:154602760 BRANCH=none TEST=Flash on bluebird, open EC console. Issue command 'typec 1 usb'. Command should fail with information that parameter 1 is invalid. Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: I20c8799b2ee687956d5fbfd4029aacfaa768fe07 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2187212 Reviewed-by: Jett Rink <jettrink@chromium.org>
* damu: modify lid accel to LIS2DWLScott Chao2020-05-112-9/+9
| | | | | | | | | | | | BUG=b:147689571 BRANCH=kukui TEST=make -j BOARD=damu TEST=make buildall Signed-off-by: Scott Chao <scott.chao@bitland.corp-partner.google.com> Change-Id: I2e05202e062a16c9f746a13608c3d31d90148481 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2190099 Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* cometlake-discrete: create a S0->S3 fast pathPeter Marheine2020-05-114-13/+66
| | | | | | | | | | | | | | | | | Latency for powering off VCCIO needs to be lower than we can reliably achieve using the regular state machine. Add a fast path via a specialized interrupt to do the S0->S3 transition that should have lower latency (low enough to satisfy the relevant timing requirements). BRANCH=None BUG=b:155672968 TEST=Verified shutdown_s0_rails() runs on S3 interrupt with low latency, measured timing is now in spec. Signed-off-by: Peter Marheine <pmarheine@chromium.org> Change-Id: I2753d3490bbefc8f6fccba6cc90e808c969e53b1 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2182109 Reviewed-by: Andrew McRae <amcrae@chromium.org>
* SM5803: Enable interrupts after setting thresholdsDiana Z2020-05-101-4/+6
| | | | | | | | | | | | | | | | Move interrupt enable to the point after configuring the interrupt thresholds. This appears to reduce how often the TINT interrupt fires on init. BRANCH=None BUG=b:155436094 TEST=on waddledee, remove power from the board, plug it in, and verify no TINT interrupt is seen during boot Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I85ac7c831572c3a05c87c3432bcfa98484bf4230 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2191138 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* volteer: set H1 packet mode GPIO lowKeith Short2020-05-095-12/+9
| | | | | | | | | | | | | | | | | | GPIO75 on board version 1 is used for H1 packet mode and must be initialized low. This change disables the VOLUME_UP button on board version 0. BUG=b:156117916 BRANCH=none TEST=make buildall TEST=verify EC console is not read only. Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I58d70e833027a9bdb8d4f2463567820c2de1b590 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2191295 Reviewed-by: caveh jalali <caveh@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* TCPMv2: Guard all VCONN function with CONFIG_USBC_VCONN macroSam Hurst2020-05-093-19/+45
| | | | | | | | | | | | | | | Guard all VCONN related function that are ued in the Policy Engine with the CONFIG_USBC_VCONN macro. BUG=b:155656668 BRANCH=none TEST=make -j buildall Signed-off-by: Sam Hurst <shurst@google.com> Change-Id: Ib46622126a577950d46b15af649c260a0790634a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2180426 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* cleanup: rename kpbs to kbps for i2cJett Rink2020-05-092-3/+3
| | | | | | | | | | | | | | | This changes follows the hdctool change for c2d2 that ensures either kpbs or kbps on the console output will work (CL:2161642) BRANCH=servo BUG=none TEST=builds Signed-off-by: Jett Rink <jettrink@chromium.org> Change-Id: I57e1638a4e8c9a61d58705c70d4d24c7b65e48bd Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2191132 Commit-Queue: Diana Z <dzigterman@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* uart_stress_tester: import logging instead of cros_loggingNamyoon Woo2020-05-081-1/+1
| | | | | | | | | | | | | | | | | This patch makes uart_stress_tester.py import logging instead of cros_logging from chromite.lib. BUG=none BRANCH=none TEST=ran uart_stress_tester.py on local chroot and on labstation. Signed-off-by: Namyoon Woo <namyoon@google.com> Change-Id: I479e2b7a046d6c7b02fb4aca2c7e1fc83334e294 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2190826 Tested-by: Namyoon Woo <namyoon@chromium.org> Reviewed-by: Ruben Rodriguez Buchillon <coconutruben@chromium.org> Reviewed-by: Mary Ruthven <mruthven@chromium.org> Commit-Queue: Namyoon Woo <namyoon@chromium.org>
* tcpmv2: get USB CCD working on servo_v4 with trembyleDenis Brockus2020-05-087-38/+86
| | | | | | | | | | | | | | | | | | | | | | | | | | Change AutoDischargeDisconnects to handle Debug Accessory CCD devices. Repair Try.SRC on an initial SNK connection path. Repair power swap path. Auto Discharge was still in the wrong places and faults pointed that there was a problem but finding the correct location is not quite as simple. This at least is working better than before. BUG=b:154590730 BRANCH=none TEST=servo_v4 charge through TEST=servo_v4 connected to USB stick when SNK and SRC Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: I9638b873a7243028a230d6d997c060d0bf2616e3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2185871 Tested-by: Denis Brockus <dbrockus@chromium.org> Tested-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org>
* servo_updater: Re-add board name's to servo_updaterBrian J. Nemec2020-05-081-1/+5
| | | | | | | | | | | | | | | | | | | | Adds the board names back into servo_updater. These are used by manufacturing scripts in hdctools to identify which strings to pass to servo_updater. BUG=b:154527792 TEST=sudo emerge chromeos-base/ec-devutils Verified that emerge was successful TEST=sudo servo_updater Verified that the ServoV4 configuration is default TEST=sudo mfg_c2d2 Verified that C2D2 is used as target Change-Id: I75f7a8bcdd2c87951917f7ea3ec57f9288fda862 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2157570 Tested-by: Brian Nemec <bnemec@chromium.org> Reviewed-by: Ruben Rodriguez Buchillon <coconutruben@chromium.org> Commit-Queue: Brian Nemec <bnemec@chromium.org>
* mt8192: add MediaTek MT8192 power sequencing supportEric Yilun Lin2020-05-087-15/+503
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add power sequencing for asurada rev0 board. Craft mt8192 PS from mt8183. Mostly are the same, except that MT8192 doesn't use EC reset as AP reset. BRANCH=none BUG=b:150341779 TEST=TEST=Tried the following cases: * Cold reset: $ dut-control cold_reset:on sleep:0.2 cold_reset:off Result: G3 -> S0 * Long power press to shutdown: $ dut-control pwr_button:press sleep:8.2 pwr_button:release Result: S0 -> S5 -> G3 * Long power press to power-on but then shutdown: $ dut-control pwr_button:press sleep:8.2 pwr_button:release Result: G3 -> S0 -> S5 -> G3 * Short power press to power-on: $ dut-control pwr_button:press sleep:0.2 pwr_button:release Result: G3 -> S0 * Console command: apreset Result: S0, AP reboots * Console command: apshutdown Result: S0 -> S5 -> G3 * Lid open to power-on: $ dut-control lid_open:no sleep:0.2 lid_open:yes Result: G3 -> S0 Change-Id: Ib8ac1ed700fc0a46fe8a1e6e40e1fefa3401d3c0 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2120114 Reviewed-by: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Wai-Hong Tam <waihong@google.com>
* power: add power_wait_mask_signals_timeout()Eric Yilun Lin2020-05-082-4/+24
| | | | | | | | | | | | | | | | | | Currently, we can only wait for a signal is presented via power_wait_signals*(). However, we might want to wait a power signal disappeared. power_wait_mask_signals_timeout() does the thing, which can wait until a power signal is disappeared. BRANCH=master BUG=b:150341779 TEST=test with CL:2120114 Change-Id: I0bbc04fcf76e67d7cfe86096a42e3b767a136ef9 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2176820 Reviewed-by: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Wai-Hong Tam <waihong@google.com>
* zork: enable tcpci_dump console commandDenis Brockus2020-05-081-0/+1
| | | | | | | | | | | | | | | BUG=none BRANCH=none TEST=verify tcpci_dump works Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: I11590e50139a8ff571bcd2f002b05c45f7f8f423 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2185870 Commit-Queue: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org> Tested-by: Denis Brockus <dbrockus@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* Add CONFIG_CMD_FPSENSOR_DEBUG to config.hDaisuke Nojiri2020-05-081-0/+1
| | | | | | | | | | | | | | Presubmit check requires all CONFIG_ macros be in config.h. This patch adds CONFIG_CMD_FPSENSOR_DEBUG to config.h. BUG=b/155996358 BRANCH=none TEST=buildall Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: Ib9c147b9f29d7f1da8c59903ff441eb3fd5ed0ab Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2189175 Reviewed-by: Tom Hughes <tomhughes@chromium.org>
* Rename CONFIG_ macros to CONF_*Daisuke Nojiri2020-05-081-22/+22
| | | | | | | | | | | | | | | | | CONFIG_ name space is reserved for configuration macros, which all live in config.h. This patch renames the regular macros, which happened to be prefixed with CONFIG_, to avoid the presubmit errors. BUG=b/155996358 BRANCH=none TEST=buildall Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: Ic87a23a34c7d36d65f210dd51fed109443ef71ce Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2189174 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Remove unused CONFIG macrosDaisuke Nojiri2020-05-083-3/+0
| | | | | | | | | | | | | | CONFIG_GPU, CONFIG_USB_SM_FRAMEWORK, CONFIG_BOARD_HAS_AFTER_RSMRST are no longer used. This patch removes them. BUG=b/155996358 BRANCH=none TEST=buildall Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: Ia407850398c07b7cdb01cddb0288ae977b9dca82 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2189171 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* PD: Skip pd_prepare_sysjump if PD tasks haven't startedDaisuke Nojiri2020-05-081-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | Currently, pd_prepare_sysjump is skipped when VBOOT_EFS2 is defined. Even if VBOOT_EFS2 is enabled, late sysjump can happen when secdata kernel is missing or a communication error happens. This patch makes EC skip pd_prepare_sysjump only when PD tasks haven't started. This workaround was first added by crrev.com/c/233751. THere is no associated bug. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=chromium:1072743 BRANCH=none TEST=Verified USB devices are enumerated on Trembyle. Change-Id: I5946fd97fb20b24b9cbcb12aca3bc293651e224f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2188112 Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Auto-Submit: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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