| Commit message (Collapse) | Author | Age | Files | Lines |
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The Type-C ports on Trogdor doesn't support UFP, like ADB
mode. So make the ports DFP only. When the data role change
to UFP, it disconnects the USB mux.
BRANCH=None
BUG=b:143616352
TEST=Checked the USB mux disconnected when switching to UFP.
Change-Id: I968f1fc7b8c15d34f635275911a013f28dc92359
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2464233
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
Commit-Queue: Alexandru M Stan <amstan@chromium.org>
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Increase console output buffer since we have the RAM available.
It helps console message drop/corruption.
BRANCH=None
BUG=None
TEST=Enabled i2ctrace which dumps lots of messages.
Change-Id: Icd98d429ec80cdae1d8970624a1c4c385ef73184
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2464232
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
Commit-Queue: Alexandru M Stan <amstan@chromium.org>
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The fpframe command downloads fingerprint templates frame by frame.
Add some retries to it, so that if there's a problem in the transport
layer, we don't give up immediately.
BRANCH=none
BUG=b:169783567, b:160208269
TEST=cros_workon --board=zork start ec-utils
emerge-zork ec-utils
cros deploy <IP> ec-utils
(On Morphius)
for i in {1..1000}; do ectool --name=cros_fp fpframe > /dev/null;
done
==> No fpframe failures (before there were 20+)
TEST=Enroll one fingerprint, then
with old ectool: ectool --name=cros_fp fpframe > before.txt
with new ectool: ectool --name=cros_fp fpframe > after.txt
cmp before.txt after.txt
==> Same
Signed-off-by: Yicheng Li <yichengli@chromium.org>
Change-Id: I66a31824d2515be2ac284abb98c389d89e494687
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2459226
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-by: Bhanu Prakash Maiya <bhanumaiya@google.com>
Tested-by: Bhanu Prakash Maiya <bhanumaiya@google.com>
Commit-Queue: Bhanu Prakash Maiya <bhanumaiya@google.com>
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Icetower is an STM32H743 device, so this test does not compile.
BRANCH=none
BUG=b:170432597
TEST=On Icetower v0.1 connected via servo_micro:
./test/run_device_tests.py -b dartmonkey
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: Iaff85c24649ee50101441c9a75c57bd10b605c51
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2462159
Reviewed-by: Yicheng Li <yichengli@chromium.org>
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Mutexes shouldn't be used in interrupt context. An ASSERT was added in
mutex_lock to verify this commit
e6956209119d2b2c1f45401855019e3a0a2f7dd5.
There are cases where bkpdata_write can be called from an interrupt
context, such as this stack trace that occurs when adding entropy from
RO on dartmonkey/icetower (stack captured with Segger J-Trace):
> rollbackaddent 1234
panic_assert_fail panic_output.c:132
mutex_lock task.c:889
bkpdata_write bkpdata.c:35
bkpdata_write bkpdata.c:24
bkpdata_write_reset_flags bkpdata.c:86
chip_save_reset_flags system.c:366
system_reset system.c:366
panic_reboot panic_output.c:114
report_panic panic.c:339
exception_panic panic.c:350
Validation of the fix was checked with the "rollback_region1" unit test,
which failed before the change and works after.
BRANCH=none
BUG=b:170147314
TEST=./test/run_device_tests.py -b dartmonkey -t rollback_region1
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: Ie5509ec024e94b48c786199ccbb81ce93fafe547
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2462545
Reviewed-by: Edward Hill <ecgh@chromium.org>
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Count an instance of ASSERTION_FAILURE as a test failure. There was a
bug where the rollback tests correctly hit the data access violation,
but then went into a boot loop due to hitting an ASSERTION_FAILURE. We
now check the all the logs for failures.
BRANCH=none
BUG=b:170147314
TEST=./test/run_device_tests.py -b dartmonkey -t rollback_region0
TEST=./test/run_device_tests.py -b dartmonkey -t rollback_region1
TEST=./test/run_device_tests.py -b bloonchipper
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: Iebe980af38383d6e71f46f799314e6275f047336
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2462544
Reviewed-by: Yicheng Li <yichengli@chromium.org>
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This patch enables the console command 'chargen'.
BUG=b:158477297
BRANCH=trogdor
TEST=buildall
Signed-off-by: Namyoon Woo <namyoon@chromium.org>
Change-Id: I0bffc5ee489b1a3984ea4c59894dda770303fb92
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2463596
Reviewed-by: Wai-Hong Tam <waihong@google.com>
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SKU2 is compatible device. If we didn't set compatible device,
internal keyboard works in tablet mode.
BUG=b:170357684
BRANCH=firmware-hatch-12672.B
TEST=DUT will not be resumed from S3 when pressing Keyboard in tablet mode.
Signed-off-by: Jongpil Jung <jongpil19.jung@samsung.corp-partner.google.com>
Change-Id: I1aeff53460e440016c8d6f27ea4927f1251068fe
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2461146
Reviewed-by: Bob Moragues <moragues@chromium.org>
Commit-Queue: Bob Moragues <moragues@chromium.org>
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BRANCH=none
BUG=b:170147314, b:170432597
TEST=./test/run_device_tests.py -b dartmonkey -t rollback_region0
TEST=./test/run_device_tests.py -b dartmonkey -t rollback_region1
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: If1ff057165c462716820b783a8ef1dac7994fde1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2462543
Reviewed-by: Yicheng Li <yichengli@chromium.org>
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BRANCH=none
BUG=b:158580909, b:170432597
TEST=On Icetower v0.1 connected to servo_micro:
./test/run_device_tests.py -b dartmonkey -t utils
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: If5dcd7ade6397611b40b9c7a6f9560402a11c042
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2459229
Reviewed-by: Edward Hill <ecgh@chromium.org>
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The old boards don't have the hardware fix b/169797080. They need the
workaround to make ACOK functional to wake EC up from hibernate.
EC enables the PPC power sink path before EC enters hibernate, such
that the ACOK won't be blocked by PPC. Otherwise, the PPC keeps the
sink path disconnected; ACOK won't go High and can't wake EC up.
Do it in board_hibernate() instead of board_hibernate_late(), which
has I2C disabled.
BRANCH=None
BUG=b:170324206
TEST=Tested on Lazor, without the hardware rework. Triggered EC into
hibernate; plugging AC can wake EC up.
Change-Id: I3a97f59a344aff88b12fb19e2ea3ae126d1a8715
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2461939
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
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BRANCH=none
BUG=b:158580909
TEST=./util/flash_jlink.py --board icetower \
-i ./build/nocturne_fp/ec.bin
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: I41c5694cf8cc4f6eb569a58267b6620b4ba2df2e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2459228
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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|timestamp| decoding was wrong. Use union field instead.
BUG=none
BRANCH=none
TEST=Check 'ectool motionsense fifo_read 256' displays a reasonable
timestamp when sensors are producing events.
Change-Id: Idf7362730f9d66ec2f125b0c3dbcf2b14c1235ca
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2458836
Reviewed-by: Ching-Kang Yen <chingkang@chromium.org>
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boten has garage stylus, this patch enables stylus charging when
stylus present.
BUG=b:155615390
BRANCH=none
TEST=make buildall -j
Signed-off-by: jerry2.huang <jerry2.huang@lcfc.corp-partner.google.com>
Change-Id: I601bb9c746774f3a410f83f322706ef4fb225830
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2455786
Reviewed-by: Justin TerAvest <teravest@chromium.org>
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The VCC is the power source of EC's GPM0~6, will connect to 1.8v or
3.3v depended on platform design.
This change was made to ensure voltage level setting of GPM0~6 matches
the corresponded VCC level. So we can enable internal pull-up no matter
VCC is connected to 1.8v or 3.3v
BUG=b:168783892
BRANCH=none
TEST=- buildall.
- The level setting is correct on these boards:
asurada, drawcia, and reef_it8320
Change-Id: I4eae368e569987381a0437494262d588436bb011
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2397931
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
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Add atomic functions with prototypes equal to the ones in Zephyr.
It is done as a part of porting to Zephyr, the next step is to use in
the code atomic_* instead of deprecated_atomic_*.
Some atomic functions in Zephyr return a value e.g. atomic_add - it
returns the value of the variable before the add operation.
The current state of ATOMIC_OP macro is not designed to return such value
so instead of reworking it or writing new custom asm code just use
builtin functions.
BUG=b:169151160
BRANCH=none
TEST=buildall
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Change-Id: Iccd7a4d674601271f11f88834c8b2db08c537534
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2428945
Reviewed-by: Jett Rink <jettrink@chromium.org>
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On some of the PPC (e.g. syv682) that support manually force discharge
function doesn't automatically turn off discharge FET
when VBUS meets vSafe0V. The original flow is disabling discharge
on pd_set_power_supply_ready and enabling discharge on
pd_power_supply_reset, and since there is no automatic
turning off the discharge circuit, the FET will still be on
when a SNK device connected. We fix this by informing the PPC on
a device is connected or disconnected so that PPC can control the
FET by requests.
BUG=b:160548079, b:148870148, b:163143427
TEST=make buildall
TEST=TCPMv2: on asurada C0/C1(syv682) and volteer C0(sn5s330)/C1(syv682)
port, and enable force discharge mode (CL:2423665), plug sink
and source device and ensure Vconn and Vbus are off within
tVconnOff and tVBusOff respectively. Plug a DRP hub and then
plug adapter in it, and it meets tVconnOff and tVbusOff.
TEST=TCPMv1: tested the same steps as above on Asurada.
BRANCH=NONE
Change-Id: I8ed0e18fce2d402ff24fce6bab393cc618dfac09
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2434590
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Tested-by: Eric Herrmann <eherrmann@chromium.org>
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Woomax's battery takes serval seconds to come back from the cutoff
state.
Recorded about ~4 seconds, so bump the init timeout up to 5 second for
some margin as well.
BUG=b:169739759
BRANCH=zork
TEST=Verify DUT will boot up from cutoff a few seconds after AC power is
pluging in.
Signed-off-by: Michael5 Chen <michael5_chen1@pegatron.corp-partner.google.com>
Change-Id: I94f412a3b8955c83c511d4073b121cd701de5168
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2455014
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
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PP5000_U shouldn't be turned off until G3, so if a sysjump occurs during
S5 leave this rail on.
BRANCH=None
BUG=b:166787955,b:167996216
TEST=on drawcia, run full resets with a forced sysjump in S5 and ensure
that the DUT can get to S0 after the reset
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I00fb44903aa109bbc525fb512ab4035a94649c68
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2458841
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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We disabled the PSL mode hibernate. We uses another GPIO to control
switches, which were originally controlled by PSL_OUT. Add this GPIO,
named HIBERNATE_L, such that the non-PSL mode hibernate can retrofit
the original design.
BRANCH=None
BUG=b:169797080
TEST=Triggered EC hibernate and checked the HIBERNATE_L GPIO asserted.
Change-Id: I69c0d0296f701f3027adfd4d27fa51bdae0844a5
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2446662
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
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The RTC stops counting under PSL mode. The Trogdor design relies on
EC to give the RTC counter. Disable the PSL mode hibernate and use
the traditional non-PSL mode way, i.e. power down all RAM blocks
except the last one.
BRANCH=None
BUG=b:169595541
TEST=Tested on Lazor; triggered hibernate, and waked it up using:
* power button press
* lid open
* servo toggling EC_RST_ODL
* AC plug (doesn't work, need to investigate why)
TEST=Verified RTC still counting in hibernate:
2020-10-07 14:35:53 [244.922648 power state 9 = S5->G3, in 0x0005]
2020-10-07 14:35:53 RTC: 0x5f7e34b9 (1602106553.00 s)
2020-10-07 14:35:53 [244.923417 power state 0 = G3, in 0x0005]
2020-10-07 14:35:53 [244.926855 SDC Safe]
2020-10-07 14:35:53 [244.927138 Hibernate due to G3 idle]
2020-10-07 14:36:20
2020-10-07 14:36:20
2020-10-07 14:36:20 --- UART initialized after reboot ---
2020-10-07 14:36:20 [Image: RO, lazor_v2.0.5690-d95436fd6 ...]
2020-10-07 14:36:20 [Reset cause: hibernate wake-pin]
2020-10-07 14:36:20
...
2020-10-07 14:36:23 > rtc
2020-10-07 14:36:25 RTC: 0x5f7e34d9 (1602106585.00 s)
First RTC diff from the wall clock: 6553-53 = 6500
Second RTC diff from the wall clock: 6585-(60+25) = 6500
TEST=Verified RTC wake up from hibernate:
2020-10-07 14:59:25 > hibernate 10
2020-10-07 14:59:27 Hibernating for 10.000000 s
2020-10-07 14:59:37
2020-10-07 14:59:37
2020-10-07 14:59:37 --- UART initialized after reboot ---
Change-Id: I23f6a65115d5722cf183948fad81dc16d3a6af47
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2447049
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
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Move board specific GPIO definitions and TCPC configuration
from baseboard to JSL/TGL boards to accommodate changes in
MECC spec 0.9 vs 1.0.
BRANCH=None
BUG=b:169551130
TEST=make buildall -j
Signed-off-by: pandeyan <anshuman.pandey@intel.com>
Change-Id: I53a0545674f22e6cba05f777a4095909c231cfd2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2435174
Commit-Queue: Poornima Tom <poornima.tom@intel.com>
Tested-by: Poornima Tom <poornima.tom@intel.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
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BRANCH=none
BUG=b:169551130
TEST=make buildall -j
Signed-off-by: Sooraj Govindan <sooraj.govindan@intel.com>
Change-Id: Ieabae7bb8e4d0645ad480dd16026e5d8414362b8
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2435173
Commit-Queue: Poornima Tom <poornima.tom@intel.com>
Tested-by: Poornima Tom <poornima.tom@intel.com>
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
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Add Vol +- volume up/down by ADC HOOK function
BUG=b:167319238
BRANCH=master
TEST=Press Vol+- button function work.
Change-Id: I43b597db399aaa588d10a0dfd586208e5714c532
Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com>
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2402498
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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This patch makes EC configure battery parameters differently based
on manufacturer name and device name.
Vilboz/Vilboz360
--SMP : L20M3PG0
--LGC : L20L3PG0
--Celxpert : L20C3PG0
--Sunwoda : L20D3PG0
Vilboz14
--LGC : L20L3PG1
--SMP : L20M3PG1
--Sunwoda : L20D3PG1
BUG=b:161470405,b:170076693
BRANCH=Zork
TEST=Verify Simplo/Celxpert/Sunwoda battery can be found via EC console.
Battery can cut-off by cmd ectool batterycutoff.
Change-Id: I9dc1f5c71455a65e2eee001b03a9009644de918c
Signed-off-by: elthanhuang <elthan_huang@compal.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2456246
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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Enable LTE_EN(GPIO62) and LTE_W_DISABLE(GPIO40) when power-on.
Disable LTE_EN and LTE_W_DISABLE when power-off.
BUG=b:168960595
BRANCH=Zork
TEST=WWAN card can be detect when power-on.
Change-Id: I554fb75c07a3e631f5f59c4b8a9e7df685854271
Signed-off-by: elthanhuang <elthan_huang@compal.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2456386
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
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BRANCH=none
BUG=b:130165933
TEST=1) Started target servod first, then another servod.
Target servod is servo_v4 + servo_micro + ampton DVT DUT on port 9999,
Decoy servod is servo_v4 + ccd_cr50 + atlas PVT DUT on port 9998.
Port 9999 is where flash_ec looks for servod by default.
2) Ran this command twice, first without this patch, then with this patch:
$ util/flash_ec --board=ampton --verbose --read="$HOME"/ampton-ec-read0.bin
Without this patch, flash_ec found a wrong servod i2c-dev device from the
decoy servod, and the flash_ec invocation failed, as expected.
With this patch, flash_ec found the correct servod i2c-dev device and the
flash_ec invocation succeeded.
Cq-Depend: chromium:2439779
Change-Id: I9e5ab00d4ff2bfce4a27b263df57e007d738217b
Signed-off-by: Matthew Blecker <matthewb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2441395
Reviewed-by: Ruben Rodriguez Buchillon <coconutruben@chromium.org>
Reviewed-by: Evan Green <evgreen@chromium.org>
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
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This will be used in CL:2441395.
BRANCH=none
BUG=b:130165933
TEST=With servo_v4 Type-A + servo_micro + ampton DUT:
$ util/flash_ec --board=ampton --verbose --read="$HOME"/ampton-ec-read0.bin
Signed-off-by: Matthew Blecker <matthewb@chromium.org>
Change-Id: I548692099ee5f94acc7cb05065b400829e6147c6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2453714
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
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This will be used in CL:2441395.
BRANCH=none
BUG=b:130165933
TEST=With servo_v4 Type-A + servo_micro + ampton DUT:
$ util/flash_ec --board=ampton --verbose --read="$HOME"/ampton-ec-read0.bin
Signed-off-by: Matthew Blecker <matthewb@chromium.org>
Change-Id: Iacaf8f6b3605c3f6105989b3aebd7e2fe2fedff6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2453713
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
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Given BMA2x2 are polled (to save interrupt pin), limit ODR to 125Hz.
Even if we read too early (we can be 3ms early), it prevents tast
hardware.SensorRing from failing.
Lid accelerometer is usually read at 10/12.5Hz.
BUG=b:170155773
BRANCH=octupus,kukui,hatch
TEST=hardware.SensorRing passes on volteer
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Change-Id: Ic7e68402afbf1ceacb627ee732dbd609b7cb5d5f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2451421
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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The sent REQUEST message was discarded. This can
be at the start of an AMS or in the middle. Handle
what to do based on where we came from.
1) SE_SNK_EVALUATE_CAPABILITY: sends SoftReset
2) SE_SNK_READY: goes back to SNK Ready
BUG=b:170259288
BRANCH=zork
TEST=Monitor mentioned in parent bug should not Vconn Swap loop
Signed-off-by: Denis Brockus <dbrockus@google.com>
Change-Id: I8665215bb9b9d363b82d23cae90b9f3c5617b7a6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2454970
Tested-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
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Rename atomic_inc function to deprecated_atomic_read_add and atomic_dec
to deprecated_atomic_read_add to be more precise what the functions do.
It is done as a part of porting to Zephyr, where atomic_inc increments
by 1 and atomic_dec decrements by 1.
BUG=b:169151160
BRANCH=none
TEST=buildall
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Change-Id: Ide852ac32ce9027698cb937a06543da689c2e136
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2428944
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Lindar uses LSM6DS3TR as base accel sensor.
Lillipup uses LIS2DE12TR as lid accel sensor,and LSM6DS3TR
as base accel sensor.
The Lindar and Lillipup use the combination firmware,
so add lid and base accel sensors at the same time.
BUG=b:169530752
BRANCH=none
TEST=make buildall -j
Signed-off-by: jerry2.huang <jerry2.huang@lcfc.corp-partner.google.com>
Change-Id: Ibc8733991f763d2f5c25112bd97ea8f18a61261e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2435170
Reviewed-by: YH Lin <yueherngl@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
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Add volume key of GPIO setting:
1.GPIO93 EC_VOLDN_MUTE_BTN_ODL
2.GPIO97 EC_VOLUP_BTN_ODL
BUG=b:169530752
BRANCH=none
TEST=make BOARD=lindar
Signed-off-by: jerry2.huang <jerry2.huang@lcfc.corp-partner.google.com>
Change-Id: Ibe5052ab8b8a95bc0a3b6d2e589f4ec929473331
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2434595
Reviewed-by: YH Lin <yueherngl@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
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Add board npcx9_evb to verify npcx9's functions.
BRANCH=none
BUG=b:165777478
TEST=pass "make buildall"
TEST=Check EC firmware can boot up the EVB; verify the functionality of
required modules (Ex: ADC/GPIO/KBC/I2C/PWM/FAN/PSL/UART.)
Signed-off-by: CHLin <CHLin56@nuvoton.com>
Change-Id: I40d69bc4e698a03dc2229bb2eaea8e25ca090867
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2435166
Tested-by: CH Lin <chlin56@nuvoton.com>
Reviewed-by: caveh jalali <caveh@chromium.org>
Commit-Queue: CH Lin <chlin56@nuvoton.com>
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Matching the SN5S330, automatically define the config options for the
features the SYV682X supports, namely VCONN and CC orientation. It does
not support SBU gating as the SN5S330 does.
BUG=b:169188754
TEST=Test that VCONN is 5V when plugging in a PD device to Delbin
BRANCH=None
Signed-off-by: Eric Herrmann <eherrmann@chromium.org>
Change-Id: I45572dcd19ff39ad68cc5c3e89cf3ed6503ac135
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2453908
Tested-by: Nathan Kolluru <nkolluru@google.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
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Since each variant may have different thermal sensor placement.
Move thermal params and configs from baseboard to variant.
BUG=b:170143672
BRANCH=none
TEST=make -j BOARD=eldrid
TEST=make buildall
Signed-off-by: Scott Chao <scott_chao@wistron.corp-partner.google.com>
Change-Id: Ie12f4cecad5f93c491e51a5fadfe856829f5b2e3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2449510
Reviewed-by: Keith Short <keithshort@chromium.org>
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This CL add oz554 support and add panel backlight config.
BUG=b:168444976
BRANCH=puff
TEST=make BOARD=dooly
Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com>
Change-Id: I8bb8da1b8efdb819f0ff80d5f5954ad75aa2b7b7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2413674
Reviewed-by: Andrew McRae <amcrae@chromium.org>
Commit-Queue: Andrew McRae <amcrae@chromium.org>
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This patch update volume down gpio for dooly
to meet schematic.
BUG=b:163574191
BRANCH=puff
TEST=verify ec can get volume down button signal.
Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com>
Change-Id: Ie9d1954f16f4052cf51632bee00ed5f4f89b09b2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2452132
Reviewed-by: Andrew McRae <amcrae@chromium.org>
Reviewed-by: Nikolai Artemiev <nartemiev@google.com>
Commit-Queue: Andrew McRae <amcrae@chromium.org>
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The DP PIN assignment mask was shifted by 1 bit since
CL:2432452.
BUG=b:170191143, b:167700356
TEST=ensure asurada DP out
BRANCH=none
Change-Id: I05806d2f49fa74c2bfc6f5fb27fb9afe5f8225d8
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2452131
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
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Define CONFIG_DEVICE_EVENT to support events from devices attached to
the EC.This is required to enable AP wake from trackpoint via device
event to host.
BUG=b:160345665
BRANCH=Zork
TEST=None
Signed-off-by: Josie Nordrum <josienordrum@google.com>
Change-Id: I2217933381c6ae88bfc03b03621bb6d2c57edf55
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2430287
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
Tested-by: Denis Brockus <dbrockus@chromium.org>
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Wake up AP for PS2 interrupt using Device Event as trigger. AP
must have device event wakeup mask enabled and board must select
CONFIG_DEVICE_EVENT in EC.
This device event is only triggered when the chipset is suspended to
avoid triggering SCIs in S0.
BUG=b:160345665
BRANCH=Zork
TEST=Wake from S3 by trackpoint
Signed-off-by: Josie Nordrum <josienordrum@google.com>
Change-Id: Ia431525ee8f572922c8f9bfe613d44e83308d9f8
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2430288
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
Tested-by: Denis Brockus <dbrockus@chromium.org>
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Zork devices have FPMCU connected to AP via UART. Changes in this patch
will let developer flash STM32 in chip's bootloader mode via UART.
BUG=b:162368367
TEST=1. Run script on Zork device and confirm firmware flash.
2. Run script on Hatch devices and confirm that SPI functionality
is intact.
Signed-off-by: Bhanu Prakash Maiya <bhanumaiya@google.com>
Change-Id: I9464ae7602e2b6b21d7d31283c6c242a4d603fe5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2444457
Commit-Queue: Yicheng Li <yichengli@chromium.org>
Reviewed-by: Yicheng Li <yichengli@chromium.org>
Tested-by: Yicheng Li <yichengli@chromium.org>
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CL:2428943 renamed deprecated_atomic_clear to
deprecated_atomic_clear_bits, but missed these two cases, as they
landed thru CQ after CL:2428943 passed the dry run.
BUG=b:170132568
BRANCH=none
TEST=buildall
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I6fff582b2cf8dbf77bc8a136bc7fa81af30b2cc0
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2452889
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Sean Abraham <seanabraham@chromium.org>
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Change the name of atomic_clear to atomic_clear_bits to make to name more
clear - the function clears only selected bits, but the name may suggest
that it clears the whole variable.
It is done as a part of porting to Zephyr, where atomic_clear zeros the
variable.
BUG=b:169151160
BRANCH=none
TEST=buildall
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Change-Id: I7b0b47959c6c54af40f61bca8d9baebaa0375970
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2428943
Reviewed-by: Jett Rink <jettrink@chromium.org>
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This change adds the temperature sensors for madoo, which are hooked
up to 2 of the ADCs.
BUG=b:169729477
BRANCH=None
TEST=build and test on madoo board. Can obtain value via ectool cmd.
Signed-off-by: Ko_Ko <Ko_Ko@compal.corp-partner.google.com>
Change-Id: Id57a669006db04f9a83ad3b6ebe65b2df7c80b11
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2437723
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Ko Ko <ko_ko@compal.corp-partner.google.com>
Tested-by: Ko Ko <ko_ko@compal.corp-partner.google.com>
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Voltage Step of MAX voltage is 8mV.
BUG=b:169390177
BRANCH=None
TEST=None
Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com>
Change-Id: I299ac62b62ebde802211e1a323b227e1a1d9b3c4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2428359
Reviewed-by: Diana Z <dzigterman@chromium.org>
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This change enables push-pull for EC's KSO2 if
CONFIG_KEYBOARD_COL2_INVERTED is enabled (H1 inverts signal
of column 2 to keyboard).
BUG=b:169715234
BRANCH=octopus
TEST= EC is able to drive KSO2 which connected to H1 to 3.3V.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Change-Id: I61e07a15be2c5275363f358bf539c3311305d845
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2437722
Commit-Queue: Diana Z <dzigterman@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Tested-by: James Chao <james_chao@asus.corp-partner.google.com>
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When boards don't have the new TYPEC_STATUS host command running,
fallback to the older USB_PD_CONTROL command to display information.
BRANCH=None
BUG=None
TEST=on waddledoo with no TYPEC_STATUS command present, ensure that
"ectool typecstatus <port>" prints port information
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I78fbc0414c0c6cb73b91285b6900a34287cdf5dd
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2432458
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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When the AP has finished processing events, it can use TYPEC_CONTROL to
clear the specific events it has completed. This also fixes an issue
with the control command structure byte alignment.
BRANCH=None
BUG=b:148816435
TEST=on waddledoo, plug in Apple dongle and clear SOP discovery event
with "ectool typecontrol"
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I38d522f346bfd500b72109db46f78a9c135ce96e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2432457
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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