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* cr50: test: add hash testing host side implementationVadim Bendebury2015-12-032-1/+121
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The new module generates hash test extension subcommands, driven by the 'test_inputs' table. Each table entry is a tuple, including the test name and the data to be hashed. The test name determines the hash type (sha1 or sha256) and the test mode (single or spread over several messages). The last element of the name is the context number (ignored in single message mode). The hash extended command payload looks as follows: field | size | note =================================================================== hash_cmd | 1 | 0 - start, 1 - cont., 2 - finish, 4 - single hash_mode | 1 | 0 - sha1, 1 - sha256 handle | 1 | session handle, ignored in 'single' mode text_len | 2 | size of the text to process, big endian text | text_len | text to hash BRANCH=none BUG=chrome-os-partner:43025 TEST=currently failing, a couple of hash code tweaks needed, see upcoming patches. Change-Id: Ie992bf01cae3c5278110357b482370b2fc11c70f Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/314693 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* cr50: test: move crypto test into its own moduleVadim Bendebury2015-12-033-230/+267
| | | | | | | | | | | | | | | | | | | | | | | | This is a no-op change moving some common code out of tpmtest.py, preparing it to support different testing modes. BRANCH=none BUG=chrome-os-partner:43025 TEST=the AES test still succeeds: $ test/tpm_test/tpmtest.py Starting MPSSE at 800 kHz Connected to device vid:did:rid of 1ae0:0028:00 SUCCESS: AES:ECB common SUCCESS: AES:ECB128 1 SUCCESS: AES:ECB192 1 SUCCESS: AES:ECB256 1 SUCCESS: AES:ECB256 2 SUCCESS: AES:CTR128I 1 SUCCESS: AES:CTR256I 1 Change-Id: Ia6e0e3e89f99875297da0a4f6137de5901c8ca08 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/314691 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* chell: Keep keyboard backlight off in hibernateDuncan Laurie2015-12-012-1/+4
| | | | | | | | | | | | | If pulled up the backlight will be at 100% brightness instead of off. BUG=chrome-os-partner:48130 BRANCH=none TEST=hibernate on chell, see keyboard backlight stay off Change-Id: I30cd289b9492356407aa54e6a84b04add647bd9a Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/314936 Reviewed-by: Shawn N <shawnn@chromium.org>
* cr50: test: extended command code does not have to be passed as argumentVadim Bendebury2015-12-011-10/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | The extended command code is fixed, there is no need to pass it as a parameter when calling functions wrapping and unwrapping extended commands. BRANCH=none BUG=chrome-os-partner:43025 TEST=AES tests still pass: $ ./test/tpm_test/tpmtest.py Starting MPSSE at 800 kHz Connected to device vid:did:rid of 1ae0:0028:00 SUCCESS: AES:ECB common SUCCESS: AES:ECB128 1 SUCCESS: AES:ECB192 1 SUCCESS: AES:ECB256 1 SUCCESS: AES:ECB256 2 SUCCESS: AES:CTR128I 1 -New max timeout: 1 s SUCCESS: AES:CTR256I 1 Change-Id: Ic0c9d7983755de8380b57e841891fd638ef2c62a Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/314690 Reviewed-by: Nagendra Modadugu <ngm@google.com>
* oak: pd: increase stack size of PDCMD taskBen Lok2015-12-011-1/+1
| | | | | | | | | | | | | | | | | | | Stack of PDCMD task may be overflow during plug/unplug stree test with Apple's AV Multiport Adapter. Enlarge the stack size to avoid system reboot. BUG=chrome-os-partner:47728 BRANCH=none TEST=Manual 1.Connect DUT to sink monitor via HDMI dongle. 2.Unplug HDMI USB from DUT side. 3.Plug HDMI USB cable to DUT USB socket. 4.Repeat (Plug and unplug) USB from DUT for 10 times. Change-Id: Ib6a1fbd0a552b2c6d4656c12554e1306c21adb8a Signed-off-by: Ben Lok <ben.lok@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/315020 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* Cr50: Clean up the GINTSTS USB macrosBill Richardson2015-12-012-16/+9
| | | | | | | | | | | | | | | | | This just replaces a few manually created macros in chip/g/registers.h with a more programmatic version based on names in chip/g/hw_regdefs.h. BUG=chrome-os-partner:34893 BRANCH=none TEST=make buildall; run it No new functionality, just refactoring. Change-Id: I73ee2ee1ee3f53a0939000822c552deace46f154 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/314937 Reviewed-by: Dominic Rizzo <domrizzo@google.com>
* Cr50: Replace magic numbers for GGPIO controlBill Richardson2015-12-012-4/+41
| | | | | | | | | | | | | | | | | | Use some meaningful macro names instead of just raw numbers when selecting the correct USB phy port. Also we only need to do this once, since it should be sticky through anything short of a complete power down. BUG=chrome-os-partner:34893 BRANCH=none TEST=make buildall; run it No new functionality, just refactoring. Change-Id: If6ea2b9d9a62bf6ce4adaed1c5aac1f66013ebeb Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/314938 Reviewed-by: Dominic Rizzo <domrizzo@google.com>
* common: adc/i2c: Mark task_waiting volatileShamile Khan2015-12-017-11/+9
| | | | | | | | | | | | | | | | | | | When Link Time Optimization is turned on, functions that set task_waiting multiple times have one of the sets removed by the linker leading to undesired results. Marking task_waiting volatile alleviates this issue. BUG=chrome-os-partner:46063 TEST=Manually tested on Kunimitsu. Console command adc shows correct value of approx 20000 mV for VBUS. BRANCH=none Change-Id: I85a6e5c9688ae72c45d90fb58296f94b74a301aa Signed-off-by: Shamile Khan <shamile.khan@intel.com> Reviewed-on: https://chromium-review.googlesource.com/314233 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* usb: Put HID descriptor in the correct orderBill Richardson2015-12-011-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From the "Device Class Definition for Human Interface Devices" spec: When a Get_Descriptor(Configuration) request is issued, it returns the Configuration descriptor, all Interface descriptors, all Endpoint descriptors, and the HID descriptor for each interface. It shall not return the String descriptor, HID Report descriptor or any of the optional HID class descriptors. The HID descriptor shall be interleaved between the Interface and Endpoint descriptors for HID Interfaces. That is, the order shall be: Configuration descriptor Interface descriptor (specifying HID Class) HID descriptor (associated with above Interface) Endpoint descriptor (for HID Interrupt In Endpoint) Optional Endpoint descriptor (for HID Interrupt Out Endpoint) This makes that happen. BUG=chrome-os-partner:34893 BRANCH=none TEST=manual "make buildall" works, this image seems to work on the Cr50. Also, before this CL, I see this: 0x00060f5c 0x00000000 .rodata g NOTYPE __usb_desc 0x00060f5c 0x00000009 .rodata g OBJECT usb_desc_conf 0x00060f65 0x00000009 .rodata g OBJECT usb_desc_iface0_0iface 0x00060f6e 0x00000007 .rodata g OBJECT usb_desc_iface0_1ep0 0x00060f75 0x00000007 .rodata g OBJECT usb_desc_iface0_1ep1 0x00060f7c 0x00000009 .rodata g OBJECT usb_desc_iface1_0iface 0x00060f85 0x00000007 .rodata g OBJECT usb_desc_iface1_1ep81 0x00060f8c 0x00000009 .rodata g OBJECT usb_desc_iface1_2hid 0x00060f95 0x00000000 .rodata g NOTYPE __usb_desc_end and after, this: 0x00060f5c 0x00000000 .rodata g NOTYPE __usb_desc 0x00060f5c 0x00000009 .rodata g OBJECT usb_desc_conf 0x00060f65 0x00000009 .rodata g OBJECT usb_desc_iface0_0iface 0x00060f6e 0x00000007 .rodata g OBJECT usb_desc_iface0_2ep0 0x00060f75 0x00000007 .rodata g OBJECT usb_desc_iface0_2ep1 0x00060f7c 0x00000009 .rodata g OBJECT usb_desc_iface1_0iface 0x00060f85 0x00000009 .rodata g OBJECT usb_desc_iface1_1hid 0x00060f8e 0x00000007 .rodata g OBJECT usb_desc_iface1_2ep81 0x00060f95 0x00000000 .rodata g NOTYPE __usb_desc_end The HID descriptor comes before the endpoint. Change-Id: I8035a4cc884d8bb900bc1eb25fd3e4e9aba05bf8 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/314832 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Lars: update fan settingsRyan Zhang2015-12-012-1/+2
| | | | | | | | | | | | | Add control pin to fan BUG=None BRANCH=lars TEST=`make BOARD=lars -j` Change-Id: I9fa3c387af12c305d2eabbe01ebdd835a147a162 Signed-off-by: Ryan Zhang <Ryan.Zhang@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/315010 Reviewed-by: Shawn N <shawnn@chromium.org>
* oak: enable HW charge rampingBen Lok2015-12-012-0/+35
| | | | | | | | | | | | | | | refer to commit 75f740fa, enabling the option on oak too. BUG=none BRANCH=none TEST=plug in CDP, SDP, DCP, type-C, and PD charger. Make sure we ramp to a reasonable value for the correct suppliers. Make sure we don't ramp for type-C and PD chargers. Signed-off-by: Ben Lok <ben.lok@mediatek.com> Change-Id: I9c6a0726e9cb23af59d5841c63a81897ae624998 Reviewed-on: https://chromium-review.googlesource.com/314436 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* driver: si114x: Unlock the device if stuckGwendal Grignou2015-12-012-1/+27
| | | | | | | | | | | | | | | | | | | It is possible for the ALS state machine and the chip to not agree: The EC thinks the device is busy making a measurement, while the chip is waiting for the IRQ status register to be written. It is not clear how it happened, an IRQ must have been lost. Reinitiliazed the chip is stuck for 10s. BRANCH=smaug BUG=chrome-os-partner:45627 TEST=With an extra patch that force the IRQ handler to not do anything every 100th, check the device recovers. Use andro sensor to monitor light/proximity outputs. Change-Id: I80d50bf92af127f85f82dc5c0ae318d4cfe06812 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/313668
* nuc: Add i2cscan and kbpress commands for FAFT.Mulin Chao2015-12-012-41/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add i2cscan and kbpress commands for FAFT. Remove unnecessary i2c reading since there is no race condition. Bugs fixed: Fixed i2c_read_string bug since we shouldn't enable NACK if flag doesn't contain I2C_XFER_STOP. Fixed i2c_unwedge bug since the parameter should be port not controller. Fixed state machine bug since we should restore bus state back to idle if bus encountered timeout. Modified drivers: 1. board.h: Add i2cscan and kbpress commands for FAFT. 2. i2c.c: Remove unnecessary reading since there is no race condition. 3. i2c.c: Fixed i2c_read_string and i2c_unwedge bugs. 4. i2c.c: Restore to idle state if bus encountered timeout. 5. board.h: Add CONFIG_LOW_POWER_IDLE for better power consumption. BUG=chrome-os-partner:34346 TEST=make buildall -j; test nuvoton IC specific drivers BRANCH=none Change-Id: I98974f852cbbaec270c697feb8016b52550005bc Signed-off-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/313393 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* motion: Set interrupt interval properly for sensor in force modeGwendal Grignou2015-12-011-6/+22
| | | | | | | | | | | | | | | | | | | | | | cl/301134 has a bug. If the AP wants a forced sensor (i.e. light) at 100Hz but a sampling frequency at 1s, we would still wake it up every .1s instead of 1s. Take in account force mode only when calculating the sampling frequency not the interrupt interval. BRANCH=smaug BUG=b:25425420 TEST=Check the device goes to suspend even with 40Hz light sampling rate: echo 0 > /sys/bus/iio/devices/iio:device0/frequency echo 40000 > /sys/bus/iio/devices/iio:device3/frequency echo mem >/sys/power/state Before it would resume just after suspend/while suspending. Change-Id: Ie4fe36268cb1b04bc8f01ec885af84fad9e8b282 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/314315 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* device: si114x: Address overflow conditionGwendal Grignou2015-12-012-1/+2
| | | | | | | | | | | | | | | | | If proximity overflow (daylight), we would still assume the data was valid and consider there is an object very very close. That would prevent the light to be measured. (cl/312982) Leave the value as max range for the HAL to handle. BRANCH=smaug BUG=b:25573958 TEST=Check in daylight that light is still measured Change-Id: I684e6f4a9aecd3fd6b338a9939f7ede26752ecb8 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/314921 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* Cr50: bootloader: display config bits at bootBill Richardson2015-12-011-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | We support two FPGA images with the same firmware. To meet timing, one image has support for USB but at the cost of reducing the crypto multiplier to 8x8. The other image has full crypto but no USB support. This change displays the FPGA configuration at boot, in addition to the FPGA image version. BUG=b:25350751 BRANCH=none TEST=make buildall, manual Boot it and watch the console. You should see something like this: cr50 bootloader, 20151118_73026@80895, +USB, 8x8 crypto Valid image found at 0x00044000, jumping Change-Id: I0e5de453fcd1714fcbb170bf4364747b1e7ba894 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/314824 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* motion: At shutdown, access sensors only if initialized.Gwendal Grignou2015-12-011-2/+9
| | | | | | | | | | | | | | | | When sensor_shutdown() is called, the sensors may already been powered off, or will be soon. In that case, do not attempts to access them. Check their state before setting range or disabling activities. BRANCH=smaug BUG=chromium:557966 TEST=compile Change-Id: I60640b120a23f9aab393a93c4c67ef17222ced4e Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/314382 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* lars_pd: preparing new PD firmware for one-typeC-port PDRyan Zhang2015-12-018-1/+712
| | | | | | | | | | | | | | | | | Since two port may cause some unexpected problem in a one port board. I've cloned this from glados_pd without any code changes and I'll remove the second port settings at another CL. BUG=None BRANCH=lars TEST=`make BOARD=lars_pd -j` Change-Id: I84b3d2fa705ff089aabd52ab71d9fb59eecdd027 Signed-off-by: Ryan Zhang <Ryan.Zhang@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/314637 Reviewed-by: Shawn N <shawnn@chromium.org>
* fusb302: Don't flush RX FIFO on GoodCRCShawn Nematbakhsh2015-12-011-4/+7
| | | | | | | | | | | | | | | | | | Depending on timing, additional important messages may reside on our RX FIFO at the time we process GoodCRC. Therefore, rather than flushing the RX FIFO, simply read and discard the GoodCRC message. BUG=chrome-os-partner:314492 BRANCH=None TEST=Manual on Snoball with subsequent PWM changes. Verify PD contact can be established with samus. Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I4f4fab1bc318d1bce1effffad9a792c5b4a43761 Reviewed-on: https://chromium-review.googlesource.com/314871 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org>
* pd: send power change event to AP whenever input power is changedBen Lok2015-12-015-0/+26
| | | | | | | | | | | | | | | Send power change event to AP whenever input power is changed, ensure that AP gets the latest power charging info. BUG=chrome-os-partner:47677 BRANCH=none TEST=tested on Oak by plug/unplug AC adapter to type-C ports and verifying the UI battery icon shows the correct status instantly. Change-Id: I7465afcd8bc9b1c56ecf70fc74446866a8ab1b9a Signed-off-by: Ben Lok <ben.lok@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/313926 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* mec1322_evb: Remove boardShawn Nematbakhsh2015-11-307-200/+0
| | | | | | | | | | | | | | | This board is no longer in use. BUG=None TEST=`make buildall -j` BRANCH=None Change-Id: Ie0d03e0a817ba101c01909f95955d51f8dfae03c Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/314920 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* mec1322: i2c: Assume read-no-write transactions are repeated startShawn Nematbakhsh2015-11-301-16/+7
| | | | | | | | | | | | | | | | | If we're doing a read transaction without a write and asked to send a start condition, assume that the slave has already been addressed and make a repeated start. BUG=chromium:561143 TEST=Verify "ectool i2cxfer 1 0x25 1 2" succeeds on glados BRANCH=None Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: Ic60a5c0f0fa32d5541b3cc6dce48cac28f26cd06 Reviewed-on: https://chromium-review.googlesource.com/314313 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org>
* mec1322: i2c: Add hard-timeout for status waitShawn Nematbakhsh2015-11-301-15/+19
| | | | | | | | | | | | | | | | | Add a hard timeout to wait_for_interrupt() so that we won't wait forever, even if we get into a state where interrupts fire yet our status is not as expected. BUG=chromium:561143 TEST=Verify "ectool i2cxfer 1 0x25 1 2" doesn't watchdog on glados BRANCH=None Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I39773370bb7e45a8f0c0cdb4a463904643f72587 Reviewed-on: https://chromium-review.googlesource.com/314253 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org>
* Lars: update for proto boardRyan Zhang2015-11-303-12/+8
| | | | | | | | | | | | | | Following kunimitsu settings of https://chromium-review.googlesource.com/#/c/312559/ BUG=None BRANCH=lars TEST=`make BOARD=lars -j` Change-Id: If226f5b8a46cfb8ffb19015a0a7cc684d1b61175 Signed-off-by: Ryan Zhang <Ryan.Zhang@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/314643 Reviewed-by: Shawn N <shawnn@chromium.org>
* Lars: update I2C port MACRORyan Zhang2015-11-301-1/+0
| | | | | | | | | | | | | Since Lars has only one usb charge port BUG=None BRANCH=lars TEST=`make BOARD=lars -j` Change-Id: If164dfd90e3536a2e6a3097c8a7f7add408c8da9 Signed-off-by: Ryan Zhang <Ryan.Zhang@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/314638 Reviewed-by: Shawn N <shawnn@chromium.org>
* task: Don't discard events on mutex contentionShawn Nematbakhsh2015-11-302-7/+3
| | | | | | | | | | | | | | | | | On mutex contention, call task_wait_event_mask(), which will wait for a mutex event without clearing other pending events. BUG=chrome-os-partner:47918,chromium:435611,chromium:435612 BRANCH=None TEST=Manual on snoball. Verify samus can successfully negotiate PD power contract when attached to snoball. Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I85cd32f2670246da9e4787025390aba2c93f9c36 Reviewed-on: https://chromium-review.googlesource.com/314492 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org>
* kunimitsu: Modify battery LED colourMike M Hsieh2015-11-301-12/+4
| | | | | | | | | | | | | | | Use one gpio instead of two to show amber colour to indicate charging state BUG=none BRANCH=none TEST=checked and verified LED colour while charging Signed-off-by: Mike Hsieh <mike.m.hsieh@intel.com> Change-Id: Id3897eea4213efeea96c3e261f9f43e1b96e8dd0 Reviewed-on: https://chromium-review.googlesource.com/304700 Commit-Ready: Mike M Hsieh <mike.m.hsieh@intel.com> Tested-by: Mike M Hsieh <mike.m.hsieh@intel.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* Chell: support LED behaviorBruce2015-11-291-68/+50
| | | | | | | | | | | | | | | Add firmware to support LED behavior for following OEM spec. BUG=None BRANCH=None TEST=check led behavior follow the spec Change-Id: Ib4250a47a153fbe7de0e1cd4a5869fd3efbcfd1d Signed-off-by: Bruce.Wan <Bruce.Wan@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/313898 Commit-Ready: Bruce Wan <Bruce.Wan@quantatw.com> Tested-by: Bruce Wan <Bruce.Wan@quantatw.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* Lars: update type-C switch port countRyan Zhang2015-11-272-5/+1
| | | | | | | | | | | BUG=None BRANCH=lars TEST=`make BOARD=lars -j` Change-Id: Ieb3bd091096cb70b8b58e539992c4b17fcbfb20d Signed-off-by: Ryan Zhang <Ryan.Zhang@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/313949 Reviewed-by: Shawn N <shawnn@chromium.org>
* Lars: update i2c.mux speedRyan Zhang2015-11-271-1/+1
| | | | | | | | | | | BUG=None BRANCH=lars TEST=`make BOARD=lars -j` Change-Id: I8e9c581891cfae6b21f94f536f043adc8eb2b4a3 Signed-off-by: Ryan Zhang <Ryan.Zhang@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/314546 Reviewed-by: Shawn N <shawnn@chromium.org>
* kunimitsu: remove fab 3 related changesKevin K Wong2015-11-261-12/+1
| | | | | | | | | | | BUG=chrome-os-partner:44704 BRANCH=none TEST=verified image can boot on kunimitsu fab 4 Change-Id: If5f48bdd5dee5998fec2c079ee46f34cb604fd38 Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com> Reviewed-on: https://chromium-review.googlesource.com/314126 Reviewed-by: Shawn N <shawnn@chromium.org>
* ec3po: Add compatibility for older EC images.Aseda Aboagye2015-11-265-317/+900
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The EC-3PO console and interpreter could be used to talk to EC images which do not have the necessary changes to support the new enhancements. If this was the case, the interpreter would be very confused and the user wouldn't be able to use the console. This commit adds compatibility support for talking to both non-enhanced and enhanced EC images. When the console and interpreter are instantiated, they assume by default that the EC image they are talking to is non-enhanced. When the user presses the carriage return key, the console initiates an interrogation with the EC image. The interrogation is a simple EC_SYN(0xEC) and waits EC_INTERROGATION_TIMEOUT for the correct EC_ACK(0xC0). Enhanced EC images will try to reply immediately to a EC_SYN. Non-enhanced EC images will just ignore the EC_SYN as it's not a printable character. Once the interrogation is complete, the console will either simply pass everything forwards to the EC or provide the console interface itself. BUG=chrome-os-partner:46063 BRANCH=None TEST=Enabled CONFIG_EXPERIMENTAL_CONSOLE on GLaDOS. Entered some commands and verified console was working. Disabled CONFIG_EXPERIMENTAL_CONSOLE on GLaDOS, reflashed, and verified console was still working without restarting the EC-3PO console. TEST=./util/ec3po/console_unittest.py -b TEST=./util/ec3po/interpreter_unittest.py -b TEST=cros lint --debug util/ec3po/console.py TEST=cros lint --debug util/ec3po/console_unittest.py TEST=cros lint --debug util/ec3po/interpreter.py TEST=cros lint --debug util/ec3po/interpreter_unittest.py Change-Id: I4f472afbdd7e898bee308c239b68ace0f4049842 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/313002 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Lars: update GPIO settingRyan Zhang2015-11-251-39/+39
| | | | | | | | | | | | | | Expected PIN macros to expand in Decimal instead of Octal. BUG=None BRANCH=lars TEST=`make BOARD=lars -j` Signed-off-by: Ryan Zhang <Ryan.Zhang@quantatw.com> Change-Id: I1c469a6031a6b2c64db75c362d1915b7a390f81e Reviewed-on: https://chromium-review.googlesource.com/314411 Commit-Ready: 志偉 黃 <David.Huang@quantatw.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* oak: add VCONN swap abilityBen Lok2015-11-252-0/+10
| | | | | | | | | | | | | | refer to commit 776bedc3, enable VCONN swap option for oak. BUG=chrome-os-partner:41838 BRANCH=none TEST=test on oak. ask for vconn swap and make sure vconn swap is successful. Change-Id: I2afa68e073d088302c2c6ba2315a6c9f4551ef87 Signed-off-by: Ben Lok <ben.lok@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/313913 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* ectool: provide lid angle infoKevin K Wong2015-11-254-4/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | Added new host command to support returning lid angle. New output from ectool: System with lid angle support: ------------------------------------------ localhost ~ # ectool motionsense lid_angle Lid angle: 72 System without lid angle support: ------------------------------------------ localhost ~ # ectool motionsense lid_angle EC result 3 (INVALID_PARAM) BUG=none BRANCH=none TEST=run "ectool motionsense lid_angle" verify the value matches the physical lid angle position Change-Id: I4179172c778f643640561e819216f7adfee679d2 Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com> Reviewed-on: https://chromium-review.googlesource.com/313345 Reviewed-by: Shawn N <shawnn@chromium.org>
* pd: Add support for multiple distinct TCPC alert signalsShawn Nematbakhsh2015-11-255-11/+53
| | | | | | | | | | | | | | | | | | | | | If multiple TCPCs are present on a system then we may have multiple alert signals, each of which alerts us to the status of a different TCPC. Make boards with external non cros-ec TCPCs define tcpc_get_alert_status, which returns alert status based upon any alert GPIOs present, and then service only ports which are alerting. BUG=chromium:551683,chrome-os-partner:47851 TEST=Verify snoball PDCMD task sleeps appropriately when no devices are inserted, and verify ports go to PD_DISCOVERY state when we attach samus. Also verify that glados / glados_pd can still negotiate PD. BRANCH=None Change-Id: Iae6c4e1ef4d6685cb5bf7feef713505925a07c8c Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/313209 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org>
* cr50: fix _cpri__DrbgGetPutState and _cpri__EccCommitCompute stubsVadim Bendebury2015-11-251-4/+15
| | | | | | | | | | | | | | | These functions are mostly no-ops it turns out, maybe something will be needed to be done for RSA and ECC initialization, for now leaving those functions commented out as a reminder. BRANCH=none BUG=chrome-os-partner:43025 TEST=tests passing before this change still pass. Change-Id: Iee9aaf133a55a6197c9896ed48efb34a4b3340c6 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/314096 Reviewed-by: Nagendra Modadugu <ngm@google.com>
* cr50: increase tpm task sizeVadim Bendebury2015-11-251-1/+1
| | | | | | | | | | | | | | | | Let's increase it to 4K, this seems to be adequate for tests so far, but with the enabled stack size monitoring we should find out quickly if in certain cases this is not enough. BRANCH=none BUG=chrome-os-partner:43025 TEST=the test involving the use of SHA hardware does not fail in mysterious ways any more. Change-Id: I86da89ccca42d1a60ce7c1dfef08d21bf44f1eee Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/314095 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* cr50: enable stack overflow monitoringVadim Bendebury2015-11-251-0/+6
| | | | | | | | | | | | | | The main cr50 application is pretty stack use intensive, let's enable stack overflow monitoring while project is in development. BRANCH=none BUG=chrome-os-partner:43025 TEST=none Change-Id: Iac9404b585664b891b63e9df058cdeb2654fc323 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/314094 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* cr50: SHA1 and SHA256 implementation with hardware supportnagendra modadugu2015-11-2518-206/+597
| | | | | | | | | | | | | | | | | | | | | | | This change includes hardware and software support for SHA1/256 on CR50. When running in the RO image, only hardware sha256 support is included. When running in the RW image, the code auto-selects between the software and hardware implementation. Software implementation path is taken if the hardware is currently in use by some other context. Refactor the CR50 loader to use this abstraction. The existing software implementation for SHA1 and SHA256 is used for the software path. CQ-DEPEND=CL:*239385 BRANCH=none TEST=EC shell boots fine (implies that SHA256 works) BUG=chrome-os-partner:43025 Change-Id: I7bcefc12fcef869dac2e48793bd0cb5ce8e80d5b Signed-off-by: nagendra modadugu <ngm@google.com> Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/313011
* flash_ec: Don't stop servod or init when claiming EC UARTTom Wai-Hong Tam2015-11-241-5/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When flashing the STM32 chip, the flash_ec script stops the processes which occupy the EC UART in order to avoid their interference. After flashing, it asks these process to continue. However, when running FAFT in the lab, the EC UART may be occupied by servod for sending some EC commands per test requirements. The flash_ec should not stop the servod; otherwise, all the following dut-control commands will be failed. So this change blacklists the process servod and init. BRANCH=none BUG=chromium:552073 TEST=Manual Ran a FAFT test, e.g. firmware_FAFTSetup, which occupies EC UART. Ran another process, e.g. minicom, which also occupies EC UART. Ran the flash_ec: flash_ec --chip stm32 --image /tmp/ec.bin Its output: INFO: Using ec image : /tmp/ec.bin INFO: ec UART pty : /dev/ttyO1 INFO: Flashing chip stm32. INFO: Using serial flasher : /usr/bin/stm32mon INFO: Sending SIGSTOP to process 2369! INFO: Sending SIGSTOP to process 7949! INFO: Skip stopping servod or init: process 1. INFO: Skip stopping servod or init: process 639. ... INFO: Restoring servo settings... INFO: Sending SIGCONT to process 2369! INFO: Sending SIGCONT to process 7949! Change-Id: I4d72b7e2caf0ca2963bb9dee51764869e829c569 Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/313581 Commit-Ready: Wai-Hong Tam <waihong@chromium.org> Tested-by: Wai-Hong Tam <waihong@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* kunimitsu: update accelerometer standard reference matrixVijay Hiremath2015-11-241-4/+4
| | | | | | | | | | | | | | | This is based on kunimitsu fab 4 close chassis system. BUG=none BRANCH=none TEST=Using the "accelinfo" console command verified the lid angle by rotating the lid & base. Change-Id: Ia0491b52fda74b066120f3e2173b73fd1282c9cb Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com> Reviewed-on: https://chromium-review.googlesource.com/306185 Reviewed-by: Shawn N <shawnn@chromium.org>
* chell: Apply USB EQ settings to PS8740 USB muxDuncan Laurie2015-11-241-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | Apply the recommended USB EQ settings for Tx and Rx channel loss compensation to the PS8740 USB mux chip. This is called after the driver is initialized and sets up the chip for the first time. BUG=chrome-os-partner:47074 BRANCH=none TEST=build and boot on chell, read back registers to verify > i2cxfer r 1 0x34 0x32 0x60 [96] > i2cxfer r 1 0x34 0x3b 0x60 [96] > i2cxfer r 1 0x20 0x32 0x60 [96] > i2cxfer r 1 0x20 0x3b 0x60 [96] Change-Id: I95334be9eed2858864787500a7483fa043947148 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/313748 Reviewed-by: Shawn N <shawnn@chromium.org>
* ps8740: Add a function to tune USB EQ settingsDuncan Laurie2015-11-242-0/+43
| | | | | | | | | | | | | | | This adds a new function that can be use to apply USB EQ settings to the mux. It currently only exposes the Tx and Rx channel loss compensation. BUG=chrome-os-partner:47074 BRANCH=none TEST=build and boot on chell Change-Id: I1ec83cdcbb17da8e7289e6633509b64f01b14348 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/313747 Reviewed-by: Shawn N <shawnn@chromium.org>
* usb_mux: Add a callback for board specific initDuncan Laurie2015-11-242-0/+13
| | | | | | | | | | | | | | | This adds a callback for board specific initialization that is called after the driver init function. This will allow a board to apply port-specific tuning (such as USB EQ settings) to the mux chip. BUG=chrome-os-partner:47074 BRANCH=none TEST=build and boot on chell Change-Id: Ib162f9a2c5239678c46b80e5517823b336f6b66c Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/313746 Reviewed-by: Shawn N <shawnn@chromium.org>
* chell: Update for EVT buildDuncan Laurie2015-11-232-6/+13
| | | | | | | | | | | | | | - Disable SLP_S0 as interrupt source for proto boards - Remove pull-up on PLATFORM_EC_PROCHOT for EVT boards BUG=chrome-os-partner:47346 BRANCH=none TEST=build and boot on chell proto Change-Id: I3196e9fe1c921d66fd841c6ca1c3d8df131db9eb Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/313663 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* cr50: dcrypto code belongs with the chip, not with the boardVadim Bendebury2015-11-235-4/+3
| | | | | | | | | | | | | | | | | | Dcrypto support is a hardware property, it belongs with the chip sub-tree, not with the board. This patch just moves the files and modifies the makefiles to pick up the files at the right spot. BRANCH=none BUG=chrome-os-partner:43025 TEST=the image still builds, the devices still boots, the test/tmp_test/tpmtest.py still succeeds. Change-Id: Ie321ac738c11a9f403a7943524c56ec4366db297 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/313655 Reviewed-by: Nagendra Modadugu <ngm@google.com>
* cr50: move key ladder initialization into its own filesVadim Bendebury2015-11-236-39/+63
| | | | | | | | | | | | | | This is required to be able to consolidate hardware and software hash implementations. BRANCH=none BUG=chrome-os-partner:43025 TEST=the device still boots up. Change-Id: If420541427bb316b97bc20a21fd3fd8a57708244 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/313654 Reviewed-by: Nagendra Modadugu <ngm@google.com>
* snoball: Enable secondary bias regulatorShawn Nematbakhsh2015-11-231-1/+1
| | | | | | | | | | | | | | | | | This regulator must be enabled in order to power snoball through the VBUS path. BUG=chrome-os-partner:47851 BRANCH=None TEST=Boot snoball with 12V supply on VBUS, verify that EC is stable and not resetting constantly. Change-Id: Id1b79b69f641e0c80160b161fe177aeb9c3de733 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/313811 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org>
* cr50: fix assert_func stub prototypeVadim Bendebury2015-11-211-4/+22
| | | | | | | | | | | | | | | | __assert_func() is modified to match prototype defined in the global include file. TPM2 library handling of asserts will have to be modified later. BRANCH=none BUG=chrome-os-partner:43025, chromium:559344 TEST=assert message now include valid pertinent information about the point of failure. Change-Id: I8050c018c36d5d98b879daa2b600fc7c76ef9126 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/312868 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
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