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* lantis: Update DB FW_CONFIGTommy Chung2020-12-031-4/+14
| | | | | | | | | | | | | | | Note that this CL update DB FW_CONFIG according to crrev.com/c/2548269 since lantis's EC image was initialed with drawcia's EC image. BUG=b:171742626 BRANCH=dedede TEST=Load on lantis and confirm correct number of PD ports up. Signed-off-by: Tommy Chung <tommy.chung@quanta.corp-partner.google.com> Change-Id: I373fd0bd6bcd31e6355734a354d9be1ce9fe3aa9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2562917 Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Devin Lu <Devin.Lu@quantatw.com>
* ADLRVP: Enable PWM FanPoornima Tom2020-12-031-0/+7
| | | | | | | | | | | | | | BRANCH=None BUG=b:169551130 TEST=PWM fan is able to run Signed-off-by: Poornima Tom <poornima.tom@intel.com> Change-Id: Ie042402803e5cd18780951b2efe89eae033126aa Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2563422 Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Sooraj Govindan <sooraj.govindan@intel.com> Reviewed-by: Keith Short <keithshort@chromium.org> Tested-by: Sooraj Govindan <sooraj.govindan@intel.com>
* ADLRVP: Remove PP5000 rail configPoornima Tom2020-12-031-1/+0
| | | | | | | | | | | | | | | | | Both 3.3A & 5VA rail come up or go down together by EC_DS4 signal hence removed PP5000 rail config. BRANCH=None BUG=b:169551130 TEST=make build all; Tested on ADLRVP Signed-off-by: Poornima Tom <poornima.tom@intel.com> Change-Id: I7c3a66b53ada616071998d111bf822a5b7fbcc81 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2563425 Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Sooraj Govindan <sooraj.govindan@intel.com> Reviewed-by: Keith Short <keithshort@chromium.org> Tested-by: Sooraj Govindan <sooraj.govindan@intel.com>
* asurada: cache board id on initTing Shen2020-12-031-12/+15
| | | | | | | | | | | | | | | | | | | | | | | The line board_get_version() inside board_hibernate_late() fails if it is the first board_get_version() call, because ADC (or some function related to it) is not usable at that time. To fix this, cache board id to ensure board_hibernate_late() never need to access ADC. Also replace #include <...> to #include "..." for consistency. BUG=b:163963220 TEST=hibernate successful in G3 BRANCH=none Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: I0c277cccd081906d6f87793e8e4f1980a4e55c3a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2567458 Tested-by: Ting Shen <phoenixshen@chromium.org> Auto-Submit: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Eric Yilun Lin <yllin@chromium.org> Commit-Queue: Eric Yilun Lin <yllin@chromium.org>
* boldar: configure fan speedSooraj Govindan2020-12-031-23/+6
| | | | | | | | | | | | BUG=b:162202257 BRANCH=none TEST=make BOARD=boldar Signed-off-by: Sooraj Govindan <sooraj.govindan@intel.com> Change-Id: I675b460c3425d122a9245c753ca64a38258112f2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2567200 Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Keith Short <keithshort@chromium.org>
* shuboz: Implement LED functionJacky Wang2020-12-035-48/+45
| | | | | | | | | | | | | | Update LED behavior by Marketing spec. BUG=b:173341052 BRANCH=none TEST=make BOARD=shuboz Signed-off-by: Jacky Wang <jacky5_wang@pegatron.corp-partner.google.com> Change-Id: I0e4346d6d83204a20836b3fc94a951309e97b06f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2561908 Reviewed-by: Michael5 Chen <michael5_chen1@pegatron.corp-partner.google.com> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* volteer: Enable CONFIG_DEBUG_ASSERT_BRIEFKeith Short2020-12-031-0/+1
| | | | | | | | | | | | | | | | | Enable CONFIG_DEBUG_ASSERT_BRIEF to reduce image size. This saves 2368 bytes in RO and 2392 bytes in RW. Current free space: 2592 RO, 2608 RW BUG=none BRANCH=firmware-volteer-13521.B-master TEST=make buildall Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: If71acd83ad26a07e7277aadffaeedf4724364f4c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2569851 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
* Dedede: Bail out of hibernate if z-state failsDiana Z2020-12-021-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | If we fail to enter z-state, this likely indicates that the z-state circuitry is in a state from which wake sources will not work. This would mean the EC would hibernate until a refresh+power sequence is run. Instead, choose to reset the system with the AP off. The battery will drain more quickly, but will be able to turn on when the power button is pressed normally. BRANCH=dedede BUG=b:166476907 TEST=on drawcia, remove C1 interrupt line sharing and wedge line low. Ensure "hibernate" run on the EC console from both S0 and G3 results in a reset with the AP off, and the system can be turned on with a power button press. Run with normal C1 interrupt line sharing in place and verify "hibernate" enters z-state as expected in S0 and G3. Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I8408522dd1b0bbbce6f4e2bf6d0c550febd27bbf Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2567582 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* board/hayato: tune cc parameters for eye diagramRuibin Chang2020-12-022-0/+18
| | | | | | | | | | | | | | | After we tune cc parameters, we can improve eye diagram. BUG=b:171279731 BRANCH=none TEST=on hayato, test eye diagram pass Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw> Change-Id: I39a7317b0f78ee0de8f00b6e39ef514ac10bd631 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2537529 Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org> Tested-by: Jett Rink <jettrink@chromium.org>
* sc7180: Increase delays between enabling switchcap and enabling PMICWai-Hong Tam2020-12-021-5/+5
| | | | | | | | | | | | | | | | According to some experiments, the current delays are not enough on some boards. Add larger margin to the value. Also do the same on the power-off sequence delay. BRANCH=Trogdor BUG=b:163613549 TEST=Made DUT transit to DEV mode and the next auto-boot worked fine. Change-Id: Ia72c725fe1e8ff795e637e1b4b99b097478bcc1a Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2565635 Commit-Queue: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org>
* Delbin: Add delbin_npcx796fc to support npcx796fcZhuohao Lee2020-12-023-0/+9
| | | | | | | | | | | | | | BUG=b:174106425 BRANCH=firmware-volteer-13521.B TEST=make BOARD=delbin make BOARD=delbin_npcx796fc Change-Id: I516994793db07f544ac64065aa05e7adacf6a39d Signed-off-by: Zhuohao Lee <zhuohao@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2567067 Reviewed-by: YH Lin <yueherngl@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* Revert "delbin_npcx796fc: Initial EC image"Zhuohao Lee2020-12-028-1185/+0
| | | | | | | | | | | | | | This reverts commit 09a411770806345f9e0965ad011113394648ec83. BUG=b:174106425 BRANCH=firmware-volteer-13521.B TEST=make buildall Change-Id: Icc898a720cbdb79d4c08fca7d2da42d4dc96786d Signed-off-by: Zhuohao Lee <zhuohao@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2567066 Commit-Queue: Keith Short <keithshort@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* genvif: comment cleanup and UFP field output only if can_act_as_deviceDenis Brockus2020-12-021-10/+17
| | | | | | | | | | | | | | | | bumped version to 3.0.0.8 BUG=b:172293518 BRANCH=none TEST=verify XML output Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: Ide80ee0ca00e2d50ff5a869f02b59511da5a693e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2567172 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org> Tested-by: Denis Brockus <dbrockus@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org>
* genvif: add more Component SOP_Discovery fieldsDenis Brockus2020-12-023-9/+50
| | | | | | | | | | | | | | BUG=b:172293518 BRANCH=none TEST=verify XML output Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: I6deeecc36505eb4f7261d04eae2c9ff419fa0296 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2567171 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org> Tested-by: Denis Brockus <dbrockus@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org>
* stm32: low power configuration for STM32F4Vincent Palatin2020-12-021-2/+17
| | | | | | | | | | | | | | | | | | | | | | | | As most of the peripherals were not implemented to support switching to 16-MHz HSI (e.g. high speed serial port requires a clock input > 24 Mhz), implement a simpler clock scheme than the dynamic between HSI and PLL used other platforms: - the PLL is disabled only when entering the low-power idle and the PLL locking time is added to wake-up time. - when the host is running (not suspended) we stay in a high power mode (~20mW). Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=b:130561737 TEST=manual, on bloonchipper, check we can still capture fingerprint. read the MCU power consumption: pp3300_dx_mcu_mw is 2.367 mW. BRANCH=fpmcu-bloonchipper Change-Id: Ic1fe015b2501bdea9779a2f63fab296f8812c315 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2555162 Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* stm32: add STOP mode on STM32F4Vincent Palatin2020-12-021-2/+117
| | | | | | | | | | | | | | | | | Implement a low power idle mode using the STM32F4 STOP mode. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=b:130561737 TEST=manual, on bloonchipper, check we can still capture fingerprint. read the MCU power consumption. BRANCH=fpmcu-bloonchipper Change-Id: I11249e9b68c989033263e34e1cde3f19ffe7c54c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2537631 Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* stm32: fix RTC rounding error breaking alarmsVincent Palatin2020-12-021-3/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On STM32F4, when converting micro-seconds to the RTC sub-second counter value, the current computation in the us_to_rtcss() routine has a large rounding error which can even led to generate a negative value. When such a negative value is output and then programmed in the (unsigned) RTC_ALRMASSR register used to set the alarm precise sub-second timestamp, it might put a wrong value in the past. As a consequence when the RTC alarm is used a wake-up mechanism for the low power idle, it might never fired and trigger a watchdog reboot. An example of bad values on a STM32F412 with the RTC driven by the 32-kHz LSI: - RTC_PREDIV_A = 1 - RTC_FREQ = (STM32F4_LSI_CLOCK / (RTC_PREDIV_A + 1) = 16000 /* Hz */ - RTC_PREDIV_S = (RTC_FREQ - 1) = 15999 - US_PER_RTC_TICK = 1000000 / RTC_FREQ = 62 /* rounded from 62.5 */ When converting 996000 us, us_to_rtcss(996000) = RTC_PREDIV_S - (us / US_PER_RTC_TICK) = 15999 - (996000 / 62) = -65 returned as a uint32_t as 0xfffffffb. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=b:130561737 TEST=manual, with the STOP mode enabled, we no longer see watchdog reboot due to the RTC alarm being set in the past and never firing. TEST=manual, verify that the output of the 'gettime' console command is not drifting compared to the wall clock when the low power idle using the RTC time is used. BRANCH=fpmcu-bloonchipper Change-Id: I53869539828bed9a5900d29407b5feba140b8217 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2563684 Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* stm32: add dynamic clocking for STM32F4Vincent Palatin2020-12-022-92/+239
| | | | | | | | | | | | | | | | | | | | | | | | | | | Allow to transition between the PLL to run at full speed and the bare HSI (internal RC oscillator at 16Mhz) to save power. On HSI, as our sysclk frequency is low, we run all peripheral clocks undivided at the same frequency. Keep the configuration for other platforms running from the HSE (external crystal) Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=b:130561737 TEST=manual, verify the timers are working by checking the output of the 'gettime' console command against the wall clock. TEST=manual, verify the UART console works as expected. TEST=measure MCU power on bloonchipper in various modes through the INA: PLL 19.20 mW HSI 4.73 mW STOP 2.10 mW BRANCH=fpmcu-bloonchipper Change-Id: I1185e04c9a7819fec05dd643b7026116b146f3b8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2527049 Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* stm32: update the timer pre-scaler on STM32F4Vincent Palatin2020-12-021-2/+3
| | | | | | | | | | | | | | | | | | | | | Add support for changing for the timer source clock frequency on STM32F4 by re-computing the timer pre-scaler value in the HOOK_FREQ_CHANGE callback. Preparatory work to implement power management switching between PLL and HSI as sysclk. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=b:130561737 TEST=manual, verify the output of the 'gettime' console command against the wall clock. BRANCH=fpmcu-bloonchipper Change-Id: Ia7dc24d3b1dbff816b1cebbc87492e678b987dfd Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2527048 Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* lillipup: fix usb type-a bc1.2 chargingjerry2.huang2020-12-023-0/+10
| | | | | | | | | | | | | fix usb type-a bc1.2 charging BUG=b:173093980 BRANCH=firmware-volteer-13521.B TEST=make buildall, test usb type-a charging and usb function work normally Signed-off-by: jerry2.huang <jerry2.huang@lcfc.corp-partner.google.com> Change-Id: I60aadcac58ccbfe86d7005db506788a13d6fe4c9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2557759 Reviewed-by: Keith Short <keithshort@chromium.org>
* lillipup: fix c1 charging and usb functionamber.chen2020-12-022-54/+49
| | | | | | | | | | | | | | | 1.fix c1 charging and usb function 2.remove USB4 and cleaning up the TCPC,PPC,and USB mux configuration BUG=b:173093980 BRANCH=firmware-volteer-13521.B TEST=make buildall, test c1 charging and usb function work normally Signed-off-by: amber.chen <amber.chen@lcfc.corp-partner.google.com> Change-Id: Ic49d6dfee0e977885e5098dd9d71b89cf19410f8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2549000 Tested-by: jerry2.huang <jerry2.huang@lcfc.corp-partner.google.com> Reviewed-by: Keith Short <keithshort@chromium.org>
* zephyr: shim in common/chipset.cJack Rosenthal2020-12-021-0/+2
| | | | | | | | | | | | | | This gives us the "apreset" and "apshutdown" console commands. BUG=b:171312361 BRANCH=none TEST=try "apreset" and "apshutdown" commands on volteer Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: Ib71afa66cfb5d0044c4cf98839b263ee2e2da338 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2567343 Commit-Queue: Yuval Peress <peress@chromium.org> Reviewed-by: Yuval Peress <peress@chromium.org>
* lantis: Remove C1 current limitationTommy Chung2020-12-021-3/+0
| | | | | | | | | | | | | | | | Since the thermal concern has already been solved, we don't have to limit C1 charging current to 2A in lantis. BUG=b:161942987 BRANCH=dedede TEST=In lantis, make sure that C1 charging current is not limited to 2A. Signed-off-by: Tommy Chung <tommy.chung@quanta.corp-partner.google.com> Change-Id: I9c3e13b2e1fa2acaeb9dfae17f8ed1639550689b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2557283 Reviewed-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* tcpm/it8xxx2: add cc parameter tuning functionRuibin Chang2020-12-023-0/+35
| | | | | | | | | | | | | | | | | | | | | Add function for board hayato to tune cc pre-driving parameters, so that we can improve eye diagram. BUG=b:171279731 BRANCH=none TEST=on hayato, console check registers 0x3773 = 0x1, 0x3774 = 0x2, 0x3873 = 0x1, 0x3874 = 0x2, values are same as setting. Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw> Change-Id: I8829f1fb4672bc98287e9526458f71026e19ca16 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2537528 Tested-by: Ruibin Chang <Ruibin.Chang@ite.com.tw> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Ruibin Chang <Ruibin.Chang@ite.com.tw>
* copano: Initial EC imageJacky Wang2020-12-028-0/+1234
| | | | | | | | | | | | | | | | | | Create the initial EC image for the copano variant by copying the terrador reference board EC files into a new directory named for the variant. (Auto-Generated by create_initial_ec_image.sh version 1.3.0). BUG=b:174413884 BRANCH=None TEST=make BOARD=copano Signed-off-by: Jacky Wang <jacky5_wang@pegatron.corp-partner.google.com> Change-Id: I463b3087d1a66ccf0325bc8ac369349fbb9ac307 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2565218 Reviewed-by: Michael5 Chen <michael5_chen1@pegatron.corp-partner.google.com> Reviewed-by: Keith Short <keithshort@chromium.org>
* coachz: Remove unuse gpio settingsJennifer2020-12-021-4/+2
| | | | | | | | | | | | | | | | | | | When run the FAFT firmware_ECUsbPorts, getting the fail result. The program can detect pin EN_USB_A_5V using the config file strongbad.json. But coachz board not support USB-A, therefore we modify the gpio to unused signals. BUG=b:168868418 BRANCH=none TEST=make BOARD=coachz Signed-off-by: Jennifer Wang <jenniferchwang@ami.corp-partner.google.com> Change-Id: I017615c0afb8fba4e48d87201096ad1de38d3e9f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2563355 Reviewed-by: Bob Moragues <moragues@chromium.org> Reviewed-by: Wai-Hong Tam <waihong@google.com> Commit-Queue: Bob Moragues <moragues@chromium.org> Tested-by: Bob Moragues <moragues@chromium.org>
* zephyr: un-break our build from COIL renamesJack Rosenthal2020-12-011-1/+1
| | | | | | | | | | | | | | | CL:2558905 broke our build as it renamed this file. Update the name here too. BUG=b:174572350 BRANCH=none TEST=build for volteer Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I96c0922a988df05b8935b169781b809bd4425b7d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2567586 Commit-Queue: Diana Z <dzigterman@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* zephyr: fix espi shimYuval Peress2020-12-011-2/+2
| | | | | | | | | | | | | | | We were casting the int to a pointer. Needed '&'. BRANCH=none BUG=none TEST=zmake testall (but it still fails on missing cros_kb_raw.h Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: I9d61fb27826c581214d5557364a97e6ea9d215e8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2567583 Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
* servo_v4p1/usb_pd_policy: Reject SNK->SRC power swap if CC_ALLOW_SRC not setPatryk Duda2020-12-011-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Apply changes in CL:2566813 to ServoV4P1 too. Original message below. When ServoV4 acts as sink ('cc snk' issued), and we issue 'cc pdsnk' there are following state transitions (starting from C1 SNK_READY): C1 st8 SNK_READY <--- From this point DUT acts as source DUT's PE is in PE_SRC_Ready state C1 RECV 196f/1 [0]ff008001 C1 RECV 0b67/0 <--- DUT asks for source capabilities C1 srcCAP>1 <--- ServoV4 sends its capabilities C1 RECV 0d6a/0 <--- DUT requests power swap C1 CTRL[3]>1 <--- ServoV4 accepts C1 st10 SNK_SWAP_SNK_DISABLE C1 st11 SNK_SWAP_SRC_DISABLE C1 RECV 0e66/0 <--- DUT sends PS_RDY to inform that it disabled power C1 st12 SNK_SWAP_STANDBY <--- ServoV4 enables power supply and waits PD_POWER_SUPPLY_TURN_ON_DELAY to ensure that it is turned on, before switching to SNK_SWAP_COMPLETE C1 st13 SNK_SWAP_COMPLETE <--- Power swap completed successfully C1 CTRL[6]>1 <--- ServoV4 sends PS_RDY to inform that power was enabled. C1 st18 SRC_DISCOVERY C1 srcCAP>1 <--- ServoV4 sends its capabilities C1 st19 SRC_NEGOCIATE C1 RECV 1062/1 [0]4304b12c Requested 15000 mV 3000 mA (for 3000/3000 mA) C1 CTRL[3]>1 <--- ServoV4 accepts C1 st20 SRC_ACCEPTED C1 st21 SRC_POWERED <--- Switching to requested voltage. This calls pd_transition_voltage() from servo_v4/usb_pd_policy which requests charger to change its voltage. [570.815776 Waiting for CHG port transition] <--- Here we are changing active task to PD_C0. This task changes dual role for C1 (DUT port), because CC_ALLOW_SRC is not set. Appropriate event is set too C0 Req [4] 15000mV 3000mA C0 REQ>1 C0 st6 SNK_REQUESTED [570.822679 CL: p0 s0 i500 v5000] C0 RECV 0763/0 C0 st7 SNK_TRANSITION C0 RECV 0966/0 C0 st8 SNK_READY <--- Charger voltage changed successfully [570.991969 CL: p0 s0 i3000 v15000] <--- Context switch to PD_C1 task [571.001981 CHG transitioned] <--- Check event and call update_dual_role_config() which changes state to SNK_DISCONNECTED C1 st2 SNK_DISCONNECTED Port 1 switches to SNK_DISCONNECTED state because PD_C0 task calls pd_send_request_msg() (reaction for voltage change request), which limits maximum current by calling charge_manager_force_ceil(). Charge manager calls board_set_charge_limit() to limit current, which calls update_ports() which calls board_manage_dut_port() unconditionally. This function checks if charge through is allowed. It turns out that it is not allowed, because CC_ALLOW_SRC bit is not set in cc_config (see is_charge_through_allowed()), then board_manage_dut_port() changes dual role of port 1 to force sink. Fix for this issue is simple. Function is_charge_through_allowed() actually tells us that we are not able to source power when 'cc snk' or 'cc pdsnk' was issued. So fix is just to reject power swap when our power role is sink, and CC_ALLOW_SRC is not set. BUG=b:162254118 BRANCH=none TEST=Issue 'cc snk' from ServoV4 console and wait until state gets stable. Issue 'cc pdsnk' from ServoV4 console and check if port 1 reaches SNK_READY state. Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: Iadf41bbb82d300bc05c1528a403267225a6907d4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2566991 Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org>
* usbc: Wake PD task on PE TX and RXEdward Hill2020-12-012-15/+18
| | | | | | | | | | | | | | Wake the PD task from pe_message_received(), pe_message_sent(), and pe_report_error() to avoid having to wait USBC_EVENT_TIMEOUT. BUG=none BRANCH=none TEST=make run-usb_pe_drp Signed-off-by: Edward Hill <ecgh@chromium.org> Change-Id: I2fd1465796224507e1eb64ea20572165918d5bf3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2564818 Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* test: Add test_send_caps_error_before_connected to usb_pe_drpEdward Hill2020-12-011-38/+120
| | | | | | | | | | | | | | | | Add a test for the other half of handling an error on sending source capabilities. Before connection, PE_SRC_Send_Capabilities goes to PE_SRC_Discovery on send error. Once connected, to goes to PE_Send_Soft_Reset. BUG=b:161835483 BRANCH=none TEST=make run-usb_pe_drp Signed-off-by: Edward Hill <ecgh@chromium.org> Change-Id: I92df9159286536bdda76e5b8530494c6aa368af1 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2553344 Reviewed-by: Diana Z <dzigterman@chromium.org>
* test: Improve test_send_caps_error in usb_pe_drpEdward Hill2020-12-015-136/+195
| | | | | | | | | | | | | Better mock tx and rx messages, add sop type. BUG=b:161835483 b:173791979 BRANCH=none TEST=make run-usb_pe_drp Signed-off-by: Edward Hill <ecgh@chromium.org> Change-Id: If1f91b6385d6841d662a8a6262af6382645da92e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2553343 Reviewed-by: Diana Z <dzigterman@chromium.org>
* servo_v4/usb_pd_policy: Reject SNK->SRC power swap if CC_ALLOW_SRC not setPatryk Duda2020-12-011-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When ServoV4 acts as sink ('cc snk' issued), and we issue 'cc pdsnk' there are following state transitions (starting from C1 SNK_READY): C1 st8 SNK_READY <--- From this point DUT acts as source DUT's PE is in PE_SRC_Ready state C1 RECV 196f/1 [0]ff008001 C1 RECV 0b67/0 <--- DUT asks for source capabilities C1 srcCAP>1 <--- ServoV4 sends its capabilities C1 RECV 0d6a/0 <--- DUT requests power swap C1 CTRL[3]>1 <--- ServoV4 accepts C1 st10 SNK_SWAP_SNK_DISABLE C1 st11 SNK_SWAP_SRC_DISABLE C1 RECV 0e66/0 <--- DUT sends PS_RDY to inform that it disabled power C1 st12 SNK_SWAP_STANDBY <--- ServoV4 enables power supply and waits PD_POWER_SUPPLY_TURN_ON_DELAY to ensure that it is turned on, before switching to SNK_SWAP_COMPLETE C1 st13 SNK_SWAP_COMPLETE <--- Power swap completed successfully C1 CTRL[6]>1 <--- ServoV4 sends PS_RDY to inform that power was enabled. C1 st18 SRC_DISCOVERY C1 srcCAP>1 <--- ServoV4 sends its capabilities C1 st19 SRC_NEGOCIATE C1 RECV 1062/1 [0]4304b12c Requested 15000 mV 3000 mA (for 3000/3000 mA) C1 CTRL[3]>1 <--- ServoV4 accepts C1 st20 SRC_ACCEPTED C1 st21 SRC_POWERED <--- Switching to requested voltage. This calls pd_transition_voltage() from servo_v4/usb_pd_policy which requests charger to change its voltage. [570.815776 Waiting for CHG port transition] <--- Here we are changing active task to PD_C0. This task changes dual role for C1 (DUT port), because CC_ALLOW_SRC is not set. Appropriate event is set too C0 Req [4] 15000mV 3000mA C0 REQ>1 C0 st6 SNK_REQUESTED [570.822679 CL: p0 s0 i500 v5000] C0 RECV 0763/0 C0 st7 SNK_TRANSITION C0 RECV 0966/0 C0 st8 SNK_READY <--- Charger voltage changed successfully [570.991969 CL: p0 s0 i3000 v15000] <--- Context switch to PD_C1 task [571.001981 CHG transitioned] <--- Check event and call update_dual_role_config() which changes state to SNK_DISCONNECTED C1 st2 SNK_DISCONNECTED Port 1 switches to SNK_DISCONNECTED state because PD_C0 task calls pd_send_request_msg() (reaction for voltage change request), which limits maximum current by calling charge_manager_force_ceil(). Charge manager calls board_set_charge_limit() to limit current, which calls update_ports() which calls board_manage_dut_port() unconditionally. This function checks if charge through is allowed. It turns out that it is not allowed, because CC_ALLOW_SRC bit is not set in cc_config (see is_charge_through_allowed()), then board_manage_dut_port() changes dual role of port 1 to force sink. Fix for this issue is simple. Function is_charge_through_allowed() actually tells us that we are not able to source power when 'cc snk' or 'cc pdsnk' was issued. So fix is just to reject power swap when our power role is sink, and CC_ALLOW_SRC is not set. BUG=b:162254118 BRANCH=none TEST=Issue 'cc snk' from ServoV4 console and wait until state gets stable. Issue 'cc pdsnk' from ServoV4 console and check if port 1 reaches SNK_READY state. Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: Idf89c0f79a60275345d23aca4705811b1acba98a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2563682 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Sam Hurst <shurst@google.com> Reviewed-by: Diana Z <dzigterman@chromium.org>
* TCPMv1: Do not update dual role config during power swapPatryk Duda2020-12-011-14/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When ServoV4 acts as sink ('cc snk' issued), and we issue 'cc pdsnk' there are following state transitions: > cc pdsnk C1 st2 SNK_DISCONNECTED C1 st3 SNK_DISCONNECTED_DEBOUNCE C1 st5 SNK_DISCOVERY C1 RECV 1361/1 [0]2601912c C1 Req [1] 5000mV 3000mA C1 REQ>1 C1 st6 SNK_REQUESTED C1 RECV 0563/0 C1 st7 SNK_TRANSITION C1 RECV 0766/0 C1 st8 SNK_READY <--- From this point DUT acts as source DUT's PE is in PE_SRC_Ready state C1 RECV 196f/1 [0]ff008001 C1 RECV 0b67/0 <--- DUT asks for source capabilities C1 srcCAP>1 <--- ServoV4 sends its capabilities C1 RECV 0d6a/0 <--- DUT requests power swap C1 CTRL[3]>1 <--- ServoV4 accepts C1 st10 SNK_SWAP_SNK_DISABLE C1 st11 SNK_SWAP_SRC_DISABLE C1 RECV 0e66/0 <--- DUT sends PS_RDY to inform that it disabled power C1 st12 SNK_SWAP_STANDBY <--- ServoV4 enables power supply and waits PD_POWER_SUPPLY_TURN_ON_DELAY to ensure that it is turned on, before switching to SNK_SWAP_COMPLETE C1 st14 SRC_DISCONNECTED <--- This is not expected state, DUT is still waiting for PS_RDY from ServoV4 C1 st15 SRC_DISCONNECTED_DEBOUNCE C1 st17 SRC_STARTUP C1 st18 SRC_DISCOVERY C1 srcCAP>1 <--- ServoV4 tries to negotiate, but DUT is still waiting for PS_RDY C1 st19 SRC_NEGOCIATE C1 st34 HARD_RESET_SEND <--- Negotiation timeout C1 st35 HARD_RESET_EXECUTE DUT requests power swap which is interrupted by wrong state transition. SNK_SWAP_STANDBY state should be switched to SNK_SWAP_COMPLETE, but instead of it switched to SRC_DISCONNECTED, this is caused by changing DRP state to force source in pd_set_power_supply_ready() called in SNK_SWAP_STANDBY state. Changing DRP state also sets PD_EVENT_UPDATE_DUAL_ROLE, which causes state transition (performed in pd_update_dual_role_config() function), because power role is still PD_ROLE_SINK, but DRP is now force source. This was fixed by adding requirement that we should not perform power swap, because we are going to change our power role in SNK_SWAP_COMPLETE actually. BUG=b:162254118 BRANCH=none TEST=Issue 'cc snk' on ServoV4 console, wait until it reaches stable state. Issue 'cc pdsnk' and check if SNK_SWAP_COMPLETE state comes after SNK_SWAP_STANDBY Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: I0ffd6ef79d59ca7fcb0dd1357dd491fe852b7461 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2563681 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* delbin: Config EC chipsetMichael5 Chen2020-12-012-1/+7
| | | | | | | | | | | | | Base on DVT schematic, change EC chip to npcx7m7fc from npcx7m6fc. BUG=b:174106425 BRANCH=firmware-volteer-13521.B TEST=bring-up Signed-off-by: Michael5 Chen <michael5_chen1@pegatron.corp-partner.google.com> Change-Id: I7c1b7a3a39dc4dd4bacbd23b468a6515c0b04eb9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2567080 Reviewed-by: Zhuohao Lee <zhuohao@chromium.org>
* util: Drop ec_uartdPatrick Georgi2020-12-012-161/+1
| | | | | | | | | | | | | | | It is replaced by the hdctools in all current configurations (servod based development). BUG=none TEST=none Change-Id: I56d97d776a8c2aaf47aa39802cc9831c4f3416a7 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2560631 Reviewed-by: Namyoon Woo <namyoon@chromium.org> Tested-by: Patrick Georgi <pgeorgi@chromium.org> Commit-Queue: Patrick Georgi <pgeorgi@chromium.org>
* delbin_npcx796fc: Initial EC imageMichael5 Chen2020-12-018-0/+1185
| | | | | | | | | | | | | | | | | Create the initial EC image for the delbin_npcx796fc variant by copying the delbin reference board EC files into a new directory named for the variant. (Auto-Generated by create_initial_ec_image.sh version 1.3.0). BUG=b:174106425 BRANCH=firmware-volteer-13521.B TEST=make BOARD=delbin_npcx796fc Signed-off-by: Michael5 Chen <michael5_chen1@pegatron.corp-partner.google.com> Change-Id: I97529b787246f74765e29d9ceab275431be28767 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2567074 Reviewed-by: Zhuohao Lee <zhuohao@chromium.org>
* sasuke: Initial EC imageRaymond Chung2020-12-018-0/+1192
| | | | | | | | | | | | | | | | | | | Create the initial EC image for the sasuke variant by copying the waddledoo reference board EC files into a new directory named for the variant. (Auto-Generated by create_initial_ec_image.sh version 1.3.0). BUG=b:172104731 BRANCH=None TEST=make BOARD=sasuke Signed-off-by: Raymond Chung <raymondchung@ami.corp-partner.google.com> Change-Id: I0bf2096e91a17d2b9b842128665b454ab1d77f35 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2562913 Reviewed-by: Henry Sun <henrysun@google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Henry Sun <henrysun@google.com>
* TCPMv2: Handle unexpected message during PR_Swap SRC->SNKDenis Brockus2020-12-011-10/+14
| | | | | | | | | | | | | | | | | | | | | Dock is requesting a PR_Swap to become our SRC and, after accepting this, the dock sends a VDM Attention instead of the expected PS_RDY. Since we are past the initial PR_Swap/Accept, this is no longer handled as a Power Transition state and a SoftReset will be used. BUG=b:170265589 BRANCH=zork TEST=use test in bug Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: I7afabbf3dc9cffb60de332b8eba38ee40b93d8ba Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2565695 Tested-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org>
* COIL: Rename common i2c_controllerDiana Z2020-12-012-1/+1
| | | | | | | | | | | | | Rename i2c_controller.c and update related build file. BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I4fc27e494648c4a17e9f3f3d21ece9727ff6636e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2558905 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* ADLRVP:Support for 100w typeC power adapterPoornima Tom2020-12-012-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | ADL SOC has a TDP of 45W and the RVP can support up to 200W power.Hence, increased the power support to 100W. BRANCH=None BUG=b:173081793 TEST=use chgsup command and list charger type negotiated values. Tested below on ADL: When Typec Charger connected to Port3: > chgsup port=3, type=0, cur=3000mA, vtg=20000mV, lsm=1 when TBT dock connected to Port1: > chgsup port=1, type=0, cur=4500mA, vtg=20000mV, lsm=1 when AC charger connected: > chgsup port=4, type=3, cur=5263mA, vtg=19000mV, lsm=0 Signed-off-by: Poornima Tom <poornima.tom@intel.com> Change-Id: I0677519a68013dbc593539b692bad5016b52654f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2531771 Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Keith Short <keithshort@chromium.org>
* zephyr: shim the port80 moduleJack Rosenthal2020-12-012-0/+8
| | | | | | | | | | | | | | | Shim in the port80 module. BUG=b:172471337 BRANCH=none TEST=boot volteer, watch the port80 writes test port80 command Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I35e3254bb95fec92e4b69ca65f1d8eebbc6d14f1 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2567033 Commit-Queue: Yuval Peress <peress@chromium.org> Reviewed-by: Yuval Peress <peress@chromium.org>
* zephyr: shim the keyboard scanSimon Glass2020-12-016-1/+141
| | | | | | | | | | | | | | | | | | It shims the keyboard_scan task by introducing another keyboard_raw.c which calls down to the zephyr-chrome cros_kb_raw driver. BRANCH=none BUG=b:167405015 TEST=Build pass by zmake configure -B ./build projects/experimental/volteer. TEST=Check all the keys on volteer platform by "ksstate". Change-Id: Ic87f67c28779f7feafa350020a07ba87e3600ecd Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com> Signed-off-by: Mulin Chao <MLChao@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2523839 Commit-Queue: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* zephyr: shim system_jumped_late & system_enter_hibernateWealian Liao2020-12-011-0/+32
| | | | | | | | | | | | | | | | shim the system_jumped_late() and system_enter_hibernate() that needed by keyboard scan. BRANCH=none BUG=b:167405015 TEST=compile with keyboard scan Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com> Change-Id: I4f79dd3b0313f4ed19550b1896ed0e439407caf6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2552321 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
* Madoo: Improve shared interrupt line behaviorKo_Ko2020-12-011-11/+69
| | | | | | | | | | | | | | | | | | | | | | When interrupts are interleaved from the TCPC and charger, we can get into a state where the interrupt line for the board ends up stuck low. Improve on this situation by setting a deferred function to check on the interrupt line after we get a signal in, and notify chips on that line there may be more to process. BRANCH=None BUG=b:173345295 TEST=on madoo, plug in powered PD hub to C1, generating interrupts from both the charger and TCPC and verify C1 interrupt line goes high once connection is ready Signed-off-by: Ko_Ko <Ko_Ko@compal.corp-partner.google.com> Change-Id: I3d29df28f94cb6c352adf05b9204ab4ff52a9726 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2557758 Reviewed-by: Henry Sun <henrysun@google.com> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Ko Ko <ko_ko@compal.corp-partner.google.com> Tested-by: Ko Ko <ko_ko@compal.corp-partner.google.com>
* Metaknight: Change EC chip from NPCX796FC0BX to NPCX797FC0BXYu-An Chen2020-12-013-0/+16
| | | | | | | | | | | | | | | | | Change EC chip from NPCX796FC0BX to NPCX797FC0BX BUG=b:173464184 BRANCH=master TEST=make BOARD=metaknight TEST=make BOARD=metaknight_legacy TEST=new ec is working after rework. Signed-off-by: yu-an.chen@quanta.corp-partner.google.com Change-Id: Icb81a4a89c71db183994d3737fa8ed807353e06c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2557775 Reviewed-by: Henry Sun <henrysun@google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* motion: Control on which task sensor setting functions are running onGwendal Grignou2020-12-011-31/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Analysis of motionsense shutdown revealed a race condition, as function that change sensor state can run on parallel tasks, namely CHIPSET and HOOK: motion_sense_shutdown (CHIPSET) ---> (motion_sense_switch_sensor_rate) suspend/resume (HOOK) ----> (motion_sense_switch_sensor_rate) motion_sense_process (MOTIONSENSE) ---> motion_sense_set_data_rate (ACTIVE) \-> motion_sense_set_motion_intervals /----------- motion_sense_init --\ | | motion_sense_switch_sensor_rate ---> motion_sense_set_data_rate (ACTIVE) | \----------- sensor->collection_rate = odr...; (ACTIVE) \------------> sensor->collection_rate = 0; (INACTIVE) \-----------> motion_sense_set_motion_intervals Running motion_sense_switch_sensor_rate() on HOOK task is necessary because on some platform, the power line may be already off, when the device is going to S5. - Always run motion_sense_switch_sensor_rate() on hook. - When changing ODR is needed (sensor active), schedule MOTIONSENSE task. The new sequencing is simplified: suspend/resume/shutdown (HOOK) ----> (motion_sense_switch_sensor_rate) /----------- motion_sense_init --\ | | motion_sense_switch_sensor_rate ---> schedule MOTIONSENSE. \------------> sensor->collection_rate = 0; (INACTIVE) motion_sense_process (MOTIONSENSE) ---> motion_sense_set_data_rate (ACTIVE) \-> motion_sense_set_motion_intervals BUG=b:170703322 BRANCH=kukui TEST=Check on Volteer the sequence at suspend/resume/shutdown. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Change-Id: I0238cae9b4720e487a1e70788296a4db1b1e186b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2553347 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* motion_sense: Stop collection when sensor is powered downGwendal Grignou2020-12-012-5/+28
| | | | | | | | | | | | | | | | | Set collection_rate to 0 when sensor is not in initialized state anymore. It will prevent the motion_sense task to be neededlessly scheduled. Export wait_us to be tested. BUG=b:170703322 BRANCH=kukui TEST=unit test Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Change-Id: I1dc4c7a07ff30fa10997ef87784114c725f100d5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2520297 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Chen-Tsung Hsieh <chentsung@chromium.org> Reviewed-by: Yuval Peress <peress@chromium.org>
* eldrid: add npcx7m7fc support and backward support npcx7m6fc.Scott Chao2020-12-013-0/+13
| | | | | | | | | | | BUG=b:173754312 BRANCH=firmware-volteer-13521.B-master TEST=make buildall Signed-off-by: Scott Chao <scott_chao@wistron.corp-partner.google.com> Change-Id: I7ce77a6813a977612b5c804cb335add419ac80b1 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2550117 Reviewed-by: Keith Short <keithshort@chromium.org>
* Elemi: Remove sensorsDevin Lu2020-11-306-303/+13
| | | | | | | | | | | | | | This commit remove sensors and tablet mode, since Elemi doesn't support that. BUG=b:163012636 BRANCH=firmware-volteer-13521.B-master TEST=Verified boot without sensors initial. Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Change-Id: Icf23456763699024d934d78ac2cc20fcfcc5b9bb Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2554171 Reviewed-by: Keith Short <keithshort@chromium.org>
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