| Commit message (Collapse) | Author | Age | Files | Lines |
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This patch makes ctn730 driver print the firmware version.
EC_CMD_PCHG is updated to version 1 and returns firmware version
of a charger chip. Version 0 of EC_CMD_PCHG is deprecated.
BUG=b:182600604, b:173235954, b:183151376
BRANCH=Trogdor
TEST=Verify firmware version is printed on EC console.
TEST=ectool pchg 0 (for version 1)
TEST=cat /sys/class/power_supply/PCHG0/* (for version 0)
"ERR kernel: [ 33.394847] cros-ec-pchg cros-ec-pchg.13.auto:
Unable to get port.0 status (err:-524)"
Cq-Depend: chromium:2786072
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: Ib7bb9a7225fe914bc6c8d600d0f4766dbf75ace8
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2757098
(cherry picked from commit 774ff171f1ff84e7f3daa2f367b9563e00656488)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2787469
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Currently, the host is notified every time a charging info message
is received from a charger chip. This slows down the host entring
suspend state.
This patch makes the pchg state machine skip notifying the host when
there is no battery level change.
BUG=b:182973695, b:173235954, b:183151376
BRANCH=trogdor
TEST=Stylus connect, disconnect, charge events are triggered as
expected.
TEST=Suspend is entered quickly with a stylus attached.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: If27397a56f8cc636637c0872a00496fee3ca7aa5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2770504
(cherry picked from commit 29b492c095675a991147fdde0f586aa9efc94da9)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2787478
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This patch allows a charger chip to reset to firmware update mode
(a.k.a. download mode). Actual firmware update will be added
in a separate patch.
Currently, a reset event causes the state machine to unconditionally
transition to normal mode. This patch makes the state machine check
'mode' field in the context to decide whether it transitions to
normal mode or not.
This patch also makes ctn730 driver explicitly return
PCHG_EVENT_*_ERROR while PCHG_EVENT_NONE was returned previously.
BUG=b:173235954,b:183151376
BRANCH=trogdor
TEST=Stylus connect, disconnect, charge events are triggered as
expected.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: I10dbd25d0b3d5284952e57d4ade2949e9594c8d1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2770503
(cherry picked from commit 1c5ff6f4d1ddfd3862f9bcfc85a4564eac63d16f)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2787477
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Currently, dropped events are counted for all ports combined. This
patch makes them counted for each port separately.
BUG=b:173235954,b:183151376
BRANCH=trogdor
TEST=Verify 'pchg 0' prints dropped event count.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: I09380927613defe34bef0fece022fc9d47ebb8a1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2770502
(cherry picked from commit 4126a065489fe40668186c5f5b4dee4797388b25)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2787474
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This patch makes a compiler check array sizes used to stringify
PCHG states and events.
BUG=b:173235954,b:183151376
BRANCH=trogdor
TEST=make
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: I13dc399dc973d8a661492236668c22b323e7c1c4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2765423
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
(cherry picked from commit 2913c2f6c5afa41f086a6f0242165cbdf9dad730)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2787472
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Currently, PCHG assumes PCHG chips are reset only on POR and ignores
reset events. This can cause the state machine to be in an unexpected
state when a reset happens asynchronously.
This patch allows PCHG to handle chip reset events. It also makes the
task explicitly reset PCHG chips at start-up so that everything will
start in known & clean states.
BUG=b:181745891,b:181036152,b:173235954,b:183151376
BRANCH=trogdor
TEST=Verify PCHG behaves expectedly across cold reset, warm reset,
suspend & resume. Repeat the test with and without stylus.
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Change-Id: Ia3dd1fe7ebc8dd6f4ee8149a4c25918922143fc3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2741282
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
(cherry picked from commit 2c703a08e866e3c3efedd8bb05d3de2323fa201c)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2787470
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The dw-apb-uart node was changed to match UEFI naming convention.
BRANCH=none
BUG=b:181349369
TEST=1. Run flash_fp_mcu on Zork device with FW 13434.212 and TOT OS
image.
Signed-off-by: Bhanu Prakash Maiya <bhanumaiya@google.com>
Change-Id: I33c313a8de3842c37611199a7ffd31be4cd50f3f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2770511
Commit-Queue: Raul E Rangel <rrangel@chromium.org>
Reviewed-by: Raul E Rangel <rrangel@chromium.org>
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On Zork's SoC change was caused by changing the amount of reserved
space for GPIO banks from 0x300 to 0x400. This resulted in base change.
Previous: 512 - 192 = 320
Current: 512 - 256 = 256
BRANCH=none
BUG=b:181349369
TEST=1. Run flash_fp_mcu on Zork device with FW 13434.212
Signed-off-by: Bhanu Prakash Maiya <bhanumaiya@google.com>
Change-Id: Ied4a5fd9281d59f1bfa30a4ee9677f9a0a11387e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2727863
Commit-Queue: Tom Hughes <tomhughes@chromium.org>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
(cherry picked from commit 194c032415bddc6783ba9e52de02fa5bc159191d)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2733804
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If explicit contract is set in bbram when EC boot up, then TCPMv1
set soft reset as first state instead of unattached.SNK, so we need
to enable BMC PHY for tx module.
And same as TCPMv2, we turn on/off BMC PHY and set low power mask
when hook_dis/connect is called.
BUG=none
BRANCH=none
TEST=on icarus, the explicit contract is set in bbram when EC boot up,
and we can tx soft reset (won't happen tx timeout).
Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw>
Change-Id: I3c8d3db240d2290ced17b90aeb0420ac9f20598d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2712213
Tested-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
Commit-Queue: Ruibin Chang <Ruibin.Chang@ite.com.tw>
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Currently we always source VCONN from the TCPC, and also the PPC if
present. However the SYV682 can't handle 5V on its host-side CC pins, so
we shouldn't source VCONN in that case.
For those TCPCs which will trigger OVP if VCONN isn't enabled, this will
not happen with the SYV682, since it isolates VCONN from the TCPC CC
signals.
BUG=b:180973460
TEST=On delbin, make sure the host-side CC pins are <3.3V when sourcing
VCONN
BRANCH=None
Signed-off-by: Eric Herrmann <eherrmann@chromium.org>
Change-Id: I8929a44fc23f93c44559229f1b0d024fd7fbc7db
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2721086
Commit-Queue: Keith Short <keithshort@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
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Enables 5A and 20V charging on all Servo_v4p1's.
There is a small population of servo_v4p1 devices with 3A cables
but these represent about 100 total units between the early
builds. The setting was not set as a board id configuration
as stress tests show this process will still be safe and the
Servo_v4p1's that are current limited are easy to keep within
the 3A current limits. The 5A cables are visually distinctive
and most chargers and DUTs are limited to 3A.
BUG=b:176110980
BRANCH=servo
TEST=Validated the Servo_v4p1 can deliver power at 4.5A and 20V
using a 90W charger and a resistive load. Verified current
using meters and verified Servo_v4p1 does not heat excessively
significantly after over 2 hours at the cable or PCB.
TEST=Repeated the same test on older Servo_v4p1 devices with the
smaller shunt resistors and 3A compliant cable and verified
components remain at reasonable temperatures.
Signed-off-by: Brian Nemec <bnemec@chromium.org>
Change-Id: If9e67081fe4441ca0fe1039c3189e0673eb8f13a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2714031
Reviewed-by: Jan Dąbroś <jsd@semihalf.com>
Reviewed-by: Matthew Blecker <matthewb@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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BRANCH=none
BUG=none
TEST=view in gitiles
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: Ib9c7ec288c9efabb454580c6bf6028ee6a0a1373
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2721087
Commit-Queue: Craig Hesling <hesling@chromium.org>
Reviewed-by: Craig Hesling <hesling@chromium.org>
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Since ASIEN (interrupt on ALS saturation) and ALS threshold interrupts
are disabled, we can only get interrupt on RBGC cycle read.
Therefore, when using the interrupt, not need to check if RGB data is
ready in post_events(). Only check while in force mode.
Remove recheck when accounting for saturation.
BUG=b:177860358
BRANCH=kukui,hatch,puff,volteer
TEST=compile
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Change-Id: I7fc419a98828b9b188849e04a15cfefaf9e96c8a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2572739
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
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Sleeping when turning a sensor on/off is problematic when the
other sensor is running.
Replace sleeping by discarding first events until sensor is
stabilized.
BUG=chromium:1175757
BRANCH=hatch,nami,kukui,dedede,grunt,zork,octopus,volteer
TEST=turn sensor on/off when the other is running using cros-ec
iio devices
Signed-off-by: Jean-Baptiste Maneyrol <jmaneyrol@invensense.com>
Change-Id: I61801970b12f9fbdcc2cd96cb4df1edae5ed521f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2682715
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Commit-Queue: Gwendal Grignou <gwendal@chromium.org>
Tested-by: Gwendal Grignou <gwendal@chromium.org>
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When using accel low-power with WakeUp oscillator, turning gyro
on switch directly to PLL mode and provokes glitch on ODR.
Use RC clock oscillator for accel low-power to avoid this glitch.
BUG=chromium:1175757
BRANCH=hatch,nami,kukui,dedede,grunt,zork,octopus,volteer
TEST=turn gyro on when accel is running using cros-ec iio devices
and check that odr stays consistent.
Signed-off-by: Jean-Baptiste Maneyrol <jmaneyrol@invensense.com>
Change-Id: I51435eb9533a1fa16bf695e468854156c16d3296
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2679700
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Commit-Queue: Gwendal Grignou <gwendal@chromium.org>
Tested-by: Gwendal Grignou <gwendal@chromium.org>
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Prevent to have the first event in 1 ODR and the second in another.
BUG=chromium:1175757
BRANCH=hatch,nami,kukui,dedede,grunt,zork,octopus,volteer
TEST=turn sensor on/off and change odr using cros-ec iio devices
Signed-off-by: Jean-Baptiste Maneyrol <jmaneyrol@invensense.com>
Change-Id: I501bf14e70fd7180c7e68385ef4afb5934d7d37a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2679699
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Commit-Queue: Gwendal Grignou <gwendal@chromium.org>
Tested-by: Gwendal Grignou <gwendal@chromium.org>
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BUG=b:181194535
BRANCH=none
TEST=make buildall
TEST=Check base VIF output
Signed-off-by: Denis Brockus <dbrockus@google.com>
Change-Id: Ic1d9415137570e0d52cd8393c36df572e515deef
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2716158
Tested-by: Denis Brockus <dbrockus@chromium.org>
Auto-Submit: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
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BUG=b:180668427
BRANCH=none
TEST=On icarus, EC negotiates to 15V and starts charging.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Change-Id: Ibd37b86303a03ce4b2e5b394d38c6b53bcf307e5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2717434
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
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Add support for building common/keyboard_vivaldi.c. This is enabled by
default in ECOS as long as CONFIG_KEYBOARD_PROTOCOL_8042 is enabled too.
BRANCH=none
BUG=b:177604307
TEST=build and verified that the map is set and HC command is received
Change-Id: I881cdfc0a14432a97ced27be757b4c30daf002b8
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2712967
Reviewed-by: Keith Short <keithshort@chromium.org>
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This enables the memory accessing console command (e.g., md, rw) in
Zephyr. The commands are used to access the ec memory space for driver
developing & bug investigating.
BUG=b:177604307
BRANCH=None.
TEST=read the npcx firmware header by 'rw 0x64000000' & get the
following 'read 0x64000000 = 0x2a3b4d5e'
Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com>
Change-Id: I560be52fb1e09a3e72c8619ee9cdf0c1b9dcbcf9
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2714723
Reviewed-by: Fabio Baltieri <fabiobaltieri@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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This adds a new TCPC interrupt handler task that knows how to deal with
TCPCs that share a single interrupt line. ec.tasklist for this handler
takes a port mask instead of a port number as a task startup argument.
The main quirk of shared interrupts is that interrupts must be serviced
on multiple devcies in order to clear the interrupt into the EC.
BRANCH=none
BUG=b:173575131
TEST=buildall passes
Change-Id: I6f9f0ce471092741274d8a1542510d92100f6698
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2700314
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define CONFIG_CHARGE_RAMP_HW
BUG=b:180166404
BRANCH=None
TEST=make -j BOARD=sasuke
flash EC, connect DCP charger and check if input current is 1.5A
Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com>
Change-Id: I9b8ec06c4851741c574f6b1b9f831072b6efda7f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2717160
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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This change pulls stm32 chip-specific options into
VARIANT_KUKUI_EC_STM32F098 (include save flash space operations),
and enable it83xx chip-specific options for it81202.
BUG=none
BRANCH=none
TEST=-buildall.
-boot to kernel on juniper.
-boot to manual recovery on icarus.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Change-Id: I81fb318960bf24780c164d9abe631ef70a360bf9
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2717344
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
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In haste, I misspelled the ENTERING_RW GPIO name. This fixes it.
(sorry)
BUG=b:180965428,b:181051734,b:181085178
BRANCH=dedede
TEST=make -j buildall
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: I0d2f3dece2dcf44a0e16923f500d68216bbadf33
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2719106
Reviewed-by: Diana Z <dzigterman@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
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If we support FRS, we should query the SRC sink_capabilities on entry to
SNK_Ready. Currently we queue up this when we enter snk_startup, but
only when it isn't due to a power role swap. Some devices will change
their sink capabilities depending on what their current status is, so we
should check again following a power role swap.
BUG=b:181156774
TEST=make buildall
TEST=Check that get_sink_capabilities message is sent following a
SRC->SNK power role swap
BRANCH=none
Signed-off-by: Eric Herrmann <eherrmann@chromium.org>
Change-Id: I5f1cbe2b300e8c29bef16336bd7ddfa8f7a8b2c7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2718495
Reviewed-by: Nathan Kolluru <nkolluru@google.com>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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This commit adds a new GPIO, GPIO_EC_ENTERING_RW2 which does the same
thing as GPIO_EC_ENTERING_RW. However, it's on a pin that's more well
behaved around init time.
This commit also overrides the board_pulse_ec_entering_rw() function
such that both lines can be pulsed.
BUG=b:180965428,b:181051734,b:181085178
BRANCH=dedede
TEST=Build and flash draw*, verify it boots.
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: Ia9cfba97b8fcad5975e412523686a7ba53ea7399
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2719104
Reviewed-by: Diana Z <dzigterman@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
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This commit adds an overridable function for pulsing the
EC_ENTERING_RW signal. This function should only be overridden in
very rare circumstances!
The default implementation is unchanged. EC_ENTERING_RW is pulsed for
1ms.
BUG=b:180965428,b:181051734,b:181085178
BRANCH=dedede
TEST=`make -j buildall`
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Change-Id: Ie04bc0b0d20473be1b3d5f46fa1a986ab6e59953
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2719103
Reviewed-by: Diana Z <dzigterman@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
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This adds the USB FRS and OC control signals to the GPIO expander
located on the NCT 3808 TCPC.
BRANCH=none
BUG=b:173575131
TEST=buildall passes
Change-Id: Id6e29541b266638ed5b11571ae5cdc2598e40f35
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2704032
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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This enables AP throttling based on thermal conditions. Brya has two
thermistors - one near the SoC and one near the charger that can be used
for deciding when to throttle.
BRANCH=none
BUG=b:173575131,b:180681346
TEST=buildall passes
Change-Id: Ieaa6959ff9fc7ee5e505c13cff2150ad70a04e3b
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2686981
Commit-Queue: Keith Short <keithshort@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
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This adds a new overridable function to check if a USB PD port exists on
a system. This is preferred over using board_get_usb_pd_port_count() or
CONFIG_USB_PD_PORT_MAX_COUNT because it handles sparse port numbering.
The "missing" port no longer needs to be the highest numbered port and
call sites no longer need to implement the special checks for this case.
BRANCH=none
BUG=b:173575131
TEST=buildall passes
Change-Id: I3f74eddd99c6901b42ce05bab6f2bdd545127d1a
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2700313
Commit-Queue: Keith Short <keithshort@chromium.org>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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This configures the brya keyboard layout support to match early
boards. These boards set up for a non-vivaldi layout.
BRANCH=none
BUG=b:180973324
TEST=tested all keys
Change-Id: I856c87c34db3dfda647de88577655b865f97ab93
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2713939
Commit-Queue: Keith Short <keithshort@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
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This adds support for the two thermistors on brya.
BRANCH=none
BUG=b:173575131
TEST=buildall passes
Change-Id: I198e1ce72910d1798c51cf5c99c9f1f0601f3c31
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2706263
Commit-Queue: Keith Short <keithshort@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
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In order to more quickly detect and sink Vbus, move up the priority on
enabling the Vbus ADC and checking our Vbus status to enable sinking.
Additionally, gate this enablement on the battery not being capable of
supporting the board to prevent premature Vbus sinking in normal
use-cases.
BRANCH=None
BUG=b:178981107,b:178728138
TEST=on storo and sasukette, confirm board can boot with no battery and
TCPC works as expected
On galtic, confirm sinking is enabled on a no-battery boot but not
automatically enabled with a charged battery attached
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I26eec09c2fa50d2425c5d6b0ef7b8847bd570da7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2715596
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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This reverts commit 7991e4d1f705c84966b382219f194804380b79ab.
Reason for revert: Maintaining status quo until Chrome OS UI has
the ability for a user to report if this change works well for them.
Original change's description:
> pd_alt_mode_dfp: Default to 4 lanes of DP
>
> Currently our default PD policy states that if dock that supports DP
> alt mode also advertises Multi-function preferred, we configure the
> superspeed muxes to use 2 lanes for DisplayPort and 2 lanes for
> SuperSpeed USB. However, this is done without regard as to what the
> actual usage of the SuperSpeed ports may be.
>
> We've historically made this trade off, but it results in degraded
> display performance. Users may be better served if we prioritize
> display performance over SuperSpeed USB.
>
> The ideal solution involves adding additional plumbing such that we
> can configure the chosen pin configuration from the AP based upon
> other heuristics.
>
> BUG=b:178635286
> BRANCH=as many as feasible?
> TEST=Build and flash DUT, plug in a dock with SuperSpeed USB ports,
> verify that 4 lanes of DP are configured.
>
> Signed-off-by: Aseda Aboagye <aaboagye@google.com>
> Change-Id: Ie2d47588012aceb7f13312b6947b885f8f7034a8
> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2653315
> Tested-by: Aseda Aboagye <aaboagye@chromium.org>
> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
> Reviewed-by: Rob Barnes <robbarnes@google.com>
> Reviewed-by: Diana Z <dzigterman@chromium.org>
> Commit-Queue: Diana Z <dzigterman@chromium.org>
Bug: b:178635286
Change-Id: I94f107a43a58d512070a0507ebe2529eaedf473e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2718274
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Bot-Commit: Rubber Stamper <rubber-stamper@appspot.gserviceaccount.com>
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Just before moving from state PD_STATE_SRC_DISCONNECTED_DEBOUNCE to
PD_STATE_SRC_STARTUP we set the PD_FLAGS_CHECK_PR_ROLE and
PD_FLAGS_CHECK_DR_ROLE. However when we move from
PD_STATE_SRC_HARD_RESET_RECOVER to PD_STATE_SRC_STARTUP we do not set
those flags. This cl corrects that and sets the flags in both cases.
This will allow the servo to get back into the correct dr_role after a
hard reset.
BUG=b:179532434, b:178417455, b:180051107
TEST=Flashed servo, cc srcdts, pd 1 hard
BRANCH=None
Signed-off-by: Jeremy Bettis <jbettis@google.com>
Change-Id: I42d5807ab87d3bc001f80ca709a2e72d9e89fe63
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2716862
Tested-by: Jeremy Bettis <jbettis@chromium.org>
Reviewed-by: Wai-Hong Tam <waihong@google.com>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Jeremy Bettis <jbettis@chromium.org>
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When responding to a DiscId message, return the ID Header VDO with
the USB Communications Capable as a USB Device bit to zero and the
Product Type(UFP) bits to 000b.
BUG=b:173028252
BRANCH=none
TEST=Passes TD.PD.VNDI.E1 VDM Identity
Signed-off-by: Sam Hurst <shurst@google.org>
Change-Id: I57a62db92eee0f63e081bdb9b6d49e6e3206a41c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2707252
Commit-Queue: Sam Hurst <shurst@google.com>
Tested-by: Sam Hurst <shurst@google.com>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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Add thermal thresholds for Volteer in the dts file.
BUG=b:179886912
BRANCH=none
TEST=build Zephyr for Volteer
TEST=Run "thermalget" command to check current thresholds.
Change the thresholds with "thermalset" to verify if AP throttling
is requested.
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Change-Id: If0b860271c57adf3fa1543de0ff68ec5b48e5b8c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2712951
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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1. When running CtsSensorTestCases, sensors report no event.
2. Enable CONFIG_CMD_ACCELS and CONFIG_CMD_ACCEL_INFO for CTS sensor
test.
BUG=b:178754465
BRANCH=dedede
TEST=make buildall, read sensor data via accelinfo, accelrate, and
accelread on EC console.
Signed-off-by: reno.wang <reno.wang@lcfc.corp-partner.google.com>
Change-Id: I86702bb4efe3d3fb85dc4e0631ac62c7fab7ec00
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2717343
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Evan Green <evgreen@chromium.org>
Commit-Queue: Evan Green <evgreen@chromium.org>
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Remove i2c function and data structures which are currently unused in
the codebase. The calling location of this function was removed in
2018. This commit also updates comments in the board header files which
were using the function.
BRANCH=None
BUG=None
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I46cd0d95e750489b633a99dde56e267562f577e1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2697858
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Rename GT7288 address definition to match current I2C naming
conventions.
BRANCH=None
BUG=None
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Ief917ff36510150d2a6ea03875d6e95dcb57c350
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2697857
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Rename MP4245 address define used in the driver. Note this driver is
not currently in use by any boards.
BRANCH=None
BUG=None
TEST=set up madoo with CONFIG_MP4245 and I2C defines, build
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I8cf55ac113c9dd3e7b4e46a7d047be85193aa626
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2697856
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Rename ioexpander i2c address to match current conventions and update
any calling locations.
BRANCH=None
BUG=None
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Iddad457f73d0dd0167496b794c00e274f8985615
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2697855
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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According to
http://developer.intra2net.com/mailarchive/html/libftdi/2018/msg00105.html
there has been a renaming going on. To support both old and new libftdi
disable the deprecation warning (that we then promote to an error).
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Change-Id: I1df660cb7e8d8c8a410a8d9ee5e4a45108dad493
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2692690
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Commit-Queue: Patrick Georgi <pgeorgi@chromium.org>
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This updates the keyboard pin definitions. KSI02 is used in GPIO mode
(i.e. ALTERNATE function), however the NPCX support code automatically
puts all pins declared as GPIO into GPIO mode. No explicit ALTERNATE pin
declaration is needed.
Nuvoton support code interprets ALTERNATE declarations as a request for
a pin to be configured as a function other than GPIO, regardless of
whether the pin's primary or secondary function is GPIO. This put KSO02
into ALTERNATE (i.e. keyboard) mode when it actually needs to be in GPIO
mode.
BRANCH=none
BUG=b:180759360
TEST=all keyboard keys respond on brya
Change-Id: I15221eafde1682bae527bea8fe14280c78bb489b
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2713938
Reviewed-by: Keith Short <keithshort@chromium.org>
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In the retimer_set_state_dfp() function, return either the
USB4 speed or Thunderbolt speed depending on the mux setting
BUG=None
BRANCH=None
TEST=make buildall -j
Change-Id: I725386d7d23d50637b46b389082d369b09b4df66
Signed-off-by: Ayushee Shah <ayushee.shah@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2682840
Reviewed-by: Keith Short <keithshort@chromium.org>
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Set the minimum switching frequency to 25 kHz to
avoid the audible frequency band.
BRANCH=Trogdor
BUG=b:180886790
TEST=In IDLE mode check that LN9310 switching freq.
stays above the audible frequency range.
Change-Id: Ia609fd002e34b6bc684385ceb8405fe84a447ae7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2633442
Reviewed-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Wai-Hong Tam <waihong@google.com>
Tested-by: Wai-Hong Tam <waihong@google.com>
Commit-Queue: Wai-Hong Tam <waihong@google.com>
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For Cortex-M0, see "C1.6.3 Debug Halting Control and Status Register,
DHCSR" in the ARMv6-M Architecture Reference Manual.
For other Cortex-M, see "C1.6.2 Debug Halting Control and Status
Register, DHCSR" in the ARMv7-M Architecture Reference Manual or
https://developer.arm.com/documentation/ddi0337/e/core-debug/core-debug-registers/debug-halting-control-and-status-register.
BRANCH=none
BUG=b:180144572
TEST=Using Segger J-Trace Pro with icetower v0.1, verify
debugger_is_connected is true when debugger is attached and false
otherwise
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: I748fc26c0db4351be5a83086fdb843e5651b5425
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2713753
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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Add thermal support to Zephyr which includes handling temperature
threshold for certain events. The thresholds are defined in the dts
file as temperature sensor parameters - there are limits per
temperature sensor. The struct ec_thermal_config thermal_params[] array
with all parameters is generated automatically based on
named_temp_sensors node.
Enable "thermalget" and "thermalset" console commands along with
EC_CMD_THERMAL_GET_THRESHOLD and EC_CMD_THERMAL_SET_THRESHOLD host
commands.
Also, add a few functions to utils needed to verify if an event
occurred (falling/rising edge).
BUG=b:179886912
BRANCH=none
TEST=build Zephyr
TEST=Run "thermalget" command to check current thresholds.
Change the thresholds with "thermalset" to verify if AP throttling
is requested.
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Change-Id: I5f527ceecab2427b3034fd8baa62bb8482f99ff3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2698845
Reviewed-by: Simon Glass <sjg@chromium.org>
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Remove servo_v4p1 custom ioex implementations for TCA64xxA modules.
Enable I/O expander module and move from custom interface to
generic one.
Due to the lack of flash in RW section, IOEX is not available there and
required 'board_id_det' function is stubbed using raw i2c functions.
This results in IOEX and DAC functions available only in RO section,
so their initialization functions are moved to RO-only init.
BUG=b:168385201
BRANCH=main
TEST=Connect to servo's console and execute 'ioexget' command.
All IOEX pins' states should be printed in terminal.
Pin TCA_GPIO_DBG_LED_K_ODL should change as LED is blinking.
TEST=Connect to servo's console. Plug USB-C charger to servo power
port. 'ioexget' command should display EN_PP5000_ALT_3P3 value
as 1. Execute 'ioexset EN_PP5000_ALT_3P3 0' command.
Unplug fast the servo charger. Servo should be fully operational
without any sign of reboot.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
Change-Id: Iff98b37746a95d6a59954507ab18defac65d6329
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2700297
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Add TI TCA64xxA (TCA6416A, TCA6424A) series driver that conforms to
ioexpander_drv interface.
Driver supports 16- and 24-bits versions and is configured by
flags field in ioex_config (TCA64XXA_FLAG_VER_TCA6416A,
TCA64XXA_FLAG_VER_TCA6424A).
BUG=b:168385201
BRANCH=main
TEST=Add 'CONFIG_IO_EXPANDER_TCA64XXA' to any board.h
Execute make to any board,
ioexpander/tca64xxa.c should be visible in compiled files list
Signed-off-by: Michał Barnaś <mb@semihalf.com>
Change-Id: I5ca27df3802d900c9967684403f29c33abd96f18
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2700296
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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