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* TCPMV2: Add support for (CT) Vconn Powered DevicesSam Hurst2021-03-175-7/+196
| | | | | | | | | | | | | | | | | | | | | Add support for Charge Through Vconn Powered Devices BUG=b:165934405 BRANCH=none TEST=make runtests 1) Verified that Apple VPD audio device worked. 2) With charger plugged into Chocodile_Vpdmcu, verified that a Voxel could be charged. 3) FAILED: Plugging Chocodile_Vpdmcu into Voxel first and then plugging in charger to Chocodile_Vpdmcu, Chocodile is detected as a Debug Accessory (CC1 = Rd and CC2 = Rd) and VCONN is never applied. Signed-off-by: Sam Hurst <shurst@google.com> Change-Id: I977b316dc531aa33bb6a236523c8ddbbb23014d0 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2748429 Reviewed-by: Diana Z <dzigterman@chromium.org>
* Revert "voxel, drobit: Create EC mode entry builds"Abe Levkoy2021-03-174-7/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 5cc244149f9d2f2502860bb7fc718676001c3d26. Reason for revert: This breaks builds outside the EC that still rely on voxel_apmodeentry (that should also be deleted). Original change's description: > voxel, drobit: Create EC mode entry builds > > Disable AP-driven mode entry to facilitate regression testing. Also > remove now-unused voxel_apmodeentry build. > > BUG=b:181144682 > TEST=make BOARD=voxel_ecmodeentry; make BOARD=drobit_ecmodeentry > TEST=Inspect .config files > BRANCH=firmware-volteer-13672.B-main > > Signed-off-by: Abe Levkoy <alevkoy@chromium.org> > Change-Id: I5e52a46013315db4415a3255c12cd0fcd39354bd > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2760804 > Reviewed-by: Keith Short <keithshort@chromium.org> > Commit-Queue: Keith Short <keithshort@chromium.org> Bug: b:181144682 Change-Id: Ie07201658ef47a209b12b63583628a4ed19fe3de Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2764974 Bot-Commit: Rubber Stamper <rubber-stamper@appspot.gserviceaccount.com> Commit-Queue: Keith Short <keithshort@chromium.org>
* TCPMv2: Preserve selected source current in FRSDiana Z2021-03-174-5/+23
| | | | | | | | | | | | | | | | | | | | When executing a fast role swap, ensure that any 3.0 A selected current is preserved through the select_current_limit_rp in the TC layer. Additionally, use this selected current to set our current limit when first attaching as a source. If FRS is disabled on a port, restore the default Rp value for the board. BRANCH=None BUG=b:180434465 TEST=Check that a 3A FRS device loaded over 1.5 A is able to successfully complete FRS Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I6e6b2f95066a3f8972664c6ac62b450e179e408d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2757096 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* guybrush: Enable EFS2Rob Barnes2021-03-161-0/+6
| | | | | | | | | | | | | Enable EFS2 for guybrush boards. BUG=b:182795161 TEST=Build BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: Id684723627486d00850f37487b6971eea7258286 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2760803 Reviewed-by: Diana Z <dzigterman@chromium.org>
* guybrush: Add 200ms delay between rsmrst and pwrbtnRob Barnes2021-03-162-9/+6
| | | | | | | | | | | | | | | | | Changing from 80ms to 200ms to allow more time for signals to settle before pwrbtn. This delay is not documented in spec, so this may require further tuning. BUG=b:182802230 TEST=Build BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: I79432b05c11c520fd49cb84c8e575f253b04a836 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2764972 Commit-Queue: Edward Hill <ecgh@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* guybrush: Enable CONFIG_CHIPSET_X86_RSMRST_DELAYRob Barnes2021-03-163-0/+6
| | | | | | | | | | | | | | | | Add a delay of 10ms between S5_PGOOD and RSMRST_L. Needed to meet timing specs. 10ms matches what is used on Intel. This may need to be tuned for AMD chipsets. BUG=b:182802230 TEST=Build BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: I8e2c5a2b47866496a1ae598089e4ac5aa5fa45d3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2764971 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* board/zork: Re-order includes so that enum definition comes before useTom Hughes2021-03-1610-11/+16
| | | | | | | | | | | | | C++ doesn't allow forward enum references. BRANCH=none BUG=b:144959033 TEST=make buildall Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I7e1f8890005e05136eeb4e5084505988dbbb15b7 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2740566 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* board/zinger: Remove unused forward referenceTom Hughes2021-03-161-1/+0
| | | | | | | | | | | | | | | | | | | The forward reference isn't needed here and causes a compilation error when included from C++: board/zinger/board.h:95:6: error: ISO C++ forbids forward references to 'enum' types enum gpio_signal; ^ BRANCH=none BUG=b:144959033 TEST=make buildall Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I0796946afbafb7a905d7ce880efa3f0b5bbcff41 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2740565 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* board/lazor: Move enum definition before its useTom Hughes2021-03-162-7/+7
| | | | | | | | | | | | | | | | board/lazor/board.h:121:6: error: ISO C++ forbids forward references to 'enum' types enum battery_cell_type board_get_battery_cell_type(void); ^ BRANCH=none BUG=b:144959033 TEST=none Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: Id2abde06326a0fe9297b98127aa7ef6768ce1479 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2740564 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* TCPMv2: Debounce Vbus loss when FRS is enabledDiana Z2021-03-162-6/+50
| | | | | | | | | | | | | | | | | A hub may send a Fast Role Swap signal when Vbus is less than vSafe5V, so allow a 5ms debounce after Vbus loss for the signal to come in before we declare the connection detached. BRANCH=None BUG=b:180453483 TEST=on voxel, confirm FRS behaves normally Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: If56106660c0a2bf82e28b91129bc9dd367ebc8fe Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2718838 Tested-by: Eric Herrmann <eherrmann@chromium.org> Reviewed-by: Eric Herrmann <eherrmann@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* USB4: Reset mux, retimer and USB4 SM on exit mode requestAyushee Shah2021-03-163-0/+20
| | | | | | | | | | | | | | | | When exiting out of USB4 mode, reset the USB4 state machine and set the retimer and the mux to disconnect state followed by USB mode. BUG=b:181286325 BRANCH=None TEST=Able to re-enter into USB4 mode on warm reboot Signed-off-by: Ayushee Shah <ayushee.shah@intel.com> Change-Id: Icdc520aa221a9276466fafb885a6d86e893b7284 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2727628 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
* guybrush: Switch temperature inputs to MODULE_ADCRob Barnes2021-03-161-4/+4
| | | | | | | | | | | | | | | Switch definitions for temperature and other analog inputs to MODULE_ADC. BUG=None TEST=Build BRANCH=None Change-Id: I9b1a35ed517b8a8fcc95c58b3853bfd02b0f1d95 Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2761968 Commit-Queue: Diana Z <dzigterman@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* zephyr: Disable duplicate line endingsKeith Short2021-03-161-2/+6
| | | | | | | | | | | | | | | | | | The Zephyr UART shell already converts '\n' line endings to '\r\n', and does not provide an API to override this behavior. Disable the legacy Chromium EC printf output from also converting '\n' to '\r\n'. BUG=b:182839302 BRANCH=none TEST=firmware_FAFTSetup detects that a Chrome EC is present Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I0347e35c5237d7deb475aee1780978d719d218a1 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2762531 Commit-Queue: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* chip/stm32: Rename field since "or" is reserved in C++Tom Hughes2021-03-161-1/+1
| | | | | | | | | | | | | | https://en.cppreference.com/w/cpp/keyword https://en.cppreference.com/w/cpp/keyword/or BRANCH=none BUG=b:144959033 TEST=make buildall Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I8ac62e6fbcab8fe0c842c737d183b462899bd017 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2740563 Reviewed-by: Scott Collyer <scollyer@chromium.org>
* zephyr: Fix recovery modeKeith Short2021-03-162-1/+12
| | | | | | | | | | | | | | | | | | | The Zephyr initialization was missing a call to lpc_int_mask(), which caused the detected recovery event to be ignored. Add this call before keyboard_scan_init() to match Chromium EC initialization. Note - this requires CL:2731180 for recovery mode be detected correctly. BUG=b:182808955 BRANCH=none TEST=zmake testall TEST=Press recovery combo, verify depthcharge starts recovery mode. Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: If03a837208d6fc025aef1359e72c09fcf39b5656 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2760805 Commit-Queue: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* blipper: support keypad functionMike Lee2021-03-162-0/+33
| | | | | | | | | | | | | | | Enable keypad function BUG=b:182018600 BRANCH=dedede TEST=make BOARD=blipper pass, then test keypad function ok Signed-off-by: Mike Lee <mike5@huaqin.corp-partner.google.com> Change-Id: I313ceba51290ea8968ca25962551431d73518184 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2755358 Reviewed-by: Henry Sun <henrysun@google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* chip/stm32: Remove duplicate macrosTom Hughes2021-03-163-171/+0
| | | | | | | | | | | | | | Re-defining a macro is an error in C++. BRANCH=none BUG=b:144959033 TEST=make buildall TEST=./util/compare_build.sh --boards all --ref1 HEAD --ref2 HEAD^ Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: If8329bc9e79e153961c8ddfb4ddb1c01cdb9b112 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2740562 Reviewed-by: Craig Hesling <hesling@chromium.org>
* ucpd: Add support to turn off type-2 BIST modeScott Collyer2021-03-162-6/+37
| | | | | | | | | | | | | | | | | | | This CL adds changes to the ucpd driver to support turning off BIST mode once it's been started. For ucpd, the peripheral has to be disabled and reset for this purpose. BUG=b:182436876 BRANCH=None TEST=Verfied that honeybuns can pass TDA.2.1.1.1: BMC-PHY-TX-EYE compliance test, which previously was failing because BIST type-2 mode was not being stopped. Signed-off-by: Scott Collyer <scollyer@google.com> Change-Id: Ib6aa898ef5727dd5887e5d1c0b2eee94fdb366b3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2751328 Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Scott Collyer <scollyer@chromium.org>
* zephyr: Add Kconfig for disabling CBI write protectKeith Short2021-03-162-0/+15
| | | | | | | | | | | | | | | | | | Add a Kconfig option to control the CONFIG_BYPASS_CBI_EEPROM_WP_CHECK Chromium EC option. BUG=chromium:1188511 BRANCH=none TEST=make BOARD=drobit TEST=zmake testall Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I119963f0aa74a49f772de5c059206ecddd4941c6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2762530 Commit-Queue: Tim Wawrzynczak <twawrzynczak@chromium.org> Commit-Queue: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* guybrush: Add fan supportRob Barnes2021-03-162-1/+46
| | | | | | | | | | | | | | | Add basic fan support. More tuning will be needed. BUG=b:178217015 TEST=Build BRANCH=None Change-Id: I8133bfeb63346a254d0300d99d2b0ade35f74cc6 Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2762804 Reviewed-by: Bhanu Prakash Maiya <bhanumaiya@google.com> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* guybrush: disable internal pull up for EC_BATT_PRES_ODLelmo_lan2021-03-161-1/+1
| | | | | | | | | | | | | | Disable internal pull up for EC_BATT_PRES_ODL. BUG=b:182876576 TEST=Verified EC_BATT_PRES_ODL will change by plug/remove battery. BRANCH=None Signed-off-by: elmo_lan <elmo_lan@compal.corp-partner.google.com> Change-Id: If4cc5a8ecf59a682eebf764a9a5c710c8029a8d9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2764204 Reviewed-by: Rob Barnes <robbarnes@google.com> Commit-Queue: Rob Barnes <robbarnes@google.com>
* brya: Update auto-generated GPIO listCaveh Jalali2021-03-161-13/+0
| | | | | | | | | | | | | | | | | This refreshes the generated GPIO list based on updates in the main GPIO definition spreadsheet. The only difference is that GPIOs are no longer marked as "alternate" even when GPIO functionality is the alternate function of a pin. The NPCX support code automatically puts all declared GPIO pins into GPIO mode even when that is a pin's alternate function. BRANCH=none BUG=b:173575131 TEST=buildall passes Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: Ib7ba12f45407f86dc5fac6a75f68dee14be02514 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2738548 Reviewed-by: Keith Short <keithshort@chromium.org>
* cozmo: create a link to icarusLucas Chen2021-03-161-0/+1
| | | | | | | | | | | | | | create a /ec/board/cozmo link to icarus for ec. BUG=b:181144502 BRANCH=None TEST=None Change-Id: I63a2ce0c84eefab60bce4c0140a465ed10253920 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2760678 Tested-by: David Wu <david_wu@quanta.corp-partner.google.com> Reviewed-by: Chen-Tsung Hsieh <chentsung@chromium.org> Commit-Queue: Chen-Tsung Hsieh <chentsung@chromium.org>
* voxel, drobit: Create EC mode entry buildsAbe Levkoy2021-03-164-0/+7
| | | | | | | | | | | | | | | | Disable AP-driven mode entry to facilitate regression testing. Also remove now-unused voxel_apmodeentry build. BUG=b:181144682 TEST=make BOARD=voxel_ecmodeentry; make BOARD=drobit_ecmodeentry TEST=Inspect .config files BRANCH=firmware-volteer-13672.B-main Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: I5e52a46013315db4415a3255c12cd0fcd39354bd Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2760804 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* Trogdor: Add HANG_DETECT host event as a S3 wake sourceWai-Hong Tam2021-03-161-0/+1
| | | | | | | | | | | | | | | | When EC detects AP suspend hang, it sends the HANG_DETECT host event to AP. Should make this event as a S3 wake source such that it can wake AP up. BRANCH=Trogdor BUG=b:182477897 TEST=Used an image which fails to enter suspend, checked EC detect the suspend hang and wake AP up afterward. Change-Id: I75d721d9bc0589a839d2b952054d2e4b22e19f31 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2757101 Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
* Mancomb: Add EN_USM_ODLDiana Z2021-03-151-0/+1
| | | | | | | | | | | | | | | | Add EN_USM_ODL and set to open drain disabled for now. USM may be enabled in the future if there are noise issues with the voltage regulators. BRANCH=None BUG=b:182477680 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I5614f36078f400385f6e9c37f599cd3bbc7f6991 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2762801 Reviewed-by: Rob Barnes <robbarnes@google.com> Commit-Queue: Rob Barnes <robbarnes@google.com>
* Mancomb: Add TEMP_AMBIENT_VRDiana Z2021-03-153-18/+30
| | | | | | | | | | | | | | | | Add temperature sensor for ambient temperature. Additionally, simplify the temperature reads since all sensors are hooked up to the same PP3300_S5. BRANCH=None BUG=b:182601210 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I27b1a078e9bfe5db8e043eb9d5b9c7eb29cc1eaf Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2762800 Reviewed-by: Rob Barnes <robbarnes@google.com> Commit-Queue: Rob Barnes <robbarnes@google.com>
* Mancomb: Switch temperature inputs to MODULE_ADCDiana Z2021-03-151-4/+4
| | | | | | | | | | | | | | | Switch definitions for temperature and other analog inputs to MODULE_ADC. BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I7e02281158aa2d34e4beff24fbd15782cbfcd274 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2762799 Reviewed-by: Rob Barnes <robbarnes@google.com> Commit-Queue: Rob Barnes <robbarnes@google.com>
* Mancomb: Enable Power Group interruptsDiana Z2021-03-151-0/+4
| | | | | | | | | | | | | | | | Enable interrupts for EN_PWR_PCORE_S0_R. Note that other power interrupts which are included in the power_signal_list get enabled during power_common_init(). BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I799b0f6055f29b94226aed05930499d74fc41b31 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2762798 Reviewed-by: Rob Barnes <robbarnes@google.com> Commit-Queue: Rob Barnes <robbarnes@google.com>
* zephyr: set the NPCX FW headerWealian Liao2021-03-153-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | For CONFIG_BOARD_RESET_AFTER_POWER_ON feature, the longer initialization time lets H1 reset EC before EC writes EC_RESET_FLAG_INITIAL_PWR flag to BBRAM. It causes EC couldn't recognize the first reset-pin for the current mechanism. Set the volteer, kohaku, delbin firmware NPCX firmware header to improve the initialization time: core clock to SPI clock ratio - 2, SPI clock - 50MHz, flash read mode - dual BUG=None. BRANCH=None. TEST=Check output header offset 6 = 0x0c, offset 7 = 0x03. Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com> Change-Id: If9b3cd9a5ed7086a44ec7efa7bb5c7c40d4bcd81 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2759763 Reviewed-by: Yuval Peress <peress@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* zephyr: complete the NPCX FW header settingWealian Liao2021-03-152-10/+37
| | | | | | | | | | | | | | | | | | This CL includes the following: 1. Add core clock to spi clock ratio header option. 2. CMakeLists uses the wrong config name. Fix it. BUG=None. BRANCH=None. TEST=Check the firmware header can set by kconfig. Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com> Change-Id: I106c0b6b5987444a77cf07878736374378bc25f2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2747554 Reviewed-by: Yuval Peress <peress@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* zephyr: volteer: disable chargen/chgramp commandsKeith Short2021-03-151-1/+1
| | | | | | | | | | | | | | Disable the chargen and chgramp console commands to match the Chromium EC configuration. BUG=b:181794644 BRANCH=none TEST=zmake testall Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I5a4922604deea94640b448285f212efe57cc903d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2756982 Reviewed-by: Simon Glass <sjg@chromium.org>
* zephyr: add CONFIG_ISL9241_SWITCHING_FREQ to allowlistKeith Short2021-03-151-0/+1
| | | | | | | | | | | | | | | | | | | | Add the CONFIG_ISL9241_SWITCHING_FREQ to the allowlist to avoid a compile error on Chromium EC builds. A follow on CL converts the CONFIG_ISL9241_SWITCHING_FREQ to a devicetree property. BUG=none BRANCH=none TEST=make buildall TEST=zmake testall Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: Ic16f3a7747dd2a32f25f9c8acfd8f50310fa1910 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2748446 Reviewed-by: Fabio Baltieri <fabiobaltieri@google.com> Reviewed-by: Yuval Peress <peress@chromium.org> Commit-Queue: Yuval Peress <peress@chromium.org>
* virtual_battery: bug fix in reading SB_AVERAGE_CURRENTIkjoon Jang2021-03-153-5/+8
| | | | | | | | | | | | | | | Fix a bug from CL:2747559, virtual battery returns an error for SB_AVERAGE_CURRENT. virtual battery handler should call battery_get_avg_current(), not battery_get_avg_voltage(). BRANCH=none BUG=b:170921599 TEST=read current_avg knob in kukui Signed-off-by: Ikjoon Jang <ikjn@chromium.org> Change-Id: I90c26a8e1d4fa6faccc0166b9f7b63fca9baef51 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2751320 Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* dirinboz: add FW_CONFIG support for different keyboard layoutIsaac Lee2021-03-153-0/+33
| | | | | | | | | | BUG=b:182232569 BRANCH=firmware-zork-13434.B-main TEST=build all Change-Id: I567739a9499249d5bdb067e23ee80a957ba7c2e4 Signed-off-by: Isaac Lee <isaaclee@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2755360
* juniper: Ignore TABLET_MODE_GPIO_L for kenzoDavid Huang2021-03-152-0/+13
| | | | | | | | | | | | | | | Kenzo only support clamshell. Ignore TABLET_MODE_GPIO_L on Kenzo. BUG=none BRANCH=main TEST=Check device is able to get in and out of tablet mode for board version != 8/9. Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com> Change-Id: I2a7343d7970dc08e9e43a6e17796468b969312db Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2759313 Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* dooly: remove unused thermistorZick Wei2021-03-152-15/+0
| | | | | | | | | | | | | This patch remove ADC1 thermistor wheich not use on dooly. BUG=b:174294972 BRANCH=puff TEST=make BOARD=dooly Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com> Change-Id: I37be7a30e5e4a10571e308e8de5bd31e314309db Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2755357 Reviewed-by: Andrew McRae <amcrae@chromium.org>
* dooly: add usb-c 1 port throttlingZick Wei2021-03-151-0/+4
| | | | | | | | | | | | | | dooly is puff variant but has usb-c 1 port, this patch adds usb-c 1 port throttling when OCP. BUG=b:174294972 BRANCH=puff TEST=make BOARD=dooly Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com> Change-Id: I520303c5c0a70af7094c1b6220a8332745d1f850 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2755348 Reviewed-by: Andrew McRae <amcrae@chromium.org>
* dirinboz: update thermal protect parameterZick Wei2021-03-151-10/+16
| | | | | | | | | | | | | | | | | | This patch update thermal protect parameter as below: All trigger/release by charger thermistor, Charging current 0.5A: Trigger > 58’C ; Release < 57’C CPU PROCHOT: Trigger > 63’C ; Release < 62’C Set USB-C0 port to 1.5A: Trigger > 63’C ; Release < 62’C BUG=b:181803301 BRANCH=zork TEST=verify EC behavior intended when trigger/ release thermal protection. Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com> Change-Id: I9ce794a37c2d29f02f1e2829dcc53340c542b13e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2751304 Reviewed-by: Peter Marheine <pmarheine@chromium.org>
* Guybrush: Enable Power Group interruptsstabilize-13851.B-mainelmo_lan2021-03-131-0/+4
| | | | | | | | | | | | | | Enable interrupt of PG_GROUPC_S0_OD and PG_LPDDR4X_S3_OD. BUG=b:182581653 BRANCH=None TEST=EN_PWR_PCORE_S0_R works normal. Signed-off-by: elmo_lan <elmo_lan@compal.corp-partner.google.com> Change-Id: I06ece39630b3f4eab290a80a64b9f70a8f61cac0 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2757809 Reviewed-by: Rob Barnes <robbarnes@google.com> Commit-Queue: Rob Barnes <robbarnes@google.com>
* mchp: Update chip configuration and flash layout for MEC172xScott Worley2021-03-132-24/+42
| | | | | | | | | | | | | | | | | | | Adding MEC172x specific changes to chip configuration and flash layout header files. MEC172x Boot-ROM loader SPI flash layout is different from previous chips. BRANCH=none BUG=none TEST=Build MCHP MEC170x and MEC152x boards Signed-off-by: Scott Worley <scott.worley@microchip.corp-partner.google.com> Change-Id: Id02cdeac8131844e948799c0c9de4f45c47d4d73 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2747654 Reviewed-by: Martin Yan <martin.yan@microchip.corp-partner.google.com> Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Ravin Kumar <ravin.kumar@microchip.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Martin Yan <martin.yan@microchip.corp-partner.google.com>
* mchp: Add Microchip MEC172x registersScott Worley2021-03-134-66/+1536
| | | | | | | | | | | | | | | | | | | | Microchip MEC172xN is an EC with 416KB total SRAM with eSPI and SPI Host interfaces. The CPU is an ARM Cortex-M4 with FPU, 8 region MPU, and maximum frequency of 96 MHz. This change also adds common CPU clock divider defines for all MEC chips and moves the DMA API struct to the common register header. BRANCH=none BUG=none TEST=Build MCHP MEC170x and MEC152x boards Signed-off-by: Scott Worley <scott.worley@microchip.corp-partner.google.com> Change-Id: Ie159a4addf0bbcd30404339944d5b1695482ab6c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2746438 Reviewed-by: Ravin Kumar <ravin.kumar@microchip.com> Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Martin Yan <martin.yan@microchip.corp-partner.google.com>
* zephyr: fix Kconfig name for console commandsKeith Short2021-03-126-20/+20
| | | | | | | | | | | | | | | Cleanup Kconfig options to match the convention of starting with CONFIG_PLATFORM_EC_CONSOLE_CMD_*. BUG=b:181794644 BRANCH=none TEST=zmake testall Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: Ibed3d0371483b26c17f8f8c05c088694b6f3728d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2756981 Reviewed-by: Simon Glass <sjg@chromium.org> Commit-Queue: Simon Glass <sjg@chromium.org>
* ocpc: Use desired current from charger taskAseda Aboagye2021-03-121-5/+5
| | | | | | | | | | | | | | | | | | | | | OCPC was directly querying the desired battery current instead of honoring the request from the charger task by mistake. This commit fixes that and makes sure that we don't set our current target from the desired battery current directly. BUG=b:180710082 BRANCH=dedede TEST=Build and flash sasuke, charge from C1, verify that desired charge profile is adhered to. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I6d59babcad891fd09ab9a4fc5641e6d152223b74 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2740572 Tested-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com> Reviewed-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com> Reviewed-by: Diana Z <dzigterman@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* zephyr: volteer: Enable battery cut-offKeith Short2021-03-121-3/+1
| | | | | | | | | | | | | | | | | Battery cut-off was disabled because it caused problems when the battery capacity reached 99%. Battery cut-off is no longer causing any charging issues. BUG=b:179393708 BRANCH=none TEST=Discharge battery to 90%, charge to 100% successfully TEST=Run `ectool batterycutoff`, verify battery cutsoff Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: Ied8fa9478ff0360f4077225317d8ae4ad69598d1 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2756968 Reviewed-by: Simon Glass <sjg@chromium.org> Commit-Queue: Simon Glass <sjg@chromium.org>
* VPD: Properly set VPD RA and RD on CC1 and CC2Sam Hurst2021-03-121-2/+2
| | | | | | | | | | | | | | | | Set the RA and RD on CC1 and CC2 of a Vconn Powered Device during the Disc. ID phase. BUG=b:165934405 BRANCH=none TEST=make runtests Verified that CC1 and CC2 were detected as RA and RD using a Total Phase Analyzer. Signed-off-by: Sam Hurst <shurst@google.com> Change-Id: I23e6cdaaa89b77adeb503b28d5847df68ab3cd5d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2748428 Reviewed-by: Diana Z <dzigterman@chromium.org>
* TCPMV2: Add explicit setting of VPD VDO CT CurrentSam Hurst2021-03-125-17/+41
| | | | | | | | | | | | | | | | | | Add the capablility to explicity set a CTVPDs VDO current. BUG=b:165934405 BRANCH=none TEST=make runtests Verified that returned VDO from chocodile_vpdmcu was correct. Signed-off-by: Sam Hurst <shurst@google.com> Change-Id: I2292024986fa89b228b56678d61d1aef2866c817 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2748427 Tested-by: Sam Hurst <shurst@google.com> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Sam Hurst <shurst@google.com>
* TCPMV2: Fix the VPD_VDO returned by VPDsSam Hurst2021-03-121-1/+1
| | | | | | | | | | | | | | | | A device that supports Vconn Powered functionality must reflect this by setting bit0 of its VPD VDO to 1 or 0 if said functionality isn't supported. BUG=b:165934405 BRANCH=none TEST=make runtests Verified that returned VDO from chocodile_vpdmcu was correct. Signed-off-by: Sam Hurst <shurst@google.com> Change-Id: I2f7b6a66c09221f1d5c12831cd2e4b56510aecdd Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2748426 Reviewed-by: Diana Z <dzigterman@chromium.org>
* zephyr: add DPTF supportKeith Short2021-03-126-0/+33
| | | | | | | | | | | | | | | | | | | | | | Add a Kconfig option to enable DPTF support. Adds support for the following ACPI entries: EC_ACPI_MEM_FAN_DUTY (0x04) EC_ACPI_MEM_TEMP_ID (0x05) EC_ACPI_MEM_TEMP_THRESHOLD (0x06) EC_ACPI_MEM_TEMP_COMMIT (0x07) BUG=b:179886912 BRANCH=none TEST=zmake testall TEST=Boot zephyr-ec on Volteer, observe that ACPI warnings for ignored read/writes for DPTF commands are fixed. Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I40cbe79e57c3d4687d828ec46fe0d51034e96bfc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2757028 Reviewed-by: Simon Glass <sjg@chromium.org> Commit-Queue: Simon Glass <sjg@chromium.org>
* zephyr: Improve help text for ACPI supportKeith Short2021-03-121-3/+15
| | | | | | | | | | | | | | Expand on the help text for the CONFIG_PLATFORM_EC_ACPI option. BUG=none BRANCH=none TEST=zmake testall Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: Ib24f355ad22664805c8ab1ada84aa40ed6572637 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2757027 Reviewed-by: Simon Glass <sjg@chromium.org> Commit-Queue: Simon Glass <sjg@chromium.org>
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