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* asurada: inform usb_charger of VBUS changestabilize-13942.B-mainEric Yilun Lin2021-04-281-1/+20
| | | | | | | | | | | | | | | | | Since we do not use PPC for detecting VBUS in the following revision(hayato>=4), we should inform the usb_charger of VBUS status change. BUG=b:186366435 TEST=ectool usbpdpower showed disconnected if unplug adapter BRANCH=ASURADA Change-Id: Iafa37bd926a0f42d660e79a78612819848b738ae Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2853088 Reviewed-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Eric Yilun Lin <yllin@google.com> Tested-by: Eric Yilun Lin <yllin@google.com>
* boten: don't disable charger adc in hibernate.arthur.lin2021-04-281-1/+1
| | | | | | | | | | | | | | Fix AC not detect issue when charger in hibernate. BRANCH=dedede BUG=b:186552718 TEST=make buildall -j Signed-off-by: arthur.lin <arthur.lin@lcfc.corp-partner.google.com> Change-Id: I913c6c4b656a30e953b6e327a4e38574687f6230 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2853690 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* zephyr: it8xxx2_evb: populate gpiostim2021-04-281-0/+96
| | | | | | | | | | | | | Populate named-gpios dts from boards/it8xxx2_evb/gpio.inc. BUG=b:185202623 BRANCH=none TEST="gpioget" on it8xxx2_evb Signed-off-by: tim <tim2.lin@ite.corp-partner.google.com> Change-Id: Ibad5cdb51b388bba13dd8fa45f750c43321ef383 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2850298 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* amd_x86: Check for S0ix before S3Rob Barnes2021-04-271-3/+6
| | | | | | | | | | | | | | | Cezanne is asserting both SLP_S0 and SLP_S3 for S0ix. On Intel only SLP_S3 is asserted. Move check for S0ix before check for S0 so EC enters correct power state. BUG=b:186135411 TEST=EC reports S0ix power state BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: I47ede14e8031ba4d6a01399f2501801e597a6b1f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2847332 Reviewed-by: Diana Z <dzigterman@chromium.org>
* raa489000: Disable DVC in hibernateAseda Aboagye2021-04-271-0/+8
| | | | | | | | | | | | | | | | | | | Leaving DVC enabled on the primary charger in hibernate will increase the power consumption of the system. When we enter hibernate, DVC isn't needed so we can safely disable it. BUG=b:184219851 BRANCH=dedede TEST=Build and flash madoo, verify that DUT is able to hibernate and can charge from sub board when woken up. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I027cceac0cb7eff9ac08293449a06712e9d1daaf Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2848292 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* ANX7451: Set upstream AUX FLIPRob Barnes2021-04-273-0/+41
| | | | | | | | | | | | | | | | | AUX flip control must be enabled. Otherwise alternate mode will not work on ANX7451 when cable is flipped. The USB registers use a separate i2c address that must be dynamically configured. Since there may be multiple ANX74** parts on a board, this address must be dynamically configured using a board callback. BUG=b:185276137 TEST=Display works when cable is flipped on B2 BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: I144131b2f53985d97e0be960e202366f726dd90b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2854120 Reviewed-by: Diana Z <dzigterman@chromium.org>
* guybrush: Set G3_TO_PWRBTN_DELAY_MS to 16msRob Barnes2021-04-271-1/+1
| | | | | | | | | | | | | | G3->S0 timing requires atleast 16 ms between RSMRST_L deasserting and PWRBTN asserting. BUG=b:183038598 TEST=16ms delay measured in scope. Boots normally. BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: Ic025445ec18f01cc3447014c4a5a5c8f8c2b4ba3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2855214 Reviewed-by: Diana Z <dzigterman@chromium.org>
* guybrush: Start G3_TO_PWRBTN_DELAY_MS after RSMRST_LRob Barnes2021-04-271-2/+11
| | | | | | | | | | | | | | | G3->S0 timing requires 16 ms between RSMRST_L deasserting and PWRBTN asserting. This change waits for RSMRST_L to deassert before starting the G3_TO_PWRBTN_DELAY_MS delay. BUG=b:183038598 TEST=Time delay in G3_TO_PWRBTN_DELAY_MS is accurate scope catpures. BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: I37de47229665597acbb857d9a8537f99be6a3f0b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2854336 Reviewed-by: Diana Z <dzigterman@chromium.org>
* config: rename CONFIG_FLASH to CONFIG_FLASH_CROSJeremy Bettis2021-04-2727-40/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 4ac1d81e1430dbfbfba1376a23ab19dfa845d7ef. The config name collides with the same config name in zephyr. Also, renames zephyr Kconfig CONFIG_PLATFORM_EC_FLASH to CONFIG_PLATFORM_EC_FLASH_CROS as the corresponding change at Kconfig side. BUG=chromium:1202406,b:180980668 TEST=make -j16 runhosttests buildall && zmake testall && \ /mnt/host/source/src/platform/ec/zephyr/firmware_builder.py --metrics \ /tmp/tmplt8ty8ci test ; echo $? BRANCH=none Signed-off-by: Jeremy Bettis <jbettis@google.com> Change-Id: I5b5e58b30d936b5232e049827f458d9a2ed06340 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2855320 Commit-Queue: Jeremy Bettis <jbettis@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org> Tested-by: Jeremy Bettis <jbettis@chromium.org> Auto-Submit: Jeremy Bettis <jbettis@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* TCPMv2: Enter TBT/USB4 only if port supportsVijay Hiremath2021-04-271-1/+3
| | | | | | | | | | | | | | | Type-C ports may not be symmetrical on Reference Design Platforms hence check if the port supports TBT & USB4 mode before entering the mode. BUG=none BRANCH=none TEST=Tested on ADLRVP, TBT is not entered on non supported port Change-Id: Ifd3eae72f6226686462b07f9008b66bd60c7895b Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2846634 Reviewed-by: Ayushee Shah <ayushee.shah@intel.com> Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* zephyr: asurada: Enable GPIOsDenis Brockus2021-04-273-2/+366
| | | | | | | | | | | | | | | | Enable GPIO and include GPIO DTS BUG=b:180980668 BRANCH=none TEST=ec console "gpioget" Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: Ied6fddfb69071fae246e1331c055b2fb61d34825 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2854335 Tested-by: Denis Brockus <dbrockus@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Yuval Peress <peress@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* zephyr: lazor: Fix alt motion sensorsDawid Niedzwiecki2021-04-271-24/+30
| | | | | | | | | | | | | | | | Move the alternative motion sensor to 'motionsense-sensor-alt' node, which is used to create 'motion_sensors_alt' array and 'sensor_alt_id' enum. BUG=b:183990188 BRANCH=none TEST=zmake testall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I9dff17c9efaa97d288a9ed6a18f5f633a85d85b8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2853595 Reviewed-by: Yuval Peress <peress@chromium.org> Commit-Queue: Yuval Peress <peress@chromium.org>
* Cleanup v .1/ v . 2 diagram to match current stateAadit Modi2021-04-274-8/+2
| | | | | | | | | | | | | | | FPC 1025 imagery in the dragonclaw picture and FPC 1145 for icetower. Note orientation for the sensor. BUG=b:183747042 TEST=rendered with gittiles Change-Id: I036e6cbe48c0c53f73ccb0d0157bfef884009184 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2824045 Tested-by: Aadit Maheshkumar Modi <modia@chromium.org> Reviewed-by: Kevin Shelton <kmshelton@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org> Commit-Queue: Aadit Maheshkumar Modi <modia@chromium.org>
* ec: migrate out of flashrom deprecated optionsDaniel Campello2021-04-271-2/+1
| | | | | | | | | | | | | | | | | This change replaces --fast-verify for the supported equivalent flashrom option. Also it removes --ignore-fmap as this is implicit from using -l option and it is going away. BRANCH=none BUG=b:186479007 TEST=flash_ec --image=${EC_IMAGE} --board=${BOARD} Signed-off-by: Daniel Campello <campello@chromium.org> Change-Id: I3014f1e26c5b3eea7db109a2dd401d7a0163cc9d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2853603 Commit-Queue: Raul E Rangel <rrangel@chromium.org> Reviewed-by: Raul E Rangel <rrangel@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Sasukette: Fix main board charger can't wake from hibernateMike Lee2021-04-272-1/+3
| | | | | | | | | | | | | | | | | | | | In Sasukette's design, there is a protection IC between USB connector and TCPC. When EC is hibernate, the CC lines will be disconnected, which cause the result that TCPC can't detect AC power and Chromebook won't wake the system. Enalbing ADC for all modes by setting 0x4C bit 0 to 1 can prevent issue mention above. BUG=b:186335659 BRANCH=dedede TEST=flash sasukette and test typeC adapter can wake system from hibernate mode. Signed-off-by: Mike Lee <mike5@huaqin.corp-partner.google.com> Change-Id: I04e80815ebfb5aa4022835a5fd8a59de1305e3ba Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2853087 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* zephyr: shim: do not return from main if thread monitoring is enabledFabio Baltieri2021-04-271-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | Returning from main causes the corresponding thread structure to be skipped from the thread list, so that it does not get displayed by commands such as "kernel stacks". The structure is statically allocated though, so it is convenient to keep it active when thread monitoring is enabled so that the corresponding stack can be tuned. After this patch: uart:~$ kernel stacks ... 0x200c76f8 main (real size 1024): unused 148 usage 876 / 1024 (85 %) ... BUG=b:183748844 BRANCH=none TEST=kernel stacks Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com> Change-Id: Iee34fac36f5e8989e9d7c761b7cc6b9a14a7b987 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2853598 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Yuval Peress <peress@chromium.org> Commit-Queue: Yuval Peress <peress@chromium.org>
* zephyr: volteer: Change PWM clock source formatWealian Liao2021-04-271-4/+4
| | | | | | | | | | | | | | | | | NPCX providers new PWM source clock select format: clock-bus = "NPCX_CLOCK_BUS_LFCLK"; Change to use new source clock select format. BUG=b:186003989 BRANCH=none TEST=Check all pwm select to correct source clock by 'rw'. Cq-Depend: chromium:2852736 Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com> Change-Id: Ic8d40941452d65386061646a9002a44f9b472ef4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2852366 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* zephyr: initial bringup for it8xxx2_evbtim2021-04-2710-0/+216
| | | | | | | | | | | | | | | | Initial bringup for it8xxx2_evb. The function includes UART console and basic commands. BUG=b:185202623 BRANCH=none TEST=EC boots on it8xxx2_evb. Console commands test: version Signed-off-by: tim <tim2.lin@ite.corp-partner.google.com> Change-Id: I96839f96b8128460a123fe0344b4ae077b6e8761 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2752568 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
* pirika: Initial EC imagekirk_wang2021-04-279-0/+1411
| | | | | | | | | | | | | | | | | | Create the initial EC image for the pirika variant by copying the waddledee reference board EC files into a new directory named for the variant. (Auto-Generated by create_initial_ec_image.sh version 1.5.0). BUG=b:184157747 BRANCH=None TEST=make BOARD=pirika Signed-off-by: kirk_wang <kirk_wang@pegatron.corp-partner.google.com> Change-Id: I73effcc0a0d71ecedded37057854c7486c7b2463 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2847670 Reviewed-by: Shou-Chieh Hsu <shouchieh@chromium.org> Commit-Queue: Shou-Chieh Hsu <shouchieh@chromium.org>
* it83xx/hwtimer: swap timer 7 and timer 8's applicationDino Li2021-04-272-4/+16
| | | | | | | | | | | | | | | | | | | | This CL change watchdog warning timer to timer 8 (32bit) and change low power mode timer to timer 7 (24bit) The next step will be changing watchdog warning timer to timer 1 (16bit), so we will get a 32bit timer for future use. BUG=b:186028167 BRANCH=none TEST=console command "waitms" "waitms 1200", EC warning but no reset. "waitms 1600", EC warning and reset. No reset after EC waked-up from low power mode. Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Change-Id: Ibf1387ffe334a6e3e82d5b6a72cdb6e099d3a279 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2847671 Reviewed-by: Wai-Hong Tam <waihong@google.com> Reviewed-by: Sam Hurst <shurst@google.com>
* zephyr/drivers: it8xxx2: fix the priority of cros_bbram drivertim2021-04-272-1/+11
| | | | | | | | | | | | | | | | This CL fix the priority of cros_bbram driver which should be higher than SYSTEM_PRE_INIT_PRIORITY. BUG=b:185202623 BRANCH=none TEST=console command: reboot The memory dump of bbram will be written the flag of EC_RESET_FLAG_SOFT after rebooting. Signed-off-by: tim <tim2.lin@ite.corp-partner.google.com> Change-Id: Iea829450ff3bbef5f848cc70198f942a0872e6c3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2847519 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* asruada: undef USB_PD_DEBUG_LEVELEric Yilun Lin2021-04-272-2/+0
| | | | | | | | | | | | | | BUG=none TEST=make buildall BRANCH=asurada Change-Id: Ice2b4f5bf95fe88bd075fda892731ba0d6c96d0e Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2853086 Tested-by: Eric Yilun Lin <yllin@google.com> Auto-Submit: Eric Yilun Lin <yllin@google.com> Reviewed-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org>
* mkbp: Separate MKBP_INFO host command from the keyboard driverBoris Mittelberg2021-04-275-126/+169
| | | | | | | | | | | | Detaching protocol-related info command from the keyboard driver. BUG=b:170966461 BRANCH=main,firmware-dedede-13606.B,firmware-volteer-13672.B-main TEST=None Signed-off-by: Boris Mittelberg <bmbm@google.com> Change-Id: I7943f7537bdf003145e9bd909a14f9451d922a5a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2796381
* asurada: fix querying ADC for VBUSEric Yilun Lin2021-04-271-1/+2
| | | | | | | | | | | | | | | | | | | charge_manager_get_vbus would assume the VBUS is 5V when the PD statue is sourceing, and this is not what we expected. Directly query the ADC instead. BUG=b:186176093 TEST=USB disk can be enumerated. BRANCH=asurada Change-Id: I38bb706764827fbc109dcde5df87dfa0927e40aa Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2852360 Tested-by: Eric Yilun Lin <yllin@google.com> Tested-by: Hsu Alvis <alvishsu@google.com> Auto-Submit: Eric Yilun Lin <yllin@google.com> Reviewed-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org>
* asurada: move board_get_vbus_adc to common codeEric Yilun Lin2021-04-273-25/+13
| | | | | | | | | | | | | | BUG=none TEST=make buildall -j BRANCH=asurada Change-Id: I03bc55c3d55927866355b457ec4b17f75d32f60f Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2852359 Tested-by: Eric Yilun Lin <yllin@google.com> Auto-Submit: Eric Yilun Lin <yllin@google.com> Reviewed-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org>
* cherry: update USB PIDTing Shen2021-04-271-1/+1
| | | | | | | | | | | | | | | | PID allocated in cl/370096781 BUG=none TEST=make BRANCH=none Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: Id2b134cd955a07d390f9dcdfd109b7249cca9264 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2850616 Tested-by: Ting Shen <phoenixshen@chromium.org> Auto-Submit: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Eric Yilun Lin <yllin@google.com> Commit-Queue: Eric Yilun Lin <yllin@google.com>
* asurada: update USB PIDTing Shen2021-04-271-1/+1
| | | | | | | | | | | | | | | | PID allocated in cl/370096781 BUG=none TEST=make BRANCH=asurada Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: I737d4acfe8af7ff89f14afee32fd6919380e6d1f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2850615 Tested-by: Ting Shen <phoenixshen@chromium.org> Auto-Submit: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Eric Yilun Lin <yllin@google.com> Commit-Queue: Eric Yilun Lin <yllin@google.com>
* cherry: enable CBITing Shen2021-04-273-118/+8
| | | | | | | | | | | | | | BUG=b:185196921 TEST=`ectool cbi set 0 56 1 10` verify board version changed to "56" in ec console BRANCH=main Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: I17045fd24bfaf50da9ada1ef09e25c60a758a8f3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2823641 Tested-by: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Eric Yilun Lin <yllin@google.com> Commit-Queue: Eric Yilun Lin <yllin@google.com>
* Coachz:PS8XXX: Add 5ms delay to make CC being judged correntlytongjian2021-04-272-0/+19
| | | | | | | | | | | | | | | | | | | This may be a PS8XXX firmware issue, Parade is still trying. BUG=b:185202064 TEST=emerge-strongbad chromeos-ec 0. Insert the Dock to the typeC ports and shutdown the devices; 2. Press powerbutton and poweron the unit; 3. Use lsusb command, list can not find the Dock information; 4. Can find the Dock. BRANCH=Trogdor Signed-off-by: tongjian <tongjian@huaqin.corp-partner.google.com> Change-Id: Ib667df88549fc9e4f0e4603574af5d70ef326e11 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2847867 Reviewed-by: Rock Chiu <rock.chiu@paradetech.corp-partner.google.com> Reviewed-by: Wai-Hong Tam <waihong@google.com>
* elemi: Tune Vconn_Swap delayDevin Lu2021-04-271-0/+3
| | | | | | | | | | | | | The Vconn source should ready before PS_RDY. BUG=b:186079130 BRANCH=firmware-volteer-13672.B-main TEST=PDtrace to make sure the timing of Vconn_Swap. Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Change-Id: I3c60ea73219497c661b6fec5add77c73a7f116b8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2847714 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* Metaknight: Set gyroscope translation matrixYu-An Chen2021-04-271-1/+1
| | | | | | | | | | | | | | | CTS tests are failing because sensor values from axis 1 and 2 are negated. When the test expects 360 degrees, -360 degrees gets reported. Set the standard base translation matrix to resolve this. BUG=b:186141913 BRANCH=dedede TEST=CTS PASS Signed-off-by: yu-an.chen@quanta.corp-partner.google.com Change-Id: Ic56fd73a0c9e382aa83ddf1f8fb5a660920ccd11 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2850293 Reviewed-by: Henry Sun <henrysun@google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* mkbp: Separate FIFO from the keyboard driverBoris Mittelberg2021-04-2710-244/+319
| | | | | | | | | | | | | | Move protocol-related functionality out from the keyboard driver. This change is required to allow passing button events via MKBP on devices with non-MKBP keyboards. It reorganizes the code without changing the logic. BUG=b:170966461 BRANCH=main,firmware-dedede-13606.B,firmware-volteer-13672.B-main TEST=None Signed-off-by: Boris Mittelberg <bmbm@google.com> Change-Id: Ifb5b9d8e605f491313ee1dfe2c9950eb52152aa8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2669355
* zephyr: npcx: Fix PSL hibernateWealian Liao2021-04-271-1/+1
| | | | | | | | | | | | | | | | | NPCX uses wrong config to switch hibernate PSL & disable RAM so volteer doesn't enter hibernate PSL after disable RAM submitted. Change to use CONFIG_PLATFORM_EC_HIBERNATE_PSL to fix it. BRANCH=none BUG=none TEST=Check EC can wakeup by powerbtn on lazor(disable RAM) & volteer(PSL). Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com> Change-Id: Iad44d68789705e9b9e729e98b1e054eae298ceb8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2850305 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* ADLRVP: Make code robust for validating TCPC vendorsVijay Hiremath2021-04-267-19/+45
| | | | | | | | | | | | | | | | | Intel Reference Validation Platform is designed to test multiple combinations of hardware thus help enable vendors seamlessly. Added task based TCPC code enablement so that TCPC vendors can easily hook their hardware, make the code changes and validate their TCPC. BUG=none BRANCH=none TEST=make buildall -j Change-Id: I989b6a35c6ff3f96150d09de11458886f9642d1f Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2823167 Reviewed-by: Sooraj Govindan <sooraj.govindan@intel.com> Reviewed-by: caveh jalali <caveh@chromium.org>
* zephyr: volteer: Set fan PWM to output open-drainWealian Liao2021-04-261-0/+1
| | | | | | | | | | | | | | | | | CROS Volteer fan PWM has PWM_CONFIG_OPEN_DRAIN flag which sets the PWM to output open drain. Set Zephyr Volteer fan PWM to output open-drain to meet the original setting. BUG=none BRANCH=none TEST=Check pwm5 set to output open-drain by 'rw'. Cq-Depend: chromium:2845386 Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com> Change-Id: I43c5b4b95b04f4a38bf123f3691b165f541ad7e0 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2847863 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* usb_pe_drp: Consider CHARGE_PORT_NONE for HardRstAseda Aboagye2021-04-261-5/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | When we arrive in the EC image without a battery and with a PD supplier, we would eventually consider sending a HardReset since we are expecting SourceCaps to be sent by the port partner. However, since we no longer maintain our contract across images and we would like for the board to not brown out, we avoid sending the HardReset and simply disable the port instead. However, this situation can occur before we decide on a charge port. Therefore, this commit simply adds another condition when deciding to skip sending the HardReset. If a battery is not present, but there's no active charge port, we must be running on AC somehow so don't send the HardReset as this port may in fact be the previous charge port. BUG=b:176214112,b:178728138 BRANCH=dedede TEST=Build and flash galith; plug in charger on C1, remove battery, sysjump between RO and RW many times, verify that SoC remains in S0. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I16054d9c1ddac780243524e23a656ba3770bb4a8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2848290 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* galtic: Remove config for firmware qualJacky Wang2021-04-261-3/+0
| | | | | | | | | | | | | | | 1.Remove CONFIG_SYSTEM_UNLOCKED BUG=b:183560885 BRANCH=firmware-dedede-13606.B TEST=BOARD=galtic Signed-off-by: Jacky Wang <jacky5_wang@pegatron.corp-partner.google.com> Change-Id: Idf644f7fe13f449f931af33fc4d7fb5ac663a4c1 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2850295 Reviewed-by: Michael5 Chen <michael5_chen1@pegatron.corp-partner.google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* zephyr: enable motionsense for delbinHyungwoo Yang2021-04-267-1/+231
| | | | | | | | | | | | | This change enables motionsense for delbin BUG=none BRANCH=none TEST=build delbin zephyr Signed-off-by: Hyungwoo Yang <hyungwoo.yang@intel.corp-partner.google.com> Change-Id: Ic11615fdf71fa14d8e77ebac45b38704e3f6cba0 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2841143 Reviewed-by: Yuval Peress <peress@chromium.org>
* zephyr: sensors: Fix alternate sensors typoDawid Niedzwiecki2021-04-261-1/+1
| | | | | | | | | | | | | | Fix typo in the motionsense_sensor header. BUG=b:183990188 BRANCH=none TEST=zmake testall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I3b7ef0a459bf0d5ff6b610f6700eb348db0641ed Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2850960 Reviewed-by: Yuval Peress <peress@chromium.org> Commit-Queue: Yuval Peress <peress@chromium.org>
* magister: config C1 port HDMI/PD function by fw_configBen Chen2021-04-264-22/+105
| | | | | | | | | | | | | | | switch GPIO F5/91/92 type by fw_config for 1A_HDMI/PD function BUG=b:185872184 BRANCH=dedede TEST=EE check with function workable for HDMI by fw_config 1A_HDMI bits map. Change-Id: Id9405b2acf1a163c233239339886c984d00dc544 Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2839967 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* honeybuns: Enhancements to pd_transition_voltageScott Collyer2021-04-252-36/+97
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The vendor for MP4245 buck boost converter recommends averaging 5 samples to get more accurate voltage measurements. This CL adds a 4 sample sliding window to add averaging to the vbus adc measurements. 4 samples was chosen to reduce complexity by allowing use of a circular sample buffer. In addition to adding averaging, the function to disable VBUS has been modified so that VOUT from the mp4245 is no longer disabled. Since VBUS is turned on/off via the PPC, the mp4245 votlage output can be left enabled always. When VBUS is turned off, the mp4245 setpoint is set back to 5V and the pd_transition_voltage function is used to wait until this voltage level is reached. Previously, the mp4245 output was being turned off and then the output voltage was being checked until it reached 5V. This check was likely incorrect wihtout setting the voltage setpoint. BUG=b:185066238 BRANCH=quiche TEST=connected to host machine and verified that voltage ramps up/down as expected. Ramp up case: [10.127896 C0: PE_SRC_Transition_Supply] [10.166617 vbus[3]: new = 8651 mV, avg = 6883 mV, target = 20000 mV] [10.169337 vbus[4]: new = 9889 mV, avg = 8071 mV, target = 20000 mV] [10.172023 vbus[5]: new = 11328 mV, avg = 9350 mV, target = 20000 mV] [10.174712 vbus[6]: new = 12766 mV, avg = 10659 mV, target = 20000 mV] [10.177403 vbus[7]: new = 14085 mV, avg = 12017 mV, target = 20000 mV] [10.180095 vbus[8]: new = 15165 mV, avg = 13336 mV, target = 20000 mV] [10.182786 vbus[9]: new = 16563 mV, avg = 14645 mV, target = 20000 mV] [10.185486 vbus[10]: new = 18001 mV, avg = 15954 mV, target = 20000 mV] [10.188180 vbus[11]: new = 19480 mV, avg = 17302 mV, target = 20000 mV] [10.190875 vbus[12]: new = 19959 mV, avg = 18501 mV, target = 20000 mV] [10.193569 vbus[13]: new = 20160 mV, avg = 19400 mV, target = 20000 mV] [10.199136 C0: PE_SRC_Ready] Ramp down case: > pd 0 swap power > [40.216075 C0: PE_PRS_SRC_SNK_Send_Swap] [40.244508 C0: PE_PRS_SRC_SNK_Transition_To_Off] [40.255491 vbus[3]: new = 16124 mV, avg = 18082 mV, target = 5000 mV] [40.258323 vbus[4]: new = 14525 mV, avg = 16693 mV, target = 5000 mV] [40.261296 vbus[5]: new = 13086 mV, avg = 15274 mV, target = 5000 mV] [40.264046 vbus[6]: new = 11648 mV, avg = 13846 mV, target = 5000 mV] [40.266954 vbus[7]: new = 10369 mV, avg = 12407 mV, target = 5000 mV] [40.269703 vbus[8]: new = 9130 mV, avg = 11058 mV, target = 5000 mV] [40.272468 vbus[9]: new = 7652 mV, avg = 9700 mV, target = 5000 mV] [40.275211 vbus[10]: new = 6292 mV, avg = 8361 mV, target = 5000 mV] [40.278124 vbus[11]: new = 5094 mV, avg = 7042 mV, target = 5000 mV] [40.280870 vbus[12]: new = 5054 mV, avg = 6023 mV, target = 5000 mV] [40.283665 vbus[13]: new = 4974 mV, avg = 5354 mV, target = 5000 mV] [40.286411 vbus[14]: new = 5014 mV, avg = 5034 mV, target = 5000 mV] Signed-off-by: Scott Collyer <scollyer@google.com> Change-Id: I12fcc5a006985ff482df0963dfeb0af5b39dcfd5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2827513 Commit-Queue: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* honeybuns: Modify vconn and dr swap policyScott Collyer2021-04-251-4/+11
| | | | | | | | | | | | | | | | | | | | | | | | This CL modifies honeybuns specific policy for data role and vconn swaps. For vconn swaps, allow if PE request flag is set and we are currently not the vconn source. For data role swaps, add a check to only allow if the flag for check data role in PE is set. Otherwise, if the port partner rejects the data role swap, we can end up sending a non-stop stream of data role swap request messages. BUG=b:183026242 BRANCH=quiche TEST=tested on quiche For vconn swap, verified that we don't end up doing multiple vconn swaps back and forth with the host port. For data role swap, verfied that even when the data role swap is rejected, there is still just one attempt. Signed-off-by: Scott Collyer <scollyer@google.com> Change-Id: Ic3e96d7aeac40c9f8c9bf97c5f4b0142ff8365f4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2827511 Commit-Queue: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Sam Hurst <shurst@google.com>
* TCPMv2: PE: Refer to vconn swap policy for sop'/sop''Scott Collyer2021-04-241-1/+2
| | | | | | | | | | | | | | | | | | | | | There is a vconn swap check in pe_attempt_discovery that is used to trigger a possible vconn role swap requeest. This check takes into account a board's specific policy (if necessary). But, a vconn role swap can also be triggered when sending a VDM message to SOP'/SOP''. In this case, board specific policy still needs to be checked. BUG=b:183026242 BRANCH=quiche TEST=tested on quiche and verified that there is no longer a continous stream of vconn swap attempts. Signed-off-by: Scott Collyer <scollyer@google.com> Change-Id: I5d239c78dc0d324e0c3dbb99dfc7fa093e2f6570 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2827510 Commit-Queue: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* Revert "config: rename CONFIG_FLASH to CONFIG_FLASH_CROS"stabilize-13935.B-mainJack Rosenthal2021-04-2425-37/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 4e074a16c5703f0cdd7b7d780a8ae1bea53a445a. Reason for revert: responsible for CQ failures (crbug.com/1202406) BUG=chromium:1202406 BRANCH=none TEST=CQ Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Original change's description: > config: rename CONFIG_FLASH to CONFIG_FLASH_CROS > > The config name collides with the same config name in zephyr. > > Also, renames zephyr Kconfig CONFIG_PLATFORM_EC_FLASH to > CONFIG_PLATFORM_EC_FLASH_CROS as the corresponding change at Kconfig > side. > > BUG=b:180980668 > TEST=make buildall > BRANCH=none > > Change-Id: Ibac008ddff8c041aae04dca0bbf973823abe7640 > Signed-off-by: Eric Yilun Lin <yllin@chromium.org> > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2816622 > Tested-by: Eric Yilun Lin <yllin@google.com> > Reviewed-by: Keith Short <keithshort@chromium.org> > Commit-Queue: Keith Short <keithshort@chromium.org> Bug: b:180980668 Change-Id: Idc5e799d3b0ea8cc76dbbb49a91b3758ce6e9719 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2847274 Auto-Submit: Jack Rosenthal <jrosenth@chromium.org> Bot-Commit: Rubber Stamper <rubber-stamper@appspot.gserviceaccount.com> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
* zephyr: Update banner to match Chromium OSKeith Short2021-04-236-19/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the boot banner to match Chromium OS. This also modifies the version output to include "_zephyr" after the board name to clearly identify the image type. Boot banner: Booting Zephyr OS build zephyr-v2.5.0-31-g6fcd6373e58a --- UART initialized after reboot --- [Image: RO, volteer_zephyr_v2.0.8350-190d6f 2021-04-08 11:15:09 keithshort@mtbaldy] [Reset cause: reset-pin] uart:~$ version Chip: Nuvoton NPCX796FC 02 Board: 1 RO: volteer_zephyr_v2.0.8350-190d6f RW: volteer_zephyr_v2.0.8350-190d6f Build: volteer_zephyr_v2.0.8350-190d6f 2021-04-08 11:15:09 keithshort@mtbaldy BUG=none BRANCH=none TEST=zmake testall Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: Ia136c4e025aba95217f1d8c51de39255fef54f7b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2822208 Commit-Queue: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* config: rename CONFIG_FLASH to CONFIG_FLASH_CROSEric Yilun Lin2021-04-2325-38/+37
| | | | | | | | | | | | | | | | | | | The config name collides with the same config name in zephyr. Also, renames zephyr Kconfig CONFIG_PLATFORM_EC_FLASH to CONFIG_PLATFORM_EC_FLASH_CROS as the corresponding change at Kconfig side. BUG=b:180980668 TEST=make buildall BRANCH=none Change-Id: Ibac008ddff8c041aae04dca0bbf973823abe7640 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2816622 Tested-by: Eric Yilun Lin <yllin@google.com> Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* raa489000: Sink VBUS before switching to TCPC sideMike Lee2021-04-231-1/+1
| | | | | | | | | | | | | | | | | Modify start sinking VBUS condition. in the first initial state, the power status is in the uninit state. BUG=b:178728138 BRANCH=dedede TEST=build and flash sasukette, remove battery, plug in 45W charger, verify that DUT can boot up. Signed-off-by: Mike Lee <mike5@huaqin.corp-partner.google.com> Change-Id: Id7223474046528ebece0e1267ec56d1c4d148f41 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2847866 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org>
* zephyr: initial bringup for asuradaDenis Brockus2021-04-2310-0/+206
| | | | | | | | | | | | | | | | | EC should boot with UART active BUG=b:180980668 BRANCH=none TEST=zmake configure -b $PROJ_HAYATO Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: Idae8453c5803442c2f9853c45462a7eb74d5c268 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2844770 Tested-by: Denis Brockus <dbrockus@chromium.org> Tested-by: Jack Rosenthal <jrosenth@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
* zephyr: lazor: Add kx022 sensorYuval Peress2021-04-231-3/+33
| | | | | | | | | | | | | | | | Add the kx022 as an alternate sensor for the bma255. The logic for swapping the sensors will come in future CLs associated with b:183990188. BRANCH=none BUG=b:183990188, b:185966444 TEST=zmake testall Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: I681624034f63657dfcc0a352b31a0bbed61bd8db Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2846416 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* zephyr: sensors: Add alternate sensors supportYuval Peress2021-04-233-7/+66
| | | | | | | | | | | | | | | | | | | | | In some boards there's a runtime decision for which sensor to use. In order to support this we'll need an instance of the alternate sensors as well as a mapping for them. Add an optional phandle `alternate-for` to the base sensors bindings. When used, the sensor will be excluded from the primary motion_sensors array and added instead to the motion_sensors_alt array. BRANCH=none BUG=b:183990188, b:185966444 TEST=zmake testall Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: I6f6e3a9659a381c45fd97fbce9fecb2a807f7fa2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2846415 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
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