summaryrefslogtreecommitdiff
Commit message (Collapse)AuthorAgeFilesLines
* storo:The stylus has no function when the first time using the stylus.stabilize-13970.B-mainqinwentao2021-05-141-0/+3
| | | | | | | | | | | | | | | | | fix the power-on detection of the stylus BUG=b:187970959 BRANCH=dedede TEST=make -j BOARD=storo Signed-off-by: jesen <wangganxiang@huaqin.corp-partner.google.com> Change-Id: Iabde2114464865b7b1cae865bd0737cdb54c9b4a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2891678 Reviewed-by: Henry Sun <henrysun@google.com> Reviewed-by: Mike Lee <mike5@huaqin.corp-partner.google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* storo: remove CONFIG_SYSTEM_UNLOCKED for faft_ecMike Lee2021-05-131-3/+0
| | | | | | | | | | | | | | | Remove CONFIG_SYSTEM_UNLOCKED for firmware qual test BUG=b:187867613 BRANCH=dedede TEST=make BOARD=storo pass TEST=test firmware_ECSystemLocked pass Signed-off-by: Mike Lee <mike5@huaqin.corp-partner.google.com> Change-Id: I7233db423321ba1e3753afa7c012142df5c0259b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2891682 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* cret: Add thermistorsjohnwc_yeh2021-05-132-0/+27
| | | | | | | | | | | | | | | | This change adds the temperature sensors for cret, which are hooked up to 2 of the ADCs. BUG=b:187894632 BRANCH=dedede TEST=build and test on cret board. Can obtain value via ectool cmd. Signed-off-by: johnwc_yeh <johnwc_yeh@compal.corp-partner.google.com> Change-Id: I7d07c36e80b95b149d503fd9e37999291c21d5f4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2891675 Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* zephyr: asurada: Enable I2CDenis Brockus2021-05-135-17/+122
| | | | | | | | | | | | | | | | | | | Hold off on merging this until https://chromium-review.googlesource.com/#/q/2859183 and https://chromium-review.googlesource.com/#/q/2857993 or their equivalent have been landed by ITE BUG=b:180980668,b:186673243 BRANCH=none TEST=i2c shell "i2c scan I2C_0" Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: I6c8bbe9e6aef1ab24fc25797e379b0e5cf8a070f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2855217 Tested-by: Denis Brockus <dbrockus@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Yuval Peress <peress@chromium.org>
* zephyr: it8xxx2/pinmux: use new pinmux driverDino Li2021-05-131-15/+94
| | | | | | | | | | | | | | | | | | Enable i2c ports alt function with new pinmux driver. BUG=b:187043683 BRANCH=none TEST=On Asurada, verify I2C ports' alt function are set correctly. Cq-Depend: chromium:2857993 Signed-off-by: Denis Brockus <dbrockus@google.com> Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Change-Id: I816aa7e9f9aff1eecf3ebcd55bf822f0e66cdff3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2858298 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org> Tested-by: Denis Brockus <dbrockus@chromium.org>
* raa489000: enable adc functionMike Lee2021-05-131-10/+31
| | | | | | | | | | | | | | | | | Enable adc function so that We can quickly get the bus voltage. and move clear ADC bit after charger_get_vbus_voltage to reduce power consumption BUG=b:178981107,b:178728138 BRANCH=dedede TEST=storo can keep asgate not drop with ac only TEST=sasukette can keep asgate not drop with AC only Signed-off-by: Mike Lee <mike5@huaqin.corp-partner.google.com> Change-Id: I39db6f80a5439dbd890c788981796165abb49415 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2890492 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* ectool: Make i2cread/write address print consistentRob Barnes2021-05-131-12/+11
| | | | | | | | | | | | | | | | | | ectool i2cread and i2cwrite expect an 8-bit address as input. However the output prints a 7-bit address. This is confusing for ectool users. This CL changes the output to be the 8-bit address. i2cxfer expects a 7-bit address and is unaffected by this CL. BUG=b:187811828 TEST=ectool i2cread 8 1 0x52 0 Read from I2C port 1 at 0x52 offset 0x0 = 0x10 BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: I71596080200d9ee08b23536d233cf34d958bf9b9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2887555 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* Cozmo: Add new battery informationSue Chen2021-05-132-0/+88
| | | | | | | | | | | | | new battery config : AP19B5K, AP19B8K, AP20CBL BUG=none BRANCH=icarus TEST=Check found battery info in console and cutoff work. Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com> Change-Id: Iffadbb28c03814f752e6b26727b2de22e943dd70 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2796834 Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* cret360: Modify G-sensor rotation matrixjohnwc_yeh2021-05-131-1/+1
| | | | | | | | | | | | | | | | | | The sensor on the cret is different with the waddledoo. Change base_standard_ref matrix Z-value to -1. BUG=b:187656474 BRANCH=dedede TEST=In VT2, enter ectool motionsense lid_angle and watch the value is normally. Signed-off-by: johnwc_yeh <johnwc_yeh@compal.corp-partner.google.com> Change-Id: I659692d67c7dff4adcc7a271da023cefa95c3226 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2891134 Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* brya: Set I2C4 to 400KHzCaveh Jalali2021-05-131-1/+1
| | | | | | | | | | | | | | | This drops the I2C4 speed to 400KHz as board rev. 1 does not meet I2C timing requirements for 1MHz. BRANCH=none BUG=b:186921875,b:187764571 TEST=PD still works on C1 Change-Id: I333708682f63af3293938b07cbf5a562d7065e4d Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2885729 Reviewed-by: Boris Mittelberg <bmbm@google.com> Commit-Queue: Boris Mittelberg <bmbm@google.com>
* brya: Set I2C6 to 400KHzCaveh Jalali2021-05-131-1/+1
| | | | | | | | | | | | | | | This drops the I2C6 speed to 400KHz as board rev. 1 does not meet I2C timing requirements for 1MHz. BRANCH=none BUG=b:187549899,b:187764202 TEST=PD still works on C1 Change-Id: I3da75c561350d4f59bbd63f77d291eb40c1c37c3 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2885728 Reviewed-by: Boris Mittelberg <bmbm@google.com> Commit-Queue: Boris Mittelberg <bmbm@google.com>
* Chronicler: Change EC chip from NPCX796FC0BX to NPCX797FC0BXYu-An Chen2021-05-122-6/+4
| | | | | | | | | | | | | | | Change EC chip from NPCX796FC0BX to NPCX797FC0BX Remove BOARD_VOLTEER_APMODEENTRY BUG=b:187760200 BRANCH=volteer TEST=make BOARD=chronicler Signed-off-by: Yu-An Chen <yu-an.chen@quanta.corp-partner.google.com> Change-Id: I3f5af07efd3edbac0b8bdb808047cf49a1a036c1 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2887018 Reviewed-by: Henry Sun <henrysun@google.com> Reviewed-by: YH Lin <yueherngl@chromium.org> Commit-Queue: YH Lin <yueherngl@chromium.org>
* asurada: drop SVY682X smart discharge.Eric Yilun Lin2021-05-121-1/+0
| | | | | | | | | | | | | | | | | | | | | As we have ADCs for VBUS detection, we don't need to rely on the VBUS detection in SYV682X, so the VBUS SDSG function is not needed anymore (to make VBUS fast falling in to Vsafe0V). Also, SDSG might make concerns of FRS, since in transisiton, there should be no discharge circuit happen or the swap might fail. BUG=b:181203590 TEST=FRS 5V/9V/20V works on Asurada. Meets tVBUSOff. BRANCH=asurada Change-Id: I0d8f2a4b038b1ecdf23e834e37d59da9ea5d2c57 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2891131 Tested-by: Eric Yilun Lin <yllin@google.com> Auto-Submit: Eric Yilun Lin <yllin@google.com> Reviewed-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Ting Shen <phoenixshen@chromium.org>
* collis: Fine tune keyboard backlight PWM frequencyMichael5 Chen12021-05-121-1/+1
| | | | | | | | | | | | | | Fine tune keyboard backlight PWM frequency from 2.4kHz to 10kHz. BUG=b:187664424 BRANCH=firmware-volteer-13672 TEST=make BOARD=collis Signed-off-by: Michael5 Chen1 <michael5_chen1@pegatron.corp-partner.google.com> Change-Id: I6942a24a3764123e98895d83c483d3da4eb3eea2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2887024 Reviewed-by: Jacky Wang <jacky5_wang@pegatron.corp-partner.google.com> Reviewed-by: Zhuohao Lee <zhuohao@chromium.org>
* collis: Config the EC battery setting.Jacky Wang2021-05-122-19/+19
| | | | | | | | | | | | | | | | | | | Config the EC battery setting depend on battery spec. BUG=b:187366003, b:186609352 BRANCH=firmware-volteer-13672.B TEST=make BOARD=collis 1. Check battery found on EC log. 2. Check battery cutoff function on EC console. 3. Check battery charging FET status when battery full. Signed-off-by: Jacky Wang <jacky5_wang@pegatron.corp-partner.google.com> Change-Id: I76f24e2ca0d0f6806e597fdcafaa9a39f8bd84d9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2875912 Reviewed-by: Michael5 Chen <michael5_chen1@pegatron.corp-partner.google.com> Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Zhuohao Lee <zhuohao@chromium.org> Commit-Queue: Zhuohao Lee <zhuohao@chromium.org>
* anx3443: fix incorrect set_mux implementationTing Shen2021-05-121-5/+13
| | | | | | | | | | | | | | | | | | | | | | | | Current driver code sets 0xF8 bit [1:0] to 0b00 when USB_PD_MUX_NONE. However, according to the programming guide (b/181282482#comment3). 0b00 means "power-off", not "disable both paths". This is not what we want because power-off mode blocks all subsequent i2c transactions. Since this mux does not have a "none" state, this CL maps USB_PD_MUX_NONE to USB enabled instead. BUG=b:181282482 TEST=Boot Cherry, verify that error messages like "mux config:0, port:1, rv:1" disappeared BRANCH=main Signed-off-by: Ting Shen <phoenixshen@google.com> Change-Id: I2c87c839242fa61e4ba0e1dfca54ebe5bb3beb37 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2870537 Reviewed-by: Eric Yilun Lin <yllin@google.com> Commit-Queue: Ting Shen <phoenixshen@chromium.org> Tested-by: Ting Shen <phoenixshen@chromium.org>
* zephyr: lazor: enable power managementYuval Peress2021-05-121-0/+6
| | | | | | | | | | | | BRANCH=none BUG=b:185284644 TEST=Run 'hibernate` command in EC console Cq-Depend: chromium:2889855 Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: I044ffa440c7120b269cb58be7c4e1a04f99be980 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2878906 Reviewed-by: Wai-Hong Tam <waihong@google.com>
* Homestar:Battery:SMP:add batteryinfo for SMP-L21M4PG0tongjian2021-05-122-2/+32
| | | | | | | | | | | | BUG=b:187480606 TEST=make -j BOARD=homestar Verify build on EVT board BRANCH=Trogdor Signed-off-by: tongjian <tongjian@huaqin.corp-partner.google.com> Change-Id: Iedc4ccabb5d30e64e5a55e4594c8da21b498343e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2878763 Reviewed-by: Wai-Hong Tam <waihong@google.com>
* zephyr: driver: bbram_npcx: Add Kconfig descriptionWealian Liao2021-05-121-1/+2
| | | | | | | | | | | | | | This adds Kconfig description for CROS_BBRAM_NPCX. BUG=b:183611735 BRANCH=none TEST=zmake testall Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com> Change-Id: I7a3f00d9724d4316583d55d4516a1c79e70f6af5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2878762 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* zephyr: ztest: Add system_preinitialize back to ztestWealian Liao2021-05-122-3/+15
| | | | | | | | | | | | | | | Per CL:2731180, system_preinitialize() should be added in ztest. Add the dependency functions to ztest_system & add system_preinitialize back to ztest. BUG=b:183611735 BRANCH=none TEST=zmake testall Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com> Change-Id: Iea90e1909d28556421471d7e905d0e56705b3fc0 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2878761 Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
* volteer: add volteer_npcx797fc build targetKeith Short2021-05-123-0/+15
| | | | | | | | | | | | | | | | Add the volteer_npcx797fc build target to test Volteer boards reworked with the NPCX797FC EC. BUG=b:163910671 BRANCH=none TEST=make buildall TEST=Verify memory map of volteer_npcx797fc ELF file. Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I188f1d2df5d570be8c49b717a4c64f4346f45ae4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2354804 Reviewed-by: caveh jalali <caveh@chromium.org> Commit-Queue: caveh jalali <caveh@chromium.org>
* zephyr: lazor: Use correct Nuvoton EC VariantSam Hurst2021-05-113-10/+4
| | | | | | | | | | | | | | Change Zephyr Lazor Nuvoton EC variant from npcx7m7fc to npcx7m6fc. BRANCH=none BUG=b:187337449 TEST=Verified that sysjump from EC_RO to ZEPHER_RW worked. Signed-off-by: Sam Hurst <shurst@google.com> Change-Id: Ib49e5e6e5e45dd8d898ca559a897de7fedc24ced Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2885726 Reviewed-by: Wai-Hong Tam <waihong@google.com>
* stm32: Add helper function for H7 flash ctrl regsJosie Nordrum2021-05-115-112/+201
| | | | | | | | | | | | | | | | | | | Add helper function definitions for H7 to API added in chromium:2220735. This should enable flash_physical test to run on Dartmonkey. Refactor code to pull flash registers function declarations from flash-reg.h instead of flash-f.h BRANCH=None BUG=b:157692395 TEST=On dartmonkey ./test/run_device_tests.py -t flash_physical => pass Signed-off-by: Josie Nordrum <josienordrum@google.com> Change-Id: I76846938748cbe77d534915856af0ebb7211d247 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2576799 Reviewed-by: Tom Hughes <tomhughes@chromium.org>
* panic.c: force sync before reenabling bus faultsJosie Nordrum2021-05-112-3/+5
| | | | | | | | | | | | | | | | | | Force a sync between data and instruction pipelines before allowing bus faults. Remove sync from flash-stm32h7.c BRANCH=None BUG=b:157692395 TEST=tested with crrev.com/c/2576799 Signed-off-by: Josie Nordrum <JosieNordrum@google.com> Change-Id: Id67324191b4447d9be10c0b5aecc87620aa69d1d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2706039 Tested-by: Josie Nordrum <josienordrum@google.com> Reviewed-by: Tom Hughes <tomhughes@chromium.org> Reviewed-by: Craig Hesling <hesling@chromium.org> Commit-Queue: Josie Nordrum <josienordrum@google.com> Auto-Submit: Josie Nordrum <josienordrum@google.com>
* blipper: Remove config for firmware qualMike Lee2021-05-111-3/+0
| | | | | | | | | | | | | | Remove CONFIG_SYSTEM_UNLOCKED for firmware qual test BUG=b:183472826 BRANCH=dedede TEST=make BOARD=blipper,and test firmware_ECSystemLocked pass Signed-off-by: Mike Lee <mike5@huaqin.corp-partner.google.com> Change-Id: I2959ad2e1a020c22e506cb927f37fda6bee801ca Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2886464 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* Blipper: add USB-A power enable and disableMike Lee2021-05-113-1/+10
| | | | | | | | | | | | | | | | Enable CONFIG_USB_Enable CONFIG_USB_PORT_POWER_DUMB for enabling/disabling charging from USB-A ports. BUG=b:183472826 BRANCH=dedede TEST=make -j BOARD=blipper TEST=Run "test_that -b dedede firmware_ECUsbPorts" and pass Signed-off-by: Mike Lee <mike5@huaqin.corp-partner.google.com> Change-Id: I8639fb6f63e60acfd504aef60338324419ff1412 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2883380 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* haboki: initial boardZick Wei2021-05-119-0/+1654
| | | | | | | | | | | | | | | | | This CL initial board for haboki which is a IT8320 variant of keeby, and include below change: 1. Copied from drawcia and update baseboard to keeby. 2. Removed board_pulse_entering_rw() and set EC_ENTERING_RW to GPC7. BUG=b:187094464, b:187126367 BRANCH=None TEST=make BOARD=haboki Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com> Change-Id: Ie11776b88e38a2b7af0f844ad2ed1b810b2c0a74 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2875007 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* jelboz:Re-define Volume up/down positionMichael5 Chen12021-05-111-2/+2
| | | | | | | | | | | | | | Depend on dynamic change volume up/down function. Need change Volume up/down position. BUG=b:185557799 BRANCH=zork TEST=Check Volume up/down function. Signed-off-by: Michael5 Chen1 <michael5_chen1@pegatron.corp-partner.google.com> Change-Id: Iae53d5026060dc0c9c92a8e400a9bd095278cbe8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2881717 Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* mkbp: Move key simulation to input devicesBoris Mittelberg2021-05-1027-82/+94
| | | | | | | | | | | | | | | | | | Today some platforms include MKBP_KEYBOARD because they use side buttons, switches or other events that share the same driver with MKBP keyboard. Those platforms don't enable KEYSCAN task. The CL is moving key emulation functionality to MKBP input devices, to make a clear separation between the real keyboard usage and emulation/buttons/switches/etc. All boards that were selecting `CONFIG_KEYBOARD_PROTOCOL_MKBP` without KEYSCAN task are now updated to select `CONFIG_MKBP_INPUT_DEVICES` BUG=b:170966461 BRANCH=main,firmware-dedede-13606.B,firmware-volteer-13672.B-main TEST=None Signed-off-by: Boris Mittelberg <bmbm@google.com> Change-Id: I515140ebf6e175f4b29991329f92266ffca232a8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2824044
* mkbp: EC buttons and switches via MKBPBoris Mittelberg2021-05-1014-187/+263
| | | | | | | | | | | | | | Allowing EC buttons and switches to be signaled via MKBP protocol, using CONFIG_MKBP_INPUT_DEVICES. Default behaviour is unchanged. BUG=b:170966461 BRANCH=main,firmware-dedede-13606.B,firmware-volteer-13672.B-main TEST=None Signed-off-by: Boris Mittelberg <bmbm@google.com> Cq-Depend: chromium:2824044 Change-Id: Ib96f98ecb3717a8ee8963be69fb7d7eb72e6d132 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2796382
* PCHG: Enable device event on suspend completeDaisuke Nojiri2021-05-103-0/+21
| | | | | | | | | | | | | | | | | | | | | | Currently, PCHG can send a device event any time. When a signal is sent to the host while it's attempting to suspend, suspend is delayed by 10 seconds. A solution is to make Powerd disable a corresponding PCHG event (i.e. EC_DEVICE_EVENT_WLC) when it's notifying an upcoming suspend to other processes. This patch makes PCHG re-enable EC_DEVICE_EVENT_WLC after suspend is complete. BUG=b:182973695, b:173235954 BRANCH=trogdor TEST=Verify CoachZ suspends without a delay. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: I10d7fcf234a7e0e05ce5d77b8e930a0cf0748331 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2863564 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Coachz: When the base state changes, update the virtual switchWai-Hong Tam2021-05-102-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | When the base state changes, update the virtual switch. It sends a mode change event to notify AP and then AP will query the latest virtual switch of the base state. BRANCH=None BUG=b:174295396 TEST=Checked detaching and attaching the base. Detach the base: > [269.820490 BASE_DET = 2813 (pulse 0)] [269.821044 tablet mode enabled] [269.821486 event set 0x0000000010000000] [269.821974 base state: detached] Attach the base: > [273.714608 BASE_DET = 156 (pulse 0)] [273.715151 tablet mode disabled] [273.715598 event set 0x0000000010000000] [273.716907 base state: attached] [273.717754 event set 0x0000000010000000] Change-Id: I2f0cac61ee359083df300f4fe3f3d16a14dfb926 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2884609 Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
* Coachz: Enable the basestate console commandWai-Hong Tam2021-05-101-0/+2
| | | | | | | | | | | | | | The basestate console command is used by tests to emulate the base detach or attach state. Enable it to pass the tests. BRANCH=Trogdor BUG=b:174295396 TEST=Run the basestate to emulate the attach and detach states. Change-Id: I49f7b135873dd821d533088b320bfcadafc85659 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2884608 Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
* mancomb: Enable 4 byte port80 codesRob Barnes2021-05-101-0/+1
| | | | | | | | | | | | | | | | AMD SOCs send 4 byte port80 codes. This CL will allow these codes to be properly displayed. BUG=b:181598456 TEST=4 byte codes on guybrush BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: I931ecca06097765d61a83cab739b3dffab80d282 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2881032 Reviewed-by: Eric Peers <epeers@google.com> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* guybrush: Enable 4 byte port80 codesRob Barnes2021-05-101-0/+1
| | | | | | | | | | | | | | | | AMD SOCs send 4 byte port80 codes. This will allow these codes to be properly displayed. BUG=b:181598456 TEST=4 bytes port 80 codes seen during boot BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: Id9dab36e8fe5741fe43705e12caca35a111f269c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2881031 Reviewed-by: Eric Peers <epeers@google.com> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* cret: Disable Tablet mode detection for Clamshell skujohnwc_yeh2021-05-102-3/+20
| | | | | | | | | | | | | | | | It should disable tablet mode detection for Clamshell sku, plan to use fw_config to disable tablet mode. BUG=b:184504093 BRANCH=dedede TEST=make BOARD=cret Signed-off-by: johnwc_yeh <johnwc_yeh@compal.corp-partner.google.com> Change-Id: I1bfd6e12da3df4dd435c5518c65fd3f85cb221d2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2875910 Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* Storo: Use display SoC to control charge LEDDaisuke Nojiri2021-05-102-2/+14
| | | | | | | | | | | | | | | | | | | | Currently, Storo uses the state of charge provided from the battery. This isn't the same as the SoC shown on the screen because Powerd compensates it based on the full factor and the low battery shutdown threshold. This change makes Storo use the display SoC for the charge LED module so that the charge LED and the display SoC synchronously work. BUG=b:181506409 BRANCH=dedede TEST=Storo's LED turns from amber to white when the display soc reaches 95% (internally 94.6%). Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: I42c505c9fbd39f82de2318f0d7ff8589eeca4d8c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2876165 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* zephyr: Set system workqueue priority to preemptiveKeith Short2021-05-103-1/+36
| | | | | | | | | | | | | | | | | | | | | The deferred tasks are now run as part of the workqueue (see CL:2854850). By default, Zephyr runs the workqueue as the lowest priority cooperative thread, which prevents preemption by any other thread. This blocked the PD tasks from servicing new PD requests, causing spec violations. Change the system workqueue priority to be the lowest preemptive thread priority. This is done at runtime because the Kconfig system doesn't support setting integer values using other configuration options. BUG=b:187173381 BRANCH=none TEST=Volteer connect charger. Verify SrcCap response takes 23 ms. Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I95d024a510a743e967fcc9bd10e3acb6c36e8b77 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2880716 Reviewed-by: Simon Glass <sjg@chromium.org>
* chronicler: Initial EC imageSheng-Liang Pan2021-05-1013-0/+1661
| | | | | | | | | | | | | | | | | | | | Create the initial EC image for the chronicler variant by copying the volteer reference board EC files into a new directory named for the variant. (Auto-Generated by create_initial_ec_image.sh version 1.5.0). BUG=b:187318819 BRANCH=None TEST=make BOARD=chronicler Signed-off-by: Sheng-Liang Pan <sheng-liang.pan@quanta.corp-partner.google.com> Change-Id: I489eb5a0a7563ec9a9a0f59f5c5f481f0fbf7943 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2878765 Reviewed-by: YH Lin <yueherngl@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org> Tested-by: Yu-An Chen <yu-an.chen@quanta.corp-partner.google.com> Commit-Queue: YH Lin <yueherngl@chromium.org>
* hayato: Modify HS Detector threshold of PS8743 setting valueMichael5 Chen12021-05-105-14/+34
| | | | | | | | | | | | | | | Modify HS detector threshold setting (0x3C) to 0x60 for USB-C C1 port signal quality. BUG=b:177980418 BRANCH=asurada TEST=manual Run command "ectool i2cread 8 4 0x20 0x3c" to check register value. Signed-off-by: Michael5 Chen1 <michael5_chen1@pegatron.corp-partner.google.com> Change-Id: I97b6bb16e7c5298ff42e35d936e0f9e60ec3b730 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2845564 Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* fingerprint: Add test that reads hwidKevin Shelton2021-05-0811-2/+50
| | | | | | | | | | | | | | | | | | | | | BUG=b:157576189 BRANCH=none TEST=make buildall -j, Using dragonclaw v0.2 and servo_micro: ./test/run_device_test.py -t fpsensor_hw --flasher=servo_micro, Using icetower and servo_micro: ./test/run_device_test.py -t fpsensor_wh --flasher=servo_micro --board dartmonkey; note: the testrunner hung after printing Test "fpsensor_hw": PASSED, but this hang seems unrelated Cq-Depend: chromium:2872432 Change-Id: I2a3b31776cd40d7f0b422f4845869953b8f07249 Signed-off-by: Kevin Shelton <kmshelton@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2314101 Reviewed-by: Tom Hughes <tomhughes@chromium.org>
* NX20P348x: Only check sink bit for sink_enable errorDiana Z2021-05-071-1/+1
| | | | | | | | | | | | | | | | | | | When a port is sourcing (ex. to a dongle), running sink disable on the port will currently return failure because the 5VSRC bit is set. However, sinking has been successfully disabled. Reflect this in the error return by only checking the specific sinking bit in the status register. BRANCH=None BUG=b:187220141 TEST=on guybrush, plug and unplug AC on C0 with a dongle on C1. Verify no failures to disable sinking are present. Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I529d33b41dc4bc55f7c647742c70832a125fd367 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2877866 Reviewed-by: Rob Barnes <robbarnes@google.com> Commit-Queue: Rob Barnes <robbarnes@google.com>
* giblab: Add hayato and it8xxx2_evbSimon Glass2021-05-071-1/+12
| | | | | | | | | | | | | | | | These two boards were missed from gitlab config. Add them. BUG=b:178731498 BRANCH=none TEST=try on gitlab https://gitlab.com/zephyr-ec/ec/-/pipelines/299402335 Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: If8994aec61ab93969fca2b1e132e2eb64a90c177 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2880420 Commit-Queue: Keith Short <keithshort@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
* gitlab: Add posix-ecSimon Glass2021-05-071-2/+8
| | | | | | | | | | | | | | Add this board so we get coverage on gitlab. BUG=b:178731498 BRANCH=none TEST=try on gitlab https://gitlab.com/zephyr-ec/ec/-/pipelines/299319312 Change-Id: I27dab970650d5e705d0f04f5b0e9096b0ae25cec Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2817962 Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
* Reland "zephyr: zmake: Ensure all output is produced"Simon Glass2021-05-071-2/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This partially reverts commit 5bc4134337bdabd601159bce047306c73f13e8f8. Reason for revert: Seeing if this can be landed now I removed test_filter_debug() from this CL, since it has already been submitted with a full check of the output. Original change's description: > Revert "zephyr: zmake: Ensure all output is produced" > > This reverts commit ee4257735632f5453b9377f9f60f5c68f6917537. > > Reason for revert: depends on CL:2807486, which is responsible for CQ > failures (crbug.com/1198472). > > BUG=chromium:1198472 > BRANCH=none > TEST=pytest zephyr/zmake/test > > Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> > Change-Id: I5face75f3e59858b68a0b6e77d5c5b1a9881008a > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2823547 > Reviewed-by: Sonny Rao <sonnyrao@chromium.org> BUG=b:184298184, chromium:1198472 BRANCH=none TEST=(cd zephyr/zmake/; python3 -m pytest tests/*.py -v -k test_filter) Change-Id: I0a02d32234d871ba45833eaaab0e979b28257ca8 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2841023 Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
* zmake: Add a helper function for test filenamesSimon Glass2021-05-071-16/+16
| | | | | | | | | | | | | Create a new function to reduce the amount of duplicated code. BUG=b:184298184 BRANCH=none TEST=(cd zephyr/zmake/; python3 -m pytest tests/*.py -v -k test_filter) Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: I51124fa47eb298112bd9b2b06018d8f14b9968ca Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2880415 Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
* fingerprint: Support flash_ec in dev test runnerKevin Shelton2021-05-071-6/+22
| | | | | | | | | | | | | | | | | | | BRANCH=none BUG=b:151105339 TEST=with a dragonclaw rev 0.2: ./test/run_device_tests.py --flasher=servo_micro (flash_write_protect failed and the test runner hung after printing the test status, but this seems unrelated; all of the other tests looked to pass), ./test/run_device_tests.py and ./test/run_device_tests.py --flasher=jtrace (both get as far as executing flash_jlink.py, so the argument logic should be ok). Signed-off-by: Kevin Shelton <kmshelton@chromium.org> Change-Id: I0d41fb2fa4170292dd5a1212c601cf059ce2ee7b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2872432 Reviewed-by: Tom Hughes <tomhughes@chromium.org> Commit-Queue: Tom Hughes <tomhughes@chromium.org>
* mancomb: Pull eSPI RST# high to disableRob Barnes2021-05-071-1/+3
| | | | | | | | | | | | | | | eSPI RST# is asserted during S0ix but eSPI is not reinitialized during resume. eSPI RST# isn't actually needed because PLTRST# is used during initialization. BUG=b:186135022, b:186470159 TEST=No espi errors on guybrush. Builds for mancomb. BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: I1d1b3c28c3f3661452e841f3293234a9337070ae Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2855634 Reviewed-by: Diana Z <dzigterman@chromium.org>
* ln9310: check software workaround is in place for every power-upJohn Crossley2021-05-072-1/+31
| | | | | | | | | | | | | | | | | | | | | | Current software sets some registers only during initial powering of LN9310 (when battery is plugged in). If LN9310 was reset for any reason and then a system power on was attempted (power button press), then LN9310 would attempt a startup without the workaround (bad idea). This change adds a check before every LN9310 enable/disable event and re-initializes LN9310 if a reset has occurred . BRANCH=Trogdor BUG=b:185308433 TEST=Should not break the current boot flow, i.e. power-up and power-down (using long-press of the power button) should function Change-Id: I98c08f50bfd48e09776033eac64658f6e27fb58f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2876869 Reviewed-by: John Crossley <crossley@lionsemi.corp-partner.google.com> Reviewed-by: Wai-Hong Tam <waihong@google.com> Commit-Queue: John Crossley <crossley@lionsemi.corp-partner.google.com> Tested-by: John Crossley <crossley@lionsemi.corp-partner.google.com>
* Specify type for forward-declared enumsTom Hughes2021-05-067-5/+32
| | | | | | | | | | | | | C++ does not allow enums to be forward declared unless they have a type. BRANCH=none BUG=b:144959033 TEST=make buildall Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I6fcdedc81f2b60a44b750554939e60552a4c6a77 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2740567 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
View Lorry Controller Status