| Commit message (Collapse) | Author | Age | Files | Lines |
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Taking control of the pwr_en line causes the FPMCU to power cycle.
This causes an interrupt to the cros-ec driver. The interrupt handler
then races with the subsequent cros-ec unbind attempt.
This can manifest in multiple ways, but one common way is for the
later binding of spidev to fail, since the interrupt handler
reinitialized the cros-ec driver (due to crrev.com/c/1903814).
The spidev attempt then errors out because there are still resources
associated with the device (the reallocated cros-ec objects).
The need to take control of the power enable line to simply keep FPMCU
power enabled is no longer needed on any device.
* The need for this arose during nocturne development, when the pwr_en
line was associated with the SPI interface in ACPI.
This can be seen in https://crrev.com/c/1084686.
This pwr_en control was then added to flash_fp_mcu in
https://crrev.com/c/1114743.
* The pwr_line was then quickly disassociated with the SPI interface
a few days later in https://crrev.com/c/1155565, but wasn't removed
from flash_fp_mcu.
To this day, the FP pwr_en line is controlled in coreboot manually.
It remains powered on when the Chromebook is powered on, irrespective
of drivers.
BRANCH=none
BUG=b:190744837
TEST=Run the following on nocturne, nami, kohaku, dratini, and
volteer.
scp util/flash_fp_mcu ${DUT_HOSTNAME}:/usr/local/bin/flash_fp_mcu
ssh ${DUT_HOSTNAME} flash_fp_mcu --hello
ssh ${DUT_HOSTNAME} flash_fp_mcu
ssh ${DUT_HOSTNAME} flash_fp_mcu --hello
Signed-off-by: Craig Hesling <hesling@chromium.org>
Change-Id: Icc64f7056e21180efd19b2f650b9fe5804cd2906
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3027129
Tested-by: Patryk Duda <patrykd@google.com>
Reviewed-by: Patryk Duda <patrykd@google.com>
Reviewed-by: Josie Nordrum <josienordrum@google.com>
(cherry picked from commit 6e4ed0664ef649b0170894cc2ac1a738d3673ce1)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3041185
Commit-Queue: Jora Jacobi <jora@google.com>
Reviewed-by: Jora Jacobi <jora@google.com>
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We note our flash_fp_mcu actions to the kernel log in order to be
able to debug what action of the script may have triggered a kernel
warning or error.
This is for debugging current and future issues with the kernel
and flash_fp_mcu.
BRANCH=none
BUG=b:190744837
TEST=# On Nami and Zork
scp util/flash_fp_mcu ${DUT_HOSTNAME}:/usr/local/bin/flash_fp_mcu
ssh ${DUT_HOSTNAME} flash_fp_mcu --hello
dmesg
Change-Id: Ie57b1042d20284065a652b0a805c081a9591280c
Signed-off-by: Craig Hesling <hesling@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3010624
Reviewed-by: Patryk Duda <patrykd@google.com>
Reviewed-by: Jora Jacobi <jora@google.com>
(cherry picked from commit b0e93341bc75ff677afa520322fb61eaac98c4f1)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3041184
Commit-Queue: Jora Jacobi <jora@google.com>
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This reverts commit 9a40c7dbadf8c577660a09807287d9133373803b.
This change turned out to not be very useful and non-functional
on kernel v4.4.
BRANCH=none
BUG=b:190744837
TEST=none
Change-Id: If5d51e0240f93b43410040e99eb48cb5e080f0e3
Signed-off-by: Craig Hesling <hesling@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3027128
Reviewed-by: Patryk Duda <patrykd@google.com>
Reviewed-by: Jora Jacobi <jora@google.com>
(cherry picked from commit 70b1434ad7ac69160014397fcee464c2f993909f)
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3041183
Commit-Queue: Jora Jacobi <jora@google.com>
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Make sure the whole UART buffer/fifo is flushed in the uart_flush_output
function by checking the interrupt state.
The shell_process function only passes data from shell layer to the
shell_trasport layer(UART) which has its own buffers.
The bug was impacting e.g. hibernating.
BUG=b:191724484, b:193482737
BRANCH=none
TEST=Verify the console output and hibernate works
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Change-Id: Iaf245809be57fdba69c6a5a69d394f024ccf60ae
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3024264
Reviewed-by: CH Lin <chlin56@nuvoton.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
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The bugs causing the system to boot loop
have been fixed and turning the watchdog
back on.
BUG=b:192071175
BRANCH=none
TEST=boot the system to kernel
Signed-off-by: Denis Brockus <dbrockus@google.com>
Change-Id: Ib0c2232ec791841410f87e16cdc1440dea7a6da1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3027744
Tested-by: Denis Brockus <dbrockus@chromium.org>
Auto-Submit: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Yuval Peress <peress@chromium.org>
Reviewed-by: Yuval Peress <peress@chromium.org>
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This patch moves the code waking up a battery to wakeup_battery.
There is no functionality change.
BUG=None
BRANCH=None
TEST=buildall
Change-Id: I1eb88a6b175744abf2868027aebf8c50ab441279
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2929341
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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This patch moves the code validating battery parameters to battery.c.
There is no functionality change.
BUG=None
BRANCH=None
TEST=buildall
Change-Id: I1706c4b504565b52964391077894665b4e5d1a86
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3007375
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Before we go into hibernate, try to put the battery fuel gauge into
sleep mode. Note we must be in a low current state for the gauge to
actually enter this mode.
BRANCH=None
BUG=b:186774653
TEST=on guybrush, observe power reduction in Z5
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Ie02aa3ede1b3a89592bdd5cd8e701887db3c2d9f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2967039
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Two of the guybrush batteries support a sleep mode, so add that register
information into the battery structures.
BRANCH=None
BUG=b:186774653
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I156bf7878adbce95644cadaf071a37d5df4bf03e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2967038
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Some fuel gauges may support a "sleep" mode which will enable lower
power consumption in some states. Set up a structure for this along
with an API which boards may use to call it.
BRANCH=None
BUG=b:186774653
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I155702bfb50a7353c7728445d60ecf853e39e4c2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2967037
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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The function of flash_write_protection_set() is deprecated and will
be removed in Zephyr 2.8.
BUG=b:187192628
BRANCH=none
TEST=No warning while building the board of hayato on zephyr2.6
Change-Id: I65e38557d7d65b6f079f20af7ecc098e30d57220
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3023747
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
Tested-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
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BMI160 driver is tested using BMI emulator. All functions exposed
in accelgyro_drv are tested for both accelerometer and gyroscope
sensors.
BUG=b:184856157
BRANCH=none
TEST=run zmake drivers test
Signed-off-by: Tomasz Michalec <tm@semihalf.com>
Change-Id: Ica0e40a904c35adbd9a46e70423137e064a75059
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3017985
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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BMI260 driver is tested using BMI emulator. All functions exposed
in accelgyro_drv are tested for both accelerometer and gyroscope
sensors.
BUG=b:184856157
BRANCH=none
TEST=run zmake drivers test
Signed-off-by: Tomasz Michalec <tm@semihalf.com>
Change-Id: Id911a161bcbb2fcb87ccdadf266a683859db25d3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2997365
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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Fix three issues with BMI160 and BMI260 drivers:
- get/set acclerometer/gyroscope offset will return error on failed read
of offset register
- BMI160 calibration function returns error when setting range fail
- Invalid temperature is properly recognized by driver
BUG=none
BRANCH=none
TEST=run zmake drivers test
Signed-off-by: Tomasz Michalec <tm@semihalf.com>
Change-Id: I545c0a931227ef7efc000ec97c1f6297a48e6d1a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3027039
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
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Add extension to support BMI260 model.
BUG=b:184856157
BRANCH=none
TEST=none
Signed-off-by: Tomasz Michalec <tm@semihalf.com>
Change-Id: Iaffebdb5279001d085fd56868e81318528380380
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2997364
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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Add BMI emulator which is emulated device on i2c bus. Emulated
accelerometer and gyroscope properties are defined through device tree,
but they can be changed in runtime through BMI emulator API. It allows
to set custom handlers for write and read messages to emulate more
complex scenarios or malfunctioning device.
BMI emulator is designed to implement support for different BMI models
as an extension to common emulator code.
BUG=b:184856157
BRANCH=none
TEST=none
Signed-off-by: Tomasz Michalec <tm@semihalf.com>
Change-Id: I63e9d3aca98c8923372437f7a66257a4c82817f2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2977559
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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Corrected MEC1727 integrated SPI flash CS# (GPIO116) and CLK (GPIO117)
alternative function as 1 (Internal SPI functionality) from 2 (General
purpose SPI functionality).
BUG=none
BRANCH=none
TEST=Tested on ADL RVP via EC UART console
> sysjump RW: able to switch to RW from RO
> sysjump RO: able to switch to RO from RW
Signed-off-by: martin yan <martin.yan@microchip.corp-partner.google.com>
Change-Id: I870925183e670022dc023812265a7ef496b5f255
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3021101
Reviewed-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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Create the initial EC image for the gooey variant by copying the
waddledee reference board EC files into a new directory named for
the variant.
(Auto-Generated by create_initial_ec_image.sh version 1.5.0).
BUG=b:193608405
BRANCH=None
TEST=make BOARD=gooey
Signed-off-by: reno.wang <reno.wang@lcfc.corp-partner.google.com>
Change-Id: I642f3485e92cee27ce74b1a38bf0081eb1ee98c6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3026904
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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This patch reads GPIO_TRANSPORT_SEL in get_fp_transport_type() to get
selected transport on board
BRANCH=none
BUG=b:192713372
TEST=1. make BOARD=nocturne_fp -j
2. On Icetower check logs
3. fpmcu console logs:
```
[1.099996 UART initialized after sysjump]
[Image: RW, dartmonkey_v2.0.9475+375c295d0
cryptoc:v1.9308_26_0.9-3830fff private:v0.0.123-fd096e4
fpc:v0.0.119-cd5a676 2021-07-06 13:03:07 bhanumaiya@bhanumaiya2]
[Reset cause: reset-pin power-on soft sysjump ap-off]
[1.100221 Inits done]
[1.100278 WARNING: Reset flags power-on + ap-off were forged.]
[1.100380 TRANSPORT_SEL: UART]
[1.100446 TRANSPORT_SEL: UART]
```
Signed-off-by: Bhanu Prakash Maiya <bhanumaiya@chromium.org>
Change-Id: I8ed933ce7a4c8b922d9c2da75b32ba4838e10e54
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3004293
Auto-Submit: Bhanu Prakash Maiya <bhanumaiya@google.com>
Reviewed-by: Jora Jacobi <jora@google.com>
Reviewed-by: Craig Hesling <hesling@chromium.org>
Reviewed-by: Bhanu Prakash Maiya <bhanumaiya@google.com>
Commit-Queue: Bhanu Prakash Maiya <bhanumaiya@google.com>
Tested-by: Bhanu Prakash Maiya <bhanumaiya@google.com>
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Homestar doesn't have WLC and doesn't need it
BRANCH=Trogdor
BUG=None
TEST=make -j BOARD=homestar
Verify build on DVT board
Signed-off-by: tongjian <tongjian@huaqin.corp-partner.google.com>
Change-Id: Ic49a2c8e387928bab9cad2eac261455fa69717a1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3020677
Reviewed-by: Wai-Hong Tam <waihong@google.com>
Commit-Queue: Wai-Hong Tam <waihong@google.com>
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Add the I2C bus for the RTC chip. The chip runs at 400KHz.
BRANCH=None
BUG=b:192253134
TEST=Built the herobrine_npcx9 image successfully.
Change-Id: Ibf5eec51a938b7a1ce1d1379ae8c2ede2b2f4b03
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2993218
Reviewed-by: Keith Short <keithshort@chromium.org>
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Update the GPIOs to match the schematic. Also update the hibnerate
wake sources.
BRANCH=None
BUG=b:192253134, b:193583152
TEST=Built the herobrine_npcx9 image successfully.
Change-Id: I4ed20de0f242f6c1f5fbddef6a59526482b970d1
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2993217
Reviewed-by: Keith Short <keithshort@chromium.org>
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The board uses the PSL to enable the core power and the old HIBERNATE_L
rails, like TCPC, PPC, sensor, etc. Deprecate the related logic.
BRANCH=None
BUG=b:192253134
TEST=Built the herobrine_npcx9 image successfully.
Change-Id: I1f378126cdac478e335ce06e16835df200fe94ca
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2993216
Reviewed-by: Keith Short <keithshort@chromium.org>
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The 3.3V rail is not controlled by EC. Remove the control.
BRANCH=None
BUG=b:192253134
TEST=Built the herobrine_npcx9 image successfully.
Change-Id: Id03f0b4943ce0cc19b7ac286e866d06339719223
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2993215
Reviewed-by: Keith Short <keithshort@chromium.org>
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This CL copies the herobrine_npcx7 board and changes the chip
config to npcx9m3f.
Remove the CONFIG_FLASH_SIZE_BYTES from the board level as it
is moved to the chip level.
BRANCH=None
BUG=b:192253134
TEST=Built the herobrine_npcx9 image successfully.
Change-Id: Ie970e1be9d863339869563031513af42c979aec5
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2993214
Reviewed-by: Keith Short <keithshort@chromium.org>
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In the next generation, the 3.3V rail is not controlled by EC anymore.
Move the control logic to the board level. The 3.3V rail should be
enabled before the power on sequence, so use the hook chipset pre-init
hook. Disable it on the chipset shutdown complete hook.
For Trogdor, do it on the baseboard level.
For Herobrine, do it on the board level, Herobrine-NPCX7, only.
Herobrine-NPCX9 and other future boards don't need it.
BRANCH=None
BUG=b:187980397, b:192253134
TEST=Tested the Lazor EC-OS and Zephyr images and booted to AP.
TEST=Tested the Herobrine-NPCX7 EC-OS and Zephyr images and booted to AP.
Change-Id: I7e025123f8997629b9b0db46e30ea9c716bdbf99
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2993213
Reviewed-by: Keith Short <keithshort@chromium.org>
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For the boards where SKU_ID/BRD_ID comes from the strapping pins on EC,
this new config enables AP to ask EC for those hardware configs using
the CBI host command `EC_CMD_GET_CROS_BOARD_INFO`.
BRANCH=None
BUG=b:186264627
TEST=make buildall -j
TEST=Enabled CONFIG_CBI_GPIO for lazor and manually verified with
`ectool cbi get`.
Change-Id: I7ec9097bab96d2076d9d42db2d003460db000113
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3002452
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
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After rebase to ToT, fatal error occurred frequently during booting.
Adjust stack size of tasks (usage < 80%) to fix the error.
BRANCH=none
BUG=none
TEST=On asurada, no fatal error occurred during booting.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Change-Id: I97198785f402836de9ed41ff1a6788c644a4f77b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3023684
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
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This enables the handling of DPTF messages from the AP.
BUG=b:191442254
BRANCH=None
TEST=None
Change-Id: Iff7dbb0b713f9b255db71ae9d3d83ca2be24f2ac
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3015907
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Commit-Queue: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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ADLRVP has a I/O expander + EEPROM based board ID reading implementation
hence added overridable custom board ID reading function.
BUG=none
BRANCH=none
TEST='ectool version' gives intended result
Change-Id: I98e49de710f54683b8fbe9f6e9615b7de0aeb4ed
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3024669
Reviewed-by: AndreX Andraos <andrex.andraos@intel.com>
Reviewed-by: caveh jalali <caveh@chromium.org>
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Create the initial EC image for the taeko variant by copying the brya
reference board EC files into a new directory named for the variant.
(Auto-Generated by create_initial_ec_image.sh version 1.5.0).
BUG=b:193377622
BRANCH=main
TEST=make BOARD=taeko
Signed-off-by: amber.chen <amber.chen@lcfc.corp-partner.google.com>
Change-Id: If3b99d3d15e799b889c256f26ba47971ddd3a551
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3023506
Reviewed-by: YH Lin <yueherngl@chromium.org>
Reviewed-by: Boris Mittelberg <bmbm@google.com>
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gyro sensor add 2nd source icm-40608
BUG=b:193476997
BRANCH=firmware-volteer-13672.B
TEST=make BOARD=collis
1. Set CBI SSFC 0x2 and using command
"watch ectool motionsense lid_angle" for sensor icm-40608.
2. Using command "watch ectool motionsense lid_angle" for BMI160.
Signed-off-by: Jacky Wang <jacky5_wang@pegatron.corp-partner.google.com>
Change-Id: I4633cb25f9ef7f93d556370b7bc8d78489f75813
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3023505
Reviewed-by: Michael5 Chen <michael5_chen1@pegatron.corp-partner.google.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
Tested-by: Michael5 Chen <michael5_chen1@pegatron.corp-partner.google.com>
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This will release Burnside Bridge from reset and fix the issue when
Servo's USB hub disappears after Servo was reset.
BRANCH=none
BUG=b:191516281
TEST=running deployment in the lab
Signed-off-by: Boris Mittelberg <bmbm@google.com>
Change-Id: I6a65ffa13903adf96686681d961818ffe0e68fb1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3018683
Reviewed-by: caveh jalali <caveh@chromium.org>
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Bobba is close to hitting its flash size limit. So, disable
CONFIG_CMD_ACCELSPOOF to reclaim some flash space.
BRANCH=none
BUG=none
TEST=build/bobba/*/space_free_flash.txt reports > 200 bytes free
Change-Id: Iddf0c9eeba0d9995df58c8246d865bc69afaa5de
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3024852
Reviewed-by: Boris Mittelberg <bmbm@google.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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This fixes a typo in usb_pd_dpm.
BRANCH=none
BUG=none
TEST=buildall passes
Change-Id: I0b3edf8765110dae88bd49ec5e9371f3147997be
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3024851
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
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The NCT38xx TCPC takes over the GPIO we otherwise use to control the
Burnside Bridge on Brya P1 devices. To get the BB out of reset we add
the flag to tcpc_config structure to take the control back to TCPM.
BRANCH=none
BUG=b:191516281
TEST=running deployment in the lab; running FAFT PD test
Signed-off-by: Boris Mittelberg <bmbm@google.com>
Change-Id: I73ddf26964cc6363640ddd80fbcbf353704d3198
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3016406
Reviewed-by: caveh jalali <caveh@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Add guards to deprecate the AP_RST_REQ power signal. The AP_RST_REQ is
power signal only valid in SC7180.
BRANCH=None
BUG=b:187980397, b:148246695
TEST=Built all the Chromium EC images and Zephyr EC images.
TEST=Modify a board to use the SC7280 CONFIG.
Change-Id: I0b12889dd2549665d2c2d6bfc06fddd9b9357175
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2993210
Reviewed-by: Keith Short <keithshort@chromium.org>
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Move the GPIO alias of EN_PP5000 from the baseboard level to the board
level. The new Herobrine hardware will use a different name.
BRANCH=None
BUG=b:192253134
TEST=Built the herobrine_npcx7 EC-OS and Zephyr images successfully.
Change-Id: I903b2646bfc39ce19713a35cd037402003f82591
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2993212
Reviewed-by: Keith Short <keithshort@chromium.org>
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Move the config of hibernate wake source and hook from the baseboard
level to the board level. The new Herobrine hardware will use different
wake sources and have different hook.
BRANCH=None
BUG=b:192253134
TEST=Built the herobrine_npcx7 EC-OS and Zephyr images successfully.
Change-Id: Idbad8f985252fdef0657427d5f8d5883029a641f
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2993211
Reviewed-by: Keith Short <keithshort@chromium.org>
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This CL is the Zephyr-equivalent of CL:2987911.
BRANCH=None
BUG=b:191803008, b:187980397
TEST=Built the herobrine_npcx7 image successfully. Tried booting on an
existing Trogdor board.
Change-Id: I2e59fb509b6d850e112609b388dc523d359fdedd
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2994755
Reviewed-by: Keith Short <keithshort@chromium.org>
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Herobrine_npcx7 is a project to use the Trogdor hardware but swap the
AP-related component. Create the project under the Trogdor family and
use the Zephyr board: trogdor.
This patchset first copies the the directories
* trogdor/trogdor -> trogdor/herobrine_npcx7
And do the following modification.
* Rename the board term "trogdor" to "herobrine_npcx7"
* Update the copyright year
* Use the Herobrine USB PID
BRANCH=None
BUG=b:191803008
TEST=Built the Zephyr image and booted it on an existing Trogdor board.
Change-Id: I72c45a68ac463d18ce1a8503942ad0dcefc6e138
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2994754
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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Trogdor is a reference design, which doesn't have Zephyr support yet.
Lazor is a shipping design of the Trogdor family, which already have
Zephyr support. This CL creates the Trogdor Zephyr image and modifies
the hardware difference.
The CL first copies the directory lazor/ to trogdor/.
And do the following changes:
* Rename all the board term lazor -> trogdor
* Update the GPIOs (recheck the result of gpios_to_zephyr_dts)
* Update the GPIO interrupts
* Update the battery info
* Update the sensor info
* Do not support multi-TCPM driver
* Do not include sku.c (trogdor doesn't have it yet)
BRANCH=None
BUG=b:184071830
TEST=Built the Zephyr image. Booted it on an existing Trogdor board.
Change-Id: I3b603284c719c119bb05460e7d4386d2c2eabda4
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2994753
Reviewed-by: Keith Short <keithshort@chromium.org>
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Do the same thing as CL:2987915, for Trogdor.
Enable the battery fuel gauge and add the battery info as an example,
such that the follower boards can just add the new battery info.
I pick a battery from the Lazor board. As long as it is a 2-cell
battery, it does not matter too much.
BRANCH=None
BUG=b:184071830
TEST=Built the trogdor image successfully and booted to AP.
Change-Id: Ic861a46148d238ba1dc015cd7b907321b484deca
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2994752
Reviewed-by: Keith Short <keithshort@chromium.org>
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Implement panic register print for rv32i. This lets us see the
registers after a crash, which is very useful for debugging.
BUG=b:193552648
BRANCH=none
TEST=got a crash, see this on UART:
Fatal error: 0
ra = 0x80005864
gp = 0x8010D3C0
tp = 0x00000000
a0 = 0x00000000
a1 = 0x00000000
a2 = 0x00000000
a3 = 0x00000000
a4 = 0x80107FC0
a5 = 0x00000500
a6 = 0x00000000
a7 = 0xAAAAAAAA
t0 = 0x00000000
t1 = 0x8010D298
t2 = 0x435F4450
t3 = 0x00000030
t4 = 0x00000000
t5 = 0x00000000
t6 = 0x00000000
mepc = 0xFFFFFFF4
mstatus = 0x00001880
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I5b91276d274f5792ff6b9136adc319d03ed6dbb3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3024958
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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Remove bringup configs to generate locked image for production.
BRANCH=trogdor
BUG=b:192765315
TEST=build
Signed-off-by: tongjian <tongjian@huaqin.corp-partner.google.com>
Change-Id: I175931ffff8d739d71b23029df38f21d6add62ff
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3015965
Reviewed-by: Wai-Hong Tam <waihong@google.com>
Commit-Queue: Wai-Hong Tam <waihong@google.com>
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Homestar has no GMR sensor for 360 tablet mode when keyboard attached
BRANCH=Trogdor
BUG=b:193475186
TEST=make -j BOARD=homestar
Verify build on EVT board
Signed-off-by: tongjian <tongjian@huaqin.corp-partner.google.com>
Change-Id: I47a718493c610f85a2e574750adfbd99ec772ed3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3020675
Reviewed-by: Wai-Hong Tam <waihong@google.com>
Commit-Queue: Wai-Hong Tam <waihong@google.com>
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Remove optional feature to generate locked image for production.
BUG=none
BRANCH=volteer
TEST=make -j buildall
Change-Id: Idde136596a0ba5a45bc70926296bb382c1f2fb3b
Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3020666
Reviewed-by: YH Lin <yueherngl@chromium.org>
Reviewed-by: Zhuohao Lee <zhuohao@chromium.org>
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Update IRQ definition for mt8195 and move IRQ definitions to
chip-specific folder.
BRANCH=none
BUG=b:189300514
TEST=make BOARD=asurada_scp &&
make BOARD=cherry_scp
Change-Id: I3bb4d97e374328fbe86d537b14cce11322365c10
Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2940337
Tested-by: Tzung-Bi Shih <tzungbi@chromium.org>
Reviewed-by: Tzung-Bi Shih <tzungbi@chromium.org>
Commit-Queue: Tzung-Bi Shih <tzungbi@chromium.org>
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Change UART clock to ULPOSC to keep SCP console alive when system
suspend.
BRANCH=none
BUG=b:189300514
TEST=make BOARD=cherry_scp
Change-Id: I144354fe946808c7ec68da4ea33e4ad11a7bf11f
Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3003345
Tested-by: Tzung-Bi Shih <tzungbi@chromium.org>
Reviewed-by: Tzung-Bi Shih <tzungbi@chromium.org>
Commit-Queue: Tzung-Bi Shih <tzungbi@chromium.org>
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Supports mt8195 clock and move chip-specific clock registers from common
to chip-specific.
BRANCH=none
BUG=b:189300514
TEST=make BOARD=asurada_scp &&
make BOARD=cherry_scp
Change-Id: I8ef058f6314652050dead46e7f48d3420bbdd1d1
Signed-off-by: Roger Lu <roger.lu@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2939167
Tested-by: tinghan shen <tinghan.shen@mediatek.com>
Tested-by: Tzung-Bi Shih <tzungbi@chromium.org>
Reviewed-by: Tzung-Bi Shih <tzungbi@chromium.org>
Commit-Queue: Tzung-Bi Shih <tzungbi@chromium.org>
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