| Commit message (Collapse) | Author | Age | Files | Lines |
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To be able to send and receive multiple SPI buffer quantities in a
single SPI transaction it is necessary to control the SPI CS signal
directly, as opposed to connecting it to the SPI controller.
Direct mode allows to keep CS asserted as long as necessary to
transfer the full data blob, size of which might exceed the the size
of the SPI controller buffer.
BUG=b:79492818
TEST=flashrom access still works fine:
$ flashrom -p raiden_debug_spi:target=ap --flash-name
flashrom f10dff7b-dirty on Linux 5.4.0-71-generic (x86_64)
flashrom is free software, get the source code at https://flashrom.org
Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns).
Raiden target: 2
Found GigaDevice flash chip "GD25Q127C/GD25Q128C" (16384 kB, SPI) on...
vendor="GigaDevice" name="GD25Q127C/GD25Q128C"
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Change-Id: Idecf019d3fd19675d7f78e4dc1140106a2112c6b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2973580
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
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Code placing data on the upstream usb_spi queue does not check if
there is enough room on the queue, which could result in silent
dropping of data when the upstream queue is busy.
This is not a big deal with Raiden protocol V1 where USB packets to
the host are sent one at a time, but becomes a problem if the DUT
sends multiple USB packets without waiting for the host.
Adding a sleep in the loop waiting for the room in the queue to free
up seems an appropriate solution, since the AP is held in reset at
this point and there is no much activity happening on Cr50.
Experiments have shown that with 2KB PDU size the total wait time
while reading a 16M flash does not exceed 30 ms when this fix is
deployed.
BUG=b:79492818
TEST=with the rest of the patches applied observed successful flashrom
operations running Raiden protocol version V2. Without this patch
there were periodic drops of data sent by DUT.
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Change-Id: I73fdfdda09837891dc1db2453098ec1d219c4553
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2973573
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
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Porting consisted of running 2to3 and then modifying the Tee::write()
function by hand.
BUG=none
TEST='make -j buildall' does not throw Python2 warnings any more and
still succeeds.
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Change-Id: I6762bfc176ef749dccba7572db171dd2f83aaebc
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2973575
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
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UpdateNoTPMWipe did not do anything. Replace it with 'Unused' in the
capabilities list.
We can't completely remove the capability because of how cr50 uses
the cap_info list. Every item from 0 to CCD_CAP_COUNT needs to have a
name and a default value. Renaming it makes it clear the capability
isn't used and keeps the relationship between capabilities and their
value in the capabilities bitmask.
BUG=b:182482706
TEST=none
Change-Id: Ie1e6674f414789ae52508b89e6f95d0a122cbd6f
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2970990
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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BUG=b:185783841
TEST=none
Change-Id: I4c9a43efd2d3c5e77a681b8b10054a07df99df96
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2953866
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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Process FLASH_READ_FAILED the same as the rest of the errors. Put the
actual code in response and return INTERNAL_ERROR.
BUG=none
TEST=none
Change-Id: Iacbdc2db01c54da57cac28ccbdfd3210be95dc62
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2954320
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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Add support for running the VENDOR_CC_GET_AP_RO_STATUS vendor command.
BUG=b:182594555
TEST=gsctool -aB prints the AP RO verification status
Change-Id: If14073894441657746a84cff8f778fd57a126625
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2951963
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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AP RO verification has four outcomes. Shimless RMA needs to be able to
check the status. This change adds a vendor command to check the AP RO
verification status
NOT_TRIGGERED: The last AP reboot was not triggered by RO verification
key combination.
PASS: The last AP reboot was triggered by RO verification key
combination, and the verification passes
FAIL: The last AP reboot was triggered by RO verification key
combination, and it fails. In reality, the device should brick and
the system will not see this response.
UNSUPPORTED: The last AP reboot was triggered by RO verification key
combination, but there is no data to perform it or the
board doesn't support it.
BUG=b:182594555
TEST=manual
# Erase board id
# Erase AP RO hash
cr50 > ap_ro_info erase
# Check status
AP RO status = 3: unsupported
# Set gbb flags
/usr/share/vboot/bin/set_gbb_flags.sh 0x140
# Set AP RO hash
./util/ap_ro_hash.py -v True GBB
# Check status
AP RO status = 0: not run
# Trigger verification
# Check status
AP RO status = 1: pass
# Change gbb flags
/usr/share/vboot/bin/set_gbb_flags.sh 0xa39
# Trigger verification
# Check status
AP RO status = 2: FAIL
# Set board id to DUKI:0x10
# Check status
AP RO status = 3: unsupported
Change-Id: I354ccd6317cd36008a66ffd93afb3ee95f3c3561
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2950314
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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Some factories programmed hashes into devices that don't support reading
from AP flash while EC_RST_L is asserted. Skip AP RO verification on
these devices if the RLZ is blocked.
BUG=b:185783841
TEST=manual
Set board id to YVRQ:0x10
Verify AP RO verification can be triggered
Set board id to VYRC:0x10
Verify AP RO verification is skipped even if the hash is stored.
Change-Id: I7ef5ceafd55ae5e90b4a754d1e92317a9a745ef9
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2950313
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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Use one method to verify the AP RO hash is valid.
BUG=b:182594555,b:185783841
TEST=run ap ro check on hatch
Change-Id: I4a45e423180ee8494cefe1ca35685676b910efdf
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2950312
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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BUG=b:186446598
TEST=none
Change-Id: I0192cd85904fe162c38bbedd5321187bc24be8d9
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2970991
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
Commit-Queue: Namyoon Woo <namyoon@chromium.org>
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Signed-off-by: Josip Sokcevic <sokcevic@google.com>
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Signed-off-by: Josip Sokcevic <sokcevic@google.com>
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Signed-off-by: Josip Sokcevic <sokcevic@google.com>
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This patch adds the codes that support EC-EFS 2.1.
However, it is not enabled. EC-EFS 2.0 is still enabled as default.
BUG=b:187953899
TEST=built cr50 image, and ran it on hatch with CONFIG_EC_EFS2_VERSION
defined as 0 and 1 respectively. For both cases, CrOS booted good.
Also checked CrOS recovery was done good with corrupted TPM secdata, and
booted good at the end.
> ec_comm corrupt
> ecrst pulse
Ran the unittest for both version as well.
$ make run-ec_comm
$ make run-ec_comm21
Signed-off-by: Namyoon Woo <namyoon@google.com>
Change-Id: I7623fa56dd44a01002628685826105afe76e034f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2891925
Tested-by: Namyoon Woo <namyoon@chromium.org>
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
Commit-Queue: Namyoon Woo <namyoon@chromium.org>
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The index is added to cr50 repository while the usage is only for
generic TPM2.0 case. In the future we don't want GSC to re-use the index
number.
BUG=b:187821960
BUG=b:191163997
TEST=make buildall -j
Signed-off-by: cylai@chromium.org
Change-Id: I6cfb12cf4558dd0bf2c99e045ef6e0b89698bbc7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2892151
Tested-by: Leo Lai <cylai@google.com>
Commit-Queue: Andrey Pronin <apronin@chromium.org>
Reviewed-by: Andrey Pronin <apronin@chromium.org>
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It's difficult to erase the board id. Skip the board id check for
setting the hash with a DBG image. These images are only used by
developers.
BUG=none
TEST=ap_ro_hash.py -v True GBB with and without the board id set with a
DBG image.
Change-Id: I3cb56323aac5d32c3552e91db8f05724ba04fe94
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2950311
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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For commands that do not take in an image, we cannot tell if we are
communicating with a haven or dauntless chip automatically. Add a way to
specify if we are communicating with a dauntless chip. Default to haven
if the optional --dauntless flag is not present
BUG=b:190659004
TEST=execute `gsctool -I` on haven chip and see success
TEST=execute `gsctool -I --dauntless` on haven chip and see failure that
it cannot find device with dauntless VID:PID
Change-Id: Ia92422846d283eba5b27cfaa130c782f13af90ca
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2952837
Commit-Queue: Mary Ruthven <mruthven@chromium.org>
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
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If cr50 is open, flash_cr50 can just run 'reboot' on the cr50 console to
reboot cr50. Add support for doing that.
BUG=none
TEST=flash_cr50.py -p 9999 -i $IMG -c cr50-rescue -r console_reboot
Change-Id: Ibe0d7f98c64faf7f0ac35b04dfad89ad58333cac
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2945957
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
Commit-Queue: Namyoon Woo <namyoon@chromium.org>
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This adds support for running drbg_test with the lab vectors.
BUG=b:189376694
TEST=./tpmtest
Change-Id: I44f3671f55e1befcac36006568bf1a4deb2d4685
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2924406
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
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BUG=b:189376694
TEST=none
Change-Id: I943a94ff35e6a387717032df5bd9d6c5ac8d4293
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2924405
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
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pylint says there are too many local variables in drbg test. Break out
the drbg op handling into separate functions.
BUG=b:189376694
TEST=./tpmtest
Change-Id: Ic26cf28e85a9b56ce4f681175daaf077aea14e58
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2924404
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
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Save the results in a list with their group and test case ids. We'll
need all of this information to generate the response vectors for the
lab.
BUG=b:189376694
TEST=./tpmtest
Change-Id: I9a43d8397baed30e527b213c8860a0ec740c5398
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2924403
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
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We won't have the responses for the lab vectors. Add a check_result bool
to the DRBG_GENERATE test items, so there's a way to tell when it needs
to record the result for the generate command. The test will compare
the expected result to the actual result while running if check_result
is True and the expected string is not empty.
BUG=b:189376694
TEST=./tpmtest
Change-Id: Ifbb5ad9737a6649affce4c885083b631f5056a26
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2924402
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
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For lab testing we won't get the response vectors just the output
bit length. Add a way to specify the byte length in TEST_INPUTS.
BUG=b:189376694
TEST=./tpmtest
Change-Id: I1c4f6940b4ccfced9494eefce6867176c79fa06f
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2923241
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
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Increase the size of the hmac output buffer to 512, so it's big enough
to support the lab responses.
BUG=b:189376694
TEST=drbg_test.py
Change-Id: Id5ff4024079241d36a33f1c36f322a27c4b929d7
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2923240
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
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It has not always been like that but recently the following message
started showing up on the console when building Cr50 image with
CR50_DEV and H1_DEVID variables defined:
awk: cmd. line:1: warning: regexp escape sequence "' is not a ...
This patch fixes the problem.
BUG=none
TEST=running 'CR50_DEV=1 H1_DEVIDS="0 1" make BOARD=cr50 -j' succeeds
and does not generate the above error message any more.
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Change-Id: I3a34e1dc5dc3ca58928bfeac32df1ac7e1aa3c4c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2931956
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
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In preparation to dcrypto code refactoring as independent build unit
for Cr50 U2F FIPS certifcation, need to enable disabling the use of
crypto provided by chip/g/dcrypto and chip/g/trng.c. While use of
chip/g/dcrypto is controlled by CONFIG_DCRYPTO, chip/g/trng.c is always
linked in. Since all chip/g boards (cr50, cr52*, cr53*) enable
CONFIG_DCRYPTO, and logically trng is cryptographic unit, move it under
CONFIG_DCRYPTO control.
BUG=b:134594373
TEST=make buildall -j
Change-Id: I7be47abfe961c4a216a56e15c88254b60da10005
Signed-off-by: Vadim Sukhomlinov <sukhomlinov@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2937383
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Tested-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Commit-Queue: Vadim Sukhomlinov <sukhomlinov@chromium.org>
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Changes in compiler resulted in multiple warnings treated as errors,
failing host test builds.
Addresing warnings by checking return values.
BUG=none
TEST=make runtests
Change-Id: Idb2686370bf041791099b3e332ff25173338e994
Signed-off-by: Vadim Sukhomlinov <sukhomlinov@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2936000
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Commit-Queue: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Commit-Queue: Vadim Bendebury <vbendeb@chromium.org>
Tested-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Auto-Submit: Vadim Sukhomlinov <sukhomlinov@chromium.org>
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CRYPTO_TEST images don't need to have restricted CCD. Open CCD for
crypto test images like we do for DBG images.
BUG=none
TEST=ccd is automatically open in crypto test images
Change-Id: I674ef9055e1a87caf9f8b2b28f9893e79ed9e7e5
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2916576
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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Enable rddkeepalive on red boards, so nothing needs to be done to enable
ccd.
BUG=none
TEST=build red board image. Make sure ccd is automatically enabled.
Change-Id: If629ead1307d8d12cd36678bae792f1109a0839c
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2916575
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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BUG=b:188846962
TEST=run on hatch
Change-Id: I1d9ea6048cec240c830dcd5d56c41b5cbfd622a1
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2911495
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Add the two new error flag values that were introduced in the ti50
report.
See
https://chrome-internal.googlesource.com/ti50/common/ti50/+/main/applications/fw_updater/src/structures.rs
for ti50 definitions
BUG=none
TEST=none
Cq-Depend: chrome-internal:3831829
Change-Id: I794a49d7c0814258350b479e90167d500081433a
Signed-off-by: Jett Rink <jettrink@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2897129
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
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BUG=b:187083680
TEST=none
Change-Id: I76ad8b29b32007fde0e8a6b527f08fa2333e801a
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2897918
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
Commit-Queue: Namyoon Woo <namyoon@chromium.org>
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Some platforms generate more than one pulse when resetting, many Intel
SOCs generate two pulses, some other chips could go even higher.
TPM reset on Cr50 is processed asynchronously, repetitive pulses
result in multiple reset processing cycles.In case pulses are coming
too soon one after another this could cause some race conditions.
Let's ignore repetitive reset pulses unless there has been an attempt
by the host to read a register (which is usually the very first action
of the AP when booting up).
Clear reset_in_progress when the TPM is stopped to ensure they aren't
set at the same time. TPM stop disables tpm communication until the TPM
is reset. reset_in_progress blocks resetting the tpm until there's tpm
communication. We need to ensure these aren't both set at the same time
otherwise the system will get into a state where it rejects tpm resets
and tpm communication forever. This fixes the ccd open issue from take
one where the tpm would stay disabled after opening ccd because cr50
rejected the tpm resets that would clear if_stop.
BUG=b:164130916
TEST=observed that only one reset is happening on an Octopus device,
while there are two pulses present on the PLT_RST_L line.
Verified proper reboot multiple times in a row.
use rma_auth to open ccd. Verify subsequent tpm resets reset the
TPM and don't say reset already in progress.
Change-Id: I62717bf3f0e9bc6d9090122e5b15d13c8f4825e5
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2832434
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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Enable dev features in CRYPTO_TEST builds, so it's easier to update and
rollback to MP images.
Add the rollback command and disable update checks.
BUG=b:186663661
TEST=make clobber ; make -j BOARD=cr50
make clobber ; make -j BOARD=cr50 CRYPTO_TEST=1
Change-Id: Id8929f67f206d3222c551532c91921bd646d2a50
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2875480
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
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Enable the TPM with crypto test images, so boards can boot. We saved
enough space by removing smaller features. Cr50 can be built with
CRYPTO_TEST and the TPM enabled.
BUG=b:186663661
TEST=make clobber ; make -j BOARD=cr50
make clobber ; make -j BOARD=cr50 CRYPTO_TEST=1
Change-Id: Iedb16c182183993b4f33658e5074d94a9e711ca9
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2875479
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
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Remove AP RO verification and spi hash support to save space.
This saves 3952 bytes in the CRYPTO_TEST image.
BUG=b:186663661
TEST=make clobber ; make -j BOARD=cr50 ;
make clobber ; make -j BOARD=cr50 CRYPTO_TEST=1
Change-Id: I77eb3de547fad1e4a894b0e6eff62adaa8cbf65d
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2875478
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
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Remove these commands.
CONFIG_CMD_ECRST
CONFIG_CMD_SYSRST
CONFIG_CMD_WP
CONFIG_CMD_DUMP_NVMEM
CONFIG_CMD_PINMUX
CONFIG_CMD_GPIOCFG
CONFIG_CMD_SLEEPMASK
CONFIG_CMD_TIMERINFO
CONFIG_CONSOLE_HISTORY
CONFIG_I2C_XFER
CONFIG_I2C_SCAN
CONFIG_CONSOLE_CMDHELP
This saves 6068 bytes of space.
BUG=b:186663661
TEST=make -j BOARD=cr50
Change-Id: I3f559fe853ab51b9618edb3e2a5bd215c2155325
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2875477
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
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Add CONFIG_CMD_ROLLBACK for building the rollback command.
BUG=b:186663661
TEST=flash usage doesn't change with make -j BOARD=cr50
Change-Id: Iea22485368fbb57eed114653c6f78758cc5c8111
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2875476
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
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Add CONFIG_SPI_HASH to control building spi hash support.
BUG=b:186663661
TEST=flash usage doesn't change with make -j BOARD=cr50
Change-Id: If2f731897bcddec226cd0f388e94e82f7eeaeb8f
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2875475
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
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Isolate CONFIG_AP_RO_VERIFICATION
BUG=b:186663661
TEST=flash usage doesn't change with make -j BOARD=cr50
#undef CONFIG_AP_RO_VERIFICATION doesn't have build errors.
Change-Id: I9bf7e897a44302062551ecb553236a08dc96432e
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2875474
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
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Add CONFIG_CMD_GPIOCFG to control building the gpiocfg command.
BUG=b:186663661
TEST=flash usage doesn't change with make -j BOARD=cr50
Change-Id: Ie723ef230ac838ff8298d39fd089c232f852871e
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2875473
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
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Add CONFIG_CMD_PINMUX to control building the pinmux command.
BUG=b:186663661
TEST=flash usage doesn't change with make -j BOARD=cr50
Change-Id: I17dba6f988388c39c58aebd11ee202ae0e7d5d9f
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2875472
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
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Add CONFIG_CMD_DUMP_NVMEM to control building the dump_nvmem command.
BUG=b:186663661
TEST=flash usage doesn't change with make -j BOARD=cr50
Change-Id: Ie42e6c4b36ebca75ce99c2f5477fa7d917fcc87f
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2875471
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
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Add CONFIG_CMD_WP to control building the wp commands.
This adds the wp console command, the bpforce console command, and the
wp vendor command.
BUG=b:186663661
TEST=flash usage doesn't change with make -j BOARD=cr50
Change-Id: I707ace6d35b691a49d983b714ad519ae85c7e01f
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2875470
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
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Add CONFIG_CMD_SYSRST to control building the sysrst command.
BUG=b:186663661
TEST=flash usage doesn't change with make -j BOARD=cr50
Change-Id: I4922b5b55d895bc2f4b43614fe2af210c5fbe134
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2875469
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
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Add CONFIG_CMD_ECRST to control building the ecrst command.
BUG=b:186663661
TEST=flash usage doesn't change with make -j BOARD=cr50
Change-Id: Ia3b7a0284c594d03257fa669bff0ab8bec155125
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2875468
Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
Reviewed-by: Namyoon Woo <namyoon@chromium.org>
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BUG=b:187081660
TEST=flashing the image erases the third rollback mask bit
[0.049072 update_rollback_mask: bailing out at bit 0]
[0.051795 update_rollback_mask: bailing out at bit 3]
[0.052886 updated 1 info map words]
> sysinfo
...
Rollback: 0/0/1 3/3/3
...
Change-Id: Id802e3e4b010fbc7274e34360beaa47adcd0816f
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2869128
Reviewed-by: Andrey Pronin <apronin@chromium.org>
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This options is not used anymore and it was never exercised for read
operations. Updating documentation to reflect current state.
BUG=b:186479007
TEST=none
Signed-off-by: Daniel Campello <campello@chromium.org>
Change-Id: I52b66e30b916b361e0fd2b2621147f369d0844bb
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2863542
Commit-Queue: Andrey Pronin <apronin@chromium.org>
Reviewed-by: Andrey Pronin <apronin@chromium.org>
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