| Commit message (Collapse) | Author | Age | Files | Lines |
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Builders have been shutoff, and overlays are gone. EC board support
can be dropped.
BUG=b:190404616
BRANCH=none
TEST=CQ
Cq-Include-Trybots: luci.chromeos.cq:cq-orchestrator
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I0c7c3f003c9c3ec66101e6b16b17585bd85e70fb
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3171108
Commit-Queue: Martin Roth <martinroth@google.com>
Tested-by: Martin Roth <martinroth@google.com>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Explicitly enable the I2C controller node that is used on each board
using the Nuvoton NPCX7 or NPCX9 chipset.
This is a no-op at the moment, but prepares for an upstream change that
will disable the I2C controller nodes by default.
BUG=b:200292035
BRANCH=none
TEST=zmake testall
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: I158ae44090a719ef20930350d89efd7903e6e531
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3169389
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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Reduce flash usage by 128 bytes.
BUG=none
TEST=make buildall
BRANCH=none
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Change-Id: I7d026cbb332d6e84f8d6a3275f7c43b902c6b963
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3171333
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
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BUG=b:200542097
TEST=None
BRANCH=None
Signed-off-by: Chris McDonald <cjmcdonald@chromium.org>
Change-Id: I1f6ac70c524dce56fde6c59f3c0129726cfc5761
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3171531
Commit-Queue: Jaques Clapauch <jaquesc@google.com>
Commit-Queue: Chris McDonald <cjmcdonald@chromium.org>
Tested-by: Jaques Clapauch <jaquesc@google.com>
Auto-Submit: Jaques Clapauch <jaquesc@google.com>
Reviewed-by: Chris McDonald <cjmcdonald@chromium.org>
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The ec_version.h contains both a long build string and also a 31 char
string. Change the short string to omit the commit count, and only
include full hashes, i.e. hayato_v2.6-ec:5bd1aa,os:ade7b4 not
hayato_v2.6.73670-ec:5bd1aa,os:
Change test to be a real version string with hashes of the right length.
BUG=None
BRANCH=None
TEST=./zephyr/zmake/run_tests.sh
Change-Id: I18d73345036933594b8c74187796c3727f868629
Signed-off-by: Jeremy Bettis <jbettis@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3160464
Tested-by: Jeremy Bettis <jbettis@chromium.org>
Auto-Submit: Jeremy Bettis <jbettis@chromium.org>
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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API pd_get_am_discovery() sets the lock (task access bit) to keep track
of EC tasks accessing the pd port discovery data. If any of the task
access bits are set,EC host task typec discovery handler will return
EC_RES_BUSY to host, indicating discovery data is modified while copying
port discovery data to the host. Hence the lock/task access bit should
be set only when the port discovery data is modified by any tasks.
Setting of lock/task access is removed from pd_get_am_discovery() and
implemented new api pd_get_am_discovery_and_notify_access() for this.
pd_get_am_discovery() proto type is changed to return 'constant pointer'
which forces developers to use pd_get_am_discovery_and_notify_access()
when they intend to access and modify discovery data.
summary of changes implemented.
- Remove setting of task access bit from pd_get_am_discovery().
- modify pd_get_am_discovery() prototype to return constant pointer.
- implement new api pd_get_am_discovery_and_notify_access()
- Replace calls to pd_get_am_discovery() with new api
wherever discovery data is accessed and modified.
BRANCH=none
BUG=b:197466819 b:190390784
TEST=Verified 50 cold boot cycling with TBT device attached.
Device detected in every cycle.
Signed-off-by: Deepti Deshatty <deepti.deshatty@intel.corp-partner.google.com>
Change-Id: I5b6f1f2b91d92ddbe58f3bf994f684abee948c02
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3139858
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
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A field (cros_fwid_rw) was added to ec_response_get_version and the
version was updated to v1. Some system components that still use v0
of the version host command fail because the size of the response
does not match the updated ec_response_get_version struct.
Restore ec_response_get_version to match v0. Create a new
ec_response_get_version_v1 structure with the added v1 fields.
This allows legacy code to continue using ec_response_get_version,
which matches the expected response size for the v0 command.
BUG=b:188073399,b:200075921
TEST=EC console 'version' works
Legacy 'ectool version' works with old an new EC firmware.
New 'ectool version' works with old and new EC firmware.
BRANCH=None
Change-Id: I51a052a550c2460f2604da8e04fc43c36acba4d5
Signed-off-by: Rob Barnes <robbarnes@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3169100
Reviewed-by: caveh jalali <caveh@chromium.org>
Reviewed-by: Patryk Duda <patrykd@google.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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BUG=b:199242894
BRANCH=firmware-trogdor-13577.B-master
TEST=Make sure battery charging, battery cutoff works.
Signed-off-by: Tommy Chung <tommy.chung@quanta.corp-partner.google.com>
Change-Id: Id79478c32039c6acae31f3bf6e24c064fb2ee74c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3146780
Reviewed-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-by: Philip Chen <philipchen@chromium.org>
Commit-Queue: Philip Chen <philipchen@chromium.org>
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Restructure the GPIO interrupt table to separate the constant data from
the data that needs to be updated at runtime.
On Herobrine, this saves 180 byts flash and 240 bytes RAM.
BUG=b:199328071
BRANCH=none
TEST=zmake testall
TEST=Boot zephyr on herobrine
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: I096aec5b00fd7dc661db326a278ab44a0a1286da
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3169563
Commit-Queue: Yuval Peress <peress@google.com>
Reviewed-by: Yuval Peress <peress@google.com>
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Bringup power sequencing for AMD and enable for guybrush.
Note that at the moment we had to copy-paste the power signals and
related funcitons, the code was a bit too far from shimming without
extensive editing. We can try and merge together later.
BUG=b:195137794
BRANCH=none
TEST=power sequence to S0, nothing useful on ap console (yet!)
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I9a577e24d80fe0ff992af4b847e14695b82f871d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3169568
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Enable help, tab complete, and history for much tasty.
BUG=b:195137794
BRANCH=none
TEST=use the features
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: Ia27b9a1b0338d5ada6db5ba3c1893cea398ca78c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3169567
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Got it to compile with just one extra gpio.
Not sure if it actually works yet.
BUG=b:195137794
BRANCH=none
TEST=compiles
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I8103ba697206ce5350c2d353dbd3e05cec76eb40
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3169566
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Add config options for AMD power sequencing and wire up to guybrush.
Note this doesn't toggle any more code to compile yet.
BUG=b:195137794
BRANCH=none
TEST=compile for guybrush
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: Ifd17c6eec05335079bd52955c37f37407501e270
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3169565
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Enable power button interrupt and module.
Don't have the x86 state machine going yet.
BUG=b:195137794
BRANCH=none
TEST=push the button, see the prints
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I5996a65fe40afd58027452e5b44a60becbbdfa0d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3169199
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Bring up GPIOs for ACOK, and wire the interrupts.
Note we needed to set certain Kconfigs to n due to incorrectly
specified defaults.
BUG=b:195137794
BRANCH=none
TEST=compiles
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I64f935895a74a5df2dbcd1122623788f91ef89fa
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3169198
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Initial population converted from gpio.inc.
IOEX gpios not handled yet.
Added lid switch support as a first (useful) gpio.
BUG=b:195137794
BRANCH=none
TEST=observe uart prints with lid open/close
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: Ie4ac37d11ca01594b390b999516e93462b1e4691
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3169197
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Drop IOEX and IOEX_INT macros during GPIO conversion.
BUG=b:195137794
BRANCH=none
TEST=run for guybrush
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: Icb52e31a33efb1b0a3541448614ac5a8520cbe6b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3169196
Reviewed-by: Diana Z <dzigterman@chromium.org>
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BUG=b:195137794
BRANCH=none
TEST=uart works
Change-Id: Ib7e177cfd501f78afb6edf943f078466dca455a6
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3168392
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Move a comment and a function to make the next CL cleaner.
BUG=none
BRANCH=none
TEST=none
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: I83185db995b083f839709eb564353a66364e87d0
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3169562
Commit-Queue: Yuval Peress <peress@google.com>
Reviewed-by: Yuval Peress <peress@google.com>
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BUG=none
BRANCH=none
TEST=zmake configure -b zephyr/projects/brya/brya
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: If780dd6dfc92e0dabbe7c1aff19d2c0fe945c6d6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3169561
Commit-Queue: Yuval Peress <peress@google.com>
Reviewed-by: Yuval Peress <peress@google.com>
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Add a single test for the lis2dw12 driver that checks the who-am-i
register.
BRANCH=none
BUG=b:200046770
TEST=zmake configure --test zephyr/test/drivers
Signed-off-by: Yuval Peress <peress@chromium.org>
Change-Id: I8dba62f941d74cca025645b81512b4e0c9e04908
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3168035
Tested-by: Yuval Peress <peress@google.com>
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
Commit-Queue: Yuval Peress <peress@google.com>
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BRANCH=none
BUG=b:200046770
TEST=zmake configure --test zephyr/test/drivers
Signed-off-by: Yuval Peress <peress@chromium.org>
Change-Id: If425d9760b8db9024478fb9a664ffa71e7c25eb7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3168034
Tested-by: Yuval Peress <peress@google.com>
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
Commit-Queue: Yuval Peress <peress@google.com>
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Add the configuration log level needed to show I2C traffic. This will
make it easier for others to enable when debugging tests.
BRANCH=none
BUG=none
TEST=zmake configure --test zephyr/test/drivers
Signed-off-by: Yuval Peress <peress@chromium.org>
Change-Id: I238a2f101777a5651ddde537a0359d9c15377587
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3168033
Tested-by: Yuval Peress <peress@google.com>
Auto-Submit: Yuval Peress <peress@google.com>
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
Commit-Queue: Yuval Peress <peress@google.com>
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The command is useful to debug.
BRANCH=None
BUG=b:194710429
TEST=Used the rtc_alarm command to trigger RTC interrupt.
Change-Id: Iefcbd2d982494044109994a1fe082041d4de215a
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3166997
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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BRANCH=none
BUG=b:200046770
TEST=make buildall -j
Signed-off-by: Yuval Peress <peress@chromium.org>
Change-Id: I5f1c228b44a64e9ceab4511713ac4cf70b24e116
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3168032
Tested-by: Yuval Peress <peress@google.com>
Auto-Submit: Yuval Peress <peress@google.com>
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
Commit-Queue: Jeremy Bettis <jbettis@chromium.org>
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BRANCH=none
BUG=none
TEST=zmake configure --test zephyr/test/drivers
Signed-off-by: Yuval Peress <peress@chromium.org>
Change-Id: I6b0abd11b9738057e73f0bd7af821ef1b002de25
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3168031
Tested-by: Yuval Peress <peress@google.com>
Auto-Submit: Yuval Peress <peress@google.com>
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
Commit-Queue: Jeremy Bettis <jbettis@chromium.org>
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The PS8805 supports 1 MHz operation normally, but only 400 kHz operation
during flash updates. The I2C passthru interface used by depthcharge
doesn't support changing the I2C frequency or informing the EC that a
firmware update is going to start, so the lower frequency must be used.
BUG=b:199550987
BRANCH=none
TEST=Verify PS8805-A3 firmware updates
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: I9be242ce03cc29c74559c6012b5cc83680b7b288
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3166998
Reviewed-by: Wai-Hong Tam <waihong@google.com>
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If the port is not changing, should not be doing anything.
In order to solve the problem of sometimes unable to boot
under AC only state, we can make a return early.
BUG=b:197199689
BRANCH=dedede
TEST=make BOARD=storo pass, the DUT can boot up normally
when only the 45W adapter is inserted
Signed-off-by: Mike Lee <mike5@huaqin.corp-partner.google.com>
Change-Id: Icec7a5e9a0ed6efdd41489b4fd3e74325f4b81fa
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3167617
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: wen zhang <zhangwen6@huaqin.corp-partner.google.com>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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Garg does not support keyboard backlight. Remove this feature to
free up flash space
BUG=none
BRANCH=none
TEST=make BOARD=garg
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Change-Id: Iafeb208440caf8fde6067821aa156ede57acd888
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3159426
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
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New battery: AP16L8J
BUG=none
BRANCH=none
TEST="ectool batterycutoff" can cut off the battery
Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com>
Change-Id: I27a047d36d64dd9f5bce482b3b1290783b81976e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3168450
Tested-by: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
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In npcx5/7, we use two reserved bits in the BSC1 register (offset 0x07
of the MDC register) to indicate what the current image copy is.
In npcx9, these two bits are used by the booter. We need to change them
to another two empty scratch bits which are not used by the booter.
BUG=b:165777478
BRANCH=none
TEST=pass "make buildall"
TEST=check the related bits changed by "sysump ro" and "sysjump rw"
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Change-Id: I6bcfe6d8752c6fa10022a21956d2e0ceb7f9418e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3153119
Tested-by: CH Lin <chlin56@nuvoton.com>
Reviewed-by: caveh jalali <caveh@chromium.org>
Auto-Submit: CH Lin <chlin56@nuvoton.com>
Commit-Queue: caveh jalali <caveh@chromium.org>
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Support for EC_CMD_BATTERY_GET_STATIC version-1 is
added to prevent an ioctl error, on entry of ectool
battery command.
BUG=none
BRANCH=none
TEST=Verify on adlrvp using ectool battery command
ectool battery command returned correct battery
information without any ioctl error.
Signed-off-by: poornima tom <poornima.tom@intel.com>
Change-Id: I359241e8696da0f83e649a920953bc25a88bb0a9
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3156318
Reviewed-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: caveh jalali <caveh@chromium.org>
Commit-Queue: caveh jalali <caveh@chromium.org>
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Type-C ports of ADL-N based RVP SKU do not have retimers.
Hence, removed the reference for retimers based on board id
of the ADL-N platform at run time.
BUG=none
BRANCH=none
TEST=Tested on ADL-N
Signed-off-by: poornima tom <poornima.tom@intel.com>
Change-Id: I0e57fc199cc4a0192056eff35ba10fbac457cf4f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3143407
Reviewed-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: caveh jalali <caveh@chromium.org>
Tested-by: Deepti Deshatty <deepti.deshatty@intel.corp-partner.google.com>
Commit-Queue: caveh jalali <caveh@chromium.org>
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This CL was copied from CL:3058157.
BUG=b:200116046
BRANCH=none
TEST=make -j BOARD=primus
Signed-off-by: Scott Chao <scott_chao@wistron.corp-partner.google.com>
Change-Id: I3eefa5179df7f758f43c35894fcdaba7a8badacc
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3162472
Reviewed-by: caveh jalali <caveh@chromium.org>
Reviewed-by: Boris Mittelberg <bmbm@google.com>
Commit-Queue: caveh jalali <caveh@chromium.org>
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Add guards to limit the long warm_reset handling only in SC7180, such
that the future generations, like SC7280, don't have it.
BRANCH=None
BUG=b:187980397, b:187098628
TEST=Built all the Chromium EC images and Zephyr EC images.
TEST=Modify a board to use the SC7280 CONFIG.
Change-Id: Iad011f58522641cde2f469f71114473476c53d67
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2893070
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
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Just preserving the build at ToT. Do not cherry pick.
BRANCH=none
BUG=none
TEST=verified build for bobba platform
make BOARD=bobba -j
Signed-off-by: Deepti Deshatty <deepti.deshatty@intel.corp-partner.google.com>
Change-Id: I26f76a6d98a1505953aa4bfbbe838efbd22a0804
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3166370
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
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This change was introduced in crrev.com/c/3017987 but it was
accidentally removed in crrev.com/c/3078823. This patch reintroduces
the change.
Original change's description:
> hatch_fp/board_rw: Explicitly reset FP_RST_ODL to default on RW init
>
> FP_RST_ODL pin is only defined in gpio_rw.inc, so this pin won't be
> initialized to 1 by RO. Also, RW won't set this pin because sysjump to
> RW is a warm reset actually and we are not setting GPIO pins to their
> defaults after the warm reset to avoid undesired effects (see
> gpio_pre_init() in chip/stm32/gpio.c).
>
> As a result fpsensor_hw hardware unit test was not working, because
> FPMCU was keeping sensor in reset.
>
> Build with FP private driver is working because the driver performs
> sensor reset during initialization.
>
> BUG=b:170432597
> BRANCH=none
> TEST=`make BOARD=bloonchipper`
>
> Signed-off-by: Patryk Duda <pdk@semihalf.com>
> Change-Id: Ib88d1965dc1410c08c3e3a51ad4f90d27f8ea1b0
> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3017987
> Reviewed-by: Craig Hesling <hesling@chromium.org>
BUG=b:178746753 b:170432597
BRANCH=none
TEST=Run 'run_device_tests.py -b bloonchipper' and check if fpsensor_hw
passes.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Change-Id: Ia852807f9229e7e6c3b12df01fd26962777e45d2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3162205
Tested-by: Patryk Duda <patrykd@google.com>
Auto-Submit: Patryk Duda <patrykd@google.com>
Reviewed-by: Craig Hesling <hesling@chromium.org>
Commit-Queue: Craig Hesling <hesling@chromium.org>
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Support BMA422 as 2nd source for lid accelerometer sensor.
EC detect sensor chip id via i2c in HOOK_CHIPSET_STARTUP and init it.
BUG=b:195902116
BRANCH=None
TEST=make -j BOARD=taeko; test lid accel is initialized correctly in
HOOK_CHOPSET_STARTUP; test lid accel can work by ectool motionsense
tool.
Signed-off-by: reno.wang <reno.wang@lcfc.corp-partner.google.com>
Change-Id: I593139df2b940c97809f8c97926c9da6cca68843
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3139855
Reviewed-by: Boris Mittelberg <bmbm@google.com>
Commit-Queue: Boris Mittelberg <bmbm@google.com>
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Prepare the next hardware revision. It has a PPC chip which requires 5V
rail in S5. The 5V rail enable pin should be turned on whenever the
EC is powered.
Since the existing 5V rail enabling is done inside the qcom power
sequence. Trogdor and Herobrine both shares this qcom power sequence.
For Trogdor, this CL moves the 5V rail enabling from the qcom power
sequence to the board level hook.
For Herobrine, this CL updates the GPIO name and modifies the default
level to HIGH. The CONFIG of 5V control should be disabled. As no board
level hook to modify the 5V rail, the 5V is always on.
BRANCH=None
BUG=b:199804198
TEST=Booted both Zephyr and EC-OS images on Herobrine. Checked the 5V
rail is enabled in S0 and S5.
TEST=Booted both Zephyr and EC-OS images on Lazor. Checked the 5V rail
is enabled in S0 and disabled in S5.
Change-Id: Ifa98ee0c4e970dd89952e94cc6a0e289798e6a57
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3163918
Reviewed-by: Keith Short <keithshort@chromium.org>
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Now that the BB retimer has its own HPD update function, the extra mux
set can be removed from the general USB mux code.
BRANCH=None
BUG=b:195773400
TEST=on voxel, pass tast typec.Mode*.manual
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Ica83c2c568799d7686d8cfdbc5b0f446a6ebcb8f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3163931
Reviewed-by: Keith Short <keithshort@chromium.org>
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Now that the BB retimer has its own HPD interface, add this interface to
every board using the bb_usb_retimer driver.
BRANCH=None
BUG=b:195773400
TEST=on voxel, pass tast typec.Mode*.manual
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Ia70d139431739e8f2c0577359cb3aaa7fb906d0a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3163930
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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The BB retimer may use a simple read/modify/write on its configuration
register to set HPD fields, rather than needing to rely on a call to a
full mux set later to achieve this. Introduce an API so boards using
the BB retimer may move to using this function.
BRANCH=None
BUG=b:195773400
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Iae87c0860350fed32f69e0ea3b6530cd7e5ba111
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3163929
Reviewed-by: Keith Short <keithshort@chromium.org>
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The NPCX7 combination is obsoleted. Remove the support.
BRANCH=None
BUG=b:191803008
TEST=Checked nothing depends on herobrine_npcx7.
Change-Id: I5075aedcc31f6aceb5b3261b6b0e6c689ddf7eb7
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3163917
Reviewed-by: Keith Short <keithshort@chromium.org>
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Per consulting with MP2964 vendor, EC doesn't need to tune MP2964 timing
if project build with rev1 chip.
BUG=b:199373682
BRANCH=none
TEST=make -j BOARD=taeko
Signed-off-by: reno.wang <reno.wang@lcfc.corp-partner.google.com>
Change-Id: Id1ea3dcb0e21de03a2a8f4901519676b49d98e66
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3151915
Reviewed-by: Boris Mittelberg <bmbm@google.com>
Commit-Queue: Boris Mittelberg <bmbm@google.com>
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Elm is at about 100 bytes free flash on ToT, so remove TCPMv1 state
strings to free up space.
BRANCH=None
BUG=None
TEST=build and verify elm has almost 900 more bytes free
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I01288066b528b0f26ac58db85da9baacc39bde69
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3163928
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Currently, the EC doesn't always wait for an ACK from the virtual mux
but it will still always send the AP ACK onto the PD task. This means
we have some risk of a previous ACK being present in the task events
already when we begin a new wait. Remove this risk by only sending the
event to the task when there is a task waiting.
BRANCH=None
BUG=b:186777984
TEST=tast typec.Mode*.manual tests on voxel
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I1e4cf96af838c0cbe4ef549337b304679b59d641
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3078414
Reviewed-by: Keith Short <keithshort@chromium.org>
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Currently, there are three separate tasks which can access the muxes at
once (host command, PD, and chipset). As such, locking should help
coordinate sets and gets to each port.
BRANCH=None
BUG=b:172222942
TEST=tast typec.Mode*.manual on voxel
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I003a2eee06e4b44241308d8b64da597bd17c8878
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3078413
Reviewed-by: Keith Short <keithshort@chromium.org>
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Since the drivers are now taking a mux_state_t set of flags to update,
go ahead and unify the usb_mux API this way as well. It makes the
parameters more apparent than the 1/0 inputs, and aligns the stack to
use the same parameters.
BRANCH=None
BUG=b:172222942
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Ie943dbdf03818d8497c0e328adf2b9794585d96e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3095438
Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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Undef configs in board.h of cret for final fw.
BUG=b:200047639
BRANCH=dedede
TEST=make -j BOARD=cret
Signed-off-by: elmo_lan <elmo_lan@compal.corp-partner.google.com>
Change-Id: Id7ee49197766ee62b406c1b49c3a4cc627daece9
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3164396
Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com>
Reviewed-by: Shou-Chieh Hsu <shouchieh@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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BUG=b:197585292
BRANCH=None
TEST=make -j BOARD=taeko
Signed-off-by: reno.wang <reno.wang@lcfc.corp-partner.google.com>
Change-Id: I63f8560f39581605c5c2d7d1600a28529ab8bcba
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3144416
Reviewed-by: Boris Mittelberg <bmbm@google.com>
Commit-Queue: Boris Mittelberg <bmbm@google.com>
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