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* CBI: Disallow board version and OEM ID to be reprogrammedDaisuke Nojiri2018-05-043-3/+15
| | | | | | | | | | | | | | | | | This patch makes CBI refuse to change board version and OEM ID. When CONFIG_SYSTEM_UNLOCKED is defined, this restriction is removed. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:74946347 BRANCH=none TEST=buildall Change-Id: I6ceda5764af56ed18a575f5563eaf294bb2876d0 Reviewed-on: https://chromium-review.googlesource.com/1017225 Commit-Ready: Jett Rink <jettrink@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* yorp: Shutdown AP when doing hibernateFurquan Shaikh2018-05-041-0/+12
| | | | | | | | | | | | | | | | | | | | When hibernate is run from EC console or using key combo, AP might not actually be in shutdown state. Thus, add a call to force chipset shutdown in board_hibernate and let AP drop down to S5. BUG=b:79171681 BRANCH=None TEST=Verified that hibernate with AP in S0 does not result in EC waking back up. Change-Id: I4103c51afb42944e05ec3965b421730fac3f867a Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1041278 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Justin TerAvest <teravest@chromium.org>
* eve: Limit data role swap to port 0Duncan Laurie2018-05-041-0/+4
| | | | | | | | | | | | | | | Only USB port 0 is capable of device mode, so ignore data role swaps to other ports. BUG=b:78308749 BRANCH=eve TEST=manual: ensure OTG pins are not asserted with data role swap on port 1. Change-Id: I07a331af11c3ce599a75517a5ba0ff2716987545 Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://chromium-review.googlesource.com/1035424 Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* cheza: Make sure switchcap is configured rightAlexandru M Stan2018-05-043-1/+13
| | | | | | | | | | | | | | | | | | Configure switchcap every time we're about to change the signal, just in case it forgot. Feel free to revert this after b/77957956 is fixed. BRANCH=none BUG=b:77957956 TEST="i2cxfer r 0 0xd0 0x2" never shows 0x70, even after a bad brownout (like "gpioset EN_PP5000_A 1" on an unreworked board) Change-Id: I8994cd402ce96d8bf4e436dadfc0e572e7f77a85 Signed-off-by: Alexandru M Stan <amstan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1024501 Commit-Ready: Wai-Hong Tam <waihong@google.com> Tested-by: Wai-Hong Tam <waihong@google.com> Reviewed-by: Wai-Hong Tam <waihong@google.com>
* cheza: Add SDM845 power sequence for rev-0 boardWai-Hong Tam2018-05-047-2/+677
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is the power sequence for rev-0 board. Confirmed the behavior of reprogramming the PMIC registers to enable the instant reset and shutdown. BRANCH=none BUG=b:74395451 TEST=make buildall -j TEST=Tried the following cases: * Cold reset: $ dut-control cold_reset:on sleep:0.2 cold_reset:off Result: G3 -> S0 * Long power press to shutdown: $ dut-control pwr_button:press sleep:8.2 pwr_button:release Result: S0 -> S5 -> G3 * Long power press to power-on but then shutdown: $ dut-control pwr_button:press sleep:8.2 pwr_button:release Result: G3 -> S0 -> S5 -> G3 * Short power press to power-on: $ dut-control pwr_button:press sleep:0.2 pwr_button:release Result: G3 -> S0 * Console command: apreset Result: S0 -> S5 -> S0 * Console command: power off Result: S0 -> S5 -> G3 * Console command: power on Result: G3 -> S0 * Console command: apshutdown Result: S0 -> S5 -> G3 * Lid open to power-on: $ dut-control lid_open:no sleep:0.2 lid_open:yes Result: G3 -> S0 Change-Id: Ia9d44b1dccac66b5b580c08c6c1697ef5989b923 Signed-off-by: Wai-Hong Tam <waihong@google.com> Signed-off-by: Alexandru M Stan <amstan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/969702
* octopus: move more implementation to baseboardJett Rink2018-05-0412-368/+428
| | | | | | | | | | | | | | Move driver configuration to baseboard in preparation for phaser board BRANCH=none BUG=none TEST=yorp still works Change-Id: Ifeb434d2d4103160acd6eb9f784533d1ae0ae35a Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1042729 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* octopus: remove pwm code for LEDsJett Rink2018-05-042-6/+0
| | | | | | | | | | | | | We are using LED as straight GPIO signals so remove pwm for now BRANCH=none BUG=none TEST=none Change-Id: I48b316b6df023217a7cc1bed7a741f72d1388026 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1042728 Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* stm: inline raw_read8 in header fileJett Rink2018-05-043-35/+26
| | | | | | | | | | | | | | | | Rename raw_read8 to st_raw_read8 and statically inline in the header file. Removing the extern removes linker warnings when including this header file without the driver, which happens in baseboard files. BRANCH=none BUG=none TEST=including "driver/accelgyro_lsm6dsm.h" in c files that do not link the actual driver will now compile. Change-Id: I43f799a3b05b2343e012d43bdc9459d138ecf1b5 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1042727 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* flash_ec: Add nocturne board.Aseda Aboagye2018-05-041-0/+1
| | | | | | | | | | | | | | BUG=b:78539498 BRANCH=None TEST=Attepmt ./util/flash_ec --board nocturne and verify that the flashrom programmer is invoked. Change-Id: I93fd9c2712fcfd684ea3456c8f2176ac2557e220 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/1043347 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* yorp: Add support for SONY batteryDivya Sasidharan2018-05-042-0/+29
| | | | | | | | | | | | | | BUG=b:78906183 BRANCH=None TEST=make buildall -j; connect SONY battery and test if recognized on battery UI icon in OS. Change-Id: I15c7a9611c10de425f3ca34f7f8f737c65e47275 Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com> Reviewed-on: https://chromium-review.googlesource.com/1041159 Commit-Ready: Divya S Sasidharan <divya.s.sasidharan@intel.com> Tested-by: Wenkai Du <wenkai.du@intel.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* usb_pd_protocol: Add PD_ROLE_DISCONNECTED for data role swapsDuncan Laurie2018-05-032-2/+8
| | | | | | | | | | | | | | | | | | | Add a state to indicate that a data role is actually disconnected and notify the board-level data swap function with this state when a cable is unplugged. This allows the board to clean up and restore any state that may have been set up with a data role swap. BUG=b:78308749 BRANCH=eve,poppy TEST=manual on eve: plug in C-to-C cable, execute data swap on port 0 with 'pd 0 swap data' and ensure the OTG pins are asserted. Then unplug the cable and ensure OTG pins are now deasserted. Change-Id: I7d8fff22dd5836b4b5af54f0ede71ee1b6e40b5c Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://chromium-review.googlesource.com/1035423 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* nocturne: Only power base when AP is on.Aseda Aboagye2018-05-031-16/+46
| | | | | | | | | | | | | BUG=None BRANCH=None TEST=make -j BOARD=nocturne Change-Id: I4492498b710e4e0f4a1682e4353f993013131c7f Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/1043346 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* sweetberry: Make resetting USB interface more forgivingPuthikorn Voravootivat2018-05-031-9/+9
| | | | | | | | | | | | | | | | Currently, sweetberry ocassionally throws Exception when resetting the USB interface. This CL mitigates that by - Use linearly back off algorithm with 10ms delay increment before next reset attempt to avoid flooding the sweetberry hardware with reset requests. - Increase retry amount from 10 to 100 BUG=chromium:834252 TEST=No "Exception: ('Power', 'Failed to reset')" seen Change-Id: Iaf039cb82760205d1747fd630387852b7cfd8f83 Signed-off-by: Puthikorn Voravootivat <puthik@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1038788
* cr50_rma_open: add support for checking prepvt and prod versionsMary Ruthven2018-05-021-4/+11
| | | | | | | | | | | | | | | | | | | RMA support through the cr50 console is only a part images starting with 0.4.5. Check that the prepvt version is greater than or equal to 0.4.5. Versions 0.4.4 are greater than the prod version 0.3.3, but you can't use it to do RMA open through the console. It can only be done through the AP. BUG=none BRANCH=none TEST=none Change-Id: I7e08cc5dbc9f910686ea5917be755170c0587ee4 Signed-off-by: Mary Ruthven <mruthven@google.com> Reviewed-on: https://chromium-review.googlesource.com/1040356 Commit-Ready: Mary Ruthven <mruthven@chromium.org> Tested-by: Mary Ruthven <mruthven@chromium.org> Reviewed-by: Wai-Hong Tam <waihong@google.com>
* ectool: add 'kbinfo' commandBrian Norris2018-05-021-0/+26
| | | | | | | | | | | | | | We might use this in the kernel, so it's nice to have a diagnostic command for it too. BRANCH=none BUG=chromium:836279 TEST=`ectool kbinfo` on kevin and scarlet Change-Id: I746badf0d2be53d471592a2ca0d7b8ff8070f7a1 Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1038729 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* PRESUBMIT: give real namesBrian Norris2018-05-021-3/+3
| | | | | | | | | | BRANCH=none BUG=none TEST=upload Change-Id: Ied1474ebc347d994a209b31d0dc715318bd2a192 Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1038730
* ectool: Add hibernate-clear-ap-off commandRaul E Rangel2018-05-021-2/+4
| | | | | | | | | | | | | Allows for: ectool reboot_ec hibernate-clear-ap-off TEST=Built and tested on grunt BRANCH=none BUG=b:73825078 Change-Id: Ia05f9c2db9e7b699882fdec61aaa9fb67b2e097d Signed-off-by: Raul E Rangel <rrangel@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1033926 Reviewed-by: Edward Hill <ecgh@chromium.org>
* yorp: Control backlight based on chipset transitionsFurquan Shaikh2018-05-022-0/+13
| | | | | | | | | | | | | | | | | | This change enables/disables backlight based on the chipset state transition. BUG=b:78897667 BRANCH=None TEST=None Change-Id: I4da331cb94f7a304a76fce93b73c38016f5b0f4d Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1036798 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Justin TerAvest <teravest@chromium.org>
* ec: Add .clang-formatRaul E Rangel2018-05-021-0/+10
| | | | | | | | | | | | | | Copied from coreboot. BUG=none BRANCH=none TEST=Tried formatting a few lines. Change-Id: Iff9e6970cb8d725834f5f1f0c6447b62568a6f09 Signed-off-by: Raul E Rangel <rrangel@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1038156 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* gsctool: add verbose mode command line optionVadim Bendebury2018-05-021-1/+7
| | | | | | | | | | | | | | | The new command line option is not used yet, it allows to set a flag which would allow control verbose debug output in the future. BRANCH=none BUG=none TEST=verified that -V command line option shows up in --help output and is accepted. Change-Id: Ie7becdb9c6964f7bb75e9917a02594d50c3c2693 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1036742 Reviewed-by: Andrey Pronin <apronin@chromium.org>
* gsctool: add version command line optionVadim Bendebury2018-05-023-4/+26
| | | | | | | | | | | | | | | | | Use the same script the rest of the EC codebase uses to generate the version string. BRANCH=none BUG=none TEST=built the new image and tried: $ ./extra/usb_updater/gsctool -v Version: v1.1.8258+6097a64f0, built on 2018-05-01 17:04:14 by ... Change-Id: I63d2411872bbd38188f66f51b7ca8508fc74fa8f Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1036741 Reviewed-by: Mary Ruthven <mruthven@chromium.org> Reviewed-by: Andrey Pronin <apronin@chromium.org>
* cr50: prepare to release prepvt 0.4.6Vadim Bendebury2018-05-021-1/+1
| | | | | | | | | | | BRANCH=none BUG=none TEST=mnone Change-Id: Icf5a2069fcdc8908711af6592886a39236c8beab Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1038761 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* octopus: move common function to baseboardJett Rink2018-05-023-146/+92
| | | | | | | | | | | | | | Move common variables and functions to baseboard from yorp and bip BRANCH=none BUG=none TEST=builds Change-Id: Ic74bec45f4ff6c833e4ef0620380f21b2ed6a041 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1040107 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Vijay Hiremath <vijay.p.hiremath@intel.corp-partner.google.com>
* octopus: move common CONFIG defines into baseboardJett Rink2018-05-024-285/+258
| | | | | | | | | | | | | | | The `make BOARD=yorp print-configs` and bip version show no diff before and after this change. BRANCH=none BUG=none TEST=verify the print-configs output does not change. Change-Id: If2cdc39b685f529ece707b9831052daf58e91dfa Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1038898 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Vijay Hiremath <vijay.p.hiremath@intel.corp-partner.google.com>
* build: add build option to print configsJett Rink2018-05-021-0/+15
| | | | | | | | | | | | | | | This is used verify moving define from board to baseboard is a no-op BRANCH=none BUG=none TEST=make BOARD=yorp print-configs works Change-Id: I6868e9ee9e52cd80791df734961d380bbe95bd1e Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1038895 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* bip: adding missing common definesJett Rink2018-05-021-0/+3
| | | | | | | | | | | | | | Add common defines in bip before we pull them into baseboard to ensure that the diff of the move is clean. BRANCH=none BUG=none TEST=bip builds. Change-Id: I06333f2b1ad5d2d7bd057e5e8cd459199393ce1d Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1038897 Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* bip: add keyboard functionalityJett Rink2018-05-023-0/+26
| | | | | | | | | | | | | BRANCH=none BUG=none TEST=builds Change-Id: Iaea766ab55a4d55cb3df5254b55ee460a820f55d Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1039872 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Vijay Hiremath <vijay.p.hiremath@intel.corp-partner.google.com> Reviewed-by: Justin TerAvest <teravest@chromium.org>
* yorp: enable low power mode on ECJett Rink2018-05-021-0/+2
| | | | | | | | | | | | BRANCH=none BUG=b:78497503 TEST=builds. Still needs more verification for low power mode Change-Id: Idab7a1577e4d99edc29d55ad4f99a662d9419c12 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1038896 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Vijay Hiremath <vijay.p.hiremath@intel.corp-partner.google.com>
* usb mux: add comment describing mux_state_tJett Rink2018-05-021-1/+6
| | | | | | | | | | | | | It is a combination of flags and also represents typec_mux enum. BRANCH=none BUG=none TEST=none Change-Id: Ib44f41af6c99f62d76fe29230c82b64537ff0665 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1037423 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* ectool: Don't use board name in ectool tool versionFurquan Shaikh2018-05-012-1/+6
| | | | | | | | | | | | | | | | | | | When using unified images, it might be confusing to have a single board name in the tool version. Since tool version was added to check for compatibility, it is sufficient to look at the sha versions without the actual board name. BUG=None BRANCH=None TEST=Verified that "ectool version" does not report board name in tool version. Change-Id: I862956791706f8a8d508b780bf050caee7c7ccd2 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1036114 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* nautilus: Move PMIC init to a deferred functionFurquan Shaikh2018-05-011-1/+4
| | | | | | | | | | | | | | | | | | | Instead of doing I2C traffic in an init hook, move it to a deferred function to be called outside of INIT_HOOK processing. (identical to CL:1001474 on eve branch, moved to nautilus board file) BUG=b:77336348 BRANCH=poppy TEST=None Change-Id: Id9eec4333c6f04141e475b61e5aea7b838dcedf7 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1033614 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* nautilus: Enable usb device modeFurquan Shaikh2018-05-011-1/+8
| | | | | | | | | | | | | | | | BUG=b:78649985 BRANCH=poppy TEST=Verified following: 1. ectool usbpd 0 dr_swap 2. ectool usbpd 0 --> Role: SNK UFP Change-Id: I10addb4936eab169655c1d11f115740da139a14e Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1031109 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@google.com>
* anx7447: convert automatic OCM erase into commandJett Rink2018-05-015-28/+49
| | | | | | | | | | | | | | | We do not want to erase the OCM flash automatically so we can ensure that we fix our supply chain issues. Add a command that will erase the OCM if needed. BRANCH=none BUG=b:77658388 TEST=verified command works on yorp Change-Id: Iaf6ada3b1e223d15ae0d9624bdcc54b90cb33b64 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1035428 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* bip: add correct charger driverJett Rink2018-05-011-2/+1
| | | | | | | | | | BRANCH=none BUG=b:76429930 TEST=buildall Change-Id: I6d318ad80911e564dda67ba542899ecc42068276 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1019607
* board: Add initial nocturne support.Aseda Aboagye2018-05-019-0/+1752
| | | | | | | | | | | | | | | BUG=b:78539498 BRANCH=None TEST=make -j BOARD=nocturne Change-Id: I830ff6739fb648625536ba248eeb383797c850e2 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/1032094 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Gwendal Grignou <gwendal@google.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* isl9238: read full 16-bit registerJett Rink2018-05-011-1/+1
| | | | | | | | | | | | | Now the read and write both use 16-bit register operations. BRANCH=none BUG=none TEST=isl9238 charger still works on yorp Change-Id: Ia26e1372a48e3f760b1ac2e3cf9bda11111e97b0 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1035460 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* cr50: make fallback certs a compile time optionVadim Bendebury2018-04-281-18/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | The fallback certificate is provided when TPM is starting up, but the proper endorsement certificate seed is not found in the RO space. Unavailability of the proper endorsement cert would be a major failure for the device using TPM, and it is not supposed to happen: RO space is protected. On top of that there is no much point in operating with the fallback certificate. Let's drop fallback certificate support from the code, leaving it possible to conditionally compile in for the remote chance of someone having to debug TPM related problems on the test board (where H1 does not have proper cert seed in the RO). BRANCH=cr50, cr50-mp BUG=b:65253310 TEST=verified that the code without fallback certificate still boots fine on the debug board. Compiling with fallback cert disabled saves 2048 bytes of the flash space. Change-Id: Ice8fd4ceef03dd7b3bf170e5cee2908b2a99844a Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1031055 Reviewed-by: Marius Schilder <mschilder@chromium.org> Reviewed-by: Nagendra Modadugu <ngm@google.com>
* Nami: Add host command handler for keyboard backlight controlDaisuke Nojiri2018-04-271-0/+27
| | | | | | | | | | | | | | | | | | This patch adds host command handlers for EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT and CMD_PWM_GET_KEYBOARD_BACKLIGHT. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:74176833 BRANCH=none TEST=Verify ectool pwmsetkblight works. Verify kblight console command returns the value set by ectool and vice versa. Change-Id: I1929c6a3772ab22cb4b3c68638da23aa23727596 Reviewed-on: https://chromium-review.googlesource.com/1022961 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* Nami: Add keyboard backlight controlDaisuke Nojiri2018-04-277-34/+223
| | | | | | | | | | | | | | | | | | | | | | | This implements keyboard backlight control for Nami, Vayne, Pantheon, and Sona. On Sona, GPIOC4 is directly connected to the LED strings. Thus, we use PWM to control the brightness. On the other variants, the LED strings are connected to LM3509. Thus, we control the brightness through I2C. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:76182445,b:78141647 BRANCH=none TEST=Verify keyboard backlight brightness changes on Nami. Verify keyboard backlight turns on/off on lid close/open, sleep/suspend. on Nami. Verify 'kblight' returns x set by 'kblight x' on Sona. Change-Id: I400ea2bc7a58a3cc57eb959179d2139a99ac176c Reviewed-on: https://chromium-review.googlesource.com/1022833 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Aaron Durbin <adurbin@google.com>
* npcx/lpc: Add debug command to trigger sci/smi/wakeFurquan Shaikh2018-04-271-0/+20
| | | | | | | | | | | | | | | | | | | | This change adds console command to trigger sci/smi/wake based on the user-provided argument. This command is enabled only when DEBUG_LPC is set to 1. It was very helpful while debugging b:78497502 where I could trigger the interrupts to check communication between AP and EC. BUG=b:78497502 BRANCH=None TEST=Verified by enabling DEBUG_LPC that sci/smi/wake are generated as expected. Change-Id: I5b52f5ea4e1824e520fd76315091f73bef157ebf Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1033541 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* tcpci: reset TCPC if alert mask is resetJett Rink2018-04-271-20/+33
| | | | | | | | | | | | | | The PS8751 TCPC expresses that it has been reset by resetting the alert mask. Handle its re-init case. BRANCH=none BUG=b:77551454,b:77639399 TEST=Verify that TCPC is reset on yorp C1 after reinsertion Change-Id: Ie1a819a3627a1225c3fad65a60a4aca126a69f53 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1014355 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* cr50: use new function to verify index presenceVadim Bendebury2018-04-271-3/+3
| | | | | | | | | | | | | | | | | The new TPM API function works even before TPM Startup was executed, this would allow CCD to read FWMP even if the AP does not boot up. CQ-DEPEND=CL:1020725 BRANCH=cr50, cr50-mp BUG=b:67009375 TEST=verified that FWMP can be read both before and after AP is booted, and that missing FWMP is also processed properly in both cases. Change-Id: I4e57e6211fdb8fa3166f261aa861dba9bab433a1 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1020785 Reviewed-by: Andrey Pronin <apronin@chromium.org>
* sweetberry: fix stats_manager and refactorMengqi Guo2018-04-274-41/+149
| | | | | | | | | | | | | | | | | | | | | | This CL updates stats_manager to match the new functionalities in powerlog.py and refactors powerlog.py to more easily find config files and print timestamps in seconds since epoch. The unit test for stats_manager is also updated accordingly. BUG=b:72973433 BRANCH=None TEST=powerlog -b nami_rev0_loc.board -c nami_rev0_loc.scenario \ --print_stats --save_stats /tmp --save_stats_json /tmp \ --save_raw_data /tmp --mW and looking at the printed data python -m unittest stats_manager_unittest CQ-DEPEND=CL:1003522 Change-Id: Ic6e4aadfcd3ad245572788094ee3d3a30106044c Signed-off-by: Mengqi Guo <mqg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1002546 Reviewed-by: Todd Broch <tbroch@chromium.org>
* grunt: Increase CONFIG_EXTPOWER_DEBOUNCE_MS to 200Edward Hill2018-04-271-0/+6
| | | | | | | | | | | | | | | | | | | | | When plugging in USB-C power with no battery (or cutoff battery), the ACOK signal from the ISL9238 charger sometimes has a negative pulse of up to 175 ms after VBUS increases from 5V to 20V. The width of the pulse varies from board to board. Increase CONFIG_EXTPOWER_DEBOUNCE_MS to 200 ms (from default of 30) to ignore this negative pulse. If we think we are running with no battery and no AC then we will set the charger voltage to 2.048V, and therefore lose power. BUG=b:77455171 BRANCH=none TEST=Plug power into Grunt with no battery. Change-Id: I9c0f358985e4c630daef93d61c49b87c2e11a480 Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1031563 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* grunt: Drop the unnecessary charge-current limitSimon Glass2018-04-271-8/+0
| | | | | | | | | | | | | | | Our maximum power is 45W so we don't need to keep this limit. Also we can drop the TODO since we have a bug to track that work. BUG=b:69683178 BRANCH=none TEST=emerge-grunt chromeos-ec Change-Id: Ie40847e3e88653225dc228563c1ac89cc0970316 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1031115 Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Raul E Rangel <rrangel@chromium.org>
* power button: Ignore lid open in PWRBTN_STATE_INIT_ONEdward Hill2018-04-271-1/+2
| | | | | | | | | | | | | | | | | | Normally on lid open, if chipset is off, we pulse the power button to wake the AP. If we are in PWRBTN_STATE_INIT_ON, then we are already waiting to power on the AP so ignore the lid open to avoid turning on the AP too soon. BUG=b:77455171 BRANCH=none TEST=Plug power into Grunt with no battery. Change-Id: Ie57e998725af0ace525f9f2102a0f5a282382a57 Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1031565 Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Martin Roth <martinroth@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* npcx: change chip variants of npcx7 series for better clarification.Mulin Chao2018-04-2711-47/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In this CL, we changed chip variants npcx7m6xb to npcx7m6fb and npcx7m7w to npcx7m7wb for better clafiication since it introduced new parameter "b" for chip generation in the same family series. In new npcx7 series naming rule, it follows: Format: NPCX7(M)(N)(G/K/F)(B/C) param M: 8: 128-pins package, 9: 144-pins package param N: 5: 128KB RAM Size, 6: 256KB RAM Size, 7: 384KB RAM Size param G/K/F/W: Google EC depends on specific features. param B/C: Chip generation in npcx7. (Generation A is ignored. It follows nameing rule in npcx5.) The all chip variants of npcx7 used in boards are also listed below: npcx7m6g - for npcx7 ec without internal flash on npcx_evb. npcx7m6f - for npcx7 ec with internal flash. npcx7m6fb - for npcx7 ec with internal flash, enhanced features. npcx7m7wb - for npcx7 ec with internal flash, enhanced features + WOV. BRANCH=none BUG=none TEST=No build errors for npcx7 series. Change-Id: I896ee33209efa5d7157c90515005db5f36318c76 Signed-off-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/1025471 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* Cr50: Add logging functionality to PinWeaver.Allen Webb2018-04-279-36/+1338
| | | | | | | | | | | | | | | | | | | | | In order to be able to recover from the AP and Cr50 getting out of sync, this logging functionality gives Cr50 a way to track the state changes of the merkle tree so that the AP can be updated to the current state as long as it has a recent enough copy. This involves packing the important information so it can be stored efficiently on flash, and adding the necessary messages for the replay. CQ-DEPEND=CL:895395,CL:929430 BRANCH=none BUG=chromium:809729, chromium:809745 TEST=cd ~/src/platform/ec && V=1 make run-weaver_ng -j Change-Id: I40f98de2c8e9706cccb5b922215699f2132fa121 Signed-off-by: Allen Webb <allenwebb@google.com> Reviewed-on: https://chromium-review.googlesource.com/963773 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* Cr50: Add VENDOR_CC_PINWEAVER vendor command.Allen Webb2018-04-272-6/+59
| | | | | | | | | | | | | | | This connects the pinweaver code to the tpm vendor specific command code. CQ-DEPEND=CL:895395 BRANCH=none BUG=chromium:809741 TEST=TBD Change-Id: I2a6c4bf52ad77b7bf0395095404e925e1dd48dbc Signed-off-by: Allen Webb <allenwebb@google.com> Reviewed-on: https://chromium-review.googlesource.com/929430 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* Cr50: Added Pinweaver base implementation.Allen Webb2018-04-2716-2/+3217
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds some of the ground work for hardware backed brute force resistance on Cr50. The feature is called Pinweaver. It will initially be used to enable PIN authentication on CrOS devices without reducing the security of the platform. A Merkle tree is used to validate encrypted metadata used to track login attempts. The metadata tracks counts of failed attempts, a timestamp of the last failed attempt, the secrets, and any associated parameters. Instead of storing the metadata on Cr50 an AES-CTR is used with an HMAC to encrypt the data so it can be stored off-chip and loaded when needed. The Merkle tree is used to track the current state of all the metadata to prevent replay attacks of previously exported copies. It is a tree of hashes whose root hash is stored on Cr50, and whose leaves are the HMACs of the encrypted metadata. BRANCH=none BUG=chromium:809730, chromium:809741, chromium:809743, chromium:809747 TEST=cd ~/src/platform/ec && V=1 make run-pinweaver -j Change-Id: Id10bb49d8ebc5a487dd90c6093bc0f51dadbd124 Signed-off-by: Allen Webb <allenwebb@google.com> Reviewed-on: https://chromium-review.googlesource.com/895395 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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