summaryrefslogtreecommitdiff
Commit message (Collapse)AuthorAgeFilesLines
* vell: Initial EC imagestabilize-14345.B-mainShon Wang2021-11-1620-0/+2340
| | | | | | | | | | | | | | | | | | | | Create the initial EC image for the vell variant by copying the brya reference board EC files into a new directory named for the variant. (Auto-Generated by create_initial_ec_image.sh version 1.5.0). BUG=b:205908918 BRANCH=None TEST=make BOARD=vell, make buildall Signed-off-by: Shon Wang <shon.wang@quanta.corp-partner.google.com> Change-Id: I4e5bd91e643a8ef1a1ec6cf1dbb191d192433cb4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3277679 Reviewed-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-by: caveh jalali <caveh@chromium.org> Reviewed-by: YH Lin <yueherngl@chromium.org> Tested-by: Devin Lu <Devin.Lu@quantatw.com> Commit-Queue: YH Lin <yueherngl@chromium.org>
* zephyr: add bridge between zephyr gpio and cros ioex driversMichał Barnaś2021-11-169-2/+574
| | | | | | | | | | | | | | | | Add zephyr gpio driver that translates zephyr calls to cros ioex ones. This allows to use cros ioex drivers on zephyr. BRANCH=main BUG=b:202701452 TEST=add ioex with cros driver to board dts check ec console for errors after sending ioexget command Change-Id: Ib9c1d45e7f95649aadfbc9af37e805dfd6afd364 Signed-off-by: Michał Barnaś <mb@semihalf.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262098 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* zephyr: add shim layer for ioexMichał Barnaś2021-11-168-4/+525
| | | | | | | | | | | | | | | | | Add support for io expanders layer in zephyr. This layer allows to use zephyr gpios drivers as ioex pins. BRANCH=main BUG=b:202701452 TEST=enable ioex and shell commands define some ioex pins using zephyr drivers on board without ioexes, errors should be seen on console Change-Id: I18110f442bfb9419af249ade6ab2c8988f5cb4c8 Signed-off-by: Michał Barnaś <mb@semihalf.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262097 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* core/cortex-m: Include subsections in bssTom Hughes2021-11-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The FPC library used on bloonchipper has bss subsections (e.g., bss.sensor_config). These subsections must be put within __bss_start and __bss_end or the initialization performed in core/cortex-m/init.S will not clear it, resulting in potentially random values in the variables rather than zero. Before this change: arm-none-eabi-objdump -h build/bloonchipper/RW/ec.RW.elf Sections: Idx Name Size VMA LMA File off Algn 0 .text 00022eee 08060000 08060000 00010000 2**5 CONTENTS, ALLOC, LOAD, READONLY, CODE 1 .rodata 00008ab8 08082ef0 08082ef0 00032ef0 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 2 .bss 000134b0 20000000 20000000 00050000 2**3 ALLOC ... 13 .bss.sensor_config 00000004 200134f0 200134f0 00050000 2**2 ALLOC ... 22 .data 000000b8 20013508 0808b9a8 00043508 2**3 CONTENTS, ALLOC, LOAD, DATA ... After this change: arm-none-eabi-objdump -h build/bloonchipper/RW/ec.RW.elf Sections: Idx Name Size VMA LMA File off Algn 0 .text 00022eee 08060000 08060000 00010000 2**5 CONTENTS, ALLOC, LOAD, READONLY, CODE 1 .rodata 00008ab8 08082ef0 08082ef0 00032ef0 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 2 .bss 00013508 20000000 20000000 00050000 2**3 ALLOC 3 .data 000000b8 20013508 0808b9a8 00043508 2**3 CONTENTS, ALLOC, LOAD, DATA ... BRANCH=none BUG=b:172020503, b:201113851 TEST=On dragonclaw with servo_micro attached: > fpenroll > fpmatch TEST=make buildall Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I9a9187e05b8e734f9513ff27c49571ccb12d86df Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3219872 Reviewed-by: Patryk Duda <patrykd@google.com> Reviewed-by: Keith Short <keithshort@chromium.org>
* brya: Split out baseboard CBI and USB code into its own fileRajesh Kumar2021-11-166-76/+96
| | | | | | | | | | | | | | Move this out of baord.c so we can use it on Zephyr. BUG=b:202701454 BRANCH=none TEST=make BOARD=brya Signed-off-by: Rajesh Kumar <rajesh3.kumar@intel.com> Change-Id: I9f746d3ec3659e972c3e0665dbd68b92b1985104 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3276907 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* trondo: delete unused variantKeith Short2021-11-159-1246/+0
| | | | | | | | | | | | | | | Delete the trondo variant which is not used. BUG=b:205166645 BRANCH=volteer TEST=make buildall Cq-Include-Trybots: luci.chromeos.cq:cq-orchestrator Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I2969f8d227676ad3c331b097da0d9f191ba51cc2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3280026 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: YH Lin <yueherngl@chromium.org>
* todor: delete unused variantKeith Short2021-11-159-1248/+0
| | | | | | | | | | | | | | | Delete the todor variant which is not used. BUG=b:205166645 BRANCH=volteer TEST=make buildall Cq-Include-Trybots: luci.chromeos.cq:cq-orchestrator Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I2f9775482d2abe6634cff2c94c19210481d41326 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3280025 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: YH Lin <yueherngl@chromium.org>
* malefor: delete unused variantKeith Short2021-11-158-1211/+0
| | | | | | | | | | | | | | Delete the malefor variant which is not used. BUG=b:205166645 BRANCH=volteer TEST=make buildall Cq-Include-Trybots: luci.chromeos.cq:cq-orchestrator Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I9ac5801c10fd0256e06aff22d74377ad6aa9ab7b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3280023 Reviewed-by: YH Lin <yueherngl@chromium.org>
* lingcod: delete unused variantKeith Short2021-11-158-1154/+0
| | | | | | | | | | | | | | | Delete the lingcod variant which is not used. BUG=b:205166645 BRANCH=volteer TEST=make buildall Cq-Include-Trybots: luci.chromeos.cq:cq-orchestrator Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I18ad7b02462865dc62ad2abef4ca664d128105f5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3280022 Reviewed-by: YH Lin <yueherngl@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* halvor: delete unused variantKeith Short2021-11-159-1274/+0
| | | | | | | | | | | | | | | Delete the halvor variant which is not used. BUG=b:205166645 BRANCH=volteer TEST=make buildall Cq-Include-Trybots: luci.chromeos.cq:cq-orchestrator Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: Ieac5d3f7879d14696517f042cc382970ee3ec119 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3280021 Reviewed-by: YH Lin <yueherngl@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* TCPMv2: Prepare for boards using USB mux taskDiana Z2021-11-158-84/+147
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For boards using USB mux tasks, mux sets will be running in a task parallel to the PD task. This means we need to restructure any mux sets which have required PD sequencing, such as setting USB safe state before mode entry and DP configure. Restructure the DPM and associated code to account for the mux set taking some amount of time before VDMs may proceed. For the TBT module, align the module states to always indicate the message the state is sending (ex. enter SOP will only send from TBT_ENTER_SOP now). This includes a couple of functional changes for boards: - All boards will now set safe state before configuring DP pins, even if their board functions previously did not - TBT mode exit will now set safe state once before SOP exit, rather than bouncing between safe state and USB mode after each exit ACK, which matches more closely with how mode entry is currently working. - USB4 exit will leave safe state set for TBT cable exit if active BRANCH=None BUG=b:172222942,b:186777984 TEST=on voxel with no mux task, pass tast typec.Mode*.manual Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I9d9fb6087199fba04084f57cefb31f3cb45c28e5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3078417 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* TCPMv2: Handle timing corner case in TCPC PRL discardDiana Z2021-11-151-0/+12
| | | | | | | | | | | | | | | | | | | | | | If a message is received by the PD_INT task between the PRL_RX run and PRL_TX run, we may end up sending a message to the TCPC even though the PRL_RX will be forcing a discard next PRL cycle. This will get the PE out of sync, as it will assume the message was discarded when it was in fact sent. Peek into our receive queue right before sending a message to the TCPC, in order to reduce the liklihood of a mix-up like this happening. BRANCH=None BUG=None TEST=on voxel, run tast typec.Mode*.manual and observe we can successfully exit DP mode even when a VDM:Attention command comes in mid-PRL cycle Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I6979bf53972e40794dfae83f631b865a00d73302 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3192236 Reviewed-by: Scott Collyer <scollyer@chromium.org>
* TCPMv2: Add DPM setup enumDiana Z2021-11-156-53/+89
| | | | | | | | | | | | | | | | | | | | Currently, the functions to set up VDMs return a VDO count to indicate success versus an error. They also have a return of 0, which isn't strictly defined in the documentation, but is used as an indication a mode isn't supported in the TBT module at least. Add a descriptive enum to indicate whether the module set up a message successfully, has an unsupported mode, or encountered an error. These should track roughly to the old positive, zero, and -1 values. BRANCH=None BUG=None TEST=tast typec.Mode*.manual on voxel Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I05fe0ccc5f39e433dd4fbc39c97278b3c1542497 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3192235 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* USB MUX: Add timing debug for mux taskDiana Z2021-11-151-0/+18
| | | | | | | | | | | | | | Adding a debug option which may be enabled in order to print out how long mux sets are taking on a board. BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I69ba73982825d047ff8e1fe4f2b60bf53d4e166f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3078416 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* USB MUX: Create a task to perform mux setsDiana Z2021-11-152-18/+236
| | | | | | | | | | | | | | | | | | Some platforms may have very extended times to complete mux sets (in the 100s of ms range), so isolate these mux sets to a dedicated task, which the PD task may query to know when they have completed. Also enqueue HPD sets, since they will need to be in correct sequence with some mux sets such as setting the DP pins. BRANCH=None BUG=b:186777984,b:172222942 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I45ec7bd9a0c42112ec5b59f2f23988a8b810b57c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3078415 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* voema: delete voema_npcx796Keith Short2021-11-155-27/+1
| | | | | | | | | | | | | | | | Delete the deprecated variant voema_npcx796 BUG=b:205166645 BRANCH=volteer TEST=make buildall Cq-Include-Trybots: luci.chromeos.cq:cq-orchestrator Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I6c84a34ac8f0e6746d3a6526f5ef6f6c7caf218e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3280020 Reviewed-by: YH Lin <yueherngl@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
* navbar: Fix logo urlAashay Shringarpure2021-11-151-1/+1
| | | | | | | | | | | | BUG=None TEST=gitiles render BRANCH=None Signed-off-by: Aashay Shringarpure <aashay@google.com> Change-Id: I09f6dbefef7ad52db1bb19d6b6df2538d786c13c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3282774 Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* zephyr: fix false error regarding HOOKs priorityKeith Short2021-11-151-3/+4
| | | | | | | | | | | | | | | | | | | | | | | The check to verify that all HOOKs are run at the lowest task priority was called before the the system work queue priority was adjusted. This caused the following false positive error on the console: ERROR: sysworkq has priority -1 but must be >= 10 Move the check as the first HOOK_INIT, which is triggered after the EC app corrects the system work queue priority. BUG=none BRANCH=none TEST=zmake testall TEST=boot zephyr on Herobrine, verify error message is no longer shown Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I804dc17acffda5c21316939293aff5ab57bcba53 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3278639 Reviewed-by: Aaron Massey <aaronmassey@google.com> Reviewed-by: Tristan Honscheid <honscheid@google.com> Commit-Queue: Tristan Honscheid <honscheid@google.com>
* TCPMV2: Prevent EC boot loop when battery is deadSam Hurst2021-11-151-4/+4
| | | | | | | | | | | | | | | | | Transition to Unattached.SNK state when a dead battery is detected on EC boot. BUG=b:205883173 TEST=Verified that EC does not boot when battery is dead BRANCH=main Signed-off-by: Sam Hurst <shurst@google.org> Change-Id: Ib49ed1f11a16da08909524180b825a8942116635 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3280648 Tested-by: Sam Hurst <shurst@google.com> Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Sam Hurst <shurst@google.com>
* zephyr: brya: Add backlight lid configurationRajesh Kumar2021-11-152-0/+6
| | | | | | | | | | | | | | | | Add required configuration for backlight lid. BUG=b:200975143 BRANCH=none TEST=zmake configure -B ~/tmp/brya brya -b TEST=Display came up in power state s0 Signed-off-by: Rajesh Kumar <rajesh3.kumar@intel.com> Change-Id: Iccb8383dee6ef20e207ba93bbde570589f41ac6f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3276662 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Divya S Sasidharan <divya.s.sasidharan@intel.com>
* zephyr: drivers: add missing smart battery testsTomasz Michalec2021-11-151-6/+69
| | | | | | | | | | | | | | | | Add test for battery_get_avg_voltage() and battery_force_mah_mode() functions. Functions which get capcity are tested if mAh mode is forced. BUG=b:184855975 BRANCH=none TEST=make configure --test zephyr/test/drivers Signed-off-by: Tomasz Michalec <tm@semihalf.com> Change-Id: If498aed0c13ad41d7cbf6bafd71361535fd94846 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3269839 Tested-by: Tomasz Michalec <tmichalec@google.com> Commit-Queue: Tomasz Michalec <tmichalec@google.com> Reviewed-by: Keith Short <keithshort@chromium.org>
* zephyr: drivers: add smart battery commands testTomasz Michalec2021-11-151-1/+142
| | | | | | | | | | | | | | | | Add test for setting fake charge level and temperature from command line. BUG=b:184855975 BRANCH=none TEST=make configure --test zephyr/test/drivers Signed-off-by: Tomasz Michalec <tm@semihalf.com> Change-Id: Ie1afe7394e8111aa8c37b11018af6ef09eb54705 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3269838 Tested-by: Tomasz Michalec <tmichalec@google.com> Commit-Queue: Tomasz Michalec <tmichalec@google.com> Reviewed-by: Tristan Honscheid <honscheid@google.com>
* zephyr: drivers: add usb_mux typec command testTomasz Michalec2021-11-151-0/+76
| | | | | | | | | | | | | | | | | Add unit test for command_typec(). It is tested that command is checking arguments and correct usb_mux functions are called depending on arguments. BUG=b:184857076 BRANCH=none TEST=zmake configure --test zephyr/test/drivers Signed-off-by: Tomasz Michalec <tm@semihalf.com> Change-Id: Idf78320a791c20440da3f5b66d524dc7161e0f69 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3270686 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Tested-by: Tomasz Michalec <tmichalec@google.com> Commit-Queue: Tomasz Michalec <tmichalec@google.com>
* zephyr: drivers: add usb_mux host command testTomasz Michalec2021-11-151-0/+49
| | | | | | | | | | | | | | | | Add unit test for hc_usb_pd_mux_info(). Host command is issued and response is checked. BUG=b:184857076 BRANCH=none TEST=zmake configure --test zephyr/test/drivers Signed-off-by: Tomasz Michalec <tm@semihalf.com> Change-Id: I12d404362b64561f366ff207179524035c7c9c4a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3270685 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Tested-by: Tomasz Michalec <tmichalec@google.com> Commit-Queue: Tomasz Michalec <tmichalec@google.com>
* zephyr: build the board of hayato and krabby generates warningTim Lin2021-11-154-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | Adding CL:3246296 patch to build will generate a warning as following. It looks like a conflict between the named 'gpio' and the phandle of pointing 'gpios'. This CL will fix it. Warning (gpios_property): /power-signal-list/pmic_pwr_good: Missing property '#gpio-cells' in node /named-gpios/pmic_ec_pwrgd or bad phandle (referred from gpio[0]) Warning (gpios_property): /power-signal-list/ap_in_s3_l: Missing property '#gpio-cells' in node /named-gpios/ap_in_sleep_l or bad phandle (referred from gpio[0]) Warning (gpios_property): /power-signal-list/ap_wdt_asserted: Missing property '#gpio-cells' in node /named-gpios/ap_ec_watchdog_l or bad phandle (referred from gpio[0]) BRANCH=none BUG=none TEST= zmake testall zmake -lDEBUG configure -b zephyr/projects/asurada/hayato/ zmake -lDEBUG configure -b zephyr/projects/corsola/krabby/ Change-Id: I4bfa523daba85e7cbe241f3dbb982544ff619bee Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3275102 Reviewed-by: Keith Short <keithshort@chromium.org>
* documentation: Adding background paragraph on USB PD to usb-c.mdJameson Thies2021-11-131-2/+19
| | | | | | | | | | | | | | Basic CL to ramp up on git/gerrit flow. Adding a background paragraph on USB PD to usb-c.md to provide context for why we are using a state machine to handle USB-PD messaging. BUG=b:206148726 TEST=None Signed-off-by: Jameson Thies <jthies@google.com> BRANCH=usbc_md_update Change-Id: I3c60669964b93ccbfa3303cd12ac54858158fb52 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3278637 Reviewed-by: Benson Leung <bleung@google.com>
* bq25710: Refactor prochot option 1 register initializationCaveh Jalali2021-11-132-31/+55
| | | | | | | | | | | | | | | | | | | | | This separates the initialization of the prochot option 1 register into a dedicated function. Multiple bit-fields will need to set in this register based on board configuration, so it's best to group these operations in one place. Also, numeric/boolean values are replaced with symbolic values when setting register fields for clarity where appropriate. BRANCH=none BUG=b:185190976 TEST=buildall passes Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: I73e6bd4f719f19ae21677b9fca90f10cf05665c1 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3277940 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Boris Mittelberg <bmbm@google.com> Commit-Queue: Keith Short <keithshort@chromium.org>
* bq25710: Refactor Vmin Active Protection register initializationCaveh Jalali2021-11-131-18/+29
| | | | | | | | | | | | | | | | This separates the initialization of the Vmin Active Protection register into a dedicated function. BRANCH=none BUG=b:185190976 TEST=buildall passes Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: Ib75d028c0a5bb5982fe34bf756a68f942769fad1 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3277939 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Boris Mittelberg <bmbm@google.com> Commit-Queue: Keith Short <keithshort@chromium.org>
* bq25710: Make VSYS_TH2 Kconfig friendlyCaveh Jalali2021-11-1311-18/+39
| | | | | | | | | | | | | | | | | | | This adds the CONFIG_CHARGER_BQ25720_VSYS_TH2_CUSTOM config option to decide if CONFIG_CHARGER_BQ25720_VSYS_TH2_DV should be applied. It is no longer sufficient to set CONFIG_CHARGER_BQ25720_VSYS_TH2_DV to the desired value. This matches how defines are generated by kconfig and allows IS_ENABLED() to be used. BRANCH=none BUG=b:185190976 TEST=buildall passes Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: Ie3a6aa2d585d7975ada2863fd20ad296b23d504c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3277938 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Boris Mittelberg <bmbm@google.com> Commit-Queue: Keith Short <keithshort@chromium.org>
* zephyr: brya: Add power sequencing support using shimDivya Sasidharan2021-11-126-7/+125
| | | | | | | | | | | | | | Add required configs for power sequencing brya. BUG=b:200975143 BRANCH=main TEST=zmake testall; check AP power state transitions to S0, verify booting up to kernel. Change-Id: Ib02cc4dc1be11af024f485efd5b73c613a4d1ac2 Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3176402 Reviewed-by: Keith Short <keithshort@chromium.org>
* core/cortex-m0: Use symbolic name instead of r0Tom Hughes2021-11-121-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With gcc, the generated assembly for exception_panic after this change removes a "adds r0, r0, #0" instruction and a nop. 00000000 <exception_panic>: 0: 4b08 ldr r3, [pc, #32] ; (24 <exception_panic+0x24>) 2: 4809 ldr r0, [pc, #36] ; (28 <exception_panic+0x28>) 4: 469c mov ip, r3 ; No more "adds r0, r0, #0" here 6: f3ef 8109 mrs r1, PSP a: f3ef 8205 mrs r2, IPSR e: 466b mov r3, sp 10: c0fe stmia r0!, {r1, r2, r3, r4, r5, r6, r7} 12: 4641 mov r1, r8 14: 464a mov r2, r9 16: 4653 mov r3, sl 18: 465c mov r4, fp 1a: 4675 mov r5, lr 1c: c03e stmia r0!, {r1, r2, r3, r4, r5} 1e: 46e5 mov sp, ip 20: f7ff fffe bl 0 <exception_panic> ; No more nop here 24: 20003f70 .word 0x20003f70 28: 20003f74 .word 0x20003f74 BRANCH=none BUG=b:172020503 TEST=CC=clang make BOARD=c2d2 TEST=make buildall Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I5282369fd97a21b5927175adecff2ba74c4f8fc3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3213608 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* core/cortex-m: Use symbolic name instead of r0Tom Hughes2021-11-121-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This assembly is supposed to force the compiler to use r0 for pregs and r12 for pstack. When compiling with clang, it uses r12 for pregs and r0 for pstack, so the "stmia r0" instruction is using the wrong value. Instead of assuming that pregs will be in r0 and pstack will be in r12, just use the symbolic name ("pregs") with the stmia instruction. This generates the correct behavior regardless of whether pregs or pstack use r0 or r12. With gcc, the generated assembly for exception_panic after this change removes the "mov r0, r0" instruction and adds a nop at the end: 00000000 <exception_panic>: 0: 480e ldr r0, [pc, #56] ; (3c <exception_panic+0x3c>) 2: f8df c03c ldr.w ip, [pc, #60] ; 40 <exception_panic+0x40> ; No more "mov r0, r0" here 6: f3ef 8109 mrs r1, PSP a: f3ef 8205 mrs r2, IPSR e: 466b mov r3, sp 10: 05d6 lsls r6, r2, #23 12: bf1c itt ne 14: 2400 movne r4, #0 16: 2500 movne r5, #0 18: f04f 0600 mov.w r6, #0 1c: f04f 0700 mov.w r7, #0 20: f04f 0800 mov.w r8, #0 24: f04f 0900 mov.w r9, #0 28: f04f 0a00 mov.w sl, #0 2c: f04f 0b00 mov.w fp, #0 30: e880 4ffe stmia.w r0, {r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, lr} 34: 46e5 mov sp, ip 36: f7ff fffe bl 0 <exception_panic> 3a: bf00 nop ; adds nop instruction BRANCH=none BUG=b:172020503 TEST=CC=clang make BOARD=bloonchipper TEST=make buildall Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I150d685bde701171630ae02b16e6050e1e0e77a6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3213606 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* zephyr: flash: npcx: Fix physical_get_protect_flags()Jun Lin2021-11-121-14/+23
| | | | | | | | | | | | | | | | | | | | | | | | | Protecting status register by /WP works when SRP0 is enabled. The getting protect flags function should check Status Register Protect 0 (SRP0) bit & Quad Enable (QE) bit for EC_FLASH_PROTECT_ERROR_INCONSISTENT flag. This CL adds the following: 1. SRP0 & QE bits check for npcx flash. 2. EC_FLASH_PROTECT_ERROR_UNKNOWN flag This change aligns with the change in the CL:3246882 of ECOS. BUG=none BRANCH=none TEST=Protect a range & don't set the SRP0. Check flag by `flashinfo`. Signed-off-by: Jun Lin <CHLin56@nuvoton.com> Change-Id: I1e53222c25b7d74681961c6e78fbf05a590665eb Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3268038 Tested-by: CH Lin <chlin56@nuvoton.com> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* zephyr: flash: npcx: Disable flash QE bit at initJun Lin2021-11-121-17/+42
| | | | | | | | | | | | | | | | | | | | | In NPCX9 production devices, the flash status register’s quad enable bit (non-volatile) will be set by default. When the QE bit of Status Register-2 is set for Quad I/O, the WP# signal is not supported since this pin is used as IO2. This CL clears the QE bit at init to make sure WP# support is enabled. This change aligns with the change in the CL:3246881 of ECOS. BRANCH=none BUG=none TEST=Set QE bit & reboot the ec. Check the QE bit is disabled. Signed-off-by: Jun Lin <CHLin56@nuvoton.com> Change-Id: Ide93ce466b61ed3358488bb91c07f9a62bce7fa1 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3268037 Tested-by: CH Lin <chlin56@nuvoton.com> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* zephyr: flash: npcx: Refactor flash_get_status()Jun Lin2021-11-121-35/+16
| | | | | | | | | | | | | | | | | | | | | NPCX internal flash status register 1/2 are always read at the same time. This CL merges flash_get_status1() and flash_get_status2() into one function. This improves the performance by eliminating duplicate mutex function call operations. This change aligns with the change in the CL:3247742 of ECOS. BUG=none BRANCH=none TEST=write status1/2 registers with different values, read them back with console command "flashchip" Signed-off-by: Jun Lin <CHLin56@nuvoton.com> Change-Id: I414424401df22eaa577d3e5238cdeae06eb5e61d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3268036 Tested-by: CH Lin <chlin56@nuvoton.com> Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* zephyr: fix CONSOLE_READ_NEXTKeith Short2021-11-121-1/+4
| | | | | | | | | | | | | | | | | Running "ectool console" from the AP uses the subcommand CONSOLE_READ_NEXT, but this never returned valid data. Fixed by setting the current snapshot head, to the current buffer head instead of current buffer tail. BUG=none BRANCH=none TEST=Run "ectool console", verify console data is shown. Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I9cbd7c11f1a0695370454f1687c1be7205a2b4d2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3278638 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
* zephyr: Configure tcpci gpio alerts in testJeremy Bettis2021-11-123-3/+88
| | | | | | | | | | | | | | | | | | | | | | | | | | Add GPIOs to overlay.dts. Setup GPIO interrupts in gpio_map.h. Implement tcpc_alert_event. This should probably be in a zephyr stub instead, but today, this is board specific. Add init hook to enable the usbc interrupts. Interrupts have to be enabled by a driver or board, and these are normally enabled by the board. BRANCH=None BUG=b:201314530 TEST=Observed in gdb. Signed-off-by: Jeremy Bettis <jbettis@google.com> Change-Id: I23bb328ffd5402e923abf8464395ca1dd2dd86de Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3269060 Tested-by: Jeremy Bettis <jbettis@chromium.org> Auto-Submit: Jeremy Bettis <jbettis@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* qcom: Add checks for EFS2 to the power on sequenceKeith Short2021-11-121-7/+16
| | | | | | | | | | | | | | | | | | | | | | | When EFS2 is enabled, the normal boot will always have the EC_RESET_FLAG_SYSJUMP set. Always enabled auto power on of the AP unless one of the following conditions is true: 1. EC_RESET_FLAG_AP_OFF reset flag is set 2. EC_RESET_FLAG_SYSJUMP reset flag is set, and EC_RESET_FLAG_EFS is not set. BUG=b:193719620 BRANCH=none TEST=Verify EC powers up AP after performing a sysjump when EFS2 is enabled. TEST=Set recovery mode, verify EC goes back to RO. On power down, EC jumps to RW and the AP stays in G3. Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I222c5f6c729901b455888432cd01fe7e67b4aa7a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3257770 Reviewed-by: Wai-Hong Tam <waihong@google.com> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* ectool: Change "ectool temps all" output similar to EC console commandB R, Harsha2021-11-122-14/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Retrieve sensor name and thermal fan percentage. To the print statement add additional parameters - sensor_name, temperature converted from kelvin to Celsius and thermal_fan_percent in addition to temperature reading in Kelvin. Also update the display and help message of temps command for both EC and CPU console Sample output: 21-11-12 23:48:28.062 DDR and SOC 314 K (= 41 C) 40% CPU Console: localhost ~ # ectool temps all --sensor name -------- temperature -------- fan speed -- DDR and SOC 314 K (= 41 C) 40% BRANCH=none TEST=make buildall -j, zmake testall, Run ectool temps all on CPU console and Run temps all on EC console, See a sample output above Signed-off-by: B R, Harsha <harsha.b.r@intel.com> Change-Id: Id86652d426fdbf30a1b27db8c2d2e7ce1b9a1d4c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3252569 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
* ectool: Add 'tsv' parameter to usbpdmuxinfoDrew Davenport2021-11-121-13/+49
| | | | | | | | | | | | | | | | | | The 'tsv' parameter can be used to output in tab-separated-value form, which is intended to be parsed in scripts or programs. Column definitions can be accessed in the ectool help command. BRANCH=none BUG=b:205858702 TEST=Run `ectool usbpdmuxinfo` with various arguments Change-Id: Ifcf3eb76815e071b2e43cf244a5345a40fc6771e Signed-off-by: Drew Davenport <ddavenport@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3278632 Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Drew Davenport <ddavenport@chromium.org> Tested-by: Drew Davenport <ddavenport@chromium.org>
* zephyr: flash: npcx: move the flash operations to upstreamJun Lin2021-11-1214-472/+216
| | | | | | | | | | | | | | | | | | | | | | | | In PR:39644, the SPI (FIU/UMA) driver is added to the Zephyr upstream. The flash access now can be via the flash APIs in spi_nor driver, including flash write/read/erase/read_jedec_id. Note that because there is no API in the flash driver to read/write the status register, it is implemented here via the spi_transceive API. BRANCH=none BUG=b:202295086 TEST=pass "zmake testall" TEST=enable flash console command on volteer and npcx9_evb, test the following flash related commands: flashread/flashwrite/flasherase/flashwp/flashchip/flashinfo. Signed-off-by: Jun Lin <CHLin56@nuvoton.com> Cq-Depend: chromium:3261416 Change-Id: I012ea359695a22cbb54d39124b4b78ff95cca36d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3261447 Tested-by: CH Lin <chlin56@nuvoton.com> Commit-Queue: Keith Short <keithshort@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* Guybrush Zephyr: Add LED controlDiana Z2021-11-124-0/+132
| | | | | | | | | | | | | | | | Add PWM definitions for LEDs and copy the board LED control code for the on/off states. BRANCH=None BUG=b:195137794 TEST=on guybrush, verify charging LED when charging, white LED when on, blinking white in suspend Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I80ea849e8f1267c090a995a4b74275a88006c211 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3276906 Commit-Queue: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* Guybrush Zephyr: Enable keyboard backlightDiana Z2021-11-123-0/+13
| | | | | | | | | | | | | | | Enable the keyboard backlight functionality. BRANCH=None BUG=b:195137794 TEST=on guybrush, use kblight command to turn the backlight brighter and darker Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ib6e236401fd40184150229a069a2d3ef24a721d3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3276905 Commit-Queue: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* Zephyr: Add enable GPIO for KB backlightDiana Z2021-11-121-0/+1
| | | | | | | | | | | | | | | Add the standard name for the GPIO to enable the keyboard backlight to the GPIO names. BRANCH=None BUG=b:195137794 TEST=zmake testall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I7827274d5db042e341bc52fcdebbfdc05c317b0c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3276904 Commit-Queue: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* Guybrush Zephyr: Add fan controlDiana Z2021-11-125-2/+64
| | | | | | | | | | | | | | | Add in first PWM and fan for guybrush to use. BRANCH=None BUG=b:195137794 TEST=load on guybrush and observe fan no longer sounds like a jet taking off Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ic423f11168fd3654495b9b79bc39d312ccdf909e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3276903 Commit-Queue: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* Guybrush Zephyr: Update active charge port setDiana Z2021-11-121-25/+45
| | | | | | | | | | | | | | | | Guybrush's active charge port set was recently updated to catch more dead battery corner cases, so updating the zephyr copy to also contain these improvements. BRANCH=None BUG=None TEST=zmake testall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ifd78584709cd4e56ea7de57e1bee330d3baba6a9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3276902 Commit-Queue: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* Guybrush zephyr: Remove TODODiana Z2021-11-121-1/+0
| | | | | | | | | | | | | | | It turns out that SW charge ramping is automatically enabled because our charger is known to have HW ramping broken on it. Hooray for Kconfig. BRANCH=None BUG=b:195137794 TEST=zmake testall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I3e46ceeb249450bac6413a4a46e2cc44f29f361f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3276901 Commit-Queue: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* power: add casts for power signalsTom Hughes2021-11-123-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | When building with clang, it warns: power/icelake.c:49:11: error: implicit conversion from enumeration type 'enum espi_vw_signal' to different enumeration type 'enum gpio_signal' [-Werror,-Wenum-conversion] .gpio = SLP_S4_SIGNAL_L, ^~~~~~~~~~~~~~~ include/power/intel_x86.h:40:25: note: expanded from macro 'SLP_S4_SIGNAL_L' Although "enum espi_vw_signal" and "enum gpio_signal" are not directly compatible, it appears that the code in power/common.c takes that into account by calling espi_signal_is_vw(). BRANCH=none BUG=b:172020503 TEST=./util/compare_build.sh -b all -j 120 => MATCH Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: Ibb3ac42516d2e293cf707ca92eacd6bd7c11049c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3243003 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* power: Combine chipset_reset_reason and chipset_shutdown_reasonTom Hughes2021-11-1215-23/+24
| | | | | | | | | | | | | | | | | | | | | | | | When building with clang, it warns: power/amd_x86.c:59:18: error: implicit conversion from enumeration type 'enum chipset_reset_reason' to different enumeration type 'enum chipset_shutdown_reason' [-Werror,-Wenum-conversion] report_ap_reset(reason); The two enums are already set up so that they don't overlap, so just combine them into a single enum. BRANCH=none BUG=b:172020503 TEST=./util/compare_build.sh -b all -j 120 => All boards match, except: burnet cerise damu fennel jacuzzi juniper kakadu kappa katsu kodama krane kukui makomo stern willow Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I47620e59e02a84c04dde4469f36ad37dccbcd9e5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3238250 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* zephyr: Add clangd cache to gitignoreJeremy Bettis2021-11-121-0/+4
| | | | | | | | | | | | | | | Using the clangd language server creates an index cache. BRANCH=None BUG=None TEST=None Signed-off-by: Jeremy Bettis <jbettis@google.com> Change-Id: Ic5c8739b9ab3b4f07b98a204932b0af3dd15206b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3270400 Commit-Queue: Jeremy Bettis <jbettis@chromium.org> Tested-by: Jeremy Bettis <jbettis@chromium.org> Reviewed-by: Aaron Massey <aaronmassey@google.com>