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* board: Set min/max frequency attributesGwendal Grignou2019-12-099-2/+24
| | | | | | | | | | | | | | | On some boards, min_/max_frequency attributes were not set, esp. for kx022 acceleometers. BUG=b:145799480 BRANCH=octopus,coral TEST=compile Change-Id: I6d32926541505f02f183539ca3ad9f70c1ae7a6b Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1957374 Reviewed-by: Justin TerAvest <teravest@chromium.org> Tested-by: Justin TerAvest <teravest@chromium.org>
* tpmtest: added more corner case, make it work again with OpenSSL 1.1Vadim Sukhomlinov2019-12-072-34/+315
| | | | | | | | | | | | | | | | | | | | | | | | | | | The TPM test directory has bitrotted and does not compile any more, leave alone pass tests. This patch updates the tests to match changed EC codebase: test/tpm_test/Makefile - look for include files in more directories test/tpm_test/bn_test.c - 1. add support for OpenSSL 1.1 where BIGNUM structure became opaque and require special functions to access it. 2. added backward compatibility layer for OpenSSL 1.0.2 3. fixed issues with OpenSSL memory allocations 4. added support to print details of failure 5. added more cases for modulo inverse testing 6. added testing for bn_div to increase branch coverage BRANCH=cr50 BUG=none TEST=./test/tpm_test (../../build/tpm_test/bn_test) now passes Change-Id: Ida5fb07277909977f78ad1199e7a0f3677aabdc3 Signed-off-by: Vadim Sukhomlinov <sukhomlinov@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1764711 Reviewed-by: Andrey Pronin <apronin@chromium.org> Commit-Queue: Andrey Pronin <apronin@chromium.org>
* gsctool: add 'force_ro' optionVadim Bendebury2019-12-072-2/+12
| | | | | | | | | | | | | | | | | | | | | | By design gsctool does not update the inactive RO unless the running RO version is lower than the version in the Cr50 image being transferred. With transition to the new RO version, keys and rollback map state, there is a need to enforce that both ROs on the device are updated. This patch adds a command line option which allows to update the inactive RO to the contents of the Cr50 image. BRANCH=none BUG=b:136284186 TEST=running 'gsctool -q cr50.bin' updates the inactive RO section. Change-Id: I79c21fc2cd41c40070352d8fbce0b71dd3ae2b1f Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1949547 Reviewed-by: Namyoon Woo <namyoon@chromium.org> Reviewed-by: Andrey Pronin <apronin@chromium.org>
* TCPMv2: Operating as a SNK, clear the End AMS flagSam Hurst2019-12-071-3/+17
| | | | | | | | | | | | | | | | | | While operating as a sink, the End AMS flag is cleared at the end of the Atomic Message Sequence. BUG=b:145812132 BRANCH=none TEST=make -j buildall manual tests: Using a kohaku and a Kensington dock, I verified that the END_AMS flag is cleard and PD communication does not stop. Change-Id: Ia8b40ab42916dc5b2a690a6fb7f519015912a6fa Signed-off-by: Sam Hurst <shurst@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1954256 Reviewed-by: Jett Rink <jettrink@chromium.org>
* cr50_rma_open: Disable UART timestampsEvan Green2019-12-071-1/+2
| | | | | | | | | | | | | | | | | The log timestamps are unexpected by the script, and cause issues. Send a dut-control command to disable UART timestamps. Also fix the regex in the board ID portion to accept a colon as well as a comma, whichever comes first. BUG=None TEST=Try cr50_rma_unlock.py BRANCH=None Change-Id: Ie9e54e65b86c52aef120fa3249453bfc090cf6f0 Signed-off-by: Evan Green <evgreen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1921703 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* TCPMv2: Don't use SinkTXOK/NG in middle of partner-initiated PD3.0 AMSSam Hurst2019-12-071-25/+35
| | | | | | | | | | | | | | | | | | Don't send ACCEPT message (to PR_SWAP AMS initiated by partner) after lowering Rp to SnkTXNG. BUG=chromium:1023064 BRANCH=none TEST=make -j buildall manual tests: Connected several docks with charger and verified PR_SWAP. Also works with the CM dock that triggered this bug. Change-Id: Iab5474174cf8313c24bae8a7869565005504af25 Signed-off-by: Sam Hurst <shurst@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1912161 Reviewed-by: Jett Rink <jettrink@chromium.org>
* volteer: Enable BC1.2 charge rampVijay Hiremath2019-12-074-19/+46
| | | | | | | | | | | | BUG=b:145683021 BRANCH=none TEST=Able to charge ramp BC1.2 devices on both the ports Change-Id: Iccabb3a1cf51c2cf22c6620e560d7ab74415a2cf Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1951426 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* volteer: Enable Burnisde Bridge retimerVijay Hiremath2019-12-077-10/+41
| | | | | | | | | | | | BUG=b:145560203 BRANCH=none TEST=BB retimer can communicate via I2C Change-Id: Ibc9b61d909ff1d07794e13927796e26aa1e53e03 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1947427 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* TCPMv2: Don't turn off VCONN during a PR_SWAPSam Hurst2019-12-061-1/+1
| | | | | | | | | | | | | | | | | A flag that tracks PR_SWAP was being prematurely cleared, causing VCONN to turn off. BUG=chromium:1031304 BRANCH=none TEST=make -j buildall manual tests: Using a kohaku and a Kensington dock, I verified that VCONN does not turn off during a PR_SWAP Change-Id: I2947bd50f299684d58f4cbdcd9c649f395c3d7d2 Signed-off-by: Sam Hurst <shurst@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1954311 Reviewed-by: Jett Rink <jettrink@chromium.org>
* build_assert: use _Static_assertJett Rink2019-12-061-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | We have compiler support for _static_assert, so we should use it. Also allow for an option message in BUILD_ASSERT that will display as a part of the failure. Here is an example of a compile failure with the optional message ... CC RW/chip/npcx/gpio.o CC RW/chip/npcx/header.o In file included from include/common.h:13, from include/adc.h:11, from board/phaser/board.c:8: include/compile_time_macros.h:13:2: error: static assertion failed: "board/phaser/board.c:74: Size mismatch" _Static_assert(cond, file ":" #line ": " msg) ... BRANCH=none BUG=none TEST=verified by manually update BUILD_ASSERTS and viewing output. Change-Id: I6421084868ea81be8b3fa6ad0613730f4e4e149b Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1950820 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* usbc: use different task pause for each portDenis Brockus2019-12-061-4/+6
| | | | | | | | | | | | | | | Switching over to using an array with an entry per port so each port is individually paused and awaken. BUG=none BRANCH=none TEST=charger attach unattach repeated time should work Change-Id: I570f93876d2ea60a5a0707f2096969ceb269b31f Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1954307 Commit-Queue: Jett Rink <jettrink@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* hatch: refactor PD_MAX_VOLTAGE/PD_MAX_CURRENT/PD_MAX_POWER/PD_OPERATING_POWER/Josh Tsai2019-12-069-6/+45
| | | | | | | | | | | | | | 1) The four config is determined by board, move it into board.h. 2) Update the config variables above for stryke. BUG=b:145257655 BRANCH=hatch TEST=make buildall Change-Id: I1dd6a4f2a78b5196006821bc5d2686f68206c2e1 Signed-off-by: Josh Tsai <josh_tsai@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1950270 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
* make: Add check for flash supportCraig Hesling2019-12-061-1/+4
| | | | | | | | | | | | | | | | | BRANCH=none BUG=none TEST=make buildall -j TEST=make BOARD=hatch flash # Should emit error that board isn't supported TEST=make BOARD=nucleo-f072rb flash # Should start openocd or error that command not found Signed-off-by: Craig Hesling <hesling@chromium.org> Change-Id: Id13847d51392cc098ff7b289d120978202019aaf Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1952198 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* make: Add help messages for flash variantsCraig Hesling2019-12-061-0/+4
| | | | | | | | | | | | BRANCH=none BUG=none TEST=make help Change-Id: Ic32777ec1c92fd79b803f8d20591ce47685af784 Signed-off-by: Craig Hesling <hesling@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1952197 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Revert "chell: Remove chell from master"Dmitry Torokhov2019-12-0610-0/+1527
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 2de33140216be7f95c33990317483d3c65ae641b. Reason for revert: breaks chell postsubmit builder Original change's description: > chell: Remove chell from master > > chell is out of space and we've removed a lot functions but it's still > full. Now it's time to delete it. "Cara mia addio..." > > BUG=none > BRANCH=None > TEST=`make -j buildall` > > Change-Id: I064d55356012000e51654a1aa247226b33a8f0ff > Signed-off-by: Aseda Aboagye <aaboagye@google.com> > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1953761 > Tested-by: Aseda Aboagye <aaboagye@chromium.org> > Auto-Submit: Aseda Aboagye <aaboagye@chromium.org> > Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> > Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Bug: none Change-Id: I7ecd836b6214a42d51c448650891c3a8e003a2c6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1955163 Reviewed-by: Dmitry Torokhov <dtor@chromium.org> Commit-Queue: Dmitry Torokhov <dtor@chromium.org> Tested-by: Dmitry Torokhov <dtor@chromium.org>
* Volteer: Disable TCPC Low power modeEric Herrmann2019-12-061-1/+2
| | | | | | | | | | | | | | | | The TCPC low power mode was breaking the type-C sink detection. Disabling for now so this issue doesn't effect other bringup efforts. BUG=b:145250123 BRANCH=none TEST=make buildall TEST=check that power is supplied to SNKs connected to C0 Change-Id: I5ef062761969d37c52b1f49a69014d8eecdb44da Signed-off-by: Eric Herrmann <eherrmann@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1951416 Reviewed-by: Keith Short <keithshort@chromium.org> Tested-by: Keith Short <keithshort@chromium.org>
* docs: update to vboot2-style vb2ex_ec_vboot_doneJoel Kitching2019-12-061-1/+1
| | | | | | | | | | | | | | BUG=b:124141368, chromium:1016688 TEST=none BRANCH=none Change-Id: I638acd4e9c32176e0ae39537fad8359404dd7a79 Signed-off-by: Joel Kitching <kitching@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1918996 Tested-by: Joel Kitching <kitching@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Joel Kitching <kitching@chromium.org> Commit-Queue: Joel Kitching <kitching@chromium.org>
* ec: remove entering_mode host commandJoel Kitching2019-12-064-31/+3
| | | | | | | | | | | | | | | | | After this host command is called, the value is stored in g_vboot_mode and never accessed again. BUG=b:124141368, chromium:1014379 TEST=make buildall -j BRANCH=none Change-Id: I7923658139d15394c1c3c07baca7168e34c111e9 Signed-off-by: Joel Kitching <kitching@google.com> Cq-Depend: chromium:1830239, chromium:1864533 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1865050 Tested-by: Joel Kitching <kitching@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Joel Kitching <kitching@chromium.org>
* lick: Initial EC imagestabilize-quickfix-12739.94.B-masterstabilize-quickfix-12739.71.B-release-R80-12739.B-masterstabilize-excelsior-12739.67.B-release-R80-12739.B-masterstabilize-excelsior-12739.67.Bstabilize-12739.111.B-masterstabilize-12739.106.B-masterstabilize-12739.105.B-masterrelease-R80-12739.B-masterHash.Hung2019-12-067-0/+856
| | | | | | | | | | | | | | | | | | | The starting point for Lick EC image. Remove unuse battery(PANASONIC). Set project default sku 255 to non-convertible. Modify Sunwoda start_charging_max_c from 60 to 50. BUG=b:145181137 TEST=make BRANCH=master BOARD=lick Change-Id: Id9a8d488c648b75528b8dfcd135a457a63c8d0ff Signed-off-by: Hash.Hung <hash1.hung@lcfc.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1942367 Reviewed-by: Henry Sun <henrysun@google.com> Commit-Queue: Henry Sun <henrysun@google.com> Tested-by: Henry Sun <henrysun@google.com>
* kukui: enlarge stack for hook_taskEric Yilun Lin2019-12-061-1/+1
| | | | | | | | | | | | | | We are seeing a stack overflow from hook_task. Enlarge it to prevent from crashing. TEST=not seeing a EC crash BUG=none BRANCH=kukui Change-Id: I1c574ecd577528dda57c2771bd4e67b3aa557b75 Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1954833 Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* volteer: Keep RSMRST# pin low at initVijay Hiremath2019-12-061-1/+1
| | | | | | | | | | | | | | Keeping the RSMRST# pin is low at init based on the TGL PDG power sequence Timing Diagram. BUG=b:145767544 BRANCH=none TEST=Verified on scope, RSMRST# pin is low at init Change-Id: Ia5d5c76ce3f173d1c283da706dd1113ce1dad550 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1954875 Reviewed-by: Keith Short <keithshort@chromium.org>
* volteer: disable PD 3.0 stackKeith Short2019-12-062-0/+39
| | | | | | | | | | | | | The PD 3.0 stack isn't reliably charging the battery. BUG=b:145622441 BRANCH=none TEST=make buildall TEST=verify PD negotiation with battery connected and battery charging Change-Id: Idccf6a4f325e94fdbf2df310b539a0b75125be92 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1949148
* ppc: Use hard reset to recover from CC overvoltageEdward Hill2019-12-063-66/+39
| | | | | | | | | | | | | | | When sn5s330 PPC detects CC overvoltage, recover via hard reset and don't enable PP2 sink FET directly. Also clean up the interrupt unmasking in sn5s330_init(). BUG=b:144892533 BRANCH=grunt TEST=Do ESD test to trigger CC1/CC2 OVP, device recovers to sink Change-Id: I662bf164b55508be4d5cc1b3ad639c9613bd1935 Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1949264 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* usbc: Move PPC overcurrent functions to usb_common.cEdward Hill2019-12-064-108/+67
| | | | | | | | | | | | | Share single copy of PPC overcurrent functions between TCPMv1 and TCPMv2. BUG=none BRANCH=none TEST=build Change-Id: I70e25e8580f6bbfebe6269552cd186f3bb981ede Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1954305 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* chip/host: Avoid concurrent recipes of libcryptoc.aYicheng Li2019-12-054-28/+4
| | | | | | | | | | | | | | | | | | | | CONFIG_DCRYPTO compiles and links thirdparty/libcryptoc for cr50. CONFIG_LIBCRYPTOC does similar things for other boards that configures it, including host. This resulted in cr50_fuzz having concurrent recipes for libcryptoc, as it has both configs. This change separates CONFIG_DCRYPTO from the responsibility of building and linking libcryptoc. Libcryptoc is now solely handles by CONFIG_LIBCRYPTOC. BRANCH=none BUG=b:144811298 TEST=make -j buildall > /dev/null Observed no more "warning: overriding recipe for target 'build/host/cr50_fuzz/cryptoc/libcryptoc.a' " Change-Id: I2186cbead773629456da254df5f82b96e9646fc2 Signed-off-by: Yicheng Li <yichengli@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1949554 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* docs/fingerprint: Fix diagrams in fingerprint design docTom Hughes2019-12-054-3/+9
| | | | | | | | | | | | | | | | | The doc links are not accessible publicly, so add PNG versions of the images using Drive's export functionality (i.e., append "export/png" to the end of the link). The original doc links are kept as comments so we know where they came from if we need to make changes. BRANCH=none BUG=none TEST=view in gitiles Change-Id: Ic6cf514032cfa9205c7c763716bf489597f2e08d Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1954312 Reviewed-by: Craig Hesling <hesling@chromium.org> Commit-Queue: Craig Hesling <hesling@chromium.org>
* chell: Remove chell from masterAseda Aboagye2019-12-0510-1527/+0
| | | | | | | | | | | | | | | | | chell is out of space and we've removed a lot functions but it's still full. Now it's time to delete it. "Cara mia addio..." BUG=none BRANCH=None TEST=`make -j buildall` Change-Id: I064d55356012000e51654a1aa247226b33a8f0ff Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1953761 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* tcpci: POWER_CTRL auto discharge disconnect initDenis Brockus2019-12-056-59/+80
| | | | | | | | | | | | | | | | | Change TCPCI to use HOOK_USB_PD_CONNECT/DISCONNECT to set/clear TCPC_REG_POWER_CTRL_AUTO_DISCHARGE_DISCONNECT according to the TCPCI spec. Change the definition of HOOK_USB_PD_CONNECT to occur after CC and VBus are stable. BUG=b:144126745,chromium:951683 BRANCH=none TEST=Charger attach/pull with AP not running Change-Id: I625efbba80f190322e3e92de6318b710b3ce7ade Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1940777
* docs/fingerprint: Add note about generating keysCraig Hesling2019-12-051-0/+7
| | | | | | | | | | | BRANCH=none BUG=none TEST=view in gitile Change-Id: I7aee42a1eb6f526836c6ef387bf05e1342d2b65f Signed-off-by: Craig Hesling <hesling@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1952287 Reviewed-by: Tom Hughes <tomhughes@chromium.org>
* cleanup: format help text to ease readingJett Rink2019-12-051-3/+5
| | | | | | | | | | | BRANCH=none BUG=none TEST=verify help text on command line Change-Id: Iec19641eb0a61f1f0de1afe4b59b587b8f0d7410 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1945820 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* chell: Remove console cmds to save spaceAseda Aboagye2019-12-051-0/+5
| | | | | | | | | | | | | | | | Chell is out of space, so remove console commands that are not used during FAFT testing. BUG=None BRANCH=glados TEST=`make -j BOARD=chell` verify that it succeeds. Change-Id: I05f44c4c27bb25a0c95b2c1bf2be2c2c46c7e8fc Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1949051 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* stryke: Assign SYS_RST_ODL to GPIOC5 and make sure EC_RST_ODL is LOCKEDJosh Tsai2019-12-051-2/+13
| | | | | | | | | | | | | | | There is an error where SYS_RST_ODL is assigned to GPIO02 where it is actually assigned to GPIOC5 in the schematics. BUG=b:145369657 BRANCH=none TEST=make buildall Change-Id: I26a4b37baf160714bc07d8f9eb5df7234e76d96e Signed-off-by: Josh Tsai <josh_tsai@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1948701 Reviewed-by: Ruby Lee <ruby_lee@compal.corp-partner.google.com> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
* kukui: Do not sink LED power on initYilun Lin2019-12-051-1/+1
| | | | | | | | | | | | | | Enable LED color would start consuming power even if the led brightness is zero. TEST=make buildall BUG=b:137618886 BRANCH=kukui Change-Id: I06120f4fec0cc41e40463989649ac9a5061d9f6b Signed-off-by: Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1926187 Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* g: update rollback info map for both RO and RW sectionsVadim Bendebury2019-12-051-10/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Both RO and RW sections have their respective rollback spaces in INFO1, but until now Cr50 code did not honor the RO binaries' headers rollback maps and did not update the appropriate iNFO1 space. With this patch both RO and RW info maps are updated to the lowest level of the two images found in the flash when invoked during board_init() or to match the currently active RO/RW when invoked through vendor command indicating successful OS startup. BRANCH=cr50, cr50-mp BUG=b:136284186 TEST=tried the new image on a chip with freshly erased INFO1 space: first running a DBG image, which does not touch INFO1 maps: > vers ... RO_A: * 0.0.11/bc74f7dc RO_B: 0.0.11/4d655eab RW_A: * 0.4.24/DBG/cr50_v2.0.2744-d79516a9d RW_B: 0.4.24/DBG/cr50_v2.0.2744-d79516a9d .. > sysinfo ... Rollback: 0/1/1 0/128/128 ... Then running an image with debug extensions disabled: > vers ... RO_A: * 0.0.11/bc74f7dc RO_B: 0.0.11/4d655eab RW_A: 0.4.24/DBG/cr50_v2.0.2744-d79516a9d RW_B: * 0.4.24/cr50_v2.0.2744-d79516a9d ... > sysinfo ... Rollback: 1/1/1 2/128/2 ... Change-Id: I259a3f46c03199633ca85389872449d667f172fb Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1949548 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* g: display both RO and RW info map statusVadim Bendebury2019-12-052-27/+38
| | | | | | | | | | | | | | | | | | | | | Cr50 firmware is required to update the rollback prevention map in INFO1 for both RO and RW images. This patch adds code to display the state of the RO map and both RO_A and RO_B headers in addition to previously reported RW information. BRANCH=cr50, cr50-mp BUG=b:136284186 TEST=loaded the new image and observed reported rollback state: > sysinfo ... Rollback: 0/1/1 0/128/128 ... Change-Id: I32206545b6a59a5693e4274e62fcf0627780f61f Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1949546 Reviewed-by: Namyoon Woo <namyoon@chromium.org>
* docs/fingerprint: Add details on FPMCU logsTom Hughes2019-12-051-2/+42
| | | | | | | | | | | | BRANCH=none BUG=none TEST=view in gitiles Change-Id: Ie3ef2dbbb9ffbe2592268eb2d23f1afe53594a25 Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1952098 Reviewed-by: Craig Hesling <hesling@chromium.org> Commit-Queue: Craig Hesling <hesling@chromium.org>
* docs/fingerprint: Add factory requirements for fingerprintTom Hughes2019-12-052-0/+459
| | | | | | | | | | BRANCH=none BUG=b:131913998 TEST=view in gitiles Change-Id: Ia0cbdb5a2be3b1e35be668384369c372334629c4 Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1951809
* cr50: add support for FIPS mode flag in FWMPVadim Sukhomlinov2019-12-042-2/+17
| | | | | | | | | | | | | | | | | | | | Added definition of FWMP_DEV_FIPS_MODE matching same definition in vboot. Support function board_fwmp_fips_mode_enabled() introduced to read it's status. It's not currently used, but will be consumed by FIPS code. BUG=b:138577491 BRANCH=cr50 TEST=make BOARD=cr50 Change-Id: Iebf672cfebfeb18ae62892097fbf1fa30a770338 Signed-off-by: Vadim Sukhomlinov <sukhomlinov@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1950813 Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Tested-by: Vadim Sukhomlinov <sukhomlinov@chromium.org> Auto-Submit: Vadim Sukhomlinov <sukhomlinov@chromium.org> Commit-Queue: Vadim Sukhomlinov <sukhomlinov@chromium.org>
* servo_v4: remove console command on ToT onlyJett Rink2019-12-041-0/+4
| | | | | | | | | | | | | | | | Servo v4 is under space pressure on Tot, but the actual branch is okay for now. We release from the firmware branch so remove console commands on ToT *only*. BRANCH=none BUG=none TEST=See ~1500K freed on RO and RW images on ToT. Change-Id: I8a49db7d4f00b0f5ca4ba4614fe62dccd7f928ee Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1940775 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* cr50: Add tpmtests for SHA-384 and 512.Gurleen Grewal2019-12-041-1/+34
| | | | | | | | | | | | | | | | BUG=none BRANCH=cr50 TEST=test/tpmtest/tpmtest.py Cq-Depend: chromium:1910525 Change-Id: I52e67f565658992b99e60de7a76161afc2e87952 Signed-off-by: Gurleen Grewal <gurleengrewal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1913629 Tested-by: Gurleen Grewal <gurleengrewal@google.com> Tested-by: Vadim Sukhomlinov <sukhomlinov@chromium.org> Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Commit-Queue: Vadim Bendebury <vbendeb@chromium.org>
* g: Add support for 192 and 256 bit AES-GCM in DCRYPTO_gcm_initVadim Sukhomlinov2019-12-043-7/+9
| | | | | | | | | | | | | | DCRYPTO_gcm_init hardcoded key length to 128 bit causing preventing testing of 192 and 256 bit functionality for AES-GCM. BUG=b:135623371 BRANCH=cr50 TEST=compile, specific test for issue as described in bug Change-Id: I4fc41f6155661709115c57aa944c8976e17bffac Signed-off-by: Vadim Sukhomlinov <sukhomlinov@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1766098 Reviewed-by: Andrey Pronin <apronin@chromium.org>
* tcpci: restructure fault fetch and clearingDenis Brockus2019-12-042-17/+41
| | | | | | | | | | | | | | | | | | Changed the code to not be as indented by using functions instead of nesting deeper and deeper in conditions. The intent would be to add tcpci_handle_fault(port, fault) if we ever decide to generically handle faults. For now it just prints the fault. BUG=b:144126745 BRANCH=none TEST=if any console FAULT output verify properly handled Change-Id: Ie406302c4a824e7d14ca0832cf7bfca7432680f6 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1940778 Commit-Queue: Edward Hill <ecgh@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org>
* volteer: Enable USB-C Port 1Vijay Hiremath2019-12-045-4/+44
| | | | | | | | | | | BUG=b:140578872 BRANCH=none TEST=Able to boot to OS from Zinger connected on Port 1 Change-Id: I2db9763370ecfae2a38081b6fc607b1ef1d06b67 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1947426 Reviewed-by: Keith Short <keithshort@chromium.org>
* volteer: enable thermal managementKeith Short2019-12-043-19/+160
| | | | | | | | | | | | | | | Configure fan for PWM operation. Enable thermal management policies. BUG=b:143768086 BRANCH=none TEST=make buildall TEST=use 'thermalset' to force high and halt temperature conditions, verify AP is alerted and halted Change-Id: I6362ce9d5a0edbd231e3f9464dfccf34d4f1c7a0 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1946774 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* npcx: Disable ITIM after watchdog_stop_and_unlock()Tim Wawrzynczak2019-12-031-3/+3
| | | | | | | | | | | | | | | | | | | | | | watchdog_stop_and_unlock() depends upon the ITIM32 module to ensure that it has been at least 3 watchdog ticks since the last time the watchdog has been touched. If it has been > 100ms since then, there will be no problem, but if it has been less than 100ms, then because the ITIM32 module was disabled, then the system will get stuck in the while (time_since32() ...) loop. This will eventually cause the watchdog to kick in and reboot the EC, which will also cause the AP to reboot. BUG=b:145371494, b:140207603 BRANCH=firmware-hatch-12672.B TEST=sanity testing (alt+volup+h still works) and buildall (this bug was nearly impossible to reproduce) Change-Id: I5e32f4940f03fee90b3aa809b185c13ed66ce7f1 Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1946773 Reviewed-by: Andrew McRae <amcrae@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* Nami: Add DC PROCHOT SettingKo2019-12-031-0/+17
| | | | | | | | | | | | | | | | | | | | Currently, we use default current, 4.096A for all DC PROCHOT# threshold, add higher prochot current according to different OEM ID to improve performance on Nami. Signed-off-by: Ko Ko <ko_ko@compal.corp-partner.google.com> BUG=b:130387567 BRANCH=Nami TEST=Verify Nami dc prochot set to designated current during initial. Change-Id: I5f46c69114d45bd6324bdff150ae6dc5711a6992 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1716675 Reviewed-by: Elmo Lan <elmo_lan@compal.corp-partner.google.com> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Ko Ko <ko_ko@compal.corp-partner.google.com> Commit-Queue: Ko Ko <ko_ko@compal.corp-partner.google.com>
* charger/rt946x: fix charger Vsys shortYilun Lin2019-12-032-0/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | Vsys may short if Ichg and Isys's gap is too huge, and it will cause the system shutdown. When the system is charging at 500mA, and if Isys > 3600mA, the power path will be turned off and cause the system shutdown: - When Ichg < 400mA, then power path is roughly 1/8 of the original. - When Isys > 3600mA, this cause the voltage between Vbat and Vsys too huge (Vbat - Vsys > Vsys short portection) and turns off the power path. To workaround this, we have to 1. disable Vsys short protection when Ichg is set below 900mA 2. forbids Ichg <= 400mA (this is done natually on mt6370, since mt6370's minimum current is 512) BRANCH=kukui BUG=b:144532905 TEST=Change ichg setting to test vsys short and ensure the system won't shutdown. Change-Id: I6cbdd974f6f0cc94ebd82d419304a0d4e67fcaff Signed-off-by: Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1924169 Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* charger/rt946x: add delay for current limit source selectYilun Lin2019-12-031-0/+4
| | | | | | | | | | | | | | | It took the charger 5ms to ramp after setting a new current limit source. BUG=b:144532905 BRANCH=kukui TEST=make buildall Change-Id: I46c39d039c164f5b9be6a6157285192c6a8198d1 Signed-off-by: Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1924168 Reviewed-by: Ting Shen <phoenixshen@chromium.org> Reviewed-by: Allen Chiang <allen_chiang@mediatek.corp-partner.google.com>
* stryke: Initial EC imageDtrain Hsu2019-12-037-0/+1019
| | | | | | | | | | | | | | | | | | The starting point for the stryke EC image (Auto-Generated by create_initial_ec_image.sh version 1.0.0). BUG=b/145101696 BRANCH=none TEST=make BOARD=stryke Change-Id: Id4546da9d79d6692cd66dc6b44f46973e8c50e58 Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1935472 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Josh Tsai <josh_tsai@compal.corp-partner.google.com> Tested-by: Josh Tsai <josh_tsai@compal.corp-partner.google.com> Commit-Queue: Shelley Chen <shchen@chromium.org>
* charger/rt946x: do BC1.2 recognition when requiredYilun Lin2019-12-031-16/+42
| | | | | | | | | | | | | | | | | | | | | BC1.2 and USB enumeration may have a race condition on operating D+/D- pins. This CL make BC1.2 detection runs only when required. That is, only if the CC pins exists RP (sink), and the port is not PD capable, then the source could be a BC1.2 device. Also, drops notifying AC_CHANGE, since it's not accurate while we only enable BC1.2 detection on the state. TEST=ensure BC1.2 detection only runs on a BC1.2 charger plug. BUG=b:141005922 BRANCH=kukui Change-Id: I0aac4221858b316165302494933bf0f54809dcf1 Signed-off-by: Yilun Lin <yllin@chromium.org> Signed-off-by: Eric Yilun Lin <yllin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1936076 Reviewed-by: Ting Shen <phoenixshen@chromium.org>
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