summaryrefslogtreecommitdiff
Commit message (Collapse)AuthorAgeFilesLines
* asurada_scp: add MDP serviceYunfei Dong2021-03-254-1/+106
| | | | | | | | | | | | | | | | | | Adds MDP service. BRANCH=asurada BUG=b:167466842 BUG=b:176313143 BUG=b:167469080 BUG=b:167469726 BUG=b:167468918 BUG=b:167469732 TEST=make BOARD=asurada_scp Change-Id: Iadddfec204d998cb1b6e226da29238c6cf86813b Signed-off-by: Tzung-Bi Shih <tzungbi@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2710229 Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* collis: Initial TCPC configurationJacky Wang2021-03-252-49/+75
| | | | | | | | | | | | | Update TCPC configuration from RT1715 to PS8815 BUG=b:182960982 BRANCH=firmware-volteer-13672.B TEST=make BOARD=collis Signed-off-by: Jacky Wang <jacky5_wang@pegatron.corp-partner.google.com> Change-Id: I382e828cb656e80ea1892f8c60d7f21d89f86368 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2767055 Reviewed-by: Keith Short <keithshort@chromium.org>
* honeybuns: Add USB-PD for port C1 (user facing ALT-DP)Scott Collyer2021-03-2410-21/+169
| | | | | | | | | | | | | | | | | | | | | | This CL adds support for honeybuns C1, which is the user facing usbc port that also support ALT-DP mode. This CL adds support for both gingergread and quiche. Note that gingerbread is being checked in with a TODO for specifying the PPC driver for C1. This is necessary to allow gingerbread to still build while the solution for asymmetric port hardware is finalized. BUG=b:183289386 BRANCH=None TEST=Verified port C1 attaches to display adapters, usbpd hubs, and type-c monitors Signed-off-by: Scott Collyer <scollyer@google.com> Change-Id: Iafbd5a38917601fc5055857662dd0e893d503948 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2699456 Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Scott Collyer <scollyer@chromium.org>
* honeybuns: Add full usb-pd support for C0Scott Collyer2021-03-2411-43/+458
| | | | | | | | | | | | | | | | | | | | | This CL adds config options and board level structs to fully support USB-PD on port C0 for both gingerbread and quiche. This includes all the svdm response functions required for support of DP Alt-mode as a UFP_D. This also includes honeybuns specific version of usb-pd policy functions. BUG=b:175660576 BRANCH=None TEST=Verify that C0 port can establish PD contract, enter ALT-DP mode and extend display over DP/HDMI connectors. Signed-off-by: Scott Collyer <scollyer@google.com> Change-Id: I11edee85e63381f00114e9fbe012a37fd8174279 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2699455 Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Scott Collyer <scollyer@chromium.org>
* honeybuns: P1 changes (gingerbread/quiche)Scott Collyer2021-03-247-32/+66
| | | | | | | | | | | | | | | | | This CL updates both quiche and gingerbread to P1 hardware level. This includes an MCU with 256 kB flash, some GPIO pin assignments to address EXTi conflicts, and removing the I2C2 port. BUG=b:183288657 BRANCH=None TEST=make BOARD=quiche and make BOARD=gingerbread Signed-off-by: Scott Collyer <scollyer@google.com> Change-Id: I6a5d3d365b6c9ed704ced8506fa4a97ca7b668c7 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2699454 Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Scott Collyer <scollyer@chromium.org>
* ctn730: Print firmware versionDaisuke Nojiri2021-03-245-8/+20
| | | | | | | | | | | | | | | | | | This patch makes ctn730 driver print the firmware version. EC_CMD_PCHG is updated to version 1 and returns firmware version of a charger chip. Version 0 of EC_CMD_PCHG is deprecated. BUG=b:182600604, b:173235954, b:183151376 BRANCH=Trogdor TEST=Verify firmware version is printed on EC console. TEST=ectool pchg 0 (for version 1) TEST=cat /sys/class/power_supply/PCHG0/* (for version 0) "ERR kernel: [ 33.394847] cros-ec-pchg cros-ec-pchg.13.auto: Unable to get port.0 status (err:-524)" Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: Ib7bb9a7225fe914bc6c8d600d0f4766dbf75ace8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2757098
* volteer, voxel: Add VIF override filesAbe Levkoy2021-03-242-0/+272
| | | | | | | | | | | | | | | | | Override VIF contents that genvif generates by default to create accurate VIFs for volteer and voxel. BUG=b:172276715 TEST=genvif -b volteer -o /tmp -v build/volteer/vif_override.xml TEST=genvif -b voxel -o /tmp -v build/voxel/vif_override.xml TEST=Similar compliance results on Voxel to handwritten VIF BRANCH=firmware-volteer-13672.B-main Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: I4c72744a5d8b08aa46ef966299f0661a50499e55 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2785505 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* brya: add board configurations for TBTBoris Mittelberg2021-03-241-0/+9
| | | | | | | | | | | | | | Enable usb4 mode, usb TBT_COMPAT mode and usb-c retimer FW update configs. This allows reading correct TBT state via 'ectool usbpdmuxinfo' command. BUG=b:181840109 BRANCH=main TEST=manual Signed-off-by: Boris Mittelberg <bmbm@google.com> Change-Id: Id67af7b570438c7a2a7efd1aa7dd1a4173cf4905 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2780837 Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* zephyr: delbin: bringup keyboardJack Rosenthal2021-03-243-2/+36
| | | | | | | | | | | | | | Enable keyboard support. BUG=b:180410072 BRANCH=none TEST=use keyboard in ChromeOS Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I82c6e8a0a289ae10f9aaae532fc5d7359eea3ec0 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2727847 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* guybrush: Enable CONFIG_VBOOTRob Barnes2021-03-241-0/+2
| | | | | | | | | | | | | | Enable one slot of secure temporary storage. BUG=None TEST=Boot guybrush, no longer see HC 0x4b err 1 BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: I4d73bd8a55f092276b690118b28f401e524e1250 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2785504 Commit-Queue: Diana Z <dzigterman@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* npcx: Fixup eSPI registersRob Barnes2021-03-242-3/+43
| | | | | | | | | | | | | | | Fixed NPCX_ESPICFG_IOMODE_FIELD and NPCX_ESPICFG_MAXFREQ_FIELD field length. Added missing bits for ESPICFG and ESPIERR. BUG=None TEST=Build BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: I99d890804ea7eb4394b64684c03d111371000942 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2784842 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* zephyr: remove unused compiler definitionsKeith Short2021-03-241-14/+0
| | | | | | | | | | | | | | | Remove the CHIP_FAMILY_ and CHIP_VARIANT_ preprocessor definitions that are not used. BUG=none BRANCH=none TEST=zmake testall Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: Ied1d49495109ea99029196d4ad65462381c2581b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2777124 Commit-Queue: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* zephyr: Enable link time optimization for board filesKeith Short2021-03-244-23/+22
| | | | | | | | | | | | | | | | | | | Move the baseboard and board files into the zephyr_ec library to take advantage of the LTO compiler option enabled for the zephyr_ec library. On Volteer, this reduces the image size by 832 bytes. Total LTO saving is just over 10,000 bytes. BUG=none BRANCH=none TEST=zmake testall TEST=boot zephry-ec on Volteer, verify AP boots Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I2f3aa7f6c400a5b5cd1b346fcf52160b834e66a3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2776218 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
* zephyr: Enable link time optimization (LTO)Keith Short2021-03-247-148/+191
| | | | | | | | | | | | | | | | | | | The upstream Zephyr repo does not support LTO. Reconfigure the platform/ec source files into a cmake library so the LTO option can be enabled for all the platorm/ec sources. This reduces the Volteer flash image size by 9176 bytes. BUG=none BRANCH=none TEST=zmake testall TEST=boot zephyr-ec on Volteer, verfiy AP boots Cq-Depend: chromium:2776218 Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I8312773c8b21c498ec8116a8558b7571831159ff Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2776217 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* zephyr: lazor: Connect up the USB interruptsSimon Glass2021-03-241-1/+6
| | | | | | | | | | | | | | | Now that all the code is accessible to zephyr, connect up the interrupt handlers so that events are dealt with. BUG=b:183296099 BRANCH=none TEST=build zephyr for lazor Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: Ie4790ae85efb7e63fb472d3081c4288f16b31c1f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2777647 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* lazor: Move the USBC part of board init into usbc_configSimon Glass2021-03-242-7/+12
| | | | | | | | | | | | | | Split the init function into two parts. Move the USBC part into the common file so that zephyr can use it too. BUG=b:183296099 BRANCH=none TEST=build zephyr for lazor Change-Id: Ib45e37fcd6123f8263f211ac2a3e7dec7ca12ec4 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2777646 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* lazor: Move battery-type detection into the usbc_configSimon Glass2021-03-242-16/+16
| | | | | | | | | | | | | | | Move the implementation of board_get_default_battery_type() into the common file so it can be used from zephyr. BUG=b:183296099 BRANCH=none TEST=build zephyr for lazor Change-Id: I9f9c128386855863d7cc28a9cded23a320e90836 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2777645 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* guybrush: Set fan_off threshold to 0Rob Barnes2021-03-241-1/+2
| | | | | | | | | | | | | | Set fan off threshold to 0 to ensure fan is always running SOC is on. This is a helpful visual and audible signal during bringup. BUG=b:183544852 TEST=Turn on soc at 33C and see fan on BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: Ia552508132d42cfb332cc012431ebb68b3cefbc0 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2783602 Reviewed-by: Diana Z <dzigterman@chromium.org>
* guybrush: Remove CPU temp from thermal_paramsRob Barnes2021-03-241-11/+1
| | | | | | | | | | | | | | | | CPU temp is hotter than SOC temp. The CPU thermal params have not been tuned. High CPU temps is causing shutdowns. Removing CPU temp from thermal_params and relying on SOC temp. BUG=b:183561584 TEST=Build and run BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: I2d4b5483b88adefb83a7f1f8c6ea0e810f04153f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2783601 Reviewed-by: Diana Z <dzigterman@chromium.org>
* kracko: Update LED configTommy Chung2021-03-243-176/+48
| | | | | | | | | | | | | | | | | On Kracko, we have one blue/amber LED which indicates different charging and power states. BUG=b:178092096 BRANCH=dedede TEST=make sure that LED acts correctly. Signed-off-by: Tommy Chung <tommy.chung@quanta.corp-partner.google.com> Change-Id: Ic220b4505fd613790a81f19dc4fd684c2a4c1408 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2763603 Reviewed-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* lazor: Move TCPC init into usbc_configSimon Glass2021-03-242-24/+24
| | | | | | | | | | | | | Move TCPC init into the shared file, so this code can be used by Zephyr. BUG=b:183296099 BRANCH=none TEST=build zephyr for lazor Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: I576856860ff4217289eac88492213b5049190f9e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2777644 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* lazor: Move top part of USC-C config into usbc_configSimon Glass2021-03-242-56/+55
| | | | | | | | | | | | | | | Move the functions at the top of lazor's board.c into the shared file, so this code can be used by Zephyr. BUG=b:183296099 BRANCH=none TEST=build zephyr for lazor Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: I94ff99c76fdfa777e11f0ba35f3c29e42c2d447c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2777643 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* zephyr: lazor: Add initial USC-C config into the buildSimon Glass2021-03-243-2/+57
| | | | | | | | | | | | | | | | | | Add this file into the zephyr build along with the required CONFIG options and device tree additions, so we can make a start on bringing up USB-C and charging functionality. Add all the required GPIOs here as well, so that things will work when we move the code over in the following CLs. BUG=b:183296099 BRANCH=none TEST=build zephyr for lazor Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: I8c4f54664d2d18b44ed8992e61e7b2f694f04f93 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2777642 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* TCPMv2: Do not apply CC Open when running without batteryPatryk Duda2021-03-241-2/+25
| | | | | | | | | | | | | | | | | | | | | | | | This patch prevents applying CC Open when there is no battery. On some boards EC RO doesn't save power-on reset flag in BBRAM when EC reboot by Cr50 is expected. This behaviour was implemented in CL:2255830. Brown-out reset flag is implemented only for LM4 chips. Also we don't have access to information stored by TCPMv1 in BBRAM. This functionality was removed from TCPMv2 in CL:2271002, so we can't really determine if we should apply CC Open and from that time we are applying CC Open always, except power-on and brown-out reset flags. This patch adds missing battery to list of exceptions. BUG=b:161775827 BRANCH=none TEST=Flash EC ToT on Fleex. Disconnect battery physically and plug charger. Check if ChromeOS boots successfully. Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: Icc22fcce595693c744e1a55b905cdd58b5e7bfbd Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2767638 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* zephyr: volteer: enable BOARD_RESET_AFTER_POWER_ONWealian Liao2021-03-241-0/+1
| | | | | | | | | | | | | | | | | | | This enables BOARD_RESET_AFTER_POWER_ON feature for volteer. BUG=b:178101173 BRANCH=None. TEST=zmake testall TEST=check the following reset cause 1. power-up 2. reset-pin reset Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com> Change-Id: Ie1b0fc4b41227bc23d6a58e62af5e35e6f154ad3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2771130 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* zephyr: npcx: add reset cause checkWealian Liao2021-03-2410-43/+341
| | | | | | | | | | | | | | | | | | | | | | | | | | | The reset cause will influence the initialization flow. We define some of initial flow of the reset cause for the following development. This CL include the following: 1. Add check_reset_cause() which sets the system reset flag. 2. Add chip_bbram_status_check() to clear the error status & show the error message. 3. Add CONFIG_BOARD_RESET_AFTER_POWER_ON feature. 4. Define the initialize flow for reset cause. BRANCH=none BUG=b:178101173 TEST=check the following reset cause by 'sysinfo' 1. power-up 2. reset-pin reset 3. soft by 'reboot' console command 4. watchdog by 'waitms 2000' Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com> Change-Id: I515868d8cda4544fdbe782210b0108b4dda0d8cc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2731180 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* zephyr: kconfig: set BOARD_RESET_AFTER_POWER_ON default disableWealian Liao2021-03-241-1/+0
| | | | | | | | | | | | | | | | | | | | CONFIG_BOARD_RESET_AFTER_POWER_ON default disable in config.h. Moreover, the early delay mechanism hasn't been implemented for CONFIG_BOARD_RESET_AFTER_POWER_ON feature delay. Set to default disable to avoid misconfigure it. BUG=b:182875520 BRANCH=None. TEST=zmake testall Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com> Change-Id: I65100f3a5a1b7ceb1907f17142cd0ace130aeea5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2771129 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org> Tested-by: Keith Short <keithshort@chromium.org>
* lindar: update thermal table.arthur.lin2021-03-241-12/+12
| | | | | | | | | | | | | | | Update thermal table setting for thermal team request. BRANCH=firmware-volteer-13672.B BUG=b:183306212 TEST=make buildall -j Signed-off-by: arthur.lin <arthur.lin@lcfc.corp-partner.google.com> Change-Id: I88118210b33781adcfaafa831e86a54d2c2b731a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2772402 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Zhuohao Lee <zhuohao@chromium.org> Commit-Queue: Zhuohao Lee <zhuohao@chromium.org>
* asurada_scp: add venc serviceIrui Wang2021-03-244-1/+114
| | | | | | | | | | | | | | Adds venc (video encoder) service. BRANCH=asurada BUG=b:167466842 BUG=b:167469732 TEST=make BOARD=asurada_scp Change-Id: Ifac5f7c9b711211260b14d35cdafb5774296917f Signed-off-by: Tzung-Bi Shih <tzungbi@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2367813 Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* asurada_scp: add vdec serviceYunfei Dong2021-03-245-2/+171
| | | | | | | | | | | | | | | | | Adds vdec (video decoder) service. BRANCH=asurada BUG=b:167466842 BUG=b:167469080 BUG=b:167469726 BUG=b:167468918 TEST=make BOARD=asurada_scp Signed-off-by: Yunfei Dong <yunfei.dong@mediatek.org> Signed-off-by: Tzung-Bi Shih <tzungbi@chromium.org> Change-Id: Idd1ab2f1fa3f9470c0d1af40f3488e965915b94e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2304230 Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* chip/mt8192_scp: add venc capabilityTzung-Bi Shih2021-03-242-1/+7
| | | | | | | | | | | | BRANCH=asurada BUG=b:167466842 BUG=b:167469732 TEST=make BOARD=asurada_scp Signed-off-by: Tzung-Bi Shih <tzungbi@chromium.org> Change-Id: I261098140f4d2ab025881afc3753fe44d5b9b7e4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2780820 Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* chip/mt8192_scp: add vdec capabilityTzung-Bi Shih2021-03-242-5/+8
| | | | | | | | | | | | | | | BRANCH=asurada BUG=b:167466842 BUG=b:167469080 BUG=b:167469726 BUG=b:167468918 TEST=make BOARD=asurada_scp Signed-off-by: Tzung-Bi Shih <tzungbi@chromium.org> Change-Id: Icb51415ce69893a767d987446247890277db6182 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2780819 Reviewed-by: Yunfei Dong <yunfei.dong@mediatek.corp-partner.google.com> Reviewed-by: Ting Shen <phoenixshen@chromium.org>
* tusb1064: Add full list of possible I2C device addressesScott Collyer2021-03-242-2/+25
| | | | | | | | | | | | | | | | | | The TUSB1064 has 16 possible I2C device addresses. This CL adds this full list to the tusb1064.h file. In addition, the TUSB1064 device address was updated to match the new macro. BUG=b:168621142 BRANCH=servo TEST=make -j buildall Signed-off-by: Scott Collyer <scollyer@google.com> Change-Id: I1ee836ef0a88adab1af63901c2ec0be7cef7b232 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2267630 Commit-Queue: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Sam Hurst <shurst@google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Reland "burnet: Change detect method for 2nd base accel"Devin Lu2021-03-241-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | This is a reland of 3d3f2316b7d2f060d4f8c919a2c82326f8651af3 Original change's description: > burnet: Change detect method for 2nd base accel > > Both bmi160 and icm-40608 are using spi interface with Jacuzzi. > The sensor will acknowledge with the ping. we should make sure > the return value is matching the chip content. > > BUG=b:173647487 > BRANCH=firmware-kukui-12573.B > TEST=ectool motionsense on both bmi160 and icm-40608 > > Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> > Change-Id: I3a502c182bb766b52dd5d85014478f9c0014360a > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2763605 > Reviewed-by: Ting Shen <phoenixshen@chromium.org> Bug: b:173647487 Change-Id: I140aeacd46d74216bc7c999c493dc1be1590aa5a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2783510 Reviewed-by: Ting Shen <phoenixshen@chromium.org> Commit-Queue: Devin Lu <Devin.Lu@quantatw.com> Tested-by: Devin Lu <Devin.Lu@quantatw.com>
* zephyr: volteer: enable RTCWealian Liao2021-03-242-0/+4
| | | | | | | | | | | | | | | Enable CONFIG_RTC for volteer. BUG=None. BRANCH=None. TEST=zmake testall TEST=check console show RTC value after powerbtn press "RTC: 0x000003ae (942.00 s)" Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com> Change-Id: I129c20d8a32e87837a7042dd5bb16900d1d9f5ba Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2767059 Reviewed-by: Simon Glass <sjg@chromium.org>
* zephyr: shim: connect RTC with cros_rtc driverWealian Liao2021-03-241-25/+93
| | | | | | | | | | | | | | This connect shim/rtc with cros_rtc driver. BUG=b:178230662 BRANCH=None. TEST=check rtc value by 'ectool rtcset 10' & 'ectool rtcget' check rtc alarm by 'ectool rtcsetalarm 10' & 'ectool rtcgetalarm' Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com> Change-Id: I4171074ff58ab32e5386dedea3695adbc40f58f6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2767058 Reviewed-by: Simon Glass <sjg@chromium.org>
* zephyr: kconfig: set rtc default disableWealian Liao2021-03-242-6/+0
| | | | | | | | | | | | | | | | | | CONFIG_RTC, CONFIG_CMD_RTC, CONFIG_CMD_RTC_ALARM, and CONFIG_HOSTCMD_RTC are default disable in config.h. Set the PLATFORM_EC_RTC, PLATFORM_EC_CONSOLE_CMD_RTC, PLATFORM_EC_CONSOLE_CMD_RTC_ALARM, and PLATFORM_EC_HOSTCMD_RTC to default disable. Sync with the original behavior. BUG=b:178230662 BRANCH=None. TEST=zmake testall Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com> Change-Id: I7c5b9ff1d494adaaef0420d28d93f8aed3ff2cc7 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2767057 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* zephyr: add cros_rtc_npcx driver for npcx7 seriesMulin Chao2021-03-246-0/+296
| | | | | | | | | | | | | | | | | This implements cros_rtc_npcx driver for Zephyr OS-based EC. For the NPCX7 chip, NPCX Monotonic Counter(MTC) provides a time-keeping function with a resolution of one second. MTC is selected to implement the cros_rtc_npcx driver. BUG=b:178230662 BRANCH=None. TEST=zmake testall Signed-off-by: Mulin Chao <mlchao@nuvoton.com> Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com> Change-Id: Ibd9e27efe4a8b84cdac6d61539742c4f3eb93fce Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2767056 Reviewed-by: Simon Glass <sjg@chromium.org>
* zephyr: driver: add CROS_RTC apiMulin Chao2021-03-246-0/+244
| | | | | | | | | | | | | | | | | Add Real-Time Clock (RTC) API for Zephyr OS-based ec. Currently, Zephyr doesn't provide setting RTC value functionality in the counter driver api interface. Hence, a cros RTC api provides the low-level driver interface related to it and the others used in cros ec. BUG=b:178230662 BRANCH=None. TEST=zmake testall Signed-off-by: Mulin Chao <mlchao@nuvoton.com> Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com> Change-Id: Ia4b10739fbf65fa7213022cac6a17d2a9bc56b10 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2777938 Reviewed-by: Simon Glass <sjg@chromium.org>
* lazor: Move PPC/TCPC, muxes and BC1.2 to usbc_configSimon Glass2021-03-242-74/+74
| | | | | | | | | | | | | | | Move these definitions into the common file so that Zephyr can build them also. BUG=b:183296099 BRANCH=none TEST=make BOARD=lazor -j4 Change-Id: I5234b265cf876eb06b9f6ca2b7175152d952bb47 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2777640 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* lazor: Move some USB-C/charger handlers to usbc_configSimon Glass2021-03-242-130/+141
| | | | | | | | | | | | | | | Move some of these functions into the common file so that Zephyr can build them also. This covers the block at the bottom of the file, to make it easy to review. BUG=b:183296099 BRANCH=none TEST=make BOARD=lazor -j4 Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: I1cc7f241ca1529aa0c87c2d868afe799c0ee6ca6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2777639 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* Revert "burnet: Change detect method for 2nd base accel"Devin Lu2021-03-241-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 3d3f2316b7d2f060d4f8c919a2c82326f8651af3. Reason for revert: <Missing return rv> Original change's description: > burnet: Change detect method for 2nd base accel > > Both bmi160 and icm-40608 are using spi interface with Jacuzzi. > The sensor will acknowledge with the ping. we should make sure > the return value is matching the chip content. > > BUG=b:173647487 > BRANCH=firmware-kukui-12573.B > TEST=ectool motionsense on both bmi160 and icm-40608 > > Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> > Change-Id: I3a502c182bb766b52dd5d85014478f9c0014360a > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2763605 > Reviewed-by: Ting Shen <phoenixshen@chromium.org> Bug: b:173647487 Change-Id: Ie6e5c895f558a9cdc53648599502abcf2b8dae89 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2783504 Reviewed-by: Ting Shen <phoenixshen@chromium.org> Tested-by: Devin Lu <Devin.Lu@quantatw.com> Commit-Queue: Devin Lu <Devin.Lu@quantatw.com>
* honeybuns: Enable USB-EP supportScott Collyer2021-03-248-20/+348
| | | | | | | | | | | | | | | | | | | | | | | | | | This CL adds configs/structs required for USB-EP support for both quiche and gingerbread. This CL also adds usbc support code to RO so that Rd is being presented on both CC lines in RO. In addition, there is some clean up for I2C port names and the debug gpio utility function. BUG=b:172493899 BRANCH=None TEST=tested on quiche and verified that the USB-EP was enumerated RST EP0 3220 RST EP0 3220 RST EP0 3220 RST EP0 3220 SETAD ae [8.069004 Jumping to image RW] Signed-off-by: Scott Collyer <scollyer@google.com> Change-Id: I8d65ba55eecc2b82047a8cd433611f639af0c5ed Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2699453 Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Sam Hurst <shurst@google.com> Commit-Queue: Scott Collyer <scollyer@chromium.org>
* stm32g4: ucpd: Move hbit clock config macros to .h fileScott Collyer2021-03-242-26/+29
| | | | | | | | | | | | | | | | | | | Honeybuns needs to preset Rd on both CC lines while in RO. But, it does not have a full usbc/pd stack. The ucpd driver file is not included either. However, ucpd needs some basic initialization so that Rd can be applied correctly. This CL moves the macros which are required to configure the ucpd clocks to the .h file. BUG=b:172493899 BRANCH=None TEST=make BOARD=quiche Signed-off-by: Scott Collyer <scollyer@google.com> Change-Id: I07614a941a05fa133ab4504d9241249066f41e29 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2772738 Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Sam Hurst <shurst@google.com> Commit-Queue: Scott Collyer <scollyer@chromium.org>
* Metaknight: Organize source codeYu-An Chen2021-03-243-43/+30
| | | | | | | | | | | | | | | | | | | | Move GPIO00,GPIO40,GPIO73,GPIO80,GPIO92,GPIOE0 to NC pin. Rename EC_I2C_SUB_C1_SDA_HDMI_HPD_ODL to HDMI_HPD_SUB_ODL. Add "HDMI plug-in/out" message in ec console. Remove hdmi_enable/disable function due to GPIO92 not used. Add "SSFC" tag in init g-sensor console message. BUG=None BRANCH=dedede TEST=check DUT can boot, HDMI log correct Signed-off-by: yu-an.chen@quanta.corp-partner.google.com Change-Id: I0d600408171de68dfa025065845dd55e59e8a6dc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2780863 Tested-by: Yu-An Chen <yu-an.chen@quanta.corp-partner.google.com> Auto-Submit: Yu-An Chen <yu-an.chen@quanta.corp-partner.google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* drobit: Limit the input current settingJacky Wang2021-03-241-0/+15
| | | | | | | | | | | | | | | | Limit the input current to 98% negotiated limit, to account for the charger chip margin. BUG=b:183467915 BRANCH=firmware-volteer-13672.B TEST=make BOARD=drobit Use "ectool chargstate show" to check input current. Signed-off-by: Jacky Wang <jacky5_wang@pegatron.corp-partner.google.com> Change-Id: I4cff9c69b39f84616e535958e2bde1a64fd040ec Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2781097 Reviewed-by: Michael5 Chen <michael5_chen1@pegatron.corp-partner.google.com> Reviewed-by: Zhuohao Lee <zhuohao@chromium.org>
* zephyr: Add support for multiple Parade PS8xxx chipsSimon Glass2021-03-242-0/+26
| | | | | | | | | | | | | | Some designs use different chips. The driver supports them all but needs to know which one is on which port. Add support for this feature in Zephyr. BUG=b:183296099 BRANCH=none TEST=build zephyr for lazor Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: I497da5e865e764d74242c00bf2fb0d309fae7061 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2777638
* zephyr: Add two more Parade PS8xxx chips to the buildSimon Glass2021-03-243-0/+32
| | | | | | | | | | | | | Parade PS8751 and PS8805 are needed by lazor so add support for them in the Zephyr build. BUG=b:183296099 BRANCH=none TEST=build zephyr for lazor Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: Ic93a0568d1c505cb496dd92c128d0b05ddef93cd Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2777637
* zephyr: lazor: Add supported batteriesSimon Glass2021-03-243-0/+36
| | | | | | | | | | | | | | | Lazor supports five different batteries. Add these to the binding and create a new file to hold the battery information, as we do with GPIOs. BUG=b:183296099 BRANCH=none TEST=build zephyr for lazor Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: Ie8eac2ed08577e28d63a8119c8ced3bf825e165a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2777636 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* zephyr: volteer: Drop hard-coded battery enumerationSimon Glass2021-03-242-5/+18
| | | | | | | | | | | | | | | | | | | | | | | Now that this enum is available in a header file, include it in the build, so it is available to any file that needs it. With ECOS the enum is assumed to be present since it is declared in the board.h header file. This lets us tidy up the hard-coded enum in config_chip.h so we can enable the battery on other boards. Add the required config to volteer. BUG=b:176121284 BRANCH=none TEST=zmake configure -B /tmp/z/vol zephyr/projects/volteer -t zephyr && zmake -L build /tmp/z/vol Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: I636410a38d156061efe67798c99a7d60c9fc6096 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2777635 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
View Lorry Controller Status