| Commit message (Collapse) | Author | Age | Files | Lines |
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For the upcoming header restore vendor command implementation there is
a need to allow rw access to the alternative RO area.
A static function for this is available in upgrade_fw.c, let's make it
available to other users.
BRANCH=cr50
BUG=b:35580805
TEST=verified that it is still possible to update the RO.
Change-Id: I879804ff180c5d00cf6860ce5669f2fe48731832
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/457501
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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There are no early H1 chips left in circulation, all released chips
(starting with RW 0.0.10) support update protocol version 5.
This patch drops all technical debt associated with supporting earlier
protocol versions.
BRANCH=cr50
BUG=b:35580805
TEST=downgraded an H1 test board to ro 0.0.8 rw 0.0.9. Updated it to
the latest image (ro 0.0.10 rw 0.0.18).
Change-Id: I28c9b0c597122c7aa602a88fb56f9c7bf04b9984
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/457500
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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tigertail allows muxing a usb-c port onto two different
passthough targets. This allows for automated switching
between USB host and device without DUT or endpoint knowledge.
tigertail also routes SBU lines to stm32 UART, and has INAs on
VBUS and VCONN to measure power.
BUG=b:35849284
BRANCH=None
TEST=Muxing power, muxing USB, uart works, INAs work.
Change-Id: I5bf2ba038aa78e59352ad99cd71efb0f0d0fbec9
Reviewed-on: https://chromium-review.googlesource.com/438677
Commit-Ready: Nick Sanders <nsanders@chromium.org>
Tested-by: Nick Sanders <nsanders@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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we need the HOSTCMD task to pass the unittests.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=b:35648258
TEST='make BOARD=eve_fp tests'
and 'emerge-eve chromeos-ec'
Change-Id: I37ce99c46ec9013806f87ee61b5a5faac0802482
Reviewed-on: https://chromium-review.googlesource.com/457536
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@google.com>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
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Signed-off-by: Dino Li <dino.li@ite.com.tw>
BRANCH=none
BUG=b:36228568
TEST=Check '__image_size' of map file and binary size
for both RO and RW images.
Change-Id: I43b58a199a30827293531505de30f0ddfb72b917
Reviewed-on: https://chromium-review.googlesource.com/456664
Commit-Ready: Dino Li <Dino.Li@ite.com.tw>
Tested-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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Allows simulating volume buttons using "button vup/vdown"
BRANCH=none
BUG=b:36444691
TEST=button vup, evtest sees the event.
Change-Id: I0a464601e2e36c481cc834a6a744bfcd6b4cdc7b
Reviewed-on: https://chromium-review.googlesource.com/457004
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
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In order to enable toggling on/off of LTE based on chipset power state
transitions, define WIRELESS_GPIO_WWAN that would allow the common
wireless component to take care of the gpio toggling.
BUG=b:36447195
BRANCH=None
TEST=Verified that PP3300_A drops down from 0.9V to 0.63V when
apshutdown is done on EC console and system transitions to fake G3.
Change-Id: Id46bcbdffde06e4929910b6ab87a6d9a96d18a23
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/457402
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Jerry Parson <jwp@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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BUG=chromium:687228
BRANCH=none
TEST=boot 10 times on kevin, and
see the complete string "Console is enabled..."
Change-Id: I9bb7358eb0a3d8172b5584329b9837cf62def635
Reviewed-on: https://chromium-review.googlesource.com/457421
Commit-Ready: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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When invoking ectool fan commands on older ECs not supporting
EC_CMD_GET_FEATURES, the tool is choking on the lack of the command at
the beginning of get_num_fans() and not going further.
The regression was introduced by
https://chromium-review.googlesource.com/c/359069/, let's go back to the old
behavior for machines without feature bits and skip the
EC_FEATURE_PWM_FAN check.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=b:35575890
TEST=on Buddy, run 'ectool pwmgetnumfans' and 'ectool pwmgetfanrpm all'
and get results.
Change-Id: Ie9255d4afc9fa95a55807c310e9593a28c2aadc1
Reviewed-on: https://chromium-review.googlesource.com/456598
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
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BUG=b:36107214
BRANCH=gru
TEST=manually on kevin:
(1) make DUT in tablet mode
(2) swiftly close the lid
(3) check ec log and confirm DUT can read small angle
and turn into clamshell mode when lid is closed.
TEST=make runtests
Change-Id: I7ebf10d38a8b300960ebf46be717d48522c6fd0b
Reviewed-on: https://chromium-review.googlesource.com/455458
Commit-Queue: Philip Chen <philipchen@chromium.org>
Tested-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
(cherry picked from commit 75ba9147c392367037c21e79899f463c32c1f92f)
Reviewed-on: https://chromium-review.googlesource.com/457137
Commit-Ready: Philip Chen <philipchen@chromium.org>
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Let unit can't update battery FW when battery state in learning mode.
BUG=b:36372859
BRANCH=reef
TEST=check unit can't update battery FW in learning mode.
Change-Id: I9d69811d84fc386cda6adb51be51f1cfb4fcdf55
Signed-off-by: Bruce.Wan <Bruce.Wan@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/454656
Commit-Ready: Keith Tzeng <keith.tzeng@quantatw.com>
Tested-by: Keith Tzeng <keith.tzeng@quantatw.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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In order to support waking from Deep S3 the trackpad interrupt
is routed to the EC.
The EC needs to enable this interrupt when going into S3, and
disable it otherwise.
It also needs to filter events and only wake the system when it
is not in tablet mode.
This is accomplished with the following rules:
1) Enable trackpad wake in S0->S3 transition, if !tablet_mode
2) Disable trackpad wake in S3->S5 transition
3) Disable trackpad wake in S3->S0 transition
4) Disable trackpad wake when entering tablet mode in S3
5) Enable trackpad wake when lid angle is <180 degrees and in S3
And finally a check in the trackpad interrupt itself to ensure that
it only sends the wake event if not in tablet mode.
The function to enable or disable trackpad wake uses a static variable
to keep track of the enable state because when enabling the GPIO for
wake it first clears pending events and if multiple transitions are
happening (suspending, plus lid angle rotation) this can get called
multiple times in quick succession.
Currently a placeholder KEY_PRESSED event is used to wake the AP
since we do not have device specific events. Fixing this behavior
is tracked in b/36024430.
BUG=b:35587072
BRANCH=none
TEST=manual testing on eve P1b:
1) ensure that trackpad wake in clamshell mode works
2) ensure that trackpad wake in tablet mode does not waork
3) ensure that if in S3 during transition to or from tablet
mode the wake event is enabled appropriately
Change-Id: Ib2020b5010bdde396a3b05243894431b67edb503
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://chromium-review.googlesource.com/450954
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
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PS8751 does not restore all register contents when resuming
from low power mode. This change makes tcpm call board_init
when it stops auto-toggling so that register contents can be
restored.
BUG=b:35585399
BRACH=none
TEST=On Snappy, the board_init funciton is called every time a device
is plugged in and register contents are restored.
Change-Id: I50c51334f43c02e3c4d8453e1e966bf6eb3ce769
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/454139
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Let's split the usb headers in 3 different parts, instead of having
usb_descriptor.h pull in usb_hw.h and usb_api.h.
- usb_api.h: EC functions related to usb (e.g. connect/disconnect)
- usb_descriptor.h: common USB names and structures
- usb_hw.h: Functions required for interactive with EC's USB HW
BRANCH=none
BUG=b:35587171
TEST=make buildall -j
Change-Id: I37ead61e3be5e7ae464f1c9137cf02eaab0ff92e
Reviewed-on: https://chromium-review.googlesource.com/454861
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Increasing key length from 2048 bits to 3072 bits provides more
security, at the cost of about 2.25x the amount of time being
spent in verification (roughly 100ms instead of 45ms).
CQ-DEPEND=CL:449060
BRANCH=none
BUG=b:35582031
TEST=Flash hammer, verification succeeds.
Change-Id: I2ac7e87941c847bb4e9bd376034e6539988d1743
Reviewed-on: https://chromium-review.googlesource.com/449023
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Add a basic driver for FPC1140 sensor similar to the kernel fpc1020
driver.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=b:35648259
TEST=on Eve, run the FP sensor 'int_test' with the FP MCU pass-through.
Change-Id: Ib042b890b5848f66cf6ab9284fd26e7b641f68c1
Reviewed-on: https://chromium-review.googlesource.com/454700
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Todd Broch <tbroch@chromium.org>
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Simple hack to provide a pass-through relaying the fingerprint sensor
commands coming from the host.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=b:35648259
TEST=on Eve, read sensor HWID from the kernel.
Change-Id: I04e7641fe4067f8378e0b798c529aded0f708b47
Reviewed-on: https://chromium-review.googlesource.com/452500
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Todd Broch <tbroch@chromium.org>
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If the charging current is less than the BD9995X's minimum charging current
it is overwritten to BD9995X's minimum charging current. However in idle
mode we write the charging current which is known to the charger during
that time, which can be less than the BD9995X's charging current. Hence,
do not overwrite the charging current in idle mode.
BUG=b:35984679
BRANCH=none
TEST=Manually tested on Electro. In idle mode charge current is 0mA.
Change-Id: I2e605b63c8519383c6a62d76718bc52660e7270e
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/453999
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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The anx74xx tcpm driver for the usb_mux_set() function is always
connecting the DP aux lines to the SBU signals regardless of whether
the bit flag MUX_DP_ENABLED was set or not. For CCD opertation the sbu
lines are used to establish a USB connection to H1. This means that if
a PD port ever attaches to a sink debug accessory, usb_mux_set would
result in interrupting the USB connection being used for CCD.
In addition, the anx74xx_tcpm_mux_exit() function had a bug where the
value read from ANALOG_CTRL_5 was being masked by 0x09 and then
written to ANALOG_CTRL_2.
Added functions anx74xx_tcpm_mux_enter_safe_mode() and
anx74xx_tcpm_mux_exit_safe_mode() so that writes to the 3 CTRL
registers that are used to configure ALT_DP mode can be easily
bookended.
BUG=b:36007652
BRANCH=reef
TEST=Connected servo_v4 to port 0 of electro, verified that H1 console
access worked. Then initiated a data role swap so that port 0 on
electro was in DFP mode and the H1 console stayed connected.
- Tested with dingdong that could connect to a 4k monitor.
- Tested with USB3 flash drive.
- Tested Anker USBC -> USBA hub
Change-Id: I2d045134fbdd21b6b492bbeabc85ab23aef73b9a
Signed-off-by: Scott <scollyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/451837
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: S Wang <swang@analogix.corp-partner.google.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Some people love to address the EC device nodes by number with ectool,
add the special offset for the FP MCU (e.g. '--dev=8').
Addressing it by name already works (e.g. '--name=cros_fp').
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=b:35648259
TEST=on Eve, execute 'ectool --dev=8 version'
and see a similar result to 'ectool --name=cros_fp version'
e.g. "RO version: eve_fp_v1.1.6177-945b19f+ [...]"
Change-Id: Ic08e3b7a3ae31b7e1b73bccc8375badf3284b49c
Reviewed-on: https://chromium-review.googlesource.com/453179
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Todd Broch <tbroch@chromium.org>
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As advised by Daisuke makes the new API slightly better:
- remove the useless rxlen assignment.
- keep the normal asynchronous behavior of the function by skipping the
last dma wait.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=b:35648259
TEST=on Eve, use the FP sensor with the passthru.
Change-Id: Iedb8e77cb1af58c273ab5ae6f0a670ce93dfde5a
Reviewed-on: https://chromium-review.googlesource.com/454699
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Todd Broch <tbroch@chromium.org>
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Master chip/g FW still needs to support deprecated RO, so re-add support
for the old version_struct. This CL can be reverted once we no longer
need to support deprecated RO on master.
BUG=chromium:698881,chromium:698882
TEST=Flash old FW (f51fdf2) to RW_B slot and updated FW to RW_A. Verify
cr50 boots into RW_A, and "version" on the console prints RW_B version,
not "Error".
BRANCH=None
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I3c255afcd12da5694ca128960de8d2abe41686dc
Reviewed-on: https://chromium-review.googlesource.com/450860
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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Image used size is now part of the image_data struct present in all
images at a fixed offset, so use it rather than scanning from the end of
the image.
BUG=chromium:577915
TEST=Verify on kevin + lars + lars_pd that system_get_image_used() returns
the same value as the old implementation, for both RO and RW images.
BRANCH=None
Change-Id: I35f0aa87f5ab1371dbd8b132f22b9d0044358223
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/450859
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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Store our image size (known at build time) in our version struct (now
renamed to image_data). This will allow us to more efficiently determine
the size of an image in a follow-up CL.
Note that compatibility is broken for old ROs that do not include this
CL.
BUG=chromium:577915
TEST=Verify on kevin + lars + lars_pd that stored image size matches
output of system_get_image_used() for both RO and RW images.
BRANCH=None
Change-Id: I7b8dc3ac8cf2df3184d0701a0e0ec8032de8d81b
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/450858
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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Max = Max * 95%
Follow reef setting.
BUG=none
BRANCH=reef
TEST=make buildall
Change-Id: Ifa57171114f38640fbe868e7042b3962eab284e0
Signed-off-by: Bruce.Wan <Bruce.Wan@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/454360
Commit-Ready: Keith Tzeng <keith.tzeng@quantatw.com>
Tested-by: Keith Tzeng <keith.tzeng@quantatw.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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With this change when external power adapter is plugged in
without a battery it will not prevent power on if there is
enough power.
BUG=b:35775049
BRANCH=None
TEST=On poppy: unplug battery, connect external power adapter
and the board should boot up.
Change-Id: I533ab6a5de5ebc17f6c05c772db742489a44c327
Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/455277
Commit-Ready: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Tested-by: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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When an x86 based system is reset, a pulse on the plt_rst_l line is
generated. This pulse is supposed to reset the system and the pulse'
rising edge is an interrupt trigger for H1 to reset the TPM. If H1 is
in sleep state at the time of the rising edge, the interrupt request
could be lost.
Luckily, the minimum plt_rst_l pulse duration is 1 ms, and the worst
case max time to wake up from sleep for H1 150 us. Let's wake up on
low level of plt_rst_l, this way by the time the rising edge comes
along the H1 would be awake and ready to process the interrupt.
BRANCH=cr50
BUG=b:35995492
TEST=verified that platform_KernelErrorPaths.CORRUPT_STACK passes
hundreds of times on a system were it was failing after a few
runs before this fix.
- verified that suspend_stress_test still succeeds at least 300
iterations
Change-Id: Ib9984efa08bdd185a95716dc9e48077cf4bb3c2a
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/455579
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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Erase the first location in the manifest info map to ensure that the
flash info state is updates and then the RO prevents booting earlier
images (where the map is unaltered).
BRANCH=cr50
BUG=none
TEST=verified that once both RW_A and RW_B are programmed with the new
image and the H1 is restarted, the first info map location is erased.
Change-Id: Id48d8a2009f7cf9842b7a33f036dc98457dbeafc
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/455580
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-by: Marius Schilder <mschilder@chromium.org>
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Enable more hardware related console commands to help hardware
validation.
BUG=chrome-os-partner:62673
TEST=manual
build and load into Rowan
check console commands:
gpioget
spixfer
BRANCH=none
Change-Id: I86d3b74cef77ed9244a140290241a9fac6af3f84
Signed-off-by: Rong Chang <rongchang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/441486
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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EC controls SPI CS pin as GPIO. This CL remove the ALT function
config. And before trigger SPI hardware reset, the driver state needs to
be disable.
BUG=chrome-os-partner:62673
TEST=manual
load into Rowan and boot up AP.
check console command accelread
BRANCH=none
Change-Id: I511c5906efbbb42b09547c61414bcc24b0217ad3
Signed-off-by: Rong Chang <rongchang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/441485
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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Rowan use 2 cell battery.
BUG=chrome-os-partner:62673
TEST=manual
load into rowan and see if EC complains about battery low.
BRANCH=none
Change-Id: I6d9006ee37e1e3ecc3d2965619a31f1774580cf0
Signed-off-by: Rong Chang <rongchang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/441484
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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spi_transaction() always returns success even without the sensor.
Check whoami value to make sure that the sensor is existed.
BUG=none
BRANCH=none
TEST=remove LID accel sensor from elm and see init failed log.
[1.258973 Lid Accel: 1: init failed: 4]
Change-Id: I55aa35bc9790e5dec61e22aa2f51243e29368a86
Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/453579
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
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The led_get_brightness_range and led_set_brightness functions are only
used by the led control host command and exercised via ectool for
factory testing.
Currently the ectool inputs must be inverted to get expected behavior:
ectool led power red=100 green=100 blue=20 << blue
Instead we can invert them in the EC to get more intuitive behavior for
the user input values, and use the led_id parameter to split the control
so they can be addressed individually for testing:
ectool led left red=0 green=0 blue=80 << blue
ectool led right red=100 green=13 blue=0 << amber
BUG=b:36150361
BRANCH=none
TEST=Tested manual control of indivual LEDs using ectool
Change-Id: I6551656f3faf26930749d1e9d45a176088c6646c
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://chromium-review.googlesource.com/453303
Reviewed-by: Scott Collyer <scollyer@chromium.org>
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Add LED types for left and right so they can be addressed
properly with ectool.
BUG=b:36150361
BRANCH=none
TEST=manual testing of 'ectool led <left|right> <color>' behavior
Change-Id: Iea25cc69db2d35416e787dcb5a324d2e2cf5d3a6
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://chromium-review.googlesource.com/453126
Reviewed-by: Scott Collyer <scollyer@chromium.org>
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IADP monitoring bit was set to the default value for the devices
with an RO image which clears the bit (and causes the issue).
This patch removes the code so that we do not touch the IADP
monitoring bit since transitioning from 0->1 may cause other issues.
BUG=b:35647661
BRANCH=reef
TEST=none
Change-Id: I4413e0bd2de3f4e3912cbe6e73b8cad641ee9245
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/453400
Reviewed-by: Shawn N <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/453798
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In order to make pass through charging safe, there must be a mechanism
to signal the CHG port manager that Vbus is available and in a steady
state. When a typec only charger is used for the CHG port, then it's
steady state is SRC_DISCOVERY. Need a way to differentiate the TypeC
only charger from a USB PD charger that's also going through
SNK_DISCOVERY.
In addition, to allow a DTS device to support PD messaging, can't
stay in SRC_ACCESSORY state. This CL makes a modification to the
USB PD state machine so that if a debug accessory is detected and
CONFIG_USB_PD_DTS is defined, then the state machine will advance to
SRC_STARTUP and prepare for messages similar to when a UFP attach
is detected.
BUG=b:35586526
BRANCH=servo
TEST=Manual Built for both Plankton and Reef, verified that Reef
connects as both SNK and SRC.
Change-Id: I9aea0341cd9b6e6773023f0923a9a18a86fc4627
Signed-off-by: Scott <scollyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/448987
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Add a new 'feature' bit to allow the host to auto-detect a FP MCU.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=b:35648259
TEST=manual, on Eve, look at the features bit on the kernel interface.
Change-Id: If21320bb29d58f0a6dfadba03d8892e4183e5430
Reviewed-on: https://chromium-review.googlesource.com/452341
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
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Extend the SPI master API to be able to do fancier transactions:
- allow to read the incoming bits while transmitting.
If SPI_READBACK_ALL is set in 'rxlen' when calling spi_transaction(),
then the received data during transmission is recorded in rxdata buffer
and the function assumes that the real 'rxlen' is equal to 'txlen'.
- add spi_transaction_wait() which is similar to spi_transaction_flush()
but without de-asserting the chip select, so we can chain several
transfers in a single transaction.
Implement them for STM32.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=b:35648259
TEST=on Eve, use the FP sensor with the passthru.
Change-Id: Iebff617acd3230277d36a4f565766b7748721a1d
Reviewed-on: https://chromium-review.googlesource.com/452898
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Todd Broch <tbroch@chromium.org>
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Enable properly the SPI slave command interface to drive the FP MCU from
the main CPU using the EC SPI protocol V3.
Fix the SPI slave driver on STM32L4 along the way:
- the STM32L4 family has the same FIFOs as STM32F0
- on STM32L4, we need to map the DMA requests
- set explicitly the data size (rather than setting an invalid value
which defaults to 8-bit).
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=b:36025702
TEST=On Eve, use the kernel cros_ec_spi driver to communicate with the
FPMCU using the Cros EC SPI protocol V3.
Change-Id: Ib641c141808aa60b3a74611319e18e7a6c3736f0
Reviewed-on: https://chromium-review.googlesource.com/452373
Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Todd Broch <tbroch@chromium.org>
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When sighing prod images it is important to be able to reproduce them
bit for bit. Setting the manifest timestamp filed to a non-zero value
makes sure that this value is used in the header as opposed to the
current time.
Setting the value to 1 guarantees that any dev image with the same
epoch/major/minor field values will be preferred, as it would have a
later timestamp.
BRANCH=none
BUG=none
TEST=verified that two images built with this manifest are exactly the
same (they used to differ before this change).
verified that the header timestamp field is indeed set to 1:
$ od -Ax -t x1 -vd d2/cr50.bin.prod | grep -A1 004350
$ 004350 ff ff ff ff ff ff ff ff ff ff ff ff 00 00 00 00
$ 004360 00 00 00 00 11 00 00 00 01 00 00 00 00 00 00 00
location 0x435c is the epoch_ field offset, 32 bit
epoch/major/minor is set to 0/0/17 and 64 bit timestamp is set to
1.
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Change-Id: I6ea0e664fa3eab7917ca472d715824feec49eb51
Reviewed-on: https://chromium-review.googlesource.com/452956
Commit-Ready: Vadim Bendebury <vbendeb@chromium.org>
Tested-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Marius Schilder <mschilder@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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Without this include, the `watchdog_reload()` function will be compiled
as a noop unless "config.h" is included before "watchdog.h" in whatever
compilation unit requires watchdog functionality.
BUG=none
BRANCH=none
TEST=make buildall -j
Change-Id: I311019753f6d61890be1e475664bd528e5250729
Reviewed-on: https://chromium-review.googlesource.com/449694
Commit-Ready: Jeff Andersen <jeffandersen@google.com>
Tested-by: Jeff Andersen <jeffandersen@google.com>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Follow reef setting.
BUG=none
BRANCH=reef
TEST=Boot to OS
Change-Id: I510b7375dd492882e99fdc7fabeac016455c212c
Signed-off-by: Bruce.Wan <Bruce.Wan@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/452399
Commit-Ready: Bruce Wan <Bruce.Wan@quantatw.com>
Tested-by: Bruce Wan <Bruce.Wan@quantatw.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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Prevent spurious wake when servo is not connected.
BRANCH=none
BUG=b:36119938
TEST=Measure pull up value with a multimeter when servo is not
connected: value around 30k when host in S0 and S3.
Change-Id: I8bd54e4dcfd5c65f1f0cd32ffd4a70cedb979cc2
Reviewed-on: https://chromium-review.googlesource.com/452652
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Follow reef setting
BUG=none
BRANCH=reef
TEST=Boot to OS
Change-Id: I0bc69931c90463cdb04b90cde02f8a7d864a2607
Signed-off-by: Bruce.Wan <Bruce.Wan@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/452419
Commit-Ready: Bruce Wan <Bruce.Wan@quantatw.com>
Tested-by: Bruce Wan <Bruce.Wan@quantatw.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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BRANCH=none
BUG=b:35587173
TEST=hammer console still works when USB is suspended
TEST=idlestats shows that hammer still spends most of its time
in deep-sleep.
Change-Id: I33cb2d7a1a11f425868fc1b6c3490589c6736f84
Reviewed-on: https://chromium-review.googlesource.com/451777
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Uploading CL according EE's requirement.
Need to overwrite PS8751 Address: 0x16, offset: 0xD3, Data: 0x98
BUG=b:36044164
BRANCH=firmware-reef-9042.B
TEST=`make -j BOARD=reef`
Change-Id: I60d5c6724fd047770ddd0af1d204571d59c6e25e
Signed-off-by: Ryan Zhang <Ryan.Zhang@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/451047
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Commit-Queue: Ryan Zhang <ryan.zhang@quanta.corp-partner.google.com>
Tested-by: Ryan Zhang <ryan.zhang@quanta.corp-partner.google.com>
(cherry picked from commit 1c39223ff9f970be69a62cbf4302fa3aa8f57647)
Reviewed-on: https://chromium-review.googlesource.com/452647
Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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Sensors are in the lid, behind the screen.
Similar changes were done for scarlet in c/433222.
BUG=b:35978189
BRANCH=none
TEST=Compile.
Change-Id: I39d7da15ce0b441ec0cac9ad77b0c000225aacc5
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/452793
Tested-by: Rajat Jain <rajatja@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
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BUG=b:35775100
BRANCH=None
TEST=Verified that tablet mode switch events can be seen in evtest.
Event: time 1489093184.754803, -------------- SYN_REPORT ------------
Event: time 1489093196.842930, type 5 (EV_SW), code 1 (SW_TABLET_MODE), value 0
Event: time 1489093196.842930, -------------- SYN_REPORT ------------
Event: time 1489093198.839809, type 5 (EV_SW), code 1 (SW_TABLET_MODE), value 1
Event: time 1489093198.839809, -------------- SYN_REPORT ------------
Change-Id: Id47e817ba12294cc07281df3e04a9d68dec40ee7
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/451582
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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Send EC_HOST_EVENT_MODE_CHANGE upon base attach and detach, to
wake the AP as required. Also, re-factor the code for base detect
status change to allow single function for all actions that need to be
taken on base attach/detach.
BRANCH=none
BUG=b:35775085
TEST=Flash poppy, powerd_dbus_suspend, EC wakes the AP on base
attach. Confirmed in eventlog that wake event is seen by AP:
53 | 2017-03-08 16:44:58 | ACPI Enter | S3
54 | 2017-03-08 16:45:06 | ACPI Wake | S3
55 | 2017-03-08 16:45:06 | EC Event | Mode change
Change-Id: I5b488b32df0454f14a9d784e7564be7e999caadd
Signed-off-by: Nicolas Boichat <drinkcat@google.com>
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/448379
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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The SPI initialization interrupt needs to be generated only when there
was actual data received while CS was asserted and after transaction
finished (i.e. CS is de-asserted).
BRANCH=cr50
BUG=b:35774896
TEST=verified on a bob with updated AP firmware
Change-Id: Ifc4b11870d511d47e9607a2001d845ee1e153f7f
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/452792
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
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