| Commit message (Collapse) | Author | Age | Files | Lines |
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Allow passing a --cq flag to zmake for running a CQ pass. When done,
zmake will remove flaky features such as hypothesis health checks which
cause pytests to fail when taking longer than "expected". Note that the
health checks ignore the deadline set on each function and will still
fail if they deem the test to have run too long.
BRANCH=none
BUG=b:190229270, b:190957007
TEST=sudo emerge chromeos-base/zephyr-build-tools && \
zmake --cq testall
Signed-off-by: Yuval Peress <peress@chromium.org>
Change-Id: Iaf9a38e0bbd65f0be9521019a615279d8b5fbb49
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2977586
Reviewed-by: Simon Glass <sjg@chromium.org>
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gpio_pin_interrupt_configure() without interrupt flag generates the
assert. Change to use gpio_pin_configure().
BUG=b:190731415
BRANCH=none
TEST=Lazor boot to OS screen
Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com>
Change-Id: I2e4b816ba52a8746bb694ad55d551b427868302a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2977861
Reviewed-by: Yuval Peress <peress@chromium.org>
Commit-Queue: Yuval Peress <peress@chromium.org>
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Change PS8811 pre-shoot from 3dB to 1.5dB. This was incorrectly set to
3dB due to a misunderstanding of the datsheet.
BUG=b:186586795
TEST=Boot guybrush
BRANCH=None
Signed-off-by: Rob Barnes <robbarnes@google.com>
Change-Id: I49e150433408fc2b44fafb4bed406166f110fbeb
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2964957
Reviewed-by: Rock Chiu <rock.chiu@paradetech.corp-partner.google.com>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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We don't need to tuning MP2964 timing which already confirmed by MPS.
BUG=b:191719287
BRANCH=none
TEST=make buildall
Signed-off-by: Scott Chao <scott_chao@wistron.corp-partner.google.com>
Change-Id: Ief219d418dee74949b50d99af3580a973198136d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2977868
Reviewed-by: caveh jalali <caveh@chromium.org>
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Disable CONFIG_SYSTEM_UNLOCKED for faft_ec_fw_qual test.
BUG=b:191221606
BRANCH=icarus
TEST=firmware_ECSystemLocked and firmware_PDProtocol.ec_wp
pass.
Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com>
Change-Id: I325078cd04b85fbb91069e6fe2d557d3f64bb6ea
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2977857
Reviewed-by: Chen-Tsung Hsieh <chentsung@chromium.org>
Commit-Queue: Chen-Tsung Hsieh <chentsung@chromium.org>
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BUG=b:191426540 b:191323539
BRANCH=none
TEST=make -j BOARD=gimble
Signed-off-by: Will Tsai <will_tsai@wistron.corp-partner.google.com>
Change-Id: I8662597d49d935027af51ff355efec0da2271a8a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2962199
Reviewed-by: Boris Mittelberg <bmbm@google.com>
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This commit remove sensors and tablet mode, since Chronicler doesn't
support that.
BUG=b:191064600
BRANCH=volteer
TEST=Verified boot without sensors initial.
Signed-off-by: Yu-An Chen <yu-an.chen@quanta.corp-partner.google.com>
Change-Id: Icecae77ba5897ba08a21417c731301b48ac26230
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2962196
Reviewed-by: Raymond Wong <wongraymond@google.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
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The AP_RST_L interrupt is default disabled. It avoids unnecessary power
signal messages in G3/S5 as the signal is floating (no power). The
interrupt is then enabled during S5->S3 and disabled during S3->S5.
However, when sysjump to RW, the interrupt is back to default disabled.
This causes the `apreset` command fails to sample the AP_RST_L signal
and forces to execute a cold reboot sequence.
We should enable AP_RST_L interrupt when the initial power state is S0,
the sysjump to RW scenario.
BRANCH=Trogdor
BUG=b:185551931
TEST=Tested on Coachz, reboot EC, sysjump to RW, perform `apreset` which
executes a warm AP reboot.
Change-Id: I7eae5f2bcacfebeeee529aa7ad96409cfe9122e9
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2977573
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
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Change condition AC >= 40W to boot OS for AC only.
BUG=b:188936765
BRANCH=zork
TEST=manual
1. Insert 45W AC and boot to OS for AC only.
2. EC reset (Refresh + Power button) boot to OS for 45W AC only.
Signed-off-by: Michael5 Chen1 <michael5_chen1@pegatron.corp-partner.google.com>
Change-Id: Ifefbeae97f81b91ccc3996226349f2c19e985da3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2914712
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
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We added the hibernate workaround for the boards without the pull-up
rework. The latest Trogdor revision has the external pull-up. So it
doesn't need the workaround for the bug b/170324206.
BRANCH=None
BUG=b:184071830, b:170324206
TEST=Built the Trogdor image.
Change-Id: I62cb3126b4ed4b2c38f04f0b3c937130c1b6fe9a
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2971866
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
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The older board revisions use a different EC part. No way to support it
using the same EC image. Totally drop the support.
BRANCH=None
BUG=b:184071830
TEST=Built the Trogdor image.
Change-Id: Ib495d69eeb1b4894c87b45ad86a29fd43a0befd9
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2971865
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
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Enable accel sensor fifo on guybrush boards.
The base accel sensor relies on interrupts and fifo.
BUG=b:191619818, b:187620322
TEST=Pass kernel_CrosECSysfsAccel
BRANCH=None
Change-Id: I697d254579fa86fa6ce5748a547142001de8048f
Signed-off-by: Rob Barnes <robbarnes@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2976200
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
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Reduce i2c eeprom port frequency to 400kHz from 1000KHz.
BUG=b:191414126
BRANCH=dedede
TEST=check ectool cbi set/get working in Both source
Signed-off-by: yu-an.chen@quanta.corp-partner.google.com
Change-Id: I00b0b4b7a8657d934bd139b31546147d3c851c20
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2972524
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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When linear precharge is enabled, it may affect
the charging behavior from the primary charger IC.
Therefore as a part of the reset process, we need
to disable linear precharge to make sure primary
charger can work normally.
BUG=b:191347747
BRANCH=dedede
TEST=make BOARD=storo pass, and test C0 port can charge normally.
Signed-off-by: Mike Lee <mike5@huaqin.corp-partner.google.com>
Change-Id: I4c186214aead442fbec99ac0e43df891dd98b302
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2972526
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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For npcx, sysjump to RO needs the PLATFORM_EC_RO_HEADER_SIZE
information in RW image. However, the dependency of
PLATFORM_EC_RO_HEADER lets RW image can't get this information. This CL
removes the dependency of PLATFORM_EC_RO_HEADER in Kconfig for those
configs & lets RW get this information back.
BRANCH=none
BUG=none
TEST='sysjump RO' correct & without abnormal delay.
Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com>
Change-Id: I434216a4bcde6663cf363372206566b210236bad
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2975170
Reviewed-by: Yuval Peress <peress@chromium.org>
Commit-Queue: Yuval Peress <peress@chromium.org>
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This patch fixes the runtime check for pchg_state_text size and adds
BUILD_ASSERT.
BUG=b:182600604, b:173235954
BRANCH=none
TEST=Verify 'ectool pchg 0' prints states properly on CoachZ.
Change-Id: Id6c6bfb979dbb4f11b1ee3dcaa0b7dc0710dfc54
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2973571
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Setup default daughterboard of fw_config to DB_USB3_ACTIVE
BUG=b:191551619
BRANCH=volteer
TEST=Check DUT can initial correct db without fw_config
Signed-off-by: Yu-An Chen <yu-an.chen@quanta.corp-partner.google.com>
Change-Id: Ia963a776ed1cd481699318931be8f12c15487131
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2972535
Reviewed-by: YH Lin <yueherngl@chromium.org>
Commit-Queue: YH Lin <yueherngl@chromium.org>
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Create the initial EC image for the pazquel variant by copying the
trogdor reference board EC files into a new directory named for
the variant.
(Auto-Generated by create_initial_ec_image.sh version 1.5.0).
BUG=b:187232137
BRANCH=Trogdor
TEST=make BOARD=pazquel
Signed-off-by: Yunlong Jia <yunlong.jia@ecs.corp-partner.google.com>
Change-Id: Ic898116fc93a3ac51d50f34b24c13c33a452a25f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2939856
Reviewed-by: Philip Chen <philipchen@chromium.org>
Commit-Queue: Philip Chen <philipchen@chromium.org>
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Set CONFIG_SYV682X_HV_ILIM to 5.5A on voema.
BUG=b:179217436
BRANCH=volteer
TEST=Use i2cxfer check syv682x setting.
Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com>
Change-Id: Ibea60b97014850d7dda5e195dd433f0522ea236e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2965805
Reviewed-by: Zhuohao Lee <zhuohao@chromium.org>
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connector-to-GPIO map:
{-1,-1}, { 0, 5}, { 1, 1}, { 1, 0}, { 0, 6},
{ 0, 7}, {-1,-1}, {-1,-1}, { 1, 4}, { 1, 3},
{-1,-1}, { 1, 6}, { 1, 7}, { 3, 1}, { 2, 0},
{ 1, 5}, { 2, 6}, { 2, 7}, { 2, 1}, { 2, 4},
{ 2, 5}, { 1, 2}, { 2, 3}, { 2, 2}, { 3, 0},
{-1,-1}, { 0, 4}, {-1 -1}, { 8, 2}, {-1,-1},
{-1,-1},
BUG=b:174411155
BRANCH=volteer
TEST=`ectool kbfactorytest` PASS.
Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com>
Change-Id: Id9466e525efba3799bf2d0183de6a0cddc669385
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2944524
Reviewed-by: Zhuohao Lee <zhuohao@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
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connector-to-GPIO map:
{-1,-1}, { 0, 5}, { 1, 1}, { 1, 0}, { 0, 6},
{ 0, 7}, {-1,-1}, {-1,-1}, { 1, 4}, { 1, 3},
{-1,-1}, { 1, 6}, { 1, 7}, { 3, 1}, { 2, 0},
{ 1, 5}, { 2, 6}, { 2, 7}, { 2, 1}, { 2, 4},
{ 2, 5}, { 1, 2}, { 2, 3}, { 2, 2}, { 3, 0},
{-1,-1}, { 0, 4}, {-1 -1}, { 8, 2}, {-1,-1},
{-1,-1},
BUG=b:185095078
BRANCH=volteer
TEST=`ectool kbfactorytest` PASS.
Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com>
Change-Id: Id134930d78a0f33afcc2e87ad09367036883f49a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2944273
Reviewed-by: Zhuohao Lee <zhuohao@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
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connector-to-GPIO map:
{-1,-1}, { 0, 5}, { 1, 1}, { 1, 0}, { 0, 6},
{ 0, 7}, {-1,-1}, {-1,-1}, { 1, 4}, { 1, 3},
{-1,-1}, { 1, 6}, { 1, 7}, { 3, 1}, { 2, 0},
{ 1, 5}, { 2, 6}, { 2, 7}, { 2, 1}, { 2, 4},
{ 2, 5}, { 1, 2}, { 2, 3}, { 2, 2}, { 3, 0},
{-1,-1}, { 0, 4}, {-1 -1}, { 8, 2}, {-1,-1},
{-1,-1},
BUG=b:187622652
BRANCH=volteer
TEST=`ectool kbfactorytest` PASS.
Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com>
Change-Id: I8af839b77466aef9a7d8078b639ab08461935027
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2944523
Reviewed-by: Zhuohao Lee <zhuohao@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
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Ports with cascaded retimers share common load switch and reset pin
hence no need to set the power state of retimer again if the 1st
retimer's power status has already changed. Otherwise, it will add
additional delay to enable the 2nd retimer. Thus, added code to
cache the power state of the retimer per port instead of individual
retimer.
BUG=none
BRANCH=none
TEST=Tested on ADL-P-DDR5 board that has cascaded retimer topology,
no delay added when enabling SOC side retimer.
Change-Id: I4b67b6aca96bf20776424b3e56f382b021d4084d
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2954730
Reviewed-by: caveh jalali <caveh@chromium.org>
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Changed the power handler function name from bb_retimer_power_handle()
to bb_retimer_power_enable() and on_off param to enable.
BUG=none
BRANCH=none
TEST=make buildall -j
Change-Id: Ifad4c71a5d76b4841ea369a991160e221c051ec5
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2973375
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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Also update the tests for printf since the documentation makes no
guarantee about negative size values.
BRANCH=none
BUG=b:190731415
TEST=build brya
TEST=make run-printf
Signed-off-by: Yuval Peress <peress@chromium.org>
Change-Id: I5e773362f1f30a1beb95284e589e49db3a1d8800
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2970989
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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In PD 3.0, the Not_Supported message allows a port partner to let us
know it cannot source Vconn, and therefore we may take over as Vconn
source. This implements the spec state PE_VCS_Force_Vconn for that
scenario.
BRANCH=None
BUG=b:189630178
TEST=on guybrush, connect a charger which doesn't support sourcing Vconn
and observe we probe the cable
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: If7e48db45def602d0989473a84cb2271c03bfe30
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2965845
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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The configurations of pinmux have been moved to
the header file of it8xxx2-pinctrl.h.
BUG=b:185202623
BRANCH=none
TEST=pinmux control is normally.
Cq-Depend: chromium:2964460
Signed-off-by: tim <tim2.lin@ite.corp-partner.google.com>
Change-Id: I2ee179f660fdc4a15c3d6a8630988d77134bb4b1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2905677
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
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This patch makes test_fuzz_one_input acquire a lock before waiting
on done_cond and makes irq_task acquire a lock before signaling
done_cond. Otherwise, undefined behavior would result.
BUG=b:190841496, chromium:1221266
BRANCH=trogdor
TEST=make run-pchg_fuzz
TEST=pchg_fuzz.exe -seed=1 -runs=1000000 -dict=fuzz/pchg_fuzz.corpus
Change-Id: Ic5572bae7c8764d44a7872869c5f8e9b4503280b
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2971867
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Remove bringup configs to generate locked image for production.
BRANCH=dedede
BUG=b:191235324
TEST=make -j BOARD=sasukette
Signed-off-by: Zhongtian Wu <wuzhongtian@huaqin.corp-partner.google.com>
Change-Id: Ia0f76d2d2a6c423c1f3ff2781fe7a2e099407ed4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2972164
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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Create the initial EC image for the gimble variant by copying
the brya reference board EC files into a new directory named for
the variant.
(Auto-Generated by create_initial_ec_image.sh version 1.5.0).
BUG=b:190334274
BRANCH=None
TEST=make BOARD=gimble
Signed-off-by: Mark Hsieh <mark_hsieh@wistron.corp-partner.google.com>
Change-Id: Ia740667582e0f53bfc6afb37d23edf8c2d1d543e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2944517
Reviewed-by: Scott Chao <scott_chao@wistron.corp-partner.google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: Scott Chao <scott_chao@wistron.corp-partner.google.com>
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Add KB800x driver. Add config options to Kconfig.
BUG=b:168930682
TEST=On Volteer, check USB4, TBT3, DPMF, DP, and USB3 functionality
BRANCH=none
Signed-off-by: Eric Herrmann <eherrmann@chromium.org>
Change-Id: Ic71b0d4236037522455a0561ba87fd9a874a4968
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2930581
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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Update power_policy.c to support API changes in v2.6.
BRANCH=none
BUG=b:190731415
TEST=build brya with both 2.5 and 2.6
Change-Id: I757b465e03f8da30e1f00d6bde8234e1434e90db
Signed-off-by: Yuval Peress <peress@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2970988
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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Zephyr v2.6 changed the gpio APIs. Use the IS_ZEPHYR_VERSION.
BRANCH=none
BUG=b:190731415
TEST=build brya
Signed-off-by: Yuval Peress <peress@chromium.org>
Change-Id: Ib0f6192cda63019c19dffcb9529e01b356715e58
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2970987
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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BRANCH=none
BUG=none
TEST=(see next CL, added check to shim/src/gpio.c and tested the build)
Signed-off-by: Yuval Peress <peress@chromium.org>
Change-Id: I2e53a1531e02aebc3648282c9fcbc2bacd7aa0b3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2970986
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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In Zephyr v2.6 we no longer have the option of setting the output file
name. Set it to match so projects can build with either 2.5 or 2.6
BRANCH=none
BUG=b:190731415
TEST=build projects with 2.5 and 2.6
Signed-off-by: Yuval Peress <peress@chromium.org>
Change-Id: I3637e832eeac43e497f31dd1bf60bcd525b4497c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2970985
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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Explicitly add PM=y which is needed for Zephyr 2.6
BRANCH=none
BUG=b:190731415
TEST=build against v2.6
Change-Id: I7254cef478e6f17fce9b70ba265cdd94089c7112
Signed-off-by: Yuval Peress <peress@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2970984
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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Add support to the configuration schema to allow kernel 2.6 builds.
BRANCH=none
BUG=b:190731415
TEST=manually updated zmake.yaml to v2.6 and made sure it validates
Cq-Depend: chrome-internal:3904822
Signed-off-by: Yuval Peress <peress@chromium.org>
Change-Id: I350eaf81c4ebd3f708f60a5138e093745f0012fc
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2970983
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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In hdctools/servo/data/servo_micro.xml 'fw_wp_en' control is described
as "Enables forwarding of write-protect gpio. Must assert this
and set fw_wp_vref prior to changing fw_wp.". It means that it needs
to be enabled, but write protect state is controlled by 'fw_wp'.
There is also 'fw_wp_state' control which is convenient wrapper for
this. It sets 'fw_wp_en', 'fw_wp_vref' and 'fw_wp'.
BUG=b:170432597
BRANCH=none
TEST=Connect icetower using microservo.
sudo servod --board icetower
./test/run_device_tests.py --board dartmonkey
--test flash_write_protect
Make sure that test is passed and HOST MCU WP diode glows
during test. Don't use 'dut-control' to set write protect state.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Cq-Depend: chromium:2928423
Change-Id: Ia6164e877549956e8efb7fb5cd47d8c0d5ce2872
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2929119
Reviewed-by: Craig Hesling <hesling@chromium.org>
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BUG=b:189857004
BRANCH=none
TEST=ap console 'ectool motionsense'
TEST=ap console 'ectool motionsense lid_angle'
TEST=verify lid angle will enable/disable tablet mode
Signed-off-by: Denis Brockus <dbrockus@google.com>
Change-Id: I81b0c7883fe7f968f8226d0101e27ee03676097c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2964956
Tested-by: Denis Brockus <dbrockus@chromium.org>
Auto-Submit: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Yuval Peress <peress@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
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When the NCT3807 boots in dead battery mode, it may neglect to drive its
EN_SNK line until reset. This commit prevents us from changing charge
ports when we're in dead battery boot and there's insufficient power to
withstand Vbus loss. When there is enough power, we'll reset the dead
battery TCPC before enabling sinking on the new charge port. This will
cause an interruption to the PD connection on the original port, which
would manifest in loss of USB and DP connections.
BRANCH=None
BUG=b:183660105
TEST=on guybrush, confirm we can switch ports with sufficient battery
charge and do not pass through voltage from one port to the other
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: If4512c9a5dee162af41d03fef9979d760f4b1a95
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2953877
Reviewed-by: Rob Barnes <robbarnes@google.com>
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The NCT38xx driver is now storing boot information which should be
cleared whenever the TCPC is forcibly reset through the reset line. Add
these reset calls to all zork boards.
BRANCH=None
BUG=None
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I89089a32d4d17dc260df7928028c2dc5fef45aa2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2965846
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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Add a notification to the NCT38xx driver once a port has been reset.
Also make the port reset function knowledgable about the parameters it
needs so it can be more easily used elsewhere.
BRANCH=None
BUG=b:183660105
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I2ac1cf50d8a82129f4a930b4984b9f2edac83b11
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2953876
Reviewed-by: Rob Barnes <robbarnes@google.com>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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By putting all object files in a single LTO partition there's less
room to optimize the build time using multi-threading. On the upside,
the build becomes more reproducible and the build result tends to be
smaller thanks to better optimization opportunities.
This is needed on gcc 11 for now build kodama: without it, the code
grows beyond the bounds it needs to fit in (that gcc 8 manages to hold,
so a regression).
BUG=none
BRANCH=none
TEST=one class of error less with gcc 11
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Change-Id: I86b2c70cb5a2e85024630e7217cf8bd24d349910
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2959922
Reviewed-by: Eric Yilun Lin <yllin@google.com>
Commit-Queue: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
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Otherwise the code is compiled in (and then discarded presumably),
just that gcc 11 doesn't like working on zero-sized arrays.
BUG=none
BRANCH=none
TEST=one class of error less with gcc 11
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Change-Id: Ia68aa138993794941e9cde99dc9d2547d05d7f99
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2959921
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Commit-Queue: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
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There's little point in providing the PWM API, which needs a channel
id _everywhere_ when the corresponding enum defines to channels.
gcc 11 complains about trying to access something in a zero-sized
pwm_res array.
BUG=none
BRANCH=none
TEST=one class of error less with gcc 11
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Change-Id: I366650c4cecc85493bce626091aba5eecc034039
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2959920
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Commit-Queue: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
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This patch excludes RV32I core specific data in panic data structure
for nocturne device to keep the same size of the structure in
nocturne EC RO and ToT EC. This is necessary to prevent panic data
corruption and access jump data correctly (see bug in description
for more details).
Nocturne doesn't include RV32I panic data in its EC RO panic data
structure (checked include/panic.h on nocturne EC RO commit:
`git show d118ba10a:include/panic.h`).
BUG=b:165773837, b:160676144
BRANCH=none
TEST=Run EC ToT on Nocturne. Make sure you are in EC RW.
Crash EC using 'crash assert'. Make sure that EC RW after sysjump
doesn't report unknown reset cause.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Change-Id: I5e9ef694c50e3271fe66fb4ac985da4e0924b734
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2965923
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
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Compiler in nocturne cros SDK doesn't allow for variable declaration
inside for loop. This patch removes variable declaration inside for
loop in code which is used by nocturne board.
This patch doesn't introduce any logical changes.
BUG=b:160676144
BRANCH=none
TEST=Make sure EC points to commit on cros/main.
On nocturne SDK:
cros_workon-nocturne start chromeos-ec
emerge-nocturne chromeos-ec chromeos-bootimage
Make sure that firmware compiles
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Change-Id: I75ff21d966d5e353d1f7873695127bac4357fb32
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2965922
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
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BUG=none
BRANCH=none
TEST=one class of error less with gcc 11
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Change-Id: I7c0d2b28ae7805b390e485ff69ec0f6c2a7d5e98
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2959919
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Commit-Queue: Patrick Georgi <pgeorgi@chromium.org>
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If memcpy/memset/memcmp/memmove aren't used early enough in link time
optimization, it's possible that the linker already discarded them only
to complain about missing symbols later-on because some late
optimization stage added references to them.
To deal with that, we could either disable lto for util.o or just mark
these 4 functions as "used". Since they're inevitably used _somewhere_
in the code, the latter doesn't have any impact on binary size.
See discussion at https://gcc.gnu.org/bugzilla/show_bug.cgi?id=58203
BUG=none
BRANCH=none
TEST=one class of error less with gcc 11
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Change-Id: I2e0c60c5ca461d32a28dca8df7b33abb709b441f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2959918
Reviewed-by: Edward Hill <ecgh@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Commit-Queue: Patrick Georgi <pgeorgi@chromium.org>
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Disable PWM_CH_LED2 (Green) at init.
PWM_CH_LED1 -> amber, PWM_CH_LED3 -> blue
LED Behavior:
Charge(S0/S3/S5) Amber on
Full Charge(S0/S3/S5) Blue on
Discharge in S3 Amber on 1s off 3s
Discharge in S5 Off
Discharge in S0 Blue on
Battery Error Amber on 1s off 1s
Factory mode Blue on 2s Amber on 2s
BUG=none
BRANCH=none
TEST=LED behavior meets the SPEC
Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com>
Change-Id: I8ee8188b6f60434b400a5e245e3cb9186a9a7338
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2966521
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
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