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* usb_mux: Add driver interface for USB-C muxesShawn Nematbakhsh2015-06-3032-644/+853
| | | | | | | | | | | | | | | | | | | | In preparation for adding support for additional USB-C mux chips, add a new high-level USB-C mux interface usb_mux.c. usb_mux functions are now called from pd code instead of board-level functions. usb_mux calls down into a mux chip-specific driver (currently pi3usb30532) or board-specific drivers which toggle GPIOs (for legacy boards). BUG=chrome-os-partner:41696 TEST=Manual on Glados in subsequent commit. Verify set() and get() functions set and return consistent values. Verify that USB SS device functions when muxes are set to dock or USB. Also, verify that DP dongle and USB SS device are functional on both PD ports on samus_pd. BRANCH=None Change-Id: Ib6477f489310f3be1430585ea09fea26f57e3752 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/281435 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* tcpc: update tcpci registers to latest specAlec Berg2015-06-306-74/+70
| | | | | | | | | | | | | | | Update TCPCI registers to version 0.62 of PD Interface specification. BUG=none BRANCH=none TEST=test on glados and samus Change-Id: I57338b385123371e90f3b79b84e652af15be1bf1 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/282067 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* pd: refactor tcpm and move alert function to tcpm driverAlec Berg2015-06-308-192/+265
| | | | | | | | | | | | | | | Refactor the tcpm/tcpc split such that the tcpm driver implements the alert functionality since it may be unique for different tcpc chips. BUG=chrome-os-partner:41842 BRANCH=none TEST=make -j buildall. run on samus and glados. Change-Id: I23f2d7f8627d5337b8d001a09bf27622be24fe33 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/281631 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* oak: set a debounce time for suspend signalBen Lok2015-06-301-1/+13
| | | | | | | | | | | | | | | | | The suspend signal from SoC of oak should be kept at least 50ms. Add a debounce time for suspend singal detection, to avoid transient state during SoC boot up. BUG=chrome-os-partner:42023 BRANCH=none TEST=plug PD power adaptor to type-c port C1, The keyboard should be worked (Ensure EC communication is oaky) Change-Id: I4a6bb4e8ba9d417fe2a3045846d38b2129516d78 Signed-off-by: Ben Lok <ben.lok@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/282471 Reviewed-by: Rong Chang <rongchang@chromium.org> Commit-Queue: Nicolas Boichat <drinkcat@chromium.org>
* flash_ec: Add support for kunimitsu, kunimitsu_pd, and strago_pdKevin K Wong2015-06-301-0/+4
| | | | | | | | | | | BUG=none TEST=Verified EC and PD is able to flash on kunimitsu and strago BRANCH=none Change-Id: I31b9ed57d4cd7a1c09cedbf9c873e76770abd3c8 Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com> Reviewed-on: https://chromium-review.googlesource.com/282000 Reviewed-by: Shawn N <shawnn@chromium.org>
* it8380dev: add i2c control moduleDino Li2015-06-3013-32/+603
| | | | | | | | | | | | | | | | | | | | Add i2c control module for emulation board. To rename CONFIG_ to CONFIG_IT83XX_ for IT83XX series configuration. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=1. console command "i2cscan" found devices correctly. 2. console command "i2cxfer". 2-a. port2 + battery, i2cxfer r, r16, and rlen OK. 2-b. port1 + slave evb, i2cxfer r, r16, rlen, w, and w16 OK. Change-Id: I67165f7dcdef538ba6dd03b47f1621a73cc68379 Reviewed-on: https://chromium-review.googlesource.com/263678 Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw>
* kunimitsu: Update gpio according to fab3 hardware changesKevin K Wong2015-06-301-14/+13
| | | | | | | | | | | BUG=none TEST=Verified system can boot to OS and able to do PD negotiation. BRANCH=none Change-Id: Ie232954931984256887f953d387e56baccba2178 Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com> Reviewed-on: https://chromium-review.googlesource.com/282390 Reviewed-by: Shawn N <shawnn@chromium.org>
* kunimitsu: add initial PD supportKevin K Wong2015-06-306-24/+626
| | | | | | | | | | | | | | | | | | This is based off glados commit: glados: limit type-C voltage to 5V to increase charging reliability Change-Id: I4d67b62a18cf40d645b132081a431f9ce187168b Reviewed-on: https://chromium-review.googlesource.com/276366 BUG=none TEST=Verified PD negotiate on Port 0 on Kunimitsu Fab2. Port 1 is also functional after hardware changes. BRANCH=none Change-Id: I0cb1edcf1703f55882f81c65e6359a45be4c1629 Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com> Reviewed-on: https://chromium-review.googlesource.com/281833 Reviewed-by: Shawn N <shawnn@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org>
* honeybuns: Update VDM information for DisplayPortScott2015-06-306-91/+319
| | | | | | | | | | | | | | | | | | | Updated the VDM information to handle properly the DisplayPort alternate mode. Switch to 2+2 (DP+USB3.0) if mode D is entered else use 4 lanes of DP for mode C. Set the Multi-Function Preferred bit, so laptops select the mode D. BUG=none BRANCH=none TEST=Tested with samus. Verified we get 36W of power + USB2.0 key + USB3.0 key + external DP display. Change-Id: I95e3b3640fd5952faeb24312e387468aed6266c7 Signed-off-by: Scott Collyer <scollyer@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/267688 Reviewed-by: Todd Broch <tbroch@chromium.org>
* util: Add config option checker.Aseda Aboagye2015-06-271-0/+103
| | | | | | | | | | | | | | | | | | | | | There are several cases in the EC code base where a CONFIG_* option is used somewhere, but not defined within the include/config.h file. This script aims to fix that. Eventually, it will become a presubmit hook to actively prevent future offenses. BUG=chrome-os-partner:26304 BRANCH=none TEST=cros lint --debug util/config_option_check.py TEST=Ran script and found offending config options. TEST=make -j buildall tests Change-Id: I999d32ebacc636b3fff9e857f3cc46feee475e80 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/281626 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Trybot-Ready: Aseda Aboagye <aaboagye@chromium.org>
* tegra: enable EC sleep in S3Vic Yang2015-06-261-1/+2
| | | | | | | | | | | | | | | | | In S3, the EC isn't expecting AP host commands, so it's safe to enable sleep. BRANCH=Ryu BUG=chrome-os-partner:36918 TEST=Check sleep mask in S0 and S3. Also check sleep mask after sysjump with AP on and with AP off. Change-Id: I67f0634631f62ee571e18d2870cd4a6926d4e090 Signed-off-by: Vic Yang <victoryang@google.com> Reviewed-on: https://chromium-review.googlesource.com/251750 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* honeybuns: manage USB and DP hardwareVincent Palatin2015-06-265-24/+66
| | | | | | | | | | | | | | | | | | | Get the USB hub out of reset only when there is a USB host, same thing for the DisplayPort hardware. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=chrome-os-partner:37078 TEST=Plug and un-plug Honeybuns to Samus. See both the USB devices connected and the external display. Change-Id: Iabbeb0650d18c4c0c3324f47d99f9aaa35601c16 Reviewed-on: https://chromium-review.googlesource.com/281927 Trybot-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* nuc: Add SHI driver for arm-based platform in chip folder.Ian Chao2015-06-2640-681/+2094
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add npcx_evb_arm board-level driver for arm-based platform. Add header.c: for booting from NPCX5M5G A3 Booter. Remove lfw folder due to those functionalitie have been replaced with Booter Modified drivers for Patch Set 1: 1. flash.c: Implement UMA lock, tri-state and selection register lock functionalities 2. hwtimer.c: Add ITIM32 for hwtimer 3. lpc.c: Add checking for LRESET 4. system.c: Modified CODERAM_ARCH functions for NPCX5M5G A3 Booter. 5. uart.c: Add support for module 2 Patch Set 2: 6. lpc.c: Modified lpc_get_pltrst_asserted() func Patch Set 3: 7. minimize the changes for CONFIG_CODERAM_ARCH in common layer 8. comments of Patch Set1/2 Patch Set 4: 9. Modified CONFIG_RO_MEM_OFF point to ro image and keep header as a part of ec.RO.flat. 10. Fixed RO_FRID and RW_FRID issues which caused by CONFIG_CODERAM_ARCH. Patch Set 5: 11. Modified system.c in common folder for supporting *_STORAGE_OFF. 12. Use *_STORAGE_OFF in firmware_image.lds.S to indicate flat file layout in flash. Patch Set 6: 13. rebase to newest version 14. system.c: Modified for the newest include/system.h Patch Set 7: 15. Merge from version 0625 BUG=chrome-os-partner:34346 TEST=make buildall -j; test nuvoton IC specific drivers BRANCH=none Change-Id: Ifd7c10b81b5781ccd75bb2558dc236486976e8ed Signed-off-by: Ian Chao <mlchao@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/272034 Reviewed-by: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Commit-Queue: Shawn N <shawnn@chromium.org>
* kunimitsu: Code clean up.Kevin K Wong2015-06-266-238/+250
| | | | | | | | | | | | | | This allows cleaner code diff from glados. No new functional change is added. BUG=none TEST=Able to boot kunimitsu to OS. BRANCH=none Change-Id: I0ff7a097a617907a44c78d5e0f01dc409eb047ec Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com> Reviewed-on: https://chromium-review.googlesource.com/281832 Reviewed-by: Shawn N <shawnn@chromium.org>
* honeybuns: transform into a real multi-voltage PD sourceVincent Palatin2015-06-263-15/+39
| | | | | | | | | | | | | | | | | | | | | | Switch it to a source-only PD device (as it is) and add the voltage selection code. For now, output 12V only for 20V request as the 5V->20V transition is not monotonic, triggering disconnection detection. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=samus BUG=chrome-os-partner:37078 chrome-os-partner:41860 TEST=connect to Samus and see it negotiate 5V then 20V, then manually switch to 12V. Change-Id: I4fc198245999ff9ce8fec929f305681043d72965 Reviewed-on: https://chromium-review.googlesource.com/259113 Trybot-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* Fix assertion crash in __wait_evt()Chiranjeevi Rapolu2015-06-2511-3/+105
| | | | | | | | | | | | | | | | | | | | | | | | mutex_lock() is called from MEC1322_IRQ_ACPIEC0_IBF interrupt context, causing deadlock and assertion in __wait_evt(). In the interrupt context it now checks for mutex lock first. If the mutex is already locked,, it will disable ACPI interrupts and defer the memmap mutex lock. Added LPC interrupt disable/enable functions as needed. Increased deferred function count where needed. BRANCH=None BUG=chrome-os-partner:40820 TEST=Test for suspend-resume, cold, warm reboots and other general stability. Change-Id: I3dda0d4635a6b6281faf200c8c7b6fcba8877254 Signed-off-by: Chiranjeevi Rapolu <chiranjeevi.rapolu@intel.com> Reviewed-on: https://chromium-review.googlesource.com/280418 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org> Commit-Queue: Divya Jyothi <divya.jyothi@intel.com> Tested-by: Divya Jyothi <divya.jyothi@intel.com>
* oak: enable tmp432 thermal sensorYH Huang2015-06-252-0/+47
| | | | | | | | | | | | | | | | | | This change enables tmp432 thermal sensor. Enter "tmp432" or "temps" in ec console and get temperature information. BRANCH=none BUG=none TEST=manual Enter "tmp432" to get temperature information. Connect the battery and enter "temps" to get temperature information. Change-Id: Ie7a9fb4541c5cb3cfa6a26e95f99fe4aacb3a3d3 Signed-off-by: YH Huang <yh.huang@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/280956 Reviewed-by: Rong Chang <rongchang@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org>
* oak: power: add the console command "power on/off"YH Huang2015-06-251-1/+60
| | | | | | | | | | | | | | Add the console command "power on/off" for AP power on/off. BRANCH=none BUG=none TEST=manual enter "power on/off" in the ec console to turn AP power on/off. Change-Id: I16d2af72bc1bf045e7672acd9471dff0a672aff5 Signed-off-by: YH Huang <yh.huang@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/280957 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* it8380dev: add fan control moduleDino Li2015-06-2510-34/+908
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. pwm, add frequency select function for pwm channels. 2. timer, add external timer 3~8 apis. 3. add fan control module for emulation board. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=console command "faninfo, fanset, fanduty, and fanauto" fanset 3333 Setting fan 0 rpm target to 3333 faninfo Actual: 3390 rpm Target: 3333 rpm Duty: 35% Status: 1 (changing) Mode: rpm Auto: no Enable: yes faninfo Actual: 3301 rpm Target: 3333 rpm Duty: 34% Status: 2 (locked) Mode: rpm Auto: no Enable: yes fanduty 80 Setting fan 0 duty cycle to 80% faninfo Actual: 5952 rpm Target: 3333 rpm Duty: 80% Status: 2 (locked) Mode: duty Auto: no Enable: yes faninfo Actual: 5971 rpm Target: 3333 rpm Duty: 80% Status: 2 (locked) Mode: duty Auto: no Enable: yes fanauto faninfo Actual: 3330 rpm Target: 3333 rpm Duty: 36% Status: 2 (locked) Mode: rpm Auto: yes Enable: yes fanset 8000 Setting fan 0 rpm target to 8000 faninfo Actual: 6793 rpm Target: 8000 rpm Duty: 100% Status: 3 (frustrated) Mode: rpm Auto: no Enable: yes fanset 3456 Setting fan 0 rpm target to 3456 faninfo Actual: 5053 rpm Target: 3456 rpm Duty: 56% Status: 1 (changing) Mode: rpm Auto: no Enable: yes faninfo Actual: 3440 rpm Target: 3456 rpm Duty: 34% Status: 2 (locked) Mode: rpm Auto: no Enable: yes /* force stop the fan */ [87.035136 Fan 0 stalled!] [87.035520 event set 0x00000400] [88.035712 Fan 0 stalled!] [89.036288 Fan 0 stalled!] [90.036864 Fan 0 stalled!] [91.037440 Fan 0 stalled!] [92.038016 Fan 0 stalled!] [93.038592 Fan 0 stalled!] [94.039168 Fan 0 stalled!] /* release */ faninfo Actual: 3427 rpm Target: 3456 rpm Duty: 35% Status: 2 (locked) Mode: rpm Auto: no Enable: yes Change-Id: Icbe1917902d033a8be42b8d834ffc6045d08b985 Reviewed-on: https://chromium-review.googlesource.com/266625 Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw>
* config: Add missing config options to config.hAseda Aboagye2015-06-251-0/+192
| | | | | | | | | | | | | | | | | | | There were many CONFIG_* options that were not defined in include/config.h. This commit fixes that by adding those config options that were missing with a brief description of each. BUG=chromium:496893 BRANCH=none TEST=Verified that every mention of CONFIG_* is in include/config.h. TEST=make -j buildall tests Change-Id: Ie60756a8dd48d12b3e9b775639f409455dc5656f Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/281785 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Trybot-Ready: Aseda Aboagye <aaboagye@chromium.org>
* power: ryu: ignore lid open eventsVincent Palatin2015-06-253-1/+6
| | | | | | | | | | | | | | | | | | Do not start the AP on lid open events, in order to avoid spurious startup due to magnet magic. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=smaug BUG=chrome-os-partner:41601 TEST=Play with 2 Ryu EVT2 stacked one on top of the other. Change-Id: I530d54f61d0674caddf20d1b17268c971f639f2f Reviewed-on: https://chromium-review.googlesource.com/281667 Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Trybot-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* pd: create driver/tcpm/ to hold TCPM driversAlec Berg2015-06-245-4/+6
| | | | | | | | | | | | | | | | Create driver/tcpm/ folder to hold TCPM drivers. Currently the two drivers are a stub driver which is used when TCPM and TCPC are on the same MCU and can make direct calls between the two and the TCPCI driver which implements the standard TCPCI protocol. BUG=chrome-os-partner:41842 BRANCH=none TEST=make -j buildall Change-Id: Ie4d9b36eb33155254f8b87b83861f98a7a80693a Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/281630 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* bq2589x: ryu: enable IR compensationVincent Palatin2015-06-244-0/+42
| | | | | | | | | | | | | | | | | | | | | | Set the resistance compensation for the charger IC according to the EE team measurements : - Resistance compensation = 60 mOhm - Voltage clamping = 160 mV - Thermal regulation = 120C Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=smaug BUG=chrome-os-partner:38603 TEST=dump the BQ25892 registers by using the "bq25" command and see that REG08 contains 0x77. Change-Id: I90e9ea4569d77fd90ed0290ec78e66810d744648 Reviewed-on: https://chromium-review.googlesource.com/281660 Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
* ryu: add missing PD power eventsVincent Palatin2015-06-242-0/+24
| | | | | | | | | | | | | | | | | | | | Send PD_EVENT_POWER_CHANGE events for all changes in the type-C/PD configuration to ensure we are not missing any transition from the AP. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=smaug BUG=chrome-os-partner:41676 TEST=On Ryu, plug and unplug type-C chargers, C-to-A receptacle adapters and A-to-C cables and see the proper "extcon" traces in the kernel log. Change-Id: I918b9c42867f069852a2222b0f47ef0df8d124aa Reviewed-on: https://chromium-review.googlesource.com/280870 Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
* it8380dev: add peci control modulestabilize-7204.BDino Li2015-06-248-3/+492
| | | | | | | | | | | | | | | | | | | Add peci control module for emulation board. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=1. console command "pecitemp" get CPU temperature normally. 2. console command "peci" manual test peci commands. (GetDIB, GetTemp, RdPkgConfig, and WrPkgConfig) Change-Id: I48b63a391adf04f159adca401acb369a6acc3799 Reviewed-on: https://chromium-review.googlesource.com/265171 Reviewed-by: Alec Berg <alecaberg@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw>
* glados: Add battery temp to temp_sensors list.Aseda Aboagye2015-06-242-0/+24
| | | | | | | | | | | | | | | | | | BUG=chrome-os-partner:15461 BUG=chrome-os-partner:40599 BRANCH=none TEST=Flashed EC image on glados and verified "temps" command on EC console displayed battery temperature. TEST=make -j buildall tests Change-Id: I1df6aab054aee0b5658a90ad736af7dc9a9679e3 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/281213 Reviewed-by: Alec Berg <alecaberg@chromium.org> Tested-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Trybot-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Shawn N <shawnn@chromium.org>
* mec1322: Correctly get reset causeDivya Jyothi2015-06-242-2/+25
| | | | | | | | | | | | | | | | | | Since the reset cause was not recorded correctly recovery mode(Esc+Refresh+Power) was not working. With this change power-on reset state and VCC1_RST# only state are distinguinshed. BUG=chrome-os-partner:41479 BRANCH=none TEST=Esc+Refresh+Power boots to recovery screen Refresh+Power reboots the system Change-Id: I63eff488c970302e7afe8a677a57ad27d4d9918e Signed-off-by: Divya Jyothi <divya.jyothi@intel.com> Signed-off-by: Freddy Paul <freddy.paul@intel.com> Reviewed-on: https://chromium-review.googlesource.com/280782 Reviewed-by: Shawn N <shawnn@chromium.org>
* Add board for USB PD chip evaluationVincent Palatin2015-06-249-0/+665
| | | | | | | | | | | | | | | | | | | | Base board configuration to evaluate USB PD interface chip by connecting them a STM32F072 Discovery board. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=chrome-os-partner:41497 TEST=Flash the STM32F072 discovery using the following command: make flash BOARD=pdeval-stm32f072 then connect to the EC console through the USB port. Change-Id: Ie3f5dcd04c077be49fbacc020f7af4f298039e8a Reviewed-on: https://chromium-review.googlesource.com/277713 Tested-by: Alec Berg <alecaberg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Alec Berg <alecaberg@chromium.org>
* pd: allow pdcmd task to check TCPC alert status w/o sending HCAlec Berg2015-06-236-17/+37
| | | | | | | | | | | | | | | | | | | | | | Modify PDCMD task to allow for TCPCs that do not support host commands. CONFIG_HOSTCMD_PD is a new config option to be used by TCPCs that implement our host command protocol such as the PD MCU on glados and oak. Otherwise, the PDCMD task will not send host commands and will be used simply to check TCPC interrupt status. BUG=none BRANCH=none TEST=test on glados and samus and make sure we can send host commands from the EC to the PD and that we can negotiate a PD contract. Change-Id: I618badb5db3f9e490ae4eedfdb2a0c54513496ff Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/278215 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* oak: power off ap if reboot ap-offYH Huang2015-06-231-22/+28
| | | | | | | | | | | | | | | When ec gets the console command "reboot ap-off", turn off ap. BRANCH=none BUG=none TEST=manual Enter "reboot ap-off" in ec console and then ap is off. Change-Id: Iba2c3743ae37ee9ceaadba58752d2129fb00d3a8 Signed-off-by: YH Huang <yh.huang@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/277976 Reviewed-by: Rong Chang <rongchang@chromium.org> Commit-Queue: Rong Chang <rongchang@chromium.org>
* pd: Add support for TCPC Alert and Alert_Mask registersScott2015-06-239-126/+320
| | | | | | | | | | | | | | | | | | | Changed the alert function to hold the ec_int line until all of the alert bits are cleared. Added support for the alert_mask register. In addition, created ec_int_status variable to distinguish which of 3 ec_int sources is driving the pd_mcu_int line. BUG=none BRANCH=tot TEST=Tested Zinger to Glados and Zinger to Samus and verified that it established a power contract in both cases. Did not test Oak, but put exact same changes in board.c as in glados. Change-Id: I372e75b8fd5d66a0c01db18b46100b86fd9ac064 Signed-off-by: Scott Collyer <scollyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/278256 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* oak: glados: fix USB PD power and data swap refactoringstabilize-7202.BAlec Berg2015-06-232-14/+38
| | | | | | | | | | | | | | Fix USB PD check power and data swap functions after those functions have been refactored and the args changed. BUG=chrome-os-partner:41739 BRANCH=none TEST=make -j buildall Change-Id: I746774563d475710dc23c7290328fab150eaac6a Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/280993 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* samus: Add battery temp to temp_sensors list.Aseda Aboagye2015-06-232-0/+6
| | | | | | | | | | | | | | | | | | BUG=chrome-os-partner:15461 BUG=chrome-os-partner:40599 BRANCH=none TEST=Flash EC image onto samus and verify that "temps" EC console command displays the battery temperature. TEST=Boot samus and verify that "ectool temps all" from developer console shows the battery temperature. TEST=make -j buildall tests Change-Id: I7db5981f876745a5d8711fd54cc02d77862417db Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/281026 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* it8380dev: add sspi control moduleDino Li2015-06-237-3/+176
| | | | | | | | | | | | | | | | | | | | | | | | Add sspi control module for emulation board. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=EVB + Winbond W25Q80 SPI ROM To define CONFIG_SPI_FLASH, CONFIG_SPI_FLASH_SIZE, and CONFIG_SPI_FLASH_W25X40 console "spi_flashinfo" can get SPI information > spi_flashinfo Manufacturer ID: ef Device ID: 40 14 Unique ID: c8 60 84 a1 1f 6a 7f 2f Capacity: 1024 MB Change-Id: I6c4d4d977536484d47a2207ed80dd0ea08a7c8fd Reviewed-on: https://chromium-review.googlesource.com/267403 Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Dino Li <dino.li@ite.com.tw> Tested-by: Dino Li <dino.li@ite.com.tw>
* power: skylake: Delay 10ms before deasserting PCH_RSMRST_Lstabilize-7199.BShawn Nematbakhsh2015-06-201-1/+17
| | | | | | | | | | | | | | | According to spec, RSMRST shouldn't be deasserted until 10ms after power signals become active. BUG=chrome-os-partner:41556 TEST=Manual on Glados. Verify that AP boots to S0 on power-on, goes to G3 on apshutdown, and back to S0 on powerbtn. BRANCH=None Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I0acc897fff7c18ad83fc87734569ec7639ae5cf4 Reviewed-on: https://chromium-review.googlesource.com/280571 Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
* cleanup: fix all the header guardsBill Richardson2015-06-18157-462/+462
| | | | | | | | | | | | | | | This unifies all the EC header files to use __CROS_EC_FILENAME_H as the include guard. Well, except for test/ util/ and extra/ which use __TEST_ __UTIL_ and __EXTRA_ prefixes respectively. BUG=chromium:496895 BRANCH=none TEST=make buildall -j Signed-off-by: Bill Richardson <wfrichar@chromium.org> Change-Id: Iea71b3a08bdec94a11239de810a2b2e152b15029 Reviewed-on: https://chromium-review.googlesource.com/278121 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* flash_ec: remove unused USB and unprotect optionsMyles Watson2015-06-182-58/+8
| | | | | | | | | | | | | | There is no need for the usb flag, remove it. There is no need for the unprotect flag, remove it. BRANCH=none BUG=chrome-os-partner:22990 TEST=run flash_ec before and after Change-Id: I201bad7f5be63a90bb8168e21baef2c6fa8d85b4 Signed-off-by: Myles Watson <mylesgw@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/273904 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* ryu: update recovery key combinationsVincent Palatin2015-06-182-9/+29
| | | | | | | | | | | | | | | | | | | | Update the recovery key combination to: power key + volume up when the AP is off. Add a fastboot key combination: power key + volume down when the AP is off. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=smaug BUG=chrome-os-partner:41629 TEST=on Ryu, shutdown the AP, press "power+volup" or "power+voldown" and see the right trace. Change-Id: I42cf368d42885717758fc4b494af5c8a16fc58b0 Reviewed-on: https://chromium-review.googlesource.com/278323 Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* cleanup: Don't shadow NULL with an enumBill Richardson2015-06-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | For the few platforms without gpio.inc, use this enum gpio_signal { GPIO_COUNT }; instead of this enum gpio_signal { NULL }; The only reason this worked at all is that the headers are included in a particular order. BUG=none BRANCH=none TEST=make buildall Signed-off-by: Bill Richardson <wfrichar@chromium.org> Change-Id: I81533f3614d0b4c7389f9edd42cd8ac018581f46 Reviewed-on: https://chromium-review.googlesource.com/278120 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* cleanup: Update Makefile's .PHONY targetsBill Richardson2015-06-182-8/+12
| | | | | | | | | | | | | | This puts the .PHONY declaration next to the target, so that we don't overlook any. BUG=none BRANCH=none TEST=make buildall Signed-off-by: Bill Richardson <wfrichar@chromium.org> Change-Id: I944537fdc3a90691a7f2de0bff9d7f9df4898cf8 Reviewed-on: https://chromium-review.googlesource.com/278019 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* oak: increase console task stack sizeRong Chang2015-06-181-1/+1
| | | | | | | | | | | | | | | Console command 'batter' reaches STM32F0's TASK_STACK_SIZE(488). Oak needs a larger stack in development stage. BRANCH=none BUG=none TEST=manual load on oak and type 'battery' in console. Change-Id: Iab3d0bd23837932acb873ecdeb194af74f10f29c Signed-off-by: Rong Chang <rongchang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/277979 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* bq2589x: fix typo in voltage selectionVincent Palatin2015-06-181-1/+1
| | | | | | | | | | | | | | | | | | Use the right rounding function for the charging voltage selection. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=smaug BUG=chrome-os-partner:41594 TEST=On Smaug EVT2, check that the battery is charging to 100% and compare the voltage requested by the battery (using "battery" command) to the voltage set by using "charger" command. Change-Id: Ic5076f23242d1fac31ad34e0c8c9bfe0a868a91e Reviewed-on: https://chromium-review.googlesource.com/278260 Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* oak: enable hibernate supportRong Chang2015-06-181-1/+6
| | | | | | | | | | | | | | | | | | | | Setup wakeup source and enable hibernate support. BRANCH=none BUG=chrome-os-partner:40752 TEST=manual start servod: sudo servod -b oak -c oak.xml in EC console, type 'hibernate' to enter hibernate mode. check ec 3.3v current and power consumption: dut-control ec_3v3_ma ec_3v3_mw check wakeup source: open lid, press power button or plug in charger Change-Id: Ic32c3879b0b9dac86c5e08ab9f3daba428c58720 Signed-off-by: Rong Chang <rongchang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/277978 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* discovery-stm32f072: Blink the LEDsBill Richardson2015-06-184-5/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This just makes the LEDs blink continually, because I have a development board sitting on my desk and I like to see it doing something. You can still force the GPIOs on and off using the tool in extra/usb_gpio/. BUG=none BRANCH=none TEST=make buildall Try it: sudo make BOARD=discovery-stm32f072 flash The LEDs blink. Force them on and off with: cd extra/usb_gpio make ./usb_gpio write -1 0 ./usb_gpio write 0 -1 ./usb_gpio write 2 0 ./usb_gpio write 4 2 To resume blinking, use ./usb_gpio write 0 0 Change-Id: Iadbe7436c02de5b6eae81885d95bad154ca3692c Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/274131 Reviewed-by: Anton Staaf <robotboy@chromium.org>
* oak: enable USBC superspeed muxRong Chang2015-06-174-5/+198
| | | | | | | | | | | | | | | | This change enables USB3/DP superspeed mux. Oak's two type-C ports share one DP hardware. When both ports connect to DP output device, only the first DP signal will be routed to SoC. On exit dp mode, oak sends HPD again if the other port's DP flag is on. BRANCH=none BUG=chrome-os-partner:41404 TEST=none Change-Id: I7eebc0b2354f93d7421bf83796294a6b2acf4c3b Signed-off-by: Rong Chang <rongchang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/277000 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* mec1322: Disable Flash Write-protect code.Shamile Khan2015-06-171-9/+63
| | | | | | | | | | | | | BUG=chrome-os-partner:38103 TEST=flashrom -p ec -w ec.bin updates EC successfully. Does not cause a reboot and does not corrupt flash. BRANCH=none Signed-off-by: Shamile Khan <shamile.khan@intel.com> Change-Id: Id45074b991dc6d6d7ed68f72c57a81d9ec1a0713 Signed-off-by: Divya Jyothi <divya.jyothi@intel.com> Reviewed-on: https://chromium-review.googlesource.com/278002 Reviewed-by: Shawn N <shawnn@chromium.org>
* it8380dev: add pmc control moduleDino Li2015-06-1712-18/+650
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add pmc(LPC ACPI) control module for emulation board. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=1. 62h/66h port. 1-a. out 66h 80h, out 62h 00h, in 62h 02h 1-b. out 66h 81h, out 62h 01h, out 62h 55h 1-c. out 66h 80h, out 62h 01h, in 62h 55h 1-d. out 66h 80h, out 62h 02h, in 62h aah 2. H2RAM LPC I/O cycle 900h ~ 9FFh = DLM 0x8D900 ~ 0x8D9FF and host read only. 3. 80h port, console command port80. 4. host command. 4-a. host request (LPC I/O 800h ~ 807h) 03 FD 00 00, 00 00 00 00 out 204h DAh, in 200h 00h host response (LPC I/O 800h ~ 80Bh) 03 F7 00 00, 04 00 00 00, 02 00 00 00 4-b. host request 03 EE 01 00, 00 00 04 00, 01 02 03 04 out 204h DAh, in 200h 00h host response 03 E5 00 00, 04 00 00 00, 05 05 05 05 Change-Id: I5c3bac66306dfba380548a74a64536ea606ddd3e Reviewed-on: https://chromium-review.googlesource.com/269271 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Tested-by: Dino Li <dino.li@ite.com.tw> Commit-Queue: Dino Li <dino.li@ite.com.tw>
* common: Add i2c 32bit read/writeGwendal Grignou2015-06-177-4/+130
| | | | | | | | | | | | | Add functions and associated test to read/write a 32 bit register BRANCH=smaug TEST=Test on smaug with bm160 driver BUG=chromium:39900 Change-Id: Ieff24b65f1eb8610874fe13c4a8fadf583a218cb Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/277535 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* pd: Fix pin mode field in DP config VDM.Todd Broch2015-06-176-15/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | VESA SCR titled, 'DP Alt Mode Plug Corrections & Protocol Clarif' Simplified the DP config mode VDM to longer include two separate bytes for UFP vs DFP pin modes since bits <1:0> designate the desired port direction. This change corrects our VDM accordingly so that <23:16> are now zero (SBZ) and <15:8> carry the appropriate pin mode. Signed-off-by: Todd Broch <tbroch@chromium.org> BRANCH=samus_pd BUG=chromium:501002 TEST=manual, 1. samus -> hoho, dingdong or apple hdmi dongles still drive DPout 2. twinkie console output samus -> hoho shows correct DP config VDM 369.275296 SRC/2 [256f]VDM Vff01:DPCFG,INI:ff018111 00000406 where: <31:16> = SBZ == 0x0000 <15:08> = PIN_C == 0x04 Change-Id: I1146045dd94458c82b7ed08940af6009658afa05 Reviewed-on: https://chromium-review.googlesource.com/278083 Commit-Queue: Todd Broch <tbroch@chromium.org> Tested-by: Todd Broch <tbroch@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org>
* tcpc: use vendor ID register to signal TCPC readinessAlec Berg2015-06-175-4/+45
| | | | | | | | | | | | | | | | | | | Add TCPC support for USB VID register and use that register from the TCPM side to know when the TCPC is ready. TCPC is ready when phy layer is initialized and CC ADC channels have been read. BUG=chrome-os-partner:40920, chrome-os-partner:41258 BRANCH=none TEST=load and run glados. verify that glados EC doesn't start sending TCPC commands until it can successfully read TCPC VID. verify that we can boot with zinger and no battery. Change-Id: Iafbab529a16ff904cdb817901baac5e72e3d7220 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/277710 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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