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* baytrail: Add config option to enable WiFi in suspendstabilize-5254.BDuncan Laurie2014-01-173-0/+15
| | | | | | | | | | | | | | | | | | | Some WiFi devices do not tolerate losing power in suspend and will not function properly after resume if they have lost power. Enable this on the Rambi device. BUG=chrome-os-partner:24114 BRANCH=baytrail TEST=complete mutiple successful suspend/resume cycles on rambi and ensure that wifi continues to function and not cause a crash. Change-Id: Id421f3138e429b247bfb3f5ffb92a06c0353bb97 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/183047 Reviewed-by: Bill Richardson <wfrichar@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* tegra: refactor the power state machine.Louis Yung-Chieh Lo2014-01-175-218/+122
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Integrate with power/common.c -- a real state machine now. Also remove duplicate and unused functions/consts. BUG=chrome-os-partner:24831 BRANCH=nyan TEST=on nyan rev 3.12. re-plug AC: PASS, power on 2 reboot: PASS, power on 2 power off (S5), power on: PASS, power off 4, power on 5 power off (G3), power on: PASS, power off 4, power on 5 lid close / power off (S5)/ lid open: PASS, power on 3 lid close / power off (G3)/ lid open: PASS, power on 3 press power button and release: nothing happens after 15s. button off (S5)/ on: PASS, power off 3, power on 4 button off (G3)/ on: PASS, power off 3, power on 4 power off (S5)/ button on: PASS, power off 4, power on 4 power off (G3)/ button on: PASS, power off 4, power on 4 button off (S5)/ power on: PASS, power off 3, power on 5 button off (G3)/ power on: PASS, power off 3, power on 4 button off (S5)/ lid open: PASS, power off 3, power on 3 button off (G3)/ lid open: PASS, power off 3, power on 3 is off, long press button (60s): power on 4, too long, shutdown, stay off is on, long press button (60s): power off 3, stay off apreset cold: entered to S5, power off 3, power on 5 apreset warm: power state is not changed, but reboots to BIOS. Change-Id: Ie12fa4f79b6156f71f89155b2b01880914809c75 Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/182348 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Remove obsolete TODOVic (Chun-Ju) Yang2014-01-171-3/+1
| | | | | | | | | | | | | | LPC mapped memory is not supported for MEC1322. We'll need a separate communication module. Update comment to reflect this. BUG=chrome-os-partner:24280 TEST=None BRANCH=None Change-Id: I1863c7c230f895cb2cef65459406ffcf1e2b515d Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/182798 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* mec1322: Speed up LPC transfer with auto-increment modeVic (Chun-Ju) Yang2014-01-171-37/+54
| | | | | | | | | | | | | | | | | | | The main bottleneck on current LPC transfer speed is the delay required between address write and data read/write. Using auto-increment mode, we can not only skip most of the delay but also skip repeated address write. This gives about 30x speed-up (comparing the time spent on 4096-byte read test.) BUG=chrome-os-partner:24107 TEST=Measure speed of 'ectool readtest' BRANCH=None Change-Id: Ib34661474b149b19a900c60db884bd474881f742 Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/182797 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* mec1322: Use EMI module for port 80Vic (Chun-Ju) Yang2014-01-172-12/+19
| | | | | | | | | | | | | | | EMI module is the only LPC module suitable for port 80 implementation, and thus let's move it to 0x80. Consequently the EMI mapped memory is moved to 0x82-0x87. BUG=chrome-os-partner:24107 TEST=Write to port 80 and see the data printed to console BRANCH=None Change-Id: I7d749650d6d109af2941a1db6e6c4a32e7482f61 Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/182796 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* mec1322: disable host write to mapped memoryVic (Chun-Ju) Yang2014-01-171-1/+1
| | | | | | | | | | | | | | EMI module has the ability to set different read and write ranges. Let's disable write on mapped memory. BUG=chrome-os-partner:24107 TEST=Write to mapped memory has no effect BRANCH=None Change-Id: I88654bde9208376103d3c084ee54991d886ea4cc Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/182795 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Support discharge on BQ24715 for Rambi and SquawksJustin Chuang2014-01-168-4/+49
| | | | | | | | | | | | | | | | | | | BUG=chrome-os-partner:25031 BRANCH=rambi TEST=Manually make BOARD=peppy make BOARD=falco make BOARD=rambi make BOARD=squawks On rambi and squawks, connect charger ectool chargecontrol discharge ectool i2cread 16 0 0x16 0x0a It should return 16-bit negative integer. Change-Id: I8a8dfa90d2ad82595ac7a420c3c8ffc13b12cde6 Signed-off-by: Justin Chuang <jchuang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/182586 Reviewed-by: Dave Parker <dparker@chromium.org>
* lm4: move I2C transfer state machine to interrupt handlerRandall Spangler2014-01-161-184/+183
| | | | | | | | | | | | | | | | | | | | | | This significantly decreases the task swapping overhead when doing many transfers. Also fix a bug where on error, i2c_xfer() would issue a stop condition, but not actually wait for it to complete before returning; this could interfere with the next transfer in a back-to-back scenario. BUG=chrome-os-partner:25015 BRANCH=lm4 (more specifically, rambi and derivatives) TEST=battery command should show the same info as before i2cscan should show devices at bus 0 0x12, 0x16, bus 5 0x98 no charger errors on boot Change-Id: I2195f0f9800b03a54fa33170dbae6705382578c7 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/182503 Reviewed-by: Alec Berg <alecaberg@chromium.org> Reviewed-by: Yung-chieh Lo <yjlou@chromium.org>
* Clean up run_host_test scriptVic (Chun-Ju) Yang2014-01-151-8/+10
| | | | | | | | | | | | | | | | | | This includes: - Remove an unused function argument - Style fix - Handle EOF by pexpect instead of catching exception BUG=chrome-os-partner:19235 TEST=Run all tests TEST=Make a test crash and check EOF is handled properly BRANCH=None Change-Id: I3636cdab6e68cacf97c4b245b14b2d57613a1674 Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/182049 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* ite: Watchdog module addedAlec Berg2014-01-153-0/+107
| | | | | | | | | | | | | | | | | Watchdog module added. Off by default because of following limitations: - When programming, the WD fires, and programming fails. For now, you have to program twice. BRANCH=none BUG=chrome-os-partner:23575 TEST=Manually wrote in a while(1); and made sure watchdog warning triggers first, prints IPC register, and then soon after the watchdog timer resets the chip. Signed-off-by: Alec Berg <alecaberg@chromium.org> Change-Id: Ia83f58f3ae108f755d2f139ada22a22e2fbdc2fa Reviewed-on: https://chromium-review.googlesource.com/177397 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* ite: Added system reset and reset causesAlec Berg2014-01-142-1/+70
| | | | | | | | | | | | | | | Added system reset and reset causes for ITE chip. The only reset causes available on this chip are watchdog reset or power on reset. BRANCH=none BUG=none TEST=Used reboot console command with various args and verified reset cause was recorded correctly on next boot. Change-Id: Ie65f1e8f2b98c1e614b5c1d8bcbe9b3000ed9590 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/179539 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* rambi: fix led commandJustin Chuang2014-01-142-5/+8
| | | | | | | | | | | | | | | | | | | | Change rambi LED id to battery and fix led command. BUG=chrome-os-partner:24980 BRANCH=None TEST=Manually, ectool led power query => error ectool led battery query => success ectool led red => red ectool led green => green ectool led off => off ectool led auto => default behavior Change-Id: I151d63a010434ae8cd21b0ae0d935bb9d8c084c7 Signed-off-by: Justin Chuang <jchuang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/182275 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Vic Yang <victoryang@chromium.org>
* Add F13 to 8042 keyboard scan matrixDave Parker2014-01-142-3/+3
| | | | | | | | | | | | | | | | | | | | | | F13 is used to trigger the lock/password screen for users logged into Chromium OS. F13 is already used for this purpose on the USB Chrome keyboard. BUG=chrome-os-partner:24376 BRANCH=clapper,glimmer TEST=Run "kbpress 9 3 1" to simulate keypress. Verify lock screen is entered in Chromium OS. Set1: Run evtest. Verify KEY_F13 scan code, value=5d Set2: Add kernel parameter "i8042.direct=1" to use RAW mode. Run evtest. Verify KEY_F13 scan code, value=2f Change-Id: I71200810681f683c17e30b383e1221784deae0cd Signed-off-by: Dave Parker <dparker@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/182289
* Pit: Remove pwm and power_led taskJaehoon Kim2014-01-143-19/+0
| | | | | | | | | | | | | | | | From DV2 board of pit, we'll use 3 color-LED instead of power LED on keyboard. So, we have to remove pwm and power_led task from pit branch. BUG=chrome-os-partner:24855 TEST=Tested on the pi and pit board about all power status. BRANCH=pit Change-Id: I875567d8f7d544cb5b9d6057b94c26d1989b0c67 Signed-off-by: Jaehoon Kim <jh228.kim@samsung.com> Reviewed-on: https://chromium-review.googlesource.com/181607 Reviewed-by: Randall Spangler <rspangler@chromium.org> Tested-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Randall Spangler <rspangler@chromium.org>
* Use pthread_equal() to compare thread IDVic (Chun-Ju) Yang2014-01-111-1/+1
| | | | | | | | | | | | | | Pthread document explicitly stated that == operator should not be used to compare thread IDs. Let's use pthread_equal() to be safe. BUG=chrome-os-partner:19235 TEST=Check trace dump can be generated from non-main thread BRANCH=None Change-Id: I5011e0e380db0ce43c4fcf8fca0d94d5b3108f55 Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/182039 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* mec1322: Refine reset cause detectionVic (Chun-Ju) Yang2014-01-112-4/+24
| | | | | | | | | | | | | | | | | | | | | | | | The VBAT POR indication is unreliable for detecting a power-on reset, and thus we often see "unknown" reset cause when we should see "power-on". A better indication is to check for VCC1 POR, which manifests by clearing watchdog count. The catch is that we still cannot tell power-on reset from reset-pin reset. Also, to distinguish soft/hard reset from actual watchdog reset, we need to explicitly save soft/hard reset flag before triggering watchdog reset. BUG=chrome-os-partner:24107 TEST=Power cycle EVB and see 'power-on' reset cause. TEST='reboot' and see 'soft' reset cause. TEST='reboot hard' and see 'hard' reset cause. TEST='waitms 2000' and see 'watchdog' reset cause. BRANCH=None Change-Id: I0075f5bf5cdb032d206c4a53c586b75b69093235 Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/182120 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* clean-up: change __CROS_EC_POWER_COMMON_H define.Louis Yung-Chieh Lo2014-01-111-3/+3
| | | | | | | | | | | | | To __CROS_EC_POWER_H which should be done in CL 9867f83. BUG=None BRANCH=nyan TEST=build only Change-Id: Ic3c1011e127c035c681aeb0ee2023046595b926b Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/182102 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Fix test config being applied outside of test buildsRandall Spangler2014-01-111-0/+4
| | | | | | | | | | | | | | | | | Settings in test_config.h should only be applied #ifdef TEST_BUILD. This fixes omitting vboot hash all time. It should only be omitted for test builds. BUG=chrome-os-partner:24892 BRANCH=all TEST=boot system; 'hash' command works on EC and system is not stuck in recovery mode. Change-Id: I15f645824382e25caef9c1c045bb079f374fbb88 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/182167 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* thermal: dptf: Don't clear threshold condition on setDuncan Laurie2014-01-101-1/+3
| | | | | | | | | | | | | | | | | | | | | | The DPTF framework will sometimes set thresholds and not expect to get another event if the current temperature is above both the previous threshold and the new threshold. When a threshold is set only initialize the over condition if the threshold was previously disabled in order to prevent it from firing again. BUG=chrome-os-partner:23970 BRANCH=rambi TEST=build and boot on rambi, start DPTF framework and observe that when a threshold is crossed (going high) and a new threshold is set at a lower value that it does not immediately result in a new event. Change-Id: I6bad956fb5a49027a5c5f9c49a6fd68a0a96d693 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/182004 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* Fix and enable timer_dos testVic (Chun-Ju) Yang2014-01-093-43/+32
| | | | | | | | | | | | | | | | This adds golden wake count for each task and check at the end of the test. The golden wake count is calculated with the seeds and the pseudo random number generator. BUG=chrome-os-partner:23800 TEST=Pass the test BRANCH=None Change-Id: I7e90336b3f0b0355795ada7baf7c052a047ee302 Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/181734 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* mec1322: Use internal SCI pin controlVic (Chun-Ju) Yang2014-01-094-5/+23
| | | | | | | | | | | | | | | Instead of requiring a GPIO definition, default to using the internal SCI pin control. BUG=chrome-os-partner:24550 TEST=Trigger SCI and verify with logic analyzer BRANCH=None Change-Id: I13ac3b8f1031d3c56ea0b8f6a6ed0c1aa4e77bb1 Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/182010 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Convert vboot hash calculation from task to deferred functionRandall Spangler2014-01-0926-102/+114
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Vboot hash calculation takes ~350 ms during EC boot. Since the hash task is higher priority than the hook task, this starves all the hooks during boot. We could, in theory, fix that simply by swapping the priority of the hook and hash tasks. But then watchdog detection (in the hook task) wouldn't detect hangs in the hash task. A better fix (implemented here) is to convert the hashing operation to a series of deferred function calls. This gets rid of the hash task entirely, and allows all pending hooks and other deferred function calls to take place between each chunk of hashing. On STM32-based boards, we need to bump up the hook task stack size, since hashing is called from several layers deep in the hook task instead of at the top of its own task, but this is still a net win of several hundred bytes of SRAM. BUG=chrome-os-partner:24892 BRANCH=rambi TEST=Boot EC; look for "hash start" and "hash done" debug output. 'taskinfo' shows at least 32 bytes of unused stack for HOOKS task. 'hash ro' runs properly from EC console. Change-Id: I9e580dc10fc0bc8e44896d84451218ef67578bbe Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/181954
* Enable internal pull-up for MEC1322 EVB I2C busVic (Chun-Ju) Yang2014-01-091-1/+5
| | | | | | | | | | | | | | The external pull-up resistors are too weak, and cause slow-down on I2C speed. Let's enable internal pull-up to compensate this. BUG=chrome-os-partner:24389 TEST=Measure I2C speed with scope, and see better slew rate. BRANCH=None Change-Id: Iefb5fca3c88250bbd8cad29d7998d590a7cc7c35 Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/181999 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* x86: generalize power state machine for all platforms (2/2)Louis Yung-Chieh Lo2014-01-0926-421/+440
| | | | | | | | | | | | | Rename x86_* to power_signal_* and X86_* to POWER_*. BUG=chrome-os-partner:24832 BRANCH=link,falco,samus,rambi,peppy,squawks,snow,spring,nyan TEST=make -j buildall run_tests Change-Id: Ifaa06391da5a483851ff56eca91fbf6d038dff0a Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/181719 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Remove old TODO comment in emulator UART moduleVic (Chun-Ju) Yang2014-01-091-4/+1
| | | | | | | | | | | | | | | | Now that we handle all UART input from interrupt context, we shouldn't need to guard input buffer with mutex lock. Removing the stale TODO comment and adding an assertion to ensure this argument is correct. BUG=chrome-os-partner:23804 TEST=make buildall BRANCH=None Change-Id: If61eed4329a782b80fe8b16667bddaae8464620d Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/181722 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* hook_call_deferred() works before tasks have startedRandall Spangler2014-01-091-1/+6
| | | | | | | | | | | | | | | | | | | | State machines implemented using deferred functions need to be able to kick off deferred function from a HOOK_INIT handler. But tasks aren't running in HOOK_INIT, so task_wake() fails. Instead, hook_call_deferred() should check to see if the hook task has had a chance to run yet. If it hasn't, then there's no need to wake it; it'll get run eventually anyway. BUG=chrome-os-partner:24892 BRANCH=rambi TEST=Add a call to hook_call_deferred() in a HOOK_INIT handler. It shouldn't crash, and the deferred function should be called. Change-Id: I5c8077b636ae030a668a211fd8238549b6bcfa54 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/181953 Reviewed-by: Yung-chieh Lo <yjlou@chromium.org>
* emulator: Treat unexpected EOF as test failureVic (Chun-Ju) Yang2014-01-081-1/+1
| | | | | | | | | | | | | Unexpected EOF usually means error in the test code or assertion failure. In this case, let's treat it as test failure. BUG=chrome-os-partner:19235 TEST=Check assertion failure fails the test. BRANCH=None Change-Id: I9270d223d7252f611673a2c55af0c2d68b6116c4 Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/181747
* Fix an integer underflow bug in hooks testVic (Chun-Ju) Yang2014-01-081-1/+1
| | | | | | | | | | | | | | | The variable 'interval' is declared as unsigned integer, and this sometimes causes an integer underflow when substracting it by SECOND, and in turns leads to false test failure. Changing it to signed integer. BUG=chrome-os-partner:19236 TEST=Repeatedly run hooks test BRANCH=None Change-Id: Ic6d8001f90fb8756b6bdadf811a668c02fbccb34 Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/181882 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* emulator: Guard interrupt status with mutex lockVic (Chun-Ju) Yang2014-01-081-2/+8
| | | | | | | | | | | | | | This prevents an interrupt from being triggered when we happen to be enabling/disabling global interrupt. BUG=chrome-os-partner:19235 TEST=Repeatedly run interrupt test BRANCH=None Change-Id: I0163aff801ddbcee4aedba7a78966d97336c79ca Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/181920 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Dump stack trace on emulator test failureVic (Chun-Ju) Yang2014-01-086-7/+116
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Emulator test failures are sometimes hard to debug, especially when the test is stuck somewhere and times out. Let's have the emulator dump stack trace when an assertion fails or a test times out. The produced stack trace is in this format: #0 build/host/kb_8042/kb_8042.exe() [0x412421] /home/victoryang/trunk/src/platform/ec/test/kb_8042.c:104 #1 build/host/kb_8042/kb_8042.exe() [0x4124a9] /home/victoryang/trunk/src/platform/ec/test/kb_8042.c:129 #2 build/host/kb_8042/kb_8042.exe(run_test+0x3a) [0x412e2c] /home/victoryang/trunk/src/platform/ec/test/kb_8042.c:262 #3 build/host/kb_8042/kb_8042.exe(_run_test+0x11) [0x4061de] /home/victoryang/trunk/src/platform/ec/core/host/task.c:90 #4 build/host/kb_8042/kb_8042.exe(_task_start_impl+0x79) [0x406b72] /home/victoryang/trunk/src/platform/ec/core/host/task.c:408 #5 /lib64/libpthread.so.0(+0x70b1) [0x7f6dc2fa10b1] ??:0 #6 /lib64/libc.so.6(clone+0x6d) [0x7f6dc2cd8efd] ??:0 The file name and line number in the trace is generated by addr2line. BUG=chrome-os-partner:19235 chromium:331548 TEST=Put in a infinite loop in a test, and see stack trace when it times out. TEST=Add a failing assertion, and see stack trace when it fails. BRANCH=None Change-Id: I4494ffd1ebc98081ce40e860a146202084aa2a1e Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/181730
* ite: WORKAROUND reduce data SRAM to 8kBVincent Palatin2014-01-081-1/+1
| | | | | | | | | | | | | | | | | | | On the IT8380, we should be able to map 16kB of SRAM to use as data memory (aka DLM), but sometimes the 2 top 4k pages seem to be mapped differently (ie not to SRAM, they do not retain writes ...). As we have no documentation on that topic, for now use 8kB of DLM for now. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=chrome-os-partner:23575 TEST=build and run IT8380 dev board. Change-Id: I4ed452f27e9c457e7ac717b82580781ca506b0d8 Reviewed-on: https://chromium-review.googlesource.com/179322 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* emulator: Keep fail count across sysjumpVic (Chun-Ju) Yang2014-01-081-1/+34
| | | | | | | | | | | | | | | When jumping between image copies, we need to preserve the test fail count. Otherwise tests failed before the jump would be silently ignored. BUG=chrome-os-partner:19235 TEST=Fail a test case before sysjump and check the whole test fails. BRANCH=None Change-Id: Iebde40141f62ac067ddabf629add46e5d752d674 Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/181746 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* emulator: Fix a bug that jump tag is overwrittenVic (Chun-Ju) Yang2014-01-081-5/+0
| | | | | | | | | | | | | | | | | The mock system_usable_ram_end() always returns the same address. However, this causes the second jump tag to overwrite the first one. Also, now that the jump data is properly placed, we can actually remove the mock implementation. BUG=chrome-os-partner:19235 TEST=Add two jump tag and check the first one is not overwritten. BRANCH=None Change-Id: If868895a7c028dd25399adb69e9708de45c84f10 Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/181745 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Fix kb_8042 testVic (Chun-Ju) Yang2014-01-081-0/+2
| | | | | | | | | | | | | | | | The mock power button GPIO is initially low, so we need to set it high before testing it. Also, wait for all tasks to start before starting the test to prevent race condition. BUG=chrome-os-partner:19236 TEST=Pass the test BRANCH=None Change-Id: I813588a9c721815c1213882f7a9458daea4d78eb Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/181744 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* ite: Add initial support for ITE IT8380 chipVincent Palatin2014-01-0816-1/+1875
| | | | | | | | | | | | | | | | | | | | | | | | | Initial support for the ITE IT8380 chip with the following peripherals : - 8250-like UART module. - HW timer (with a 128-us tick period). - GPIO with pins initialization and edge interrupt support. other functions are stubbed. - Clock : basic fixed frequency setup only. It also add the dev board configuration as a test vehicle. Signed-off-by: Alec Berg <alecaberg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=chrome-os-partner:23575 TEST=make BOARD=it8380dev on IT8380 dev board, use the EC serial console, use gettime from console. Change-Id: Id4bf37d1beb21d1a4bee404c9a0bc500025fe787 Reviewed-on: https://chromium-review.googlesource.com/175481 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Alec Berg <alecaberg@chromium.org> Tested-by: Alec Berg <alecaberg@chromium.org>
* nyan: use usleep() for PMIC_THERM_HOLD_TIMELouis Yung-Chieh Lo2014-01-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | It was udelay, which is busy-loop and other tasks have no chance to run. usleep() could yield the CPU resource out. BUG=None BRANCH=nyan TEST=other tasks get chance to run. - Before: [0.010242 not sysjump; forcing AP shutdown] [0.060471 EC triggered warm reboot] - After: [0.010103 not sysjump; forcing AP shutdown] [0.022985 event set 0x00000080] [0.041828 Charge state init -> idle0 after 0.010393 sec] [0.043327 Battery 98% / 1092h:15] [0.060394 EC triggered warm reboot] Change-Id: Id41a0b4fda5ac78b1b7f3e3f316b9721fcc3dd34 Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/181763 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* rambi: Limit charging current to 1.7ARandall Spangler2014-01-081-1/+1
| | | | | | | | | | | | | This matches the 33W adapter. BUG=chrome-os-partner:23833 BRANCH=rambi TEST=with partially-charged battery, 'charger' command shows I_in < 1700 Change-Id: I9db81757531e16878eccd4081ce82e22e2a7b9f8 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/181764 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* Add squawks boardRandall Spangler2014-01-088-3/+665
| | | | | | | | | | | | | | | | | | | | | | | | | | Implement LED color policy (crosbug.com/p/23957) Update battery vendor information (crosbug.com/p/24684) BUG=chrome-os-partner:24885 BRANCH=rambi TEST=manual system on, lidclose -> power LED off system on, lidopen -> power LED on system suspended -> power LED blinks green every 2 sec system suspended, lid closed -> power LED off system off -> power LED off plug AC in, battfake 95 -> charging LED green plug AC in, battfake 94 -> charging LED orange unplug AC, battfake 10 -> charging LED off unplug AC, battfake 9 -> charging LED blinks orange battcutoff -> after a few sec, system powered down plug back in AC -> system comes back on charger -> I_in < 1700 Change-Id: I89161e2c024d85197b8612a40a61dd50c106549e Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/181755
* Remove duplicate KBD_IRQ_L signalsRandall Spangler2014-01-083-23/+1
| | | | | | | | | | | | | The SERIRQ signal will now be high-Z on the EC, which removes a leakage path. This requires the BIOS to use PM3 for its keyboard IRQ. BUG=chrome-os-partner:24424 BRANCH=rambi TEST=boot system; keyboard still works Change-Id: I0acf425125ced11a9ef6da58ee49979b83c92d5c Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/181718
* rambi: Remove duplicate EC_PWROK workaround for proto 1.5Randall Spangler2014-01-083-17/+1
| | | | | | | | | | | | | | | After this change, only Rambi 2.0 boards will boot properly. This cleanup is necessary before supporting other Baytrail systems. BUG=chrome-os-partner:24414 BRANCH=rambi TEST=as soon as I get a 2.0 board Change-Id: Ic9e3afcee9dae5c0b7f31a7aa4500b2572ba92c6 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/181754 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* rename power_state* to charge_state*Louis Yung-Chieh Lo2014-01-0710-46/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Those are actually charge state, not power state. Rename the misleading names. BUG=chrome-os-partner:24832 BRANCH=link,falco,samus,rambi,peppy,spring,pit,snow TEST=build only because no name conflicts. make clean BOARD=link && make -j32 BOARD=link && \ make clean BOARD=falco && make -j 32 BOARD=falco && \ make clean BOARD=samus && make -j 32 BOARD=samus && \ make clean BOARD=rambi && make -j 32 BOARD=rambi && \ make clean BOARD=peppy && make -j 32 BOARD=peppy && \ make clean BOARD=snow && make -j 32 BOARD=snow && \ make clean BOARD=spring && make -j 32 BOARD=spring && \ make clean BOARD=pit && make -j 32 BOARD=pit && \ make clean BOARD=nyan && make -j 32 BOARD=nyan && \ make runtests -j 32 && make tests -j 32 BOARD=link && \ make tests -j 32 BOARD=falco && make tests -j 32 BOARD=samus && \ make tests -j 32 BOARD=rambi && make tests -j 32 BOARD=peppy && \ make tests -j 32 BOARD=snow && make tests -j 32 BOARD=spring && \ make tests -j 32 BOARD=pit && make tests -j 32 BOARD=nyan Change-Id: Ie15052d5a7dbd97d519303d37260945346a27779 Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/181505 Reviewed-by: Vic Yang <victoryang@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* x86: generalize power state machine for all platforms (1/2)Louis Yung-Chieh Lo2014-01-0713-12/+12
| | | | | | | | | | | | | | | | | | | Renaming file names is the first step. Please see issue tracker for more details. BUG=chrome-os-partner:24832 BRANCH=link,falco,samus,rambi,peppy TEST=build all x86 boards. make clean BOARD=link && make -j32 BOARD=link && \ make clean BOARD=falco && make -j32 BOARD=falco && \ make clean BOARD=samus && make -j32 BOARD=samus && \ make clean BOARD=rambi && make -j32 BOARD=rambi && \ make clean BOARD=peppy && make -j32 BOARD=peppy Change-Id: I3a296a0c14f6bebefa858438b1320061ac71dd38 Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/181400 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* rambi: Add config option for simplified USB power controlRandall Spangler2014-01-073-6/+13
| | | | | | | | | | | | | | It will be used by all variants of Rambi, so #ifdef BOARD_RAMBI is too restrictive. BUG=chrome-os-partner:24864 BRANCH=rambi TEST=boot rambi 1.5 board; plug in USB mouse Change-Id: I0ff02077388a6c6621c5746a693dde894cf8ad77 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/181682 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* nyan: add 'max_size' parameter to read_mapped_string()Louis Yung-Chieh Lo2014-01-071-6/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | We changed the behavior of indata.size==0 case in cros_ec kernel driver. This breaks the nyan battery driver. Change the ectool as well. BUG=chrome-os-partner:24851 BRANCH=nyan TEST=verified on nyan rev B % ectool battery Battery info: OEM name: SANYO Model number: AP13J3K Chemistry : LION Serial number: 174E Design capacity: 4030 mAh Last full charge: 4030 mAh Design output voltage 11250 mV Cycle count 0 Present voltage 12934 mV Present current 0 mA Remaining capacity 3966 mAh Flags 0x03 AC_PRESENT BATT_PRESENT Change-Id: Id63d933802ed85d7f5d8f1c53e6389b083f41a8a Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/181667 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* Ignore all-now flag if WP GPIO is deassertedVic (Chun-Ju) Yang2014-01-061-11/+0
| | | | | | | | | | | | | | | | On early snow boards, WP GPIO is not wired to the EC. Now that we have properly fixed hardware, we should drop workaround for those boards. BUG=chrome-os-partner:23762 TEST=Build all boards BRANCH=None Change-Id: I5dcfaf5497fc36d6b8d7bc5d8975aa18b2d36a1d Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/181090 Reviewed-by: Yung-chieh Lo <yjlou@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Process emulator UART events in interrupt contextVic (Chun-Ju) Yang2014-01-062-11/+25
| | | | | | | | | | | | | | | | | Currently emulator UART input/output are processed in various context, including UART thread, individual tasks, and tests. By moving the processing to interrupt context, the way it works resemble real chips more. Also, this provides a cleaner cut between emulated UART device and UART processing code. BUG=chrome-os-partner:23804 TEST=make buildall BRANCH=None Change-Id: I58127e66f4058a68d37be9029e9ddbbd798381c6 Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/181590 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Add interrupt support for emulatorVic Yang2014-01-0611-25/+302
| | | | | | | | | | | | | | | | | | This provides us a way to inject interrupts during a test. If a test has interrupt_generator() defined, it will run in a separate thread. The generator can then trigger interrupts when it decides to. The current running task is suspended while emulator is executing ISR. Also fixes a bug that tasks run without scheduler notifying them during emulator start-up. BUG=chrome-os-partner:19235 TEST=Repeatedly run all tests. BRANCH=None Change-Id: I0f921c47c0f848a9626da6272d9040e2b7c5ac86 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/55671
* rambi: Make KBD_IRQ_NEW_L open drainShawn Nematbakhsh2014-01-041-1/+1
| | | | | | | | | | | | | | KBD_IRQ_NEW_L (added for Rambi 2.0) has a pull-up resistor and should be open drain. TEST=None BUG=chrome-os-partner:24760 BRANCH=None Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: Ibf1beff3306c074f9f135b1bee82e299edf2380b Reviewed-on: https://chromium-review.googlesource.com/181227 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* nyan: implement chipset_reset() for cold/warm resetLouis Yung-Chieh Lo2014-01-031-22/+18
| | | | | | | | | | | | | | | | | | | | For AP hang detection, the warm reset must be implemented. Since the cold reset is easy, implement it at the same time. BUG=chrome-os-partner:23822, chrome-os-partner:24789, chrome-os-partner:24558 BRANCH=nyan TEST=on nyan rev 3.12 power on/off --> work as usual power on, then apreset cold --> system is cold reset (off, then on) power off, then apreset cold --> nothing happens. this is fine. power on, then apreset warm --> system is warm reset (power trail is kept). power off, then apreset warm --> nothing happens. this is fine. power on --> system is back to normal again. Change-Id: I010793b7a2d309e5d606fbc5877e9e3b07c8c5f3 Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/181164 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* nyan: don't touch GPIO setting while init alternate functions.Louis Yung-Chieh Lo2014-01-032-5/+9
| | | | | | | | | | | | | | | | | | | Old code reset some GPIO configurations with af->flags = 0 while gpio_config_module(). This is bad because it could lead unexpected behavior on the bus. New code accepts GPIO_DEFAULT flag so that it doesn't touch the GPIO setting while configuring alternate functions. This should not effect other boards unless the GPIO_DEFAULT is set on that board. BUG=chrome-os-partner:24607 BRANCH=nyan TEST=run on nyan rev 3.12. No "SPI rx bad data" at boot. UART and i2c good. Change-Id: Id451cfae21e1d764452429dc5adfe1317ff5b140 Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/181135 Reviewed-by: Randall Spangler <rspangler@chromium.org>
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