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* samus: use real AC_PRESENT signalAlec Berg2014-07-116-110/+5
| | | | | | | | | | | | | | | | | | | | | | | Revert - https://chromium-review.googlesource.com/#/c/205145/2 - https://chromium-review.googlesource.com/#/c/205147/4 Now using the real AC_PRESENT gpio signal instead of whether or not the PD MCU negotiated for 20V. BUG=chrome-os-partner:29841, chrome-os-partner:29842 BRANCH=none TEST=tested on a board with reworked AC_PRESENT signal. Verified that gpio is correctly reporting state of AC and is charging when AC is plugged in. Tested the no battery case to make sure board powers on and stays on with just a charger. Also tested the dead battery case by plugging in a dead battery, then plugging in a charger and making sure system powers on and starts charging. Change-Id: I4424771c91c8a2aa19eda68a8b5194e9265d529c Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/206598 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* ryu: bringup fixesVincent Palatin2014-07-102-6/+9
| | | | | | | | | | | | | | | | | | - tune stack sizes - re-order properly the ADC definitions - select the right battery gas gauge Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=none TEST=on Ryu, exercise ADC and battery using the EC command-line. Change-Id: Idc307b1c1ce1d35e7b5fa2c86f956cc4c8b08783 Reviewed-on: https://chromium-review.googlesource.com/207272 Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* cortex-m0: add 64-bit multiplicationVincent Palatin2014-07-102-1/+75
| | | | | | | | | | | | | | | | | | | | Import code to do 64-bit multiplication on Cortex-M0 core without SMULL instruction. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=none TEST=make buildall add a 64-bit multiplication and see it compiled properly. verify in .map files that the code is discarded for cortex-M0 based platforms not using the 64-bit multiplication. Change-Id: I0a91b3502f4bee4bb79b193fe0854e56a7d498f7 Reviewed-on: https://chromium-review.googlesource.com/207132 Reviewed-by: Randall Spangler <rspangler@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* tegra: use power signal abstraction to access suspend GPIOVincent Palatin2014-07-101-3/+4
| | | | | | | | | | | | | | | | | | | | Use the power signal list abstraction everywhere to access the SUSPEND_L GPIO. This is preparatory work for Ryu, so we can change the suspend GPIO name and active level. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=none TEST=make buildall Change-Id: I1ad3471600f1207986a6be9d8c3c627ab73796ac Reviewed-on: https://chromium-review.googlesource.com/207151 Reviewed-by: Yung-chieh Lo <yjlou@chromium.org> Reviewed-by: Vic Yang <victoryang@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* discovery-stm32f072: Initial working versionAnton Staaf2014-07-096-0/+154
| | | | | | | | | | | | | | | | | This version of the EC firmware just provides a console and some blinking lights for the stm32f0 discovery board. This is a convenient board to work with for peripheral bringup. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=none TEST=make buildall -j Change-Id: I9ae87235e8a505d58fa7a5c996528c4dd6c3f2ac Reviewed-on: https://chromium-review.googlesource.com/207130 Reviewed-by: Bill Richardson <wfrichar@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org>
* mec1322: Simplify reading raw I2C pin statesVic Yang2014-07-091-44/+2
| | | | | | | | | | | | | | Now that gpio_get_level() always returns actual pin states, we can simplify i2c_raw_get_scl/sda(). BUG=chrome-os-partner:26483 TEST=make buildall BRANCH=None Change-Id: Ifefb6fa5da8f566b44c419a0ea5adec41f8925e3 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/207057 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* stm32: implement spi flash driverDominic Chen2014-07-094-0/+1201
| | | | | | | | | | | BRANCH=none BUG=none TEST=manually verify against chip using console commands and logic analyzer Change-Id: I9b9e3137a72eab5c39a69c81ee2ffd1c504d841c Signed-off-by: Dominic Chen <ddchen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/202333 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Add board support for RyuVincent Palatin2014-07-098-1/+687
| | | | | | | | | | | | | | | | | Add the Ryu board configuration and USB Power Delivery configuration. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=none TEST=make BOARD=ryu Change-Id: I61f6f19dc9fe19e1d9f9017c1050fc8a30a862e7 Reviewed-on: https://chromium-review.googlesource.com/206586 Reviewed-by: Alec Berg <alecaberg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* samus_pd: fix type-C ports muxingVincent Palatin2014-07-097-150/+147
| | | | | | | | | | | | | | | | | | | | | | | The HW signals to control the type-C ports muxing have changed between Fruitpie and Samus, update the code to match the HW. Also add the docking mux option and update the board muxing code to prepare for the automatic mode detection : - the polarity will be determined by the PD code. - the port muxing will be enable/disable by the common alternate mode PD code. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=none TEST=make buildall Change-Id: I0706626270c73d2a5e3f85b86e65a7c4fc21f9ec Reviewed-on: https://chromium-review.googlesource.com/206685 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* firefly: add interrupt to detect VBUS transitions quicklyVincent Palatin2014-07-091-0/+4
| | | | | | | | | | | | | | | | | | | Use the interrupt as faster detection when VBUS is going off, so we are not missing when the source is cutting its output due to a fault. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=none TEST=Connect Firefly to Zinger, trigger a short OCP with the electronic load, once Zinger has recovered from the fault, see Firefly re-negotiating voltage. Change-Id: I4d273a0007d1e79884e0acbf75509ab9c8578893 Reviewed-on: https://chromium-review.googlesource.com/207031 Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* mec1322: reports actual GPIO level for output pinsVic Yang2014-07-091-4/+1
| | | | | | | | | | | | | | For open-drain output pins, this would allow us to easily check pin state without changing it to input. BUG=chrome-os-partner:26483 TEST=Toggle output level and read it back. BRANCH=None Change-Id: Ia7ceb7a221a8f0cfec9b19a5c5baae4d5441150f Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/207060 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* pd: ensure we always re-enable source powerVincent Palatin2014-07-081-2/+2
| | | | | | | | | | | | | | | | | | When we reset the PD power source, ensure we always transition to DISCONNECTED state, so we will re-enable the 5V power when transitioning back from DISCONNECTED to DISCOVERY. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=none TEST=Plug Firefly to Zinger and play with voltage transition buttons. Change-Id: Ifa0f30391b2249b54385ce8c93df932e37803695 Reviewed-on: https://chromium-review.googlesource.com/206954 Reviewed-by: Alec Berg <alecaberg@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* pd: sink uses VBUS to detect connectionAlec Berg2014-07-081-10/+11
| | | | | | | | | | | | | | | | Change PD sink to use VBUS for initial detection to match USB type C spec. BUG=chrome-os-partner:30116 BRANCH=none TEST=Tested on samus. Connect and disconnect zinger a few times and make sure we successfully negotiate each time. Change-Id: Ifa9ff301cb34b6df6609d4bbbde3231bb029d554 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/207000 Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* pd: refactor disconnection detectionVincent Palatin2014-07-081-30/+28
| | | | | | | | | | | | | | | | | | | | | | | | Verify the connection status at every FSM loop, by monitoring VBUS presence for the sink and by monitoring CC going above Vnc for the source. Also ensure we are never stuck in the source transition state in the sink doesn't ack the PSReady packet. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=none TEST=connect Firefly to Zinger, trigger hundreds of voltage transition, record and analyze the PD traffic : no longer see spurious PSReady messages. Change-Id: I4495ae5415d53d77055fb2a562c594fa9a1d4dc8 Reviewed-on: https://chromium-review.googlesource.com/206945 Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Tested-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* firefly: add VBUS detectionVincent Palatin2014-07-081-1/+2
| | | | | | | | | | | | | | | | | | | | | Enable the VBUS detection to be able to re-negociate a PD contract when we are losing power. The VBUS_WAKE GPIO is broken on the current hardware (not triggered when VBUS is 5V), so we fall back on using the ADC on VBUS_SENSE. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=none TEST=With a Firefly connected to a Zinger,"fault" the power supply to get it to turn off its output. See Firefly detecting the cut-off and re-negotiating voltage. Change-Id: Ia5f0734cbd8f20d84ce170cea191410bb72a87c3 Reviewed-on: https://chromium-review.googlesource.com/206944 Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* stm32 spi: postpone the RX DMA setup if handler is still using buffer.Louis Yung-Chieh Lo2014-07-081-1/+55
| | | | | | | | | | | | | | | | | | | | | | | | | (cherry-pick back to ToT) If the AP de-asserts the SPI NSS pin while host command handler is still processing the command, we would delay the Rx DMA setup later. If this case happens, the pending result of handler will be dropped. BUG=chrome-os-partner:28979 BRANCH=tot,nyan TEST=build and play around on big. Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/204427 Reviewed-by: Randall Spangler <rspangler@chromium.org> (cherry picked from commit 4be73492817f3f6c24ece75fed33eb956c0038b8) Change-Id: Ie2a6550696760eadad3b0d6e3a4e56a2b29abdda Original-Change-Id: I371a2a0b96b1ee0602be91338bd53d13f6abbd2e Reviewed-on: https://chromium-review.googlesource.com/206922 Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Yung-chieh Lo <yjlou@chromium.org> Tested-by: Yung-chieh Lo <yjlou@chromium.org>
* usb: send correct device descriptor length, and null set address responseDominic Chen2014-07-081-1/+3
| | | | | | | | | | | BRANCH=none BUG=none TEST=verify usb operation with mac 10.7.3 Change-Id: I137a20637273b9a8683470ae42337a8d38e1b038 Signed-off-by: Dominic Chen <ddchen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/206931 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* pd: properly transition when answering GetSourceCapVincent Palatin2014-07-081-1/+4
| | | | | | | | | | | | | | | | | | | | | | | Once the source has successfully sent a SourceCap packet (ie it got acked), it needs to transition from the DISCOVERY to the NEGOCIATE state. This was done when the source was sending unsolicited SourceCap, but this was missing when the SourceCap was an answer to a Sink GetSourceCap request. The usual effect of the missing transition was sending twice the SourceCap triggering some collisions. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=none TEST=plug a Zinger to a Firefly, randomly push the Firefly voltage selection buttons and see the transition always happening properly. Change-Id: If4b335e2144595f22ad4e9a8a9e289506f597407 Reviewed-on: https://chromium-review.googlesource.com/206941 Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* firefly: switch on 5V LED by defaultVincent Palatin2014-07-081-1/+1
| | | | | | | | | | | | | | | | | | | The default VBUS voltage is 5V, let's switch on the matching LED rather no LED when no voltage has been selected. This allows to know that the board is powered. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=none TEST=power up Firefly and see the 5V LED ON (if the cable is plug) or blinking (if the cable is unplug). Change-Id: I8f6525bc6f901daf21af9b20eede2a9b1e8dbfdf Reviewed-on: https://chromium-review.googlesource.com/206940 Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* motion_sense: make unit test more reliableAlec Berg2014-07-081-5/+19
| | | | | | | | | | | | | | | Fix motion_sense unit test flakiness by making sure that the lid angle calculations ran by checking LPC sample id number instead of relying on a fixed time delay. BUG=chromium:391625 BRANCH=none TEST=make -j runtests Change-Id: I6e879ef28837e62e0c9d4e5f05e0165fa9f9a966 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/206878 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* fruitpie: restore PD_TX_EN GPIO on exit from debug modeDominic Chen2014-07-081-1/+1
| | | | | | | | | | | | | this fixes the previous patch to correctly restore the GPIO BRANCH=none BUG=none TEST=verify that GPIO state after restore matches default Change-Id: I42f73d21399f5e9429dfb50aacb6aba59ba33315 Signed-off-by: Dominic Chen <ddchen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/206905 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Add test for flash_is_erased()Vic Yang2014-07-081-0/+21
| | | | | | | | | | | | | | | | | This test checks: - flash_is_erased() returns true when flash is erased. - flash_is_erased() returns false when the entire flash except one byte is erased. BUG=chrome-os-partner:30281 TEST=Check this test fails without the fix for flash_is_erased(), but passes with it. BRANCH=all (if the fix is cherry-picked) Change-Id: Id4fe5591381cabcdad9bb16ba820acd48e92ba13 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/206897 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* flash: Fix bad check for flash_is_erased()Randall Spangler2014-07-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | This caused all platforms to check only the first 25% of each page to see if it's already erased. Fortunately, we tend to fill flash pages from the beginning, so in normal usage we don't hit this bug. BUG=chrome-os-partner:30281 BRANCH=all (if convenient) TEST=Make sure CONFIG_CMD_FLASH is defined. Then at the EC console: flasherase 0x1f000 0x400 rw 0x1f3e0 -> 0xffffffff flashwrite 0x1f3e0 0x20 rw 0x1f3e0 -> 0x03020100 flasherase 0x1f000 0x400 rw 0x1f3e0 -> 0x03020100 (bad!) or 0xffffffff (good) Change-Id: If78b08b5e0414993a440bc8cd707b5ce70eb1a0a Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/206891 Reviewed-by: Dmitry Torokhov <dtor@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org>
* Increase stack size of charger and chipset tasks.Louis Yung-Chieh Lo2014-07-082-4/+4
| | | | | | | | | | | | | | | | | | | | (cherry-pick back to ToT) The comment #20 of issue 29162 looks like a stack overflow to me. The issue 29067 also shows the stack is overflowed in some case. Let's increase that. BUG=chrome-os-partner:29067,chrome-os-partner:29162 BRANCH=nyan,tot TEST=build only. Should run RunIn.DozingStress.SuspendResume/RunIn.Reboot2. Change-Id: Ic7fc7c8fa9e817b2db497ebedcdff6cb8c49c565 Origin-Change-Id: If3b97af578362eb6d2794b331716f499be7ad066 Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/204277 Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/206921
* stm32: spi: read spi->dr into a dummy variableYen Lin2014-07-081-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | (cherry-pick back to ToT) In setup_for_transaction(), read spi->dr into a dummy variable instead of into in_msg[0]. Since in_msg[0] is an alias for a command's port number, this will prevent a command's port number from being over-written if spi transaction is terminated early while a command is still in progress. BUG=chrome-os-partner:28979 BRANCH=nyan TEST=passed factory_test.reboot2 test for >1000 cycles Signed-off-by: Yen Lin <yelin@nvidia.com> Reviewed-on: https://chromium-review.googlesource.com/204355 Reviewed-by: Yung-chieh Lo <yjlou@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> (cherry picked from commit 2b043665850f7c74cd6a4a7f24d7a18b01b378ac) Change-Id: Ia412fadcd7621f45bbb096771615ce75fe445592 Oiginal-Change-Id: I308ea954d6242fce5b3a70a14660767ac88d8242 Reviewed-on: https://chromium-review.googlesource.com/206920 Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Yung-chieh Lo <yjlou@chromium.org> Tested-by: Yung-chieh Lo <yjlou@chromium.org>
* charger v2: set charger mode when requesting current/voltageAndrew Bresticker2014-07-081-2/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | (cherry-pick back to ToT) Clear the CHARGE_INHIBIT bit when requesting non-zero current/voltage and set it when charging should be disabled. On Blaze with the BQ24725 charger, setting this bit saves 10-15mW when we're not on AC. This also fixes an issue where battery charging would not get enabled when the charger is connected while the machine is in S3/S5. This is because the kernel driver would inhibit charging when the charger was removed and then the EC would not enable it when the charger was re-connected while the host was off, such as in S3/S5. BRANCH=nyan BUG=chrome-os-partner:29386 TEST=Boot Blaze, disconnect charger, suspend, connect charger and observe that the battery now starts charging. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/203163 Reviewed-by: Randall Spangler <rspangler@chromium.org> (cherry picked from commit bd4469ae4ffbbd6f2cd5549bdb8809838e55d6f7) Change-Id: Ibcb635b01a2292f214f71ab400ec34cd12e7536f Original-Change-Id: I2efaf02296dc08c0de85950a70ad2592f4428241 Reviewed-on: https://chromium-review.googlesource.com/206909 Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Yung-chieh Lo <yjlou@chromium.org> Tested-by: Yung-chieh Lo <yjlou@chromium.org>
* pd: clean up beg/end transitions of PD commsAlec Berg2014-07-036-51/+173
| | | | | | | | | | | | | | | | | | Fix the beginning and end of BMC PD communication: - Initial transmission within 1us of taking control of CC line - CC line released between 1us and 23us after last edge - If final bit is a 0, then add two 1 bits to the end - No garbage after the final bit BUG=chrome-os-partner:30132 BRANCH=none TEST=tested with a fruitpie, samus, and zinger. verified timing on scope. Change-Id: Ie45695eb367a7554cf5d5b76b6fbdf1e3fc85d29 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/206453 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* better unhandled exception panic without runtimeVincent Palatin2014-07-036-12/+36
| | | | | | | | | | | | | | | | | | | | | | On panic, reboot properly the CPU rather than just jumping to the reset vector as that might lead to some incorrect initializations. Properly plug the div by 0 to the panic handling. Add a small trace if the debug output is activated. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=chrome-os-partner:29840 TEST=add adhoc code triggering a data abort and see the firmware printing a trace, then rebooting immediatly in a working state. Change-Id: I1d5a98d9113c8ae08e05588a40f941d1ed22cebe Reviewed-on: https://chromium-review.googlesource.com/206268 Reviewed-by: Vic Yang <victoryang@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* pd: resolve transmission conflicts fasterVincent Palatin2014-07-031-0/+7
| | | | | | | | | | | | | | | | | | | | Until now when send_validate() receives another valid packet in place of the GoodCRC, it was continuing its retries loop. But given that the presence of a valid packet indicates that the other side is trying to send us something, it's better to bail out immediatly and wait for its retry. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=chrome-os-partner:29847 TEST=repeatly plug and unplug a Zinger to a Samus and record the traces of the PD negociations. Change-Id: I901bd8d85999ed195ed9887d7375806f61222f8b Reviewed-on: https://chromium-review.googlesource.com/206391 Reviewed-by: Alec Berg <alecaberg@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* zinger: update OVP latch conditionVincent Palatin2014-07-031-5/+9
| | | | | | | | | | | | | | | | | | | | | | | | | The Over Voltage Protection was de-activated when the output is disabled to avoid false positive when doing a down voltage transition, but as a side effect, we might reset the OVP while the fault is still present since the OVP first disables the output. So, we want to keep testing the OVP fault condition if there is a pre-existing fault. Also add a hysteris and ensure we recover from OVP only when we go under the new threshold. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=chrome-os-partner:28331 TEST=trigger an OVP using a voltage source and see the output is not re-enabled until we shutdown the voltage source. Change-Id: Idef3f630c3cfeb301e62f1e75c2a424b56bc98dd Reviewed-on: https://chromium-review.googlesource.com/206185 Reviewed-by: Alec Berg <alecaberg@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* cprints: Revert some changes from CPRINTF to CPRINTSAnton Staaf2014-07-034-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | These changes were made in files that did not have the [%T ... ] pattern. These files were broken by the change because they still contained uses of the CPRINTF macro. There were two options to fix this, switch to the CPRINTS macro and get the timestamp added to these strings, or switch those files back to defining the CPRINTF macro. Switching back seems like the right thing since it doesn't change the output of those debug messages. This commit also adds newline termination to a few invocations of CPRINTF that were missing it, but obviously wanted it. This breakage is only visible with a particular set of CONFIG_ defines that no boards currently use. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=none TEST=make buildall -j Change-Id: I784b52dc385b29f05d7b9bc1521e37597409153b Reviewed-on: https://chromium-review.googlesource.com/206281 Reviewed-by: Vic Yang <victoryang@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org>
* mec1322: Keep CPU at high clock frequency to speed up hibernateVic Yang2014-07-031-6/+6
| | | | | | | | | | | | | | | | | | | | | When going into and waking from hibernation, we should keep CPU at high clock frequency so that we can save and restore chip state faster. This is especially true for the wake-up case as it affects AP boot time. This CL keeps the CPU at 12MHz for saving state and clocks it up to 48MHz for restoring. With this, the wake-up time (time from GPIO interrupt to completely restoring chip state) reduces from 11ms to 0.85ms. BUG=None TEST=Measure wake-up time with logic analyzer BRANCH=None Change-Id: Ib470a3d38959247b082cc7a5fd2d889cdc2a15ca Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/206308 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* stm32: move spi init to HOOK_CHIPSET_PRE_INIT.Louis Yung-Chieh Lo2014-07-022-5/+7
| | | | | | | | | | | | | | | The SPI init should run before we power up AP. Otherwise, the AP would try to talk to EC before the EC SPI is ready. This could fail the first SPI transcation. BUG=chrome-os-partner:30083 BRANCH=Tot,nyan TEST=build and run on Nyan only. Change-Id: Ie40ba5210c49446c94c01d697aa66568730de83f Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/206181 Reviewed-by: Vic Yang <victoryang@chromium.org>
* mec1322: restore system states after hibernateVic Yang2014-07-021-18/+81
| | | | | | | | | | | | | | Save system states before hibernating and restore them after waking up. This saves us from needing to reboot every time we wake up. BUG=None TEST=wake from hibernate. Check UART, ADC, and timer are working. BRANCH=None Change-Id: I044fb8a796e1560c0f748d766f4aeee4dda23342 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/205954 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* mec1322: improve UART Tx performanceVic Yang2014-07-021-3/+7
| | | | | | | | | | | | | | | | | | | | On MEC1322, we don't have indication of empty space in transmit FIFO. To work around this, we needed to look at Tx FIFO empty bit instead. However, this effectively made the FIFO length one. This CL fixes this by only checking Tx FIFO empty bit every 16 characters written to Tx FIFO. This is assuming the UART module works the same way as 16550 UART, which has a 16-byte FIFO. In a simple bulk write test, this improves Tx performance by 30%. BUG=chrome-os-partner:24107 TEST=Build and boot. Check console still works. BRANCH=None Change-Id: I97a6f42bd11be6bb18bc339af6d9b0cf2bae4845 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/206160 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* pd: add support for suspending the taskDominic Chen2014-07-023-1/+39
| | | | | | | | | | | | | | used by usb debug, which uses the same spi port BRANCH=none BUG=none TEST=verify PD communication works after suspend with two fruitpies Change-Id: I9d7e963fc27dc5303a8b87a9ddb68e97600a5a10 Signed-off-by: Dominic Chen <ddchen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/202992 Reviewed-by: Alec Berg <alecaberg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* fruitpie: add board specific initialization and debug codeDominic Chen2014-07-022-0/+115
| | | | | | | | | | | | | remap DMA at startup, add function to switch mux and set gpio for usb debug BRANCH=none BUG=none TEST=verify that gpio/mux set correctly for debug Change-Id: I2ca39025c0cba3b5d04946ec4685a81c4de2d49f Signed-off-by: Dominic Chen <ddchen@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/203493 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* gpio: Reformat gpio.inc files to use longer than 80-column linesAnton Staaf2014-07-0111-751/+387
| | | | | | | | | | | | | | | | | | | These files are tabular data more than source code. We discussed and concluded that the 80-column limit makes them harder to read, not easier. This commit reformats them to take advantage of longer lines, mainly by putting per GPIO comments on the end of the line that defines the GPIO. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=none TEST=make buildall -j Change-Id: I60f3e3620680196eb9462f97b34c453289240465 Reviewed-on: https://chromium-review.googlesource.com/205672 Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org>
* mec1322: Disable auto read after a SPI transactionVic Yang2014-06-281-0/+9
| | | | | | | | | | | | | | | The auto mode keeps the read buffer full and thus interfere with the next transaction. We need to disable it when we are done with the current transaction. BUG=chrome-os-partner:29805 TEST=Read from SPI flash multiple times BRANCH=None Change-Id: I624299aae29fecde03e41228a694550f1deafd2a Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/205799 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* samus: add retry mechanism for EC to PD host commandsAlec Berg2014-06-283-2/+15
| | | | | | | | | | | | | | | Add a retry mechanism for EC to PD host commands to make the communication channel more robust. BUG=none BRANCH=none TEST=run on system to verify that we don't drop host commands to PD MCU. Change-Id: Ida6f02a149e4dd9e85a5aac21790928b16864104 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/205148 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* samus: temporary fix to allow dead battery charging w/o AC PRESENT signalAlec Berg2014-06-271-0/+25
| | | | | | | | | | | | | | | | | This is a temporary workaround to allow dead battery charging without an AC PRESENT signal by delaying going into hibernate with an extremely low value in order to check if AC is present by waiting for PD MCU. BUG=chrome-os-partner:29842 BRANCH=none TEST=Test with a dead battery that when you plug in AC and reboot, it is able to charge. Previous to this change with a dead battery and AC plugged in the EC would boot and almost immediately go back into hibernate Change-Id: I338a0cc9ee37dab3e6caf29369ac6e819772ca91 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/205147 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* samus: set various GPIOs to interrupt on deep sleepAlec Berg2014-06-271-5/+5
| | | | | | | | | | | | | Set input points to interrupt on deep sleep as necessary. BUG=none BRANCH=none TEST=make -j buildall and run on system without any notable differences. Change-Id: I7bcf336a676e259dfa4c73ffc7152f16f14093d2 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/205146
* samus: hack to read AC present state from PDDuncan Laurie2014-06-277-7/+96
| | | | | | | | | | | | | | | | | | The ACOK input to the EC is not connected to the charger so that signal cannot be relied on for AC presence. Instead have the PD report when it negotiates to 20V and when it disconnects and have the EC use that for AC presence. BUG=chrome-os-partner:29841 BRANCH=none TEST=test charging with zinger on samus system. Change-Id: Ia9096a24ab05d110e31910218dc8c214a846a9a4 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/205145 Reviewed-by: Bill Richardson <wfrichar@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* mec1322: Add SPI master driverVic Yang2014-06-268-0/+157
| | | | | | | | | | | | | | This allows us to use the two SPI ports as SPI master. Also, to save CPU time on reading large amount of data, let's add an async interface for SPI transaction. BUG=chrome-os-partner:29805 TEST=Read manufacturer ID from SPI flash with sync/async interface BRANCH=None Change-Id: I427f4215602cccc55c4151f4116226b1e0ccc15e Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/204719
* gpio: Replace duplication in gpio declarations with X-macro fileAnton Staaf2014-06-2667-2467/+1761
| | | | | | | | | | | | | | | | | | | | | Previously each board.h and board.c contained an enum and an array for gpio definitons that had to be manually kept in sync, with no compiler assistance other than that their lengths matched. This change adds a single gpio.inc file that declares all gpio's that a board uses and is used as an X-macro include file to generate both the gpio_signal enum and the gpio_list array. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=none TEST=make buildall -j Change-Id: If9c9feca968619a59ff9f20701359bcb9374e4da Reviewed-on: https://chromium-review.googlesource.com/205354 Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org>
* ectool: Add back support for version 0 of batterycutoff commandDave Parker2014-06-262-9/+25
| | | | | | | | | | | | | | | | | | | | | | | ectool must support all prior versions of commands that shipped EC binaries use. BUG=chrome-os-partner:29830 BRANCH=None TEST=Manual With an EC that only supports version 0: - Run 'ectool batterycutoff' -> success - Run 'ectool batterycutoff at-shutdown' -> error with explicit message about at-shutdown not being supported - Run 'ectool batterycutoff foo' -> error, bad parameter With an EC that support version 0 or 1: - Run 'ectool batterycutoff' -> success - Run 'ectool batterycutoff at-shutdown' -> success - Run 'ectool batterycutoff foo' -> error, bad parameter Change-Id: Ia88cfc5fa7c5125828ec0595f0b6a505916c97ea Signed-off-by: Dave Parker <dparker@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/205155 Reviewed-by: Vic Yang <victoryang@chromium.org>
* zinger: tune over-current protectionVincent Palatin2014-06-262-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | As per the new spec, use the fast OCP to protect against the short-circuits by putting the threshold at 4.5A. Set the slow OCP (a few dozen milliseconds latency) at 3.6A to limit the accepted current range. Also sample the current/voltage over a larger period (5us) to limit noise issues. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=chrome-os-partner:28331 TEST=plug Zinger on an electronic load and trigger the OCP with various pulses. Change-Id: Ia66cd186716aebf88646cbf5fd340388f8cdd48d Reviewed-on: https://chromium-review.googlesource.com/204590 Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Todd Broch <tbroch@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* mec1322: DMA driverVic Yang2014-06-264-0/+206
| | | | | | | | | | | | | | | This implements the DMA driver using the same DMA interface we are using now. BUG=chrome-os-partner:29805 TEST=Along with the following SPI driver, read manufacturer ID from SPI flash. BRANCH=None Change-Id: Ife3c0c8b414568ff1cab7d072901ba2d11142a17 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/205067 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* samus_pd: Allow samus PD MCU to negotiate before battery is detected.Duncan Laurie2014-06-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | This is a temporary hack to allow PD MCU to negotiate for 20V before EC tells it that the battery is present. This is currently necessary because at 5V, we don't have enough power to boot the AP, and we can't wait to boot the AP until we negotiate because the zinger tends to get stuck in an infinite reboot loop when the AP is off. Note that this will need to be removed when we implement PD software sync because the whole point of that is to not talk to outside world until we verify our code. BUG=chrome-os-partner:29840 BRANCH=none TEST=Tested on samus 2A and 2B boards, made sure system could boot with and without battery. Change-Id: I03f319bf81b4e90758132e774848dff5542f4ce5 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/205144 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* samus: fix input current to 2048Duncan Laurie2014-06-242-2/+2
| | | | | | | | | | | | | | | | | | | | | | This changes the input current limit to 2048mA with no ramp up. Problem is that the bq24773 is doing a really poor job of measuring input current, so even though the zinger side can support 3A, the samus side can cause over currents down to 2300mA. This is set consertavily to avoid over current errors and will need to be updated when the hardware allows. BUG=chrome-os-partner:24461 BRANCH=none TEST=Used bench top power supply to power multiple samus 2A proto boards and gathered data on max current samus was drawing based on input current setting. Samus was often underestimating current by 300-700mA. Change-Id: Iabeb0d026f2b72a9ee539d92579ee6d11aeaa56b Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/205143 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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