| Commit message (Collapse) | Author | Age | Files | Lines |
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Like Samus, the battery can be placed into a disconnect state. This CL
implements the necessary function to determine if it is so and kick it
out of this state when possible.
BUG=chrome-os-partner:30633
TEST=Put a battery in this state. Plug in AC. Verify the battery is
revived.
BRANCH=None
Change-Id: I074a72a2efe3844cbdfb0eda16a25fd8d1755a9b
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/209634
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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Fix bug in which we were using the wrong index to the USART register
macros. This bug was recently introduced in:
https://chromium-review.googlesource.com/208488
BUG=none
BRANCH=none
TEST=load code on zinger and verify serial console works
Change-Id: I03142a8cafb68e0cbbcba4b720e7ec89fe20110b
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/209557
Reviewed-by: Anton Staaf <robotboy@chromium.org>
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We are running out of RAM space for samus_pd. Let's disable test
binaries for now. Note that this has nothing to do with unit tests.
BUG=None
TEST=make BOARD=samus_pd tests. Nothing happens.
BRANCH=None
Change-Id: I39db9b914e8539b4585a93a8732dc42248a9a6bf
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/209781
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Alec Berg <alecaberg@chromium.org>
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Fixed "un-recognized battery Manuf:Simplo, Device:0C9".
BUG=None
TEST=Read the correct battery info in the log
BRANCH=None
Change-Id: I960729541203705c15157aae61833457b727efa4
Signed-off-by: zyw <zyw@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/209402
Reviewed-by: Alexandru Stan <amstan@google.com>
Commit-Queue: Alexandru Stan <amstan@google.com>
Tested-by: Alexandru Stan <amstan@google.com>
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Check for warm reboot before initializing ADC. Part of the initialization
process involves calibration of the ADC, which can only be done when the
ADC peripheral is disabled. This fixes a bug on samus_pd where jumping to
RW causes a watchdog because ADC reads hang.
BUG=chrome-os-partner:30079
BRANCH=none
TEST=on samus_pd, without this change running sysjump rw causes us to jump
to RW and then causes a watchdog. With this change sysjump rw works. Also
verified that PD communication works in RW, which means ADC channels are
being read correctly after jumping to RW.
Change-Id: Iaa41da4795c3d15a6db56b0d715e36c29417d9b6
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/209331
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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BUG=none
BRANCH=none
TEST=verify timeouts are caught by spi_transaction_*()
Change-Id: I2e28ccbce58e555262bc4448a1c2e1a50253613e
Signed-off-by: Dominic Chen <ddchen@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/209116
Reviewed-by: Vic Yang <victoryang@chromium.org>
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This patch is base on new hardware board, veyron has not some stuff,
such as power led, charge en
BUG=None
TEST=Read log with servo board, it has reponse when type some commends
BRANCH=None
Change-Id: I45502fd1278f69db5e46fc9ab1deaee02fc8708f
Signed-off-by: zyw <zyw@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/209231
Reviewed-by: Alexandru Stan <amstan@google.com>
Commit-Queue: Alexandru Stan <amstan@google.com>
Tested-by: Alexandru Stan <amstan@google.com>
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The Samus battery can be placed into a disconnect state by asserting a
disconnect input signal. In this state, the battery will not function
until a charging current is applied. This patch adds detection of the
disconnect state. If a battery in disconnect state is found, a current
is force-applied to the battery to kick it out of disconnect.
BRANCH=None
TEST=Manual on Samus.
1. Put battery into disconnect state
2. Pull AC, then reattach AC
3. Verify "found battery in disconnect state" is seen on the
EC console.
4. Pull AC and verify that EC console is still accessable
Also verify that battery gets out of reset state:
1. Pull AC
2. Issue "i2cxfer w16 0 0x16 0x0 0x12" command on EC console
3. Re-attach AC
4. Pull AC and verify that EC console is still accessable
BUG=chrome-os-partner:29465
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: Ib4268887fb483094ac4e641749200268160d3014
Reviewed-on: https://chromium-review.googlesource.com/209013
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Alec Berg <alecaberg@chromium.org>
Tested-by: Alec Berg <alecaberg@chromium.org>
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Only one EC was an i2c slave, samus_pd.
Now we have 2 more, ryu and ryu_sh (sensor hub).
Define a new variable: CONFIG_HOSTCMD_I2C_SLAVE_ADDR
TEST=Compiled
BRANCH=None
BUG=chrome-os-partner:30740
Change-Id: I484aaf5ca72f14a91ce261b91fbe600dca3474dc
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/208978
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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We want repeated start instead of stop+start. Apparently, we need to set
START bit along with read configuration. Otherwise, the I2C module
generates a STOP condition.
BUG=None
TEST=Monitor I2C with a logic analyzer. See repeated start instead of
stop+start.
BRANCH=All using stm32f0.
Change-Id: I47491e240f2543e5d023e950d15468ec0e3c301b
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/208760
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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We are now using argv[5] even if the user only gives 5 arguments. Fix
it.
BUG=None
TEST=Read with i2cxfer command and doesn't see "Invalid param 5"
BRANCH=None (this can be worked around by adding a dummy param)
Change-Id: Ice13fec4ad53c71b6529daa3510fa6fc1d7f8c00
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/208489
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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Previously these macros took a small integer to identify the USART
to access. This integer was token concatenated to form the macro
name that resolved to the base address. This made it imposible to
use these macros in a driver that could manage more than one USART
because there was no runtime way to go from base address (or other
unique identifier) to register address.
This change makes it possible to pass either a static compile time
known base address or a runtime variable with the base address,
thus supporting either sort of driver. The existing USART driver
has been updated to compute the base address of the console USART
and pass that at compile time, resulting in no increase in code
size.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=none
TEST=make buildall -j
Followed by manual testing of console over UART functionality
on the STM32F072 based discovery board.
Change-Id: I06547a173b1e5cf625a57019ea4b8a84d1768444
Reviewed-on: https://chromium-review.googlesource.com/208488
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
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Correctly set CC1 transmit pin to a high speed output.
BUG=none
BRANCH=none
TEST=make -j buildall
Change-Id: I54d0d8ae3ea485728e340430bbb63ecf24c10bd6
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/207995
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Provide access to the EC console through 2 USB bulk endpoints.
(which can be used through the usbserial driver)
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=run on Fruitpie and use the console over USB
Change-Id: Ia897764f3a030972ee2ed323f293c5fca899765a
Reviewed-on: https://chromium-review.googlesource.com/204167
Reviewed-by: Anton Staaf <robotboy@chromium.org>
Commit-Queue: Vic Yang <victoryang@chromium.org>
Tested-by: Vic Yang <victoryang@chromium.org>
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This is a straightforward conversion of existing tables
into X-Macro style definitions for the GPIO alternate
functions. This change in itself, is not particularly
powerful, but having all GPIO settings in a single file
makes a board easier to understand.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=none
TEST=make buildall -j
Followed by manual testing of interrupt on change and UART
functionality on STM32F0 based discovery board.
Change-Id: Ib7f1f014f4bd289d7c0ac3100470ba2dc71ca579
Reviewed-on: https://chromium-review.googlesource.com/207987
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
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Previously the F0 and L variants had almost identical driver files
and the F variant shared about half of its driver. This refactor
moves the shared code into gpio.c and gpio-f0-l.c, the latter
is for code shared between the F0 and L variants.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=none
TEST=make buildall -j
Followed by manual testing of interrupt on change and UART
functionality on STM32F0 based discovery board.
Change-Id: I920babd1861548272af2857c8bd3e4f9dac4985c
Reviewed-on: https://chromium-review.googlesource.com/207986
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
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BUG=chrome-os-partner:29053
BRANCH=ToT
TEST=Set a default change mode other than SDP2 in a board
config. Verify the 'usbchargemode' console command indicates
the ports are operating in that mode.
Change-Id: I0d572df726c4bb42d0ff5f40c06d8ea73e406283
Signed-off-by: Dave Parker <dparker@chromium.org>
Origianl-Change-Id: I4a65d8b6ad14ff3d1f12b644960bbf401027f8df
Reviewed-on: https://chromium-review.googlesource.com/205812
Reviewed-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/208162
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The ILIM control line is inverted before reaching the USB charge
controllers when they are cross-connected to allow only one port
to deliver the HIGH current limit at a time.
BUG=chrome-os-partner:29053
BRANCH=ToT
TEST=Verify, with a multimeter, that ILIM (pin 4) on a TPS2546
is 3.3V when the chargemode is set to CDP
Change-Id: I2f720d04b959417ae96687d7e30ee60270eeccb9
Original-Change-Id: Idd89dcfc117f1f3393ded1887e8d1cb27ba367ad
Signed-off-by: Dave Parker <dparker@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/205811
Reviewed-by: Vic Yang <victoryang@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/208161
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When emerging chromeos-ec for ryu the build blows up when doing
tests. Remove all tests for RYU so that we can start building the
EC code through the build system.
BUG=chrome-os-partner:30659
BRANCH=None
TEST=Can emerge-rush_ryu chromeos-ec
Change-Id: I293f2640891f42cfea0eb8aeb1ff1de603db9a93
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/208063
Reviewed-by: Vic Yang <victoryang@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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With only mini-PCIe devices, we don't need to wait for the full 99ms that
PCIe devices require.
BUG=chrome-os-partner:25530
BRANCH=ToT
TEST=manual
Log in, connect to the web via WiFi. Close the lid, wait a bit, open the
lid. WiFi should resume and still work.
Change-Id: I24d6ae95607f8f9a0fa70aebf5eaa0ebd68260f6
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/200084
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
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This allows sending host commands to the PD chip through the EC.
The --interface option allows forcing a particular host interface.
This is necessary at present because the crosec device driver doesn't
support host protocol v3 so only has 8-bit command numbers.
BUG=chrome-os-partner:30079
BRANCH=none
TEST=from EC console,
ectool version -> prints EC version
ectool --interface=lpc --dev=0 version -> prints EC version
ectool --interface=lpc --dev=1 version -> prints PD version
ectool --interface=lpc --dev=2 version -> prints error
ectool --interface=i2c version -> can't find EC
ectool --interface=dev version -> prints EC version
Change-Id: I9dd10578dac77e3e104d19e2f37759814eec6ca2
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/207948
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This CL factors out the SPI flash driver to be a STM32-specific SPI
master driver and a common SPI flash driver.
BUG=None
TEST=Verify on Fruitpie
BRANCH=None
Change-Id: I9cca918299bc57a6532c85c4452e73f04550a424
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/206582
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Daming Chen <ddchen@chromium.org>
Tested-by: Daming Chen <ddchen@chromium.org>
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This is needed for supporting device passthru. Right now, the --dev
option simply prints an error.
BUG=chrome-os-partner:30079
BRANCH=none
TEST=manual
ectool -> prints an error
ectool help -> prints list of commands
ectool version -> prints EC version
ectool --dev=0 version -> prints EC version
ectool --dev=1 version -> prints error about bad device 1
ectool --dev=0 -> prints an error (because there's no command)
ectool --dev=0 foo -> prints 'unknown command foo'
Change-Id: I0f431a4789428cd6cc8ef48b396b38237935282a
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/207904
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Add support for toggling between source and sink as dual-role
port. When transitioning to S0, we turn toggling on, when transitioning
to S3, we turn toggling off but remain in the same PD state, and when
transitioning to S5, we turn toggling off and force the PD role to a
sink.
Note, when toggling is off, the source disconnected state is
allowed to transition to sink disconnected, but not vice versa. This
means that if you go into S3 as a source, it will remain a source
until the device is unplugged, at which point it will transition to
a sink until the next transition to S0.
The spec specifies:
tDRP: 50ms - 100ms, Period a DRP shall complete a DFP to UFP and back
dcDRP: 30% - 70%, Percent of time that a DRP shall advertise DFP
tDRPHold: 100ms - 150ms, time to hold VBUS on after a DRP detects a UFP
tDRPLock: 100ms - 150ms, time to stay in DFP after detecting loss of UFP
This CL uses 40ms for time as a UFP (sink), 30ms for time as a DFP
(source), and 120ms for hold and lock times.
Also, if advertising as a DFP (source) and VBUS is detected, this
automatically switches to a UFP (sink).
BUG=chrome-os-partner:28782
BRANCH=none
TEST=test on samus, make sure we are toggling between source and sink
when disconnected. make sure plugging in zinger switches state machine
through to sink_ready and make sure plugging in a USB switches to
source_discovery. tested on a fruitpie by scoping the CC line and verifying
the timing (except the hold time which I can't easily test).
tested that dual role toggling is off in s3 and s5. also verified that
going into s3 as a source keeps the port as a source and going into s5
switches it to a sink.
Change-Id: I478634861f694164301d71359da35142ee7ebf75
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/207154
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Host commands in the range 0x4000-0x7fff will be passed thru the EC to
the PD MCU as 0x0000-0x3fff.
BUG=chrome-os-partner:30079
BRANCH=samus
TEST=manual. On PD console:
hcdebug params
On EC console:
hostcmd 2 0 -> hex string of EC version
hostcmd 0x4002 0 -> hex string of PD version, and PD console shows host
command 2 was received. The hex response shown on the PD console
matches the one printed by the EC
Change-Id: Icc2d97c5977145a0c3ad2630d2b5a19e876a36d0
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/207821
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
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The 2 boards are similar enough to test stuff on big for now, at least
until the new hardware comes.
Also added veyron to flash_ec.
Also cleaned up the style: pre-upload.py was giving errors on files
that were unmodified from big(spaces instead of tabs).
I had to ignore this though:
> ERROR: Macros with complex values should be enclosed in parenthesis
> #471: FILE: board/veyron/board.h:35:
> +#define KB_OUT_PORT_LIST GPIO_A, GPIO_B, GPIO_C
BRANCH=none
BUG=chrome-os-partner:30167
TEST=~/trunk/src/platform/ec $ make BOARD=veyron clean &&
make -j BOARD=veyron && util/flash_ec --board=veyron --ro
verify ec is alive and version is reported as veyron
Change-Id: I1f4bd562c0ab55360a2160a753ad8ad9b58f8c47
Signed-off-by: Alexandru Stan <amstan@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/207270
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
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Revert
- https://chromium-review.googlesource.com/#/c/205145/2
- https://chromium-review.googlesource.com/#/c/205147/4
Now using the real AC_PRESENT gpio signal instead of whether or
not the PD MCU negotiated for 20V.
BUG=chrome-os-partner:29841, chrome-os-partner:29842
BRANCH=none
TEST=tested on a board with reworked AC_PRESENT signal. Verified
that gpio is correctly reporting state of AC and is charging when
AC is plugged in. Tested the no battery case to make sure
board powers on and stays on with just a charger. Also tested the
dead battery case by plugging in a dead battery, then plugging in
a charger and making sure system powers on and starts charging.
Change-Id: I4424771c91c8a2aa19eda68a8b5194e9265d529c
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/206598
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
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- tune stack sizes
- re-order properly the ADC definitions
- select the right battery gas gauge
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=on Ryu, exercise ADC and battery using the EC command-line.
Change-Id: Idc307b1c1ce1d35e7b5fa2c86f956cc4c8b08783
Reviewed-on: https://chromium-review.googlesource.com/207272
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
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Import code to do 64-bit multiplication on Cortex-M0 core without SMULL
instruction.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=make buildall
add a 64-bit multiplication and see it compiled properly.
verify in .map files that the code is discarded for cortex-M0 based
platforms not using the 64-bit multiplication.
Change-Id: I0a91b3502f4bee4bb79b193fe0854e56a7d498f7
Reviewed-on: https://chromium-review.googlesource.com/207132
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
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Use the power signal list abstraction everywhere to access the SUSPEND_L
GPIO.
This is preparatory work for Ryu, so we can change the suspend GPIO name
and active level.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=make buildall
Change-Id: I1ad3471600f1207986a6be9d8c3c627ab73796ac
Reviewed-on: https://chromium-review.googlesource.com/207151
Reviewed-by: Yung-chieh Lo <yjlou@chromium.org>
Reviewed-by: Vic Yang <victoryang@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
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This version of the EC firmware just provides a console and some
blinking lights for the stm32f0 discovery board. This is a
convenient board to work with for peripheral bringup.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=none
TEST=make buildall -j
Change-Id: I9ae87235e8a505d58fa7a5c996528c4dd6c3f2ac
Reviewed-on: https://chromium-review.googlesource.com/207130
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
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Now that gpio_get_level() always returns actual pin states, we can
simplify i2c_raw_get_scl/sda().
BUG=chrome-os-partner:26483
TEST=make buildall
BRANCH=None
Change-Id: Ifefb6fa5da8f566b44c419a0ea5adec41f8925e3
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/207057
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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BRANCH=none
BUG=none
TEST=manually verify against chip using console commands and logic analyzer
Change-Id: I9b9e3137a72eab5c39a69c81ee2ffd1c504d841c
Signed-off-by: Dominic Chen <ddchen@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/202333
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Add the Ryu board configuration and USB Power Delivery configuration.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=make BOARD=ryu
Change-Id: I61f6f19dc9fe19e1d9f9017c1050fc8a30a862e7
Reviewed-on: https://chromium-review.googlesource.com/206586
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
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The HW signals to control the type-C ports muxing have changed between
Fruitpie and Samus, update the code to match the HW.
Also add the docking mux option and update the board muxing code to
prepare for the automatic mode detection :
- the polarity will be determined by the PD code.
- the port muxing will be enable/disable by the common alternate mode PD
code.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=make buildall
Change-Id: I0706626270c73d2a5e3f85b86e65a7c4fc21f9ec
Reviewed-on: https://chromium-review.googlesource.com/206685
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
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Use the interrupt as faster detection when VBUS is going off, so we are
not missing when the source is cutting its output due to a fault.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=Connect Firefly to Zinger, trigger a short OCP with the electronic
load, once Zinger has recovered from the fault, see Firefly
re-negotiating voltage.
Change-Id: I4d273a0007d1e79884e0acbf75509ab9c8578893
Reviewed-on: https://chromium-review.googlesource.com/207031
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
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For open-drain output pins, this would allow us to easily check pin
state without changing it to input.
BUG=chrome-os-partner:26483
TEST=Toggle output level and read it back.
BRANCH=None
Change-Id: Ia7ceb7a221a8f0cfec9b19a5c5baae4d5441150f
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/207060
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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When we reset the PD power source, ensure we always transition to
DISCONNECTED state, so we will re-enable the 5V power when transitioning
back from DISCONNECTED to DISCOVERY.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=Plug Firefly to Zinger and play with voltage transition buttons.
Change-Id: Ifa0f30391b2249b54385ce8c93df932e37803695
Reviewed-on: https://chromium-review.googlesource.com/206954
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
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Change PD sink to use VBUS for initial detection to match
USB type C spec.
BUG=chrome-os-partner:30116
BRANCH=none
TEST=Tested on samus. Connect and disconnect zinger a few times
and make sure we successfully negotiate each time.
Change-Id: Ifa9ff301cb34b6df6609d4bbbde3231bb029d554
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/207000
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Verify the connection status at every FSM loop,
by monitoring VBUS presence for the sink and by monitoring CC going
above Vnc for the source.
Also ensure we are never stuck in the source transition state in the
sink doesn't ack the PSReady packet.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=connect Firefly to Zinger, trigger hundreds of voltage transition,
record and analyze the PD traffic : no longer see spurious PSReady
messages.
Change-Id: I4495ae5415d53d77055fb2a562c594fa9a1d4dc8
Reviewed-on: https://chromium-review.googlesource.com/206945
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Tested-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
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Enable the VBUS detection to be able to re-negociate a PD contract when
we are losing power.
The VBUS_WAKE GPIO is broken on the current hardware (not triggered when
VBUS is 5V), so we fall back on using the ADC on VBUS_SENSE.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=With a Firefly connected to a Zinger,"fault" the power supply to
get it to turn off its output. See Firefly detecting the cut-off and
re-negotiating voltage.
Change-Id: Ia5f0734cbd8f20d84ce170cea191410bb72a87c3
Reviewed-on: https://chromium-review.googlesource.com/206944
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
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(cherry-pick back to ToT)
If the AP de-asserts the SPI NSS pin while host command handler is
still processing the command, we would delay the Rx DMA setup later.
If this case happens, the pending result of handler will be dropped.
BUG=chrome-os-partner:28979
BRANCH=tot,nyan
TEST=build and play around on big.
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/204427
Reviewed-by: Randall Spangler <rspangler@chromium.org>
(cherry picked from commit 4be73492817f3f6c24ece75fed33eb956c0038b8)
Change-Id: Ie2a6550696760eadad3b0d6e3a4e56a2b29abdda
Original-Change-Id: I371a2a0b96b1ee0602be91338bd53d13f6abbd2e
Reviewed-on: https://chromium-review.googlesource.com/206922
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Yung-chieh Lo <yjlou@chromium.org>
Tested-by: Yung-chieh Lo <yjlou@chromium.org>
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BRANCH=none
BUG=none
TEST=verify usb operation with mac 10.7.3
Change-Id: I137a20637273b9a8683470ae42337a8d38e1b038
Signed-off-by: Dominic Chen <ddchen@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/206931
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Once the source has successfully sent a SourceCap packet (ie it got
acked), it needs to transition from the DISCOVERY to the NEGOCIATE
state.
This was done when the source was sending unsolicited SourceCap, but
this was missing when the SourceCap was an answer to a Sink GetSourceCap
request. The usual effect of the missing transition was sending twice
the SourceCap triggering some collisions.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=plug a Zinger to a Firefly, randomly push the Firefly voltage
selection buttons and see the transition always happening properly.
Change-Id: If4b335e2144595f22ad4e9a8a9e289506f597407
Reviewed-on: https://chromium-review.googlesource.com/206941
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
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The default VBUS voltage is 5V, let's switch on the matching LED rather
no LED when no voltage has been selected.
This allows to know that the board is powered.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=none
TEST=power up Firefly and see the 5V LED ON (if the cable is plug) or
blinking (if the cable is unplug).
Change-Id: I8f6525bc6f901daf21af9b20eede2a9b1e8dbfdf
Reviewed-on: https://chromium-review.googlesource.com/206940
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
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Fix motion_sense unit test flakiness by making sure that the lid
angle calculations ran by checking LPC sample id number instead of
relying on a fixed time delay.
BUG=chromium:391625
BRANCH=none
TEST=make -j runtests
Change-Id: I6e879ef28837e62e0c9d4e5f05e0165fa9f9a966
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/206878
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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this fixes the previous patch to correctly restore the GPIO
BRANCH=none
BUG=none
TEST=verify that GPIO state after restore matches default
Change-Id: I42f73d21399f5e9429dfb50aacb6aba59ba33315
Signed-off-by: Dominic Chen <ddchen@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/206905
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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This test checks:
- flash_is_erased() returns true when flash is erased.
- flash_is_erased() returns false when the entire flash except one
byte is erased.
BUG=chrome-os-partner:30281
TEST=Check this test fails without the fix for flash_is_erased(), but
passes with it.
BRANCH=all (if the fix is cherry-picked)
Change-Id: Id4fe5591381cabcdad9bb16ba820acd48e92ba13
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/206897
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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This caused all platforms to check only the first 25% of each page to
see if it's already erased. Fortunately, we tend to fill flash pages
from the beginning, so in normal usage we don't hit this bug.
BUG=chrome-os-partner:30281
BRANCH=all (if convenient)
TEST=Make sure CONFIG_CMD_FLASH is defined. Then at the EC console:
flasherase 0x1f000 0x400
rw 0x1f3e0 -> 0xffffffff
flashwrite 0x1f3e0 0x20
rw 0x1f3e0 -> 0x03020100
flasherase 0x1f000 0x400
rw 0x1f3e0 -> 0x03020100 (bad!) or 0xffffffff (good)
Change-Id: If78b08b5e0414993a440bc8cd707b5ce70eb1a0a
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/206891
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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(cherry-pick back to ToT)
The comment #20 of issue 29162 looks like a stack overflow to me.
The issue 29067 also shows the stack is overflowed in some case.
Let's increase that.
BUG=chrome-os-partner:29067,chrome-os-partner:29162
BRANCH=nyan,tot
TEST=build only. Should run RunIn.DozingStress.SuspendResume/RunIn.Reboot2.
Change-Id: Ic7fc7c8fa9e817b2db497ebedcdff6cb8c49c565
Origin-Change-Id: If3b97af578362eb6d2794b331716f499be7ad066
Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/204277
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/206921
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