summaryrefslogtreecommitdiff
Commit message (Collapse)AuthorAgeFilesLines
* samus: ryu: fix charge state machine init of input currentstabilize-6146.BAlec Berg2014-08-125-16/+37
| | | | | | | | | | | | | | | | | | | | | | Currently charge state machine resets input current limit to default every time AC is connected. Problem is by the time charge state machine gets around to setting input current, it could have already been set by successful PD negotiation, and this ends up overriding that value. This fix has the state machine store desired input current limit, as determined from PD negotation or any other place, and send last desired input current limit on AC connect. BUG=chrome-os-partner:24461 BRANCH=none TEST=load on samus, test toggling between "pd 0 dev 5" and "pd 0 dev 20", and test plugging and unplugging zinger numerous times, and verify charger command always gives the expected input current limit based on PD negotiation. Change-Id: I18d8acc9e2085739e783c9c70c682d46bcce7fdb Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/211639 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* firefly: default to requesting 20VAlec Berg2014-08-121-1/+1
| | | | | | | | | | | | | | | | Change default to request 20V. BUG=none BRANCH=none TEST=Load onto a firefly. Plug in a zinger, make sure 20V LED lights up. Press other buttons to make sure we can change the requested voltage to 5V and 12V. Change-Id: I3a3e63a6d0e4f01b9fe7c730468da75ad6783f41 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/211872 Reviewed-by: Vic Yang <victoryang@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* pd: modify PD to allow sending VDMs anytimeAlec Berg2014-08-113-68/+126
| | | | | | | | | | | | | | | | | | | | Change the VDM implementation in the PD task to allow for VDMs at any time when connected without disrupting any regular PD communications. BUG=none BRANCH=none TEST=load on a samus and on a zinger and test sending VDMs: pd 0 flash version pd 0 flash reboot Also, test using the flash_pd.py script to write zinger RW using VDMs. Change-Id: I48352978d8c45f78e8a5a7735d65b013a853f3e2 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/210746 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* pd: stop sending source cap after fixed number of attemptsAlec Berg2014-08-111-7/+15
| | | | | | | | | | | | | | | | | As per the PD spec, give up on sending source cap packets after nCapsCount number of attempts. BUG=chrome-os-partner:28341 BRANCH=none TEST=Connect samus to an unplugged zinger. Samus recognizes a device has been plugged in and sends source cap for 5 seconds (50 attempts at 100ms retry period), then stops sending source cap but remains in discovery state providing VBUS. Change-Id: I0aa25263f200299a0eb8d219883f825ae655129c Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/211335
* veyron: Porting to the new EC(STM32F071)Alexandru M Stan2014-08-114-18/+37
| | | | | | | | | | | | | | | | | | * Changed chip in build.mk * Renamed the Port H pins * Switched to 32bit timer * Remapped UART DMA Channel BUG=None TEST=Flash the new chip; UART Debug, SPI HC, I2C Battery should work. Everything else should work (besides power usage) BRANCH=None Change-Id: Ia73f3f6b4e8b7b42af4dfa592b7ff435ee379206 Signed-off-by: Alexandru M Stan <amstan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/210522 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Revert "Add unit test for usb_pd"Alec Berg2014-08-1112-754/+4
| | | | | | | | | This reverts commit 0739074fbf735cffefdac7ff6d086084449f6493. Change-Id: I1889138e5a8d5bc22d3bac2e48afe6378a59542a Reviewed-on: https://chromium-review.googlesource.com/211773 Reviewed-by: Prathmesh Prabhu <pprabhu@chromium.org> Tested-by: Prathmesh Prabhu <pprabhu@chromium.org>
* pd: use interrupt on Rx retryVic Yang2014-08-113-4/+19
| | | | | | | | | | | | | | | | | After sending a message, we wait for up to 2.7 ms for reply. If we don't get one, we retry for up to twice. Therefore, a undelivered message could take up to >8ms. To prevent starving other tasks, let's yield to other tasks on retries and rely on interrupt to wake us. BUG=chrome-os-partner:28341 TEST=Plug in zinger on port 0 and C-to-A dongle on port 1. Check that port 0 drops connection less frequently. BRANCH=None Change-Id: If85a70fd1140fef69d79243b198703ce601f8030 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/211281 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* pd: log state transition and stop logging pingsVic Yang2014-08-111-7/+23
| | | | | | | | | | | | | | | | | When PD state changes, log the state transition. Also, now that we have the state logged, logging pings doesn't help us anymore, so stop logging them to make console clean. BUG=None TEST=Run on samus_pd. Plug/unplug zinger. Check state is logged and pings are not. BRANCH=None Change-Id: Ib482b3351d9681fbb4bcc2585da58c732428b7af Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/211262 Reviewed-by: Alec Berg <alecaberg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Add more build conditions on x86-only code.Vincent Palatin2014-08-102-5/+5
| | | | | | | | | | | | | | | | | | | | ACPI and thermal throttling are used only by x86 platforms. Modify the conditional build to avoid building them where they are not used. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=none TEST=make buildall check the flash size on Ryu and see we are saving about 200 bytes with this changes. Change-Id: Ie5e1603fb3bea95eaa5cb1e6cb19f4ddb0e235e8 Reviewed-on: https://chromium-review.googlesource.com/210056 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* Add unit test for usb_pdVic Yang2014-08-1012-4/+754
| | | | | | | | | | | | | | Initial commit of usb_pd unit test. The test cases are very simple. We'll add more test cases in similar format. BUG=chrome-os-partner:31200 TEST=Pass usb_pd test BRANCH=None Change-Id: I9e3de5b2c032ee1d3670cde6d8227ce0378ae8a0 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/211643 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* pd: Move more protocol layer constants to header fileVic Yang2014-08-102-55/+57
| | | | | | | | | | | | | | | This is a preparatory work for USB PD unit test. With this, we won't need to duplicate these constants in both the implementation and the test. BUG=chrome-os-partner:31200 TEST=make buildall BRANCH=None Change-Id: Ia814a95450859caaa6d90e4cd866cb671d010b31 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/211653 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Hold I2C lock through entire PD read transactionShawn Nematbakhsh2014-08-091-2/+5
| | | | | | | | | | | | | | | | | | | I2C reads from the PD happen in two separate transactions, but no stop condition is set after the first transcation. Therefore, it is necessary to lock the I2C bus across both transactions to prevent other tasks from using the bus in between. BUG=chrome-os-partner:29839 TEST=Manual on Samus. Boot to recovery screen, plug + unplug power supply, verify that no I2C error messages are printed to console. Then repeat 100x. BRANCH=None. Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: Ie441637f499980a349022e281379ad2cc825b1aa Reviewed-on: https://chromium-review.googlesource.com/211649 Reviewed-by: Alec Berg <alecaberg@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* samus: ryu: set input current limit based on PD negotiationAlec Berg2014-08-0912-58/+114
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set input current limit based on the max current from the PD negotiation. For samus, this information is passed to the EC as a host command. For ryu, the max current is set directly following a negotiation. CONFIG_CHARGER_INPUT_CURRENT is now just the default limit, but after a successful PD negotiation, the limit can be raised. Note, for now the input current limit for samus is set to 2/3 of the value negotiated for. This is due to hardware problems measuring input current on p2b boards. BUG=chrome-os-partner:28532, chrome-os-partner:24461 BRANCH=none TEST=tested on a samus. Verified input current limit using "charger" console command from EC. Input current limit after a reboot is 512. When zinger is plugged in, it jumps to the appropriate value (currently 1280mA), and when the negotiation is changed using the "pd 0 dev 5" command on the PD console, the input current limit is adjusted to match (2000mA). Change-Id: Iab9186a0f9814655e3240217a9baf4a38f15f84d Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/211023 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* samus_pd: change port C1 PD comparator to use window modeAlec Berg2014-08-091-3/+4
| | | | | | | | | | | | | | | | | | | | | Change USBC port 1 PD comparator to use window mode, which uses COMP1's non-inverting input for COMP2's non-inverting input (pin PA1). This allows us to free up pin PA3 and PA7 for the next build. BUG=chrome-os-partner:31215 BRANCH=none TEST=make sure PD communication works on both ports by plugging in a zinger. Then set gpioset USB_C0_REF_PD_ODL 1, to change comparator voltage to 1.5 V and verify that neither port works. Then gpioset USB_C0_REF_PD_ODL 0 and gpioset USB_C1_REF_PD_ODL 1 and make sure that both ports work. This proves that both ports are using USB_C0_REF_PD_ODL as the comparator value (PA1). Change-Id: I6e1e5606af43196b04c84417552002b063aa4134 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/211416 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* stm32f0: stm32l: Fix backup register indexingVic Yang2014-08-081-0/+19
| | | | | | | | | | | | | | | On stm32f0 and stm32l, the backup registers are 32-bit. Fix the index calculation. BUG=chrome-os-partner:31214 TEST=On Ryu, save and load VbNvContext BRANCH=None Change-Id: I86e5dc31c80bed46a6fe13929c7e6a1d4ca9f97b Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/211462 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* i2c-stm32f0: Adjust scope of the I2C host codeAlexandru M Stan2014-08-081-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | HAS_TASK_HOSTCMD is not a good indicator that we intend to use I2C Host Commands On platforms such a veyron we use an STM32F0 with SPI HC for example however i2c-stm32f0.c was very eager to still provide host commands via I2C. If one wants to use I2C host commands they need to define CONFIG_HOSTCMD_I2C_SLAVE_ADDR anyway, so the presence of that is a better indicator. The boards that want I2C host commands are ryu and samus_pd. veyron/pinky needs SPI host commands, so this patch makes this case possible. The rest of the boards that use STM32F0 do not have HAS_TASK_HOSTCMD set. BUG=None TEST=make buildall -j BRANCH=None Change-Id: Ia5561afdc6e72019c24c5c4b775944b2b88cb950 Signed-off-by: Alexandru M Stan <amstan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/211434 Reviewed-by: Doug Anderson <dianders@chromium.org> Reviewed-by: Vic Yang <victoryang@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Move software CRC implementation to commonVic Yang2014-08-085-17/+32
| | | | | | | | | | | | | | | There is nothing chip-specific in the software CRC implementation. Let's move it to common so that we can reuse it for other chips and unit tests. BUG=chrome-os-partner:31200 TEST=Define CONFIG_SW_CRC for host. Check crc.c compiles fine. BRANCH=None Change-Id: Icdc1d105c55c38ff07410cb5d733a31dbac53aea Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/211494 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* STM32F0 SPI FixesAlexandru M Stan2014-08-082-6/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | The STM32F0 has a fancier SPI than the L1 series we've been using so far. Notably it supports 16 bit data packing. This mode is activated automatically by reading/writing to the SPI_DR register as 16 bits. We do not want this feature since we only do 8 bit operations. This change prevents a misalignment of the data where the MCU thinks it's doing 16 bit transfers and we want 8 bit transfers. Another unwanted feature is the FIFO. We rely on DMA and some buffers instead. Keeping the FIFO enabled causes extra characters. The way this patch disables the fifo is by changing the FIFO reception threshold to only 1 byte (which is the same behavior that L1 has with no FIFO). Setting the FRXTH bit on the L1 chips should not affect anything as that area of the register is reserved. BUG=none BRANCH=none TEST=Try SPI on both STM32L1xx(preexisting support, should not be broken) and STM32F0(new support/veyron) Change-Id: I90dc6bb8a82881e70058443591acaebc44ba982b Signed-off-by: Alexandru M Stan <amstan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/211476 Reviewed-by: Doug Anderson <dianders@chromium.org>
* samus_pd: add option to disallow PD communication in ROAlec Berg2014-08-072-0/+25
| | | | | | | | | | | | | | | | | | | | | Added a check for if we are in RO and write protect screw is present which will stop the PD task to prevent PD communication. By default this check is disabled since the p2 samus units do not have access to WP screw. This check will need to be enabled for EVT. BUG=chrome-os-partner:31125 BRANCH=none TEST=enabled the check, loaded on a p2 samus, and verified that in RO, the console prints out "PD not allowed" and there is no communication with an attached zinger. Then ran "sysjump RW" and verified that power negotiation with zinger succeeded. Signed-off-by: Alec Berg <alecaberg@chromium.org> Change-Id: I5007db659d8b057431426157a2150127b97a7b3f Reviewed-on: https://chromium-review.googlesource.com/211020 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* pd: add PD communication enable flagAlec Berg2014-08-073-5/+57
| | | | | | | | | | | | | | | | | | | | | | | Add PD communication enable flag. When disabled, the ports will still detect source/sink connect and disconnect, and will provide VBUS to a device, but will not send or respond to any PD communication. Use the CONFIG_USB_PD_COMM_ENABLED macro to define the default state of PD communication enabled flag which may vary board to board. BUG=chrome-os-partner:31125 BRANCH=none TEST=load onto samus. use "pd 0 enable" console command to toggle between enabled and disabled. when disabled, test that plugging in a zinger only gets you the default VBUS 5V and that no negotiation takes place. when enabled, test that plugging in zinger negotiates successfully. Change-Id: I78ac3091f12d9699b19647be48ab7b6f434f5d7d Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/211045
* pd: hard reset if we get unexpected PS_RDYVic Yang2014-08-071-1/+4
| | | | | | | | | | | | | | | If we are in SNK_DISCOVERY state and get PD_RDY, we are not sure what the power source is. In this case, instead of happily go to SNK_READY state, we should do a hard reset to be safe. BUG=None TEST=Check PD on samus/zinger still works. BRANCH=None Change-Id: I2baca06d45ba41e30d2ccf7a02fb65eb3966e5c1 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/210925 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* pd: hard reset if we get a request in disconnected statesVic Yang2014-08-071-15/+22
| | | | | | | | | | | | | | | If we are in disconnected states and get a request, it's likely either ourself or whatever on the other side is confused. Do a hard reset in this case. BUG=None TEST=None BRANCH=None Change-Id: Ic6504fccc55b79bd3ec4cc47007252e7dc69c778 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/210924 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* pd: clean up timeout handling in state machineVic Yang2014-08-071-54/+92
| | | | | | | | | | | | | | | | | In PD state machine, we often need to do "go to X state, and if after Y ms we are still in X state, go to Z state." However, we do this in a way that are suspectible to premature timeout if PD task is waken at an unfortunate time. Let's add methods to set the state w/ or w/o timeout to prevent this. BUG=None TEST=Boot on samus. Plug in zinger, and check we have 20V power. BRANCH=None Change-Id: I91db44ef71e31007eef4edd0f826bf81505e51e5 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/210874 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* charger v2: Apply charge current to full battery in disconnect stateShawn Nematbakhsh2014-08-061-1/+12
| | | | | | | | | | | | | | | | | | | If a battery is found in disconnect state, we need to apply a charge current to get it out of that state, even if the battery is full. BUG=chrome-os-partner:29465 TEST=Manual on Samus. Put full battery into disconnect state then power-on the EC. Pull AC and verify that the battery is no longer disconnected. BRANCH=None Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I43e872e225dc5a651f566d7b190cff85a487805e Reviewed-on: https://chromium-review.googlesource.com/210343 Reviewed-by: Alec Berg <alecaberg@chromium.org> Tested-by: Shawn Nematbakhsh <shawnn@chromium.org> Commit-Queue: Shawn Nematbakhsh <shawnn@chromium.org>
* pd: add missing CONFIG_USB_PD_ optionsAlec Berg2014-08-061-2/+14
| | | | | | | | | | | | | Add and undefine CONFIG_USB_PD_ options that were missing from config.h BUG=none BRANCH=none TEST=make -j buildall Signed-off-by: Alec Berg <alecaberg@chromium.org> Change-Id: I0e5d64736f2f04794f226872eaafc0984b48f05e Reviewed-on: https://chromium-review.googlesource.com/211044 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* veyron: Change EC_INT pin to high-Z in S5Chris Zhong2014-08-061-1/+4
| | | | | | | | | | | | | | | | Change EC_INT pin to high-Z to reduce power draw in S5, and reset it to output High in S5S3. BUG=None TEST=Leakage did not happen, other functions also work correctly. BRANCH=None Change-Id: Id77bb9f34f25336cd097344be349f5aa43a75b52 Signed-off-by: Chris Zhong <zyw@rock-chips.com> Reviewed-on: https://chromium-review.googlesource.com/210545 Reviewed-by: Alexandru Stan <amstan@chromium.org> Reviewed-by: Doug Anderson <dianders@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* zinger: change source capabilities to support 20V at 3AAlec Berg2014-08-061-1/+1
| | | | | | | | | | | | | Changed source capabilities table to support 20V at 3A. BUG=none BRANCH=none TEST=make -j buildall Change-Id: I9dac730fff7e148a2667da12fd23c35036191dfd Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/211022 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* samus_pd: remove dead code around allowing PD negotiationAlec Berg2014-08-0610-72/+4
| | | | | | | | | | | | | | | | | | | | Remove code for preventing PD negotiation until the battery is at some minimum SOC. This was originally necessary because transitioning voltages would cause the source voltage to go briefly to 0V, which would kill power to the system unless the battery was at some minimum level of charge. But, that isn't true anymore. It is safe to transition up or down in voltage and the source voltage should never drop to 0V. BUG=chrome-os-partner:29499 BRANCH=none TEST=make -j buildall. No need to do any more testing because this code has been disabled for a while. Change-Id: I8a3dca117f01f0f9c7d04b5d489e4a8588a89be6 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/211021 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* ryu: set PD_DISABLE_DEBUG to 1 by defaultAaron Durbin2014-08-061-1/+1
| | | | | | | | | | | | | | | | In order for the AP to access the SPI part one needs to drive PD_DISABLE_DEBUG to 1. While all the closed-case debugging is being worked out set this signal 1 by default so that the AP can boot. BUG=chrome-os-partner:31149 BRANCH=None TEST=Built and flashed on ryu. SPI works from initial poweron. Change-Id: I1fdb0457da9db07063f86959d9eb969e3bcd83ec Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/211141 Reviewed-by: Vic Yang <victoryang@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org>
* veyron: fix compile errzyw2014-08-051-0/+1
| | | | | | | | | | | | | | | | | Add undefine CONFIG_CHIPSET_ROCKCHIP in config.h, Fix compile err when make tests. BUG=None TEST=Compiled BRANCH=None Change-Id: Ic9a330c8cb6e1a072230c1f284592703ce245144 Signed-off-by: zyw <zyw@rock-chips.com> Reviewed-on: https://chromium-review.googlesource.com/210901 Reviewed-by: Doug Anderson <dianders@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Doug Anderson <dianders@chromium.org> Tested-by: Doug Anderson <dianders@chromium.org>
* Fix LM4 flashing in flash_ecVic Yang2014-08-041-16/+30
| | | | | | | | | | | | | | | | | This fixes the bug that SRC_ROOT is not set. This should be the last fix for flash_ec. DEFAULT_BOARD is intentionally left as is. For developers who don't want to use --board option every time, they need to set DEFAULT_BOARD in their environment variables. BUG=chromium:397202 TEST=util/flash_ec --board=link BRANCH=None Change-Id: If23f73adbd37f2a79cb5176e3665562e278f46db Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/210523 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
* Peppy: Switch to shared battery cut off command.Dave Parker2014-07-312-3/+2
| | | | | | | | | | | | BUG=chrome-os-partner:28887 BRANCH=None TEST=Run ectool battery cutoff and console cutoff command with and without at-shutdown option. Change-Id: If631e1fdcd5950f2ca23b30801d54cfb32287313 Signed-off-by: Dave Parker <dparker@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/203695 Reviewed-by: Yung-chieh Lo <yjlou@chromium.org>
* pd: add commands to test flashing using PD communicationVincent Palatin2014-07-316-7/+498
| | | | | | | | | | | | | | | | | | | | Add console commands to send the Vendor-Defined Messages used to flash a USB-PD target. Also add a simple test script to flash Zinger through its CC line. To run the script, the board must have CONFIG_USB_PD_CUSTOM_VDM defined. By default fruitpie has this config option enabled. BRANCH=none BUG=chrome-os-partner:28330 TEST=With a fruitpie connected to a zinger run ./util/flash_pd.py ./build/zinger/ec.RW.flat and see Zinger booting on RW. Change-Id: I06f8f545e28b93b2e646e668d81b594eb7976a2d Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/203375 Reviewed-by: Todd Broch <tbroch@chromium.org>
* ryu: remove console help to save flash spaceVincent Palatin2014-07-311-0/+1
| | | | | | | | | | | | | | | | | | | Build the ryu EC without the command line commands help to save flash space. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=none TEST=make buildall build with and without the change and see we are saving 2.3kB of flash. Change-Id: I8282c709715a84c8136a951a478f053fa888e86c Reviewed-on: https://chromium-review.googlesource.com/210055 Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Vic Yang <victoryang@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* pd: fix transmit bug, add back in retry mechanismAlec Berg2014-07-311-2/+1
| | | | | | | | | | | | | | | | Fix bug in pd transmission. The retry mechanism was not working right and was causing us to not do any retries. BUG=none BRANCH=none TEST=Test with a zinger unplugged from the wall. Samus sends source cap and doesn't get a response. Verify on console printout that we retried 3 times. Change-Id: Id273bf054655c2d24a791f4eaf4cb8d87253abe2 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/210559 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* samus_pd: increase stack size for pd tasksAlec Berg2014-07-311-2/+2
| | | | | | | | | | | | | | | | | | Increase stack size to account for pd communication errors. With lots of pd communication errors, I see a max stack usage of 520 bytes, which is larger than the old stack size of 488 and was causing stack overflows. BUG=none BRANCH=none TEST=load onto samus and generate pd errors by plugging in an unpowered zinger (samus sends source cap every 100ms, but no response). measure task usage. Change-Id: Iab2b0f781cb39d8e1ea906de48bd5b37e229d291 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/210580 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Make board names in flash_ec less prone to conflictsChromeOS Developer2014-07-311-9/+54
| | | | | | | | | | | | BUG=None BRANCH=None TEST=Run util/flash_ec on peppy, spring, link. Verify flashing complete successfully. Change-Id: Ib388af6800ae208934d5b026a63f0567d31ef86e Signed-off-by: Dave Parker <dparker@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/191304 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Fix flash_ec so that it finds stm32monVic Yang2014-07-301-1/+1
| | | | | | | | | | | | | | | If chromeos-ec package hasn't been built, flash_ec tries to find stm32mon in local build/ directory. However, this is broken in the last CL when we move away from crosutils. Let's fix it. BUG=chromium:397202 TEST=Flash samus_pd BRANCH=None Change-Id: I05395a727fa965032a24f51c07deaebf2d7c7e51 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/210419 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* stm32f0: Fix buffer size for i2c host command receiveRandall Spangler2014-07-301-2/+5
| | | | | | | | | | | | | | Packets can be 128 bytes, and are preceded by a prefix byte. So we need a 129-byte buffer, not a 128-byte buffer. BUG=chrome-os-partner:30079 BRANCH=none TEST=do pd software sync; see that 128-byte packets transfer correctly Change-Id: Ic1e6cfec2c042537768d1cd0eecea509cc90c052 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/210502 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* ryu: Use get_base to access flash locationGwendal Grignou2014-07-301-39/+32
| | | | | | | | | | | | | | Previous assumption assumed that the flash was remapped to address 0. This is not the case anymore since cl/210063 BUG=chrome-os-partner:30997 TEST=Check we can boot the EC now. BRANCH=None Change-Id: I46e1dc0ad840b21661aa5d87817369b29a659c9b Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/210407
* Remove dependency of flash_ec on crosutilsVic Yang2014-07-301-5/+39
| | | | | | | | | | | | | | | | | | The script currently depends on common.sh from crosutils, which is not installed on beaglebone and also pulls in dependency on other repositories. Let's switch to shared shflags library and include output formatting functions in flash_ec script. This way we are independent from crosutils. BUG=chromium:397202 TEST=Run the script to flash EC BRANCH=None Change-Id: Ib18987410eb32d773d55fb4e53133adf230167b9 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/209827 Reviewed-by: Dan Shi <dshi@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Host command for USB PD role and mux controlVic Yang2014-07-303-0/+162
| | | | | | | | | | | | | | | | | This allows us to control PD role and type-C mux through ectool. BUG=None TEST=Change role/mux on samus using ectool: $ ./ectool --interface=lpc --dev 1 usbpd 0 usb -> In EC console, 'typec 0' shows 'Superspeed USB1' $ ./ectool --interface=lpc --dev 1 usbpd 0 sink -> In EC console, 'pd 0 state' shows 'force sink' BRANCH=None Change-Id: I5b90fb53ea1c30e3bc269c12d61e4398c5dcee6c Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/209956 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* Makefile: Add support for per-board symlinks to top levelAnton Staaf2014-07-3031-20/+69
| | | | | | | | | | | | | | | | | | | | | | | Previously if you were working on a single board you had to add BOARD= to all of your make command lines. Now if you are in a board directory you can just use "make", or "make clean", or any other top level make command. This commit also adds support for a top level "make flash" command that can be used from the board directories as well. This command uses openocd and requires that the board provides an openocd-flash.cfg file. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=none TEST=(from a few board directories) make clean; make -j (from the discovery-stm32f072 directory) make flash Change-Id: Ie09a74881371169a2c3cd9cd9922f39f4873f1a6 Reviewed-on: https://chromium-review.googlesource.com/209669 Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org>
* Use mutex for EC->PD host commandsRandall Spangler2014-07-301-6/+28
| | | | | | | | | | | | | | | | Host commands can be generated by either the PDCMD task (in response to PD interrupts), or the HOSTCMD task (in response to passthru requests). Use a mutex to serialize access to the EC->PD interface. BUG=chrome-os-partner:30079 BRANCH=none TEST=Boot samus Change-Id: If65d5eb4bbef91e6c811a06ea2e1487e17143dc7 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/210401 Reviewed-by: Bill Richardson <wfrichar@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org>
* i2c: add support for timeout configuration at runtimeRandall Spangler2014-07-303-3/+26
| | | | | | | | | | | | | | | | | When the EC sends longer commands to the PD chip (such as flash erase/write over the passthru from AP), allow it to take a second instead of the default 100ms timeout. BUG=chrome-os-partner:30935 BRANCH=none TEST=samus boots battery command works from EC console ectool passthru of flash erase to PD works (requires hacked ectool) Change-Id: I08ff94f7ac6aee351aa73c9d28b5fd715d463b3a Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/209936 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* Enable vboot hash calculationRandall Spangler2014-07-302-1/+2
| | | | | | | | | | | | | | This is necessary for PD software sync. Also need to increase the hook task size to avoid stack overflow. BUG=chrome-os-partner:30079 BRANCH=none TEST=boot samus; on PD console, see hash calculated. Change-Id: I37e571f9cd03a31eb4eaad903c3dda72f7e51fc1 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/209812 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* zinger: change behavior of pin PA0 for wakeup functionalityAlec Berg2014-07-291-3/+3
| | | | | | | | | | | | | | | | | Zinger EVT units will have hardware change for PA0 to be able to wake up from standby. Part of the change is that we have to output high on PA0 in order for the comparator to compare against 0.65V, which is inverted from the previous version. BUG=chrome-os-partner:28335 BRANCH=none TEST=reworked a p2 zinger with PA0 changes, plugged into samus, and verified we still charge. Change-Id: I7344f1d1decddc4e6600e41c313e1e7a5a5de067 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/209832 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* ryu: Use firmware long press power-off timerVic Yang2014-07-291-0/+1
| | | | | | | | | | | | | | | | On Ryu, we are using TPS65913, which doesn't support the 8-second long key press power-off. Let's switch to firmware timer. BUG=None TEST=Do a long power button key press, and see the AP powering off and not restarting. BRANCH=None Change-Id: Ic9eb6d525498c7cdedf8f053dd0a2fa2b568a443 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/209850 Reviewed-by: Alec Berg <alecaberg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* Unify 'typec' console commands in different boardsVic Yang2014-07-299-133/+122
| | | | | | | | | | | | | | | | | We have three copies of 'typec' commands in three different boards. The commands current mix hardware-specific logic and console command logic together. Adding a board_get_usb_mux() interface to separate the logic and deduplicate the console command logic. BUG=None TEST=make buildall TEST=Test 'typec' command and verify GPIO settings. BRANCH=None Change-Id: Ie1825f49d32609c732db384679cb917f2f1a4082 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/209955 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* cortex-m0: stm32f0: use RW vector table when running RW codeAlec Berg2014-07-292-12/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, on stm32f cortex-m0 systems, interrupts are always being directed to the RO vector table. This can cause strange problems when running RW software because it is still calling IRQ handlers in the RO code. Unfortunately, on cortex-m0 the ability to specify the vector table location in flash (VTOR register) is optional, and stm32f0 parts do not have it. Instead, in order to run RW IRQ handlers, at init time, this CL copies the vector table from flash to the base address of SRAM (0x20000000), and then selects SRAM to be mapped to 0x00000000 where the core looks to find the vector table. BUG=none BRANCH=none TEST=Tested on zinger. - Verified that vector table is copied to SRAM by printing out 48 words from SRAM base address 0x20000000 in main() and verifying that it matches the vector table in flash in the disassembly. - Verified the vector table at SRAM 0x20000000 points to the RW handlers when in RW and the RO handlers when in RO. - Also printed out PC in one IRQ handler and verified it was in the appropriate section of code. Also, ran on samus_pd and did a sysjump RW to make sure at least one other system works. Change-Id: I22aff1b5e0de9b23fd3324f0cbe4f6c45a81967e Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/210063 Reviewed-by: Vic Yang <victoryang@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
View Lorry Controller Status