summaryrefslogtreecommitdiff
Commit message (Collapse)AuthorAgeFilesLines
* charger: bq24773: Fix read input current errorstabilize-6912.Bjames_chao2015-03-241-2/+2
| | | | | | | | | | | | | | | | | | | 'ectool chargestate show' shows the wrong input current since the function charger_get_input_current() uses REG8_TO_CURRENT. BUG=None TEST=Use 'ectool chargestate show' or UART command 'charger' check the input current value. BRANCH=None Signed-off-by: james_chao <james_chao@asus.com> Change-Id: I29229ea1ef22811035b500c7a33fedee6562db35 Reviewed-on: https://chromium-review.googlesource.com/259842 Reviewed-by: Shawn N <shawnn@chromium.org> Reviewed-by: Divya Jyothi <divya.jyothi@intel.com> Reviewed-by: Randall Spangler <rspangler@chromium.org> Tested-by: Divya Jyothi <divya.jyothi@intel.com> Commit-Queue: Shawn N <shawnn@chromium.org>
* charger: Add support for bq24770james_chao2015-03-244-27/+109
| | | | | | | | | | | | | | | | Add support for bq24770 (smbus) in the bq24773 (i2c) driver. BUG=None TEST=Use the UART command "charger" and check the charger information. BRANCH=None Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: Ie5f5af60e93aa73d9ef68115af36a8d28f6d6c2b Reviewed-on: https://chromium-review.googlesource.com/259870 Reviewed-by: BoChao Jhan <james_chao@asus.com> Reviewed-by: Divya Jyothi <divya.jyothi@intel.com> Commit-Queue: Divya Jyothi <divya.jyothi@intel.com> Tested-by: Divya Jyothi <divya.jyothi@intel.com>
* CCD: Add ability to enable and disable SPI bridgestabilize-6909.BAnton Staaf2015-03-233-40/+84
| | | | | | | | | | | | | | | | | | | | | This required changing the USB-SPI implementation slightly so that all work is done within the deferred callback. In particular, this allows the board specific enable and disable functions to do things that can only be done from a task context, like sleeping. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Change-Id: I3f6a01ed9d6f31a3259ba0a0f6b4e123d6d2e718 Reviewed-on: https://chromium-review.googlesource.com/260964 Trybot-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org>
* USB-SPI: Set the interface SubClass to Google SPIAnton Staaf2015-03-232-2/+5
| | | | | | | | | | | | | | | | | | This SubClass will provide a simple mechanism for host tools to discover SPI bridge enabled devices. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Change-Id: I0c800ca7b1a2ac58584eab8ba201a6b2a5a894ea Reviewed-on: https://chromium-review.googlesource.com/260963 Trybot-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org>
* it8380dev: add KBC/KMSC moduleDino Li2015-03-2214-62/+610
| | | | | | | | | | | | | | | | | 1. DLM 16KB. 2. Add KBC/KMSC module for emulation board. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=EVB + x86 MB can boot into DOS and keyboard works. Change-Id: Ia5cc2d4f1733ce07879d410b0447b2d48e50cd95 Reviewed-on: https://chromium-review.googlesource.com/259923 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Tested-by: Dino Li <dino.li@ite.com.tw> Commit-Queue: Dino Li <dino.li@ite.com.tw>
* cr50: Added PMU driverSheng-Liang Song2015-03-214-316/+767
| | | | | | | | | | | | | | - Porting from cosmo code base. - Support clock initialization BRANCH=none BUG=chrome-os-partner:33813 TEST="make buildall -j; Verified on RevA1 Chip" Change-Id: I59e2bb133968d408acde44a3082e1b3b8f4bbbff Signed-off-by: Sheng-Liang Song <ssl@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/236394 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* cr50: Added macros for register read/writeSheng-Liang Song2015-03-202-7/+90
| | | | | | | | | | | | | | | | Added macros for register read/write. BRANCH=none BUG=chrome-os-partner:33815 TEST="make buildall -j; Verified on RevA1 chip" Signed-off-by: Sheng-Liang Song <ssl@chromium.org> Change-Id: I25c6f6b5865c7fdde002b2191b1f2eaaba15f589 Reviewed-on: https://chromium-review.googlesource.com/236402 Reviewed-by: Bill Richardson <wfrichar@chromium.org> Commit-Queue: Sheng-liang Song <ssl@chromium.org> Tested-by: Sheng-liang Song <ssl@chromium.org>
* cr50: added cr50 a1 chipSheng-Liang Song2015-03-2013-7/+18598
| | | | | | | | | | | | | | cr50_a1 is for cr50 Rev A1 chip. BUG=chrome-os-partner:33432 BRANCH=none TEST=Compile Only Change-Id: I5490d1a5b89fa66c8e8b969cff7538a293a7d053 Signed-off-by: Sheng-Liang Song <ssl@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/259847 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* spi_flash: Rework protection translation functionsShawn Nematbakhsh2015-03-175-237/+245
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously we defined separate functions to map registers to protect ranges for each supported SPI ROM. This change instead adds a protect range table + flags for each supported SPI ROM and adds common functions for translation between ranges + registers. This makes supporting new parts easier. Since we will never use most supported protection ranges, we can even simplfy the tables. The implementation is now similar to flashrom. BUG=chrome-os-partner:37688 TEST=Manual on Glower. flashwp disable + spi_flash_rsr --> 0 flashinfo --> shows no protection spi_flash_prot 0 0x10000 + spi_flash_rsr --> 0x24 flashinfo --> shows 64KB protected spi_flash_prot 0 0x20000 + spi_flash_rsr --> 0x28 flashinfo --> shows all 96KB protected spi_flash_prot 0 0x40000 + spi_flash_rsr --> 0x2c spi_flash_prot 0 0x80000 + spi_flash_rsr --> 0x10 spi_flash_prot 0 0 + spi_flash_rsr --> 0x00 spi_flash_prot 0 0x1000 --> error spi_flash_prot 0x10000 0x10000 --> error BRANCH=None Change-Id: Ie5908ce687b7ff207b09794c7b001a4fbd9e0f5a Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/259310 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* USB: Add udev rule to handle CCD devicesAnton Staaf2015-03-161-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | This udev rule creates a directory in /dev/google for each device attached. The name of the directory is unique to the device and is prefixed with the device product name. Within the directory there is a serial directory that contains symlinks to each USB serial port exposed by the device. The symlinks are named based on the USB interface name provided by the EC. Additional subdirectories can be added for I2C, JTAG, GPIOs, and SPI as needed. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=Verify that two different CCD devices generate uniquely named entries. Change-Id: I7e6f2ace29b7302c7c072bcf6aab7c8f060b993a Reviewed-on: https://chromium-review.googlesource.com/260420 Trybot-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org>
* lm4: stm32: Store panic data in backup registers on hard resetShawn Nematbakhsh2015-03-148-20/+136
| | | | | | | | | | | | | | | | | | On hard reset / hibernate, RAM will be erased and panic data will normally be lost. When software panic data saving is enabled, try to save this data just before hard reset and restore it when we come back up. BUG=chrome-os-partner:37380 TEST=Manual on Samus with WP + SW sync enabled. Boot AP, then run "crash divzero" on console. After hard reset, verify that "panicinfo" dumps data and shows divzero exception code. BRANCH=Samus Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I9516dd4b6db12ef35e512cc4710f9b97d7e663cb Reviewed-on: https://chromium-review.googlesource.com/255912 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* ectool: Always try v0 of GET_VERSIONS command if v1 failsShawn Nematbakhsh2015-03-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ioctl return status for CROS_EC_DEV_IOCXCMD is inconsistent across kernel versions: - In 3.8 kernel, on INVALID_VERSION EC result, -EBADMSG is returned - In 3.14 kernel, on INVALID_VERSION EC result, success status is returned In both cases, the INVALID_VERSION result is written to the cros_ec_command.result parameter. The inconsistency here should be fixed with kernel patches. In any case, there is little harm with trying v0 of GET_VERSIONS on any failure of the v1 command. BUG=chrome-os-partner:37668,chromium:466896 TEST=Manual on peppy. Verify 'ectool thermalget 0 0' prints threshold info. BRANCH=None Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: Ic1eb3f8f2fa95711ec15a5afb740af8f18b88b55 Reviewed-on: https://chromium-review.googlesource.com/260004 Reviewed-by: Bill Richardson <wfrichar@chromium.org> Commit-Queue: Bill Richardson <wfrichar@chromium.org> Trybot-Ready: Bill Richardson <wfrichar@chromium.org> Tested-by: Bill Richardson <wfrichar@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* pd: make source-only PD devices compatible with the common runtimeVincent Palatin2015-03-132-5/+11
| | | | | | | | | | | | | | | | | | Add the proper checks to be able to compile source-only PD devices with the common runtime. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=chrome-os-partner:37078 TEST=make buildall build honeybuns without CONFIG_USB_PD_DUAL_ROLE defined Change-Id: I7ad0b39b2e62736117ec2d7b5163502afbf14786 Reviewed-on: https://chromium-review.googlesource.com/259112 Reviewed-by: Scott Collyer <scollyer@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* honeybuns: fix CC voltage thresholdsVincent Palatin2015-03-121-4/+4
| | | | | | | | | | | | | | | | | | | | | The Rp resistor on CC1 is set for a 3.0A capability, so Vnc (no-connection voltage) is 2.45 V. CC2 is not connected (captive cable), so for a PD source, it's identical to being always pulled-up to 3.3V (no sink connection). Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=samus BUG=chrome-os-partner:37078 TEST=connect to Samus and see PD activity Change-Id: I8df0561cea59896d65d9be6523d4eed953851129 Reviewed-on: https://chromium-review.googlesource.com/259301 Trybot-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Scott Collyer <scollyer@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* honeybuns: fix CC line sensing ADCVincent Palatin2015-03-121-1/+1
| | | | | | | | | | | | | | | | | The CC line is connected to the ADC 1 not 0. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=samus BUG=chrome-os-partner:37078 TEST=use the "adc" command and see the pull-up to 3.3V on CC1_PD. Change-Id: I6327adc8ea166c4fb450c6711e17d8140fd6c71d Reviewed-on: https://chromium-review.googlesource.com/259300 Trybot-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Scott Collyer <scollyer@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* honeybuns: add HX3 hub configurationVincent Palatin2015-03-122-1/+117
| | | | | | | | | | | | | | | | | Send the Cypress HX3 Hub configuration over I2C. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=chrome-os-partner:37078 TEST=see the Hub booting in normal mode and enumerating. Change-Id: I7e32eecd1d69ba0899b726c0405d392602e7d8b7 Reviewed-on: https://chromium-review.googlesource.com/256697 Trybot-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Scott Collyer <scollyer@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* honeybuns: Initial /board filesScott Collyer2015-03-128-0/+728
| | | | | | | | | | | | | | | | | | Modified version of /board/fruitpie. Attempted to capture GPIO definitions. Other changes consisted of modifying functions to enable compilation. No real functionality as of yet. TEST=Serial console and I2C functions have been verified BUG=chrome-os-partner:37078 BRANCH=samus Change-Id: Iedfc724a058e4220176193ef0f66e5bf45eabbd9 Signed-off-by: Scott <scollyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/252426 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Trybot-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* mec1322: Add flash physical interface functionsShawn Nematbakhsh2015-03-129-21/+282
| | | | | | | | | | | | | | | | | | | | | | | | Add physical flash interface for read / write / protection of external SPI on mec1322. BUG=chrome-os-partner:36167 TEST=Manual on glower: flashread 0xf000 0x200 --> dumps 0xff flashwrite 0xf000 0x200 flashread 0xf000 0x200 --> dumps write pattern flasherase 0xf000 0x1000 flashread 0xf000 0x200 --> dumps 0xff spi_flash_prot 0 0x10000 flashinfo --> shows first 64KB protected spi_flashwrite 0xf000 0x200 --> access denied spi_flashwrite 0x1f000 0x200 --> OK flashread 0x1f000 0x200 --> dumps write pattern BRANCH=None Change-Id: I2cb20a49934999fc0dd9b3425eb99708711637c5 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/257132 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* spi_flash: Add protect support for W25X40Shawn Nematbakhsh2015-03-116-20/+117
| | | | | | | | | | | | | | | | W25X40 uses a different protection register encoding than our existing W25Q64 code. Move the SPI ROM option to a config, and add support for the new part. BUG=chrome-os-partner:37688 TEST=`make buildall -j`. W25X40 protection code tested in a subsequent commit. BRANCH=None Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: Iaaeabf42c6c62c20debc91afd2cf8671c14244c8 Reviewed-on: https://chromium-review.googlesource.com/258440 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Ryu: Share SensorHub UART control with ServoAnton Staaf2015-03-101-1/+3
| | | | | | | | | | | | | | | | | | | | | Previously the EC UART connected to the SensorHub console was being driven push/pull potentially fighting with a connected servo. This way servo wins, but at least we don't drive the line in opposite directions causing a large current flow. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Change-Id: I02b8e09af6c902b523494b757f4bc7ea4365df2e Reviewed-on: https://chromium-review.googlesource.com/255954 Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Vic Yang <victoryang@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org> Trybot-Ready: Anton Staaf <robotboy@chromium.org>
* llama: enable the EC backlight override for mediatek platform.Ben Lok2015-03-092-2/+35
| | | | | | | | | | | | | | | | | | | 1. Override the panel backlight enable signal from SoC in llama board, force the backlight off on lid close. 2. Revise the function llama_lid_event to mtk_lid_event, makes more sense. BRANCH=master BUG=none TEST=lid switch to open/close, observe the LCD backlight behavior. the backlight should be off, when lid is close. the backlight should be on, when lid is open. BOARD=llama Change-Id: Id1bff440c8bb6cee19c82615e916b8a2f2aa62ac Signed-off-by: Ben Lok <ben.lok@mediatek.com> (cherry picked from commit a90516b0a5493a55536e29d550f65cc743156710) Reviewed-on: https://chromium-review.googlesource.com/255441 Reviewed-by: Rong Chang <rongchang@chromium.org>
* llama: implement battery ship shutdown modeyh.huang2015-03-092-1/+40
| | | | | | | | | | | | | | | Support battery cut-off as host command and console command. BUG=none BRANCH=master TEST=tested "cutoff" console command cuts off battery BOARD=llama Change-Id: Id5c67d296b7ecfac99389d5cfcdcaa79da9ad4f3 Signed-off-by: Ben Lok <ben.lok@mediatek.com> (cherry picked from commit 0274ffd14a35b478b8efa74cdd2d3303da96ec54) Reviewed-on: https://chromium-review.googlesource.com/255440 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* usb_pd: fix HPD State error under IRQ_HPDBernard Shyu2015-03-071-1/+1
| | | | | | | | | | | | | | | | The HPD State field (bit7) should be HIGH when IRQ_HPD (bit8) is asserted. BUG=none BRANCH=samus TEST=make buildall Change-Id: I27181623d5ef2f657839aa63222d6788a3257dad Reviewed-on: https://chromium-review.googlesource.com/253930 Reviewed-by: Todd Broch <tbroch@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Trybot-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Todd Broch <tbroch@chromium.org>
* samus: ryu: allow charge ramp on CDP and proprietary chargersAlec Berg2015-03-075-8/+27
| | | | | | | | | | | | | | | | | | | Modify charge ramp so that when it ramps it ramps from 500mA and up to the maximum allowed by that supplier. Also modify Samus and Ryu to use charge ramping for CDP and proprietary chargers due to the possibility that they may not be able to supply the amount that is supposed to be guaranteed by their advertisement. BUG=chrome-os-partner:37549 BRANCH=samus TEST=test on a proprietary charger, make sure we can ramp. test a DCP and make sure we also ramp as before. Change-Id: I08fd43c8f0b21aa54d114fbe5a1296c9556357e4 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/256972 Reviewed-by: Shawn N <shawnn@chromium.org> Reviewed-by: Vic Yang <victoryang@chromium.org>
* lightbar: clear all segments first before starting konami seqAlec Berg2015-03-061-0/+3
| | | | | | | | | | | | | | | | | | | Clear all lightbar segments first before starting konami sequence. If currently displaying Google colors, we need this so the start of the sequence shows up correctly. BUG=chrome-os-partner:37469 BRANCH=samus TEST=from S0 with google colors on lightbar, run "lightbar seq konami" from EC console and make sure 1st and 4th segments are cleared before starting konami sequence. Change-Id: I92ba8f29414c279895658167f8d5958fe49ea034 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/256192 Reviewed-by: David Schneider <dnschneid@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* flash_ec: add support for strago and cyanBernie Thompson2015-03-061-0/+2
| | | | | | | | | | | | | BUG=None BRANCH=None TEST=`flash_ec --board=strago --image /ec.bin` `flash_ec --board=cyan --image /ec.bin` Verify flashing success. Change-Id: I10b93f5e646687ac1f299b12ff5a91aedfdd3d75 Signed-off-by: Bernie Thompson <bhthompson@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/255950 Reviewed-by: Shawn N <shawnn@chromium.org>
* mec1322: Remove RO image to save program memoryShawn Nematbakhsh2015-03-061-3/+8
| | | | | | | | | | | | | | | | mec1322 projects are running very low on flash space. We don't yet have a loader to load either RO or RW at runtime, so remove the RO image entirely. This is a temporary change and should be reverted once we have a working loader. BUG=chrome-os-partner:37510 TEST=make buildall -j BRANCH=None Change-Id: I8c502ec2bcabf246d5a3ea939f1a8d0c366acd9f Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/256381 Reviewed-by: Vic Yang <victoryang@chromium.org>
* samus: change tap for battery to not show dimmed last segmentAlec Berg2015-03-062-1/+19
| | | | | | | | | | | | | | | Change tap for battery lightbar sequence to not show the last segment dimmed as a percentage of your battery. BUG=chrome-os-partner:37335 BRANCH=samus TEST=use battfake console command to test out every increment of 10% and use "lightbar seq tap" to show tap. Change-Id: I4f38d26a8cfbecfa6efc86fcc8751ca8cb34879b Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/256191 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* samus: limit input current when batt near full and 5V chargerAlec Berg2015-03-062-23/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | Limit input current to 2A when battery is near full and we are using a charger below the boost bypass threshold in order to prevent charging noise from the charge circuit. This also changes the threshold at which 5V ramping is allowed to 90% because this is roughly the threshold at which the battery stops drawing full current. BUG=chrome-os-partner:36534 BRANCH=samus TEST=load onto samus. use battfake EC console command to test various battery states of charge: - With zinger, verify that at 20V we never limit input current based on battery SOC. - With zinger at 5V, verify that >= 90% we limit input current to 2A, and < 90% it's still 3A. - With 5V BC1.2 DCP, verify that >= 90% we don't ramp, <90% we do. Change-Id: I868828b5807572736ea58f62bf3596f6416533d2 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/256072 Reviewed-by: Shawn N <shawnn@chromium.org>
* motion_sense: Add required headerAlexandru M Stan2015-03-061-0/+2
| | | | | | | | | | | | | | | | | | | | include/motion_lid.h is generally included by board.c in the various boards. But include/motion_lid.h actually needs host_command.h defined or else including it in board.c will cause a confusing error. This probably doesn't show up on other platforms like samus and glimmer because they define a few custom commands in board.c, but veyron doesn't need that. motion_lid ought to just include it directly if it really needs it. BUG=None, see next commits in the series, they won't compile without this TEST=See series BRANCH=veyron Change-Id: I42e966d891dbbcca7df484b59c9d1bb35d1357bc Signed-off-by: Alexandru M Stan <amstan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/256696 Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
* samus_pd: disable i2cxfer console command to save spaceAlec Berg2015-03-063-0/+4
| | | | | | | | | | | | | | | Disable the i2cxfer console command by default to save space BUG=chrome-os-partner:37167 BRANCH=samus TEST=make -j buildall From .map file, 576 bytes of flash saved Change-Id: I0b50161ef0a49231e45c422da5042db77874aed1 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/256071 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Todd Broch <tbroch@chromium.org>
* charge_state_v2: add battfake console commandAlec Berg2015-03-061-0/+32
| | | | | | | | | | | | | | | | | | | Add battfake console command to charge_state_v2. BUG=none BRANCH=samus TEST=load onto samus and use battfake console command to make sure it works: > battfake 100 Reporting fake battery level 100% > battfake -1 Reporting real battery level Change-Id: I038db92a4859d460b33b1c7e546bc08d5e21582b Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/256070 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* pi3usb9281: Always set reserved control bitsShawn Nematbakhsh2015-03-042-10/+14
| | | | | | | | | | | | | | | | Bits 1 and 3 of the control register are read 1, write 1, but RO firmware may have zero'd these bits. Therefore, always set the bits high, ignoring the read value. TEST=Manual on Samus. Starting from .90 RO, flash new RW and verify BC1.2 charger detection is working. BUG=chrome-os-partner:37241 BRANCH=Samus Change-Id: I2f71718f74e50fe9b664dbe3da1578ee4c995136 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/254880 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* Ryu: Add support for AP and SH console forwarding over USBAnton Staaf2015-03-043-12/+95
| | | | | | | | | | | | | | | Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Change-Id: I28c593ebd242712df00863443d96830fa06b4d6b Reviewed-on: https://chromium-review.googlesource.com/255233 Trybot-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Vic Yang <victoryang@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org>
* USB Stream: Make RX and TX buffer sizes configurableAnton Staaf2015-03-033-8/+38
| | | | | | | | | | | | | | | | | | | | | | | Previously the USB Stream buffer sizes were fixed at USB_MAX_PACKET_SIZE (currently 64 bytes). But that ended up using up too much packet RAM, a very limited resource. This change makes them configurable and adds asserts to insure that the sizes are valid for the underlying hardware. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Verify that USART forwarding on discovery works Change-Id: Ib19c0dcfa9b16f23c1d72a5a7fc18026ab103f05 Reviewed-on: https://chromium-review.googlesource.com/255232 Trybot-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Vic Yang <victoryang@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org>
* sb_firmware: shorter console messagesstabilize-6842.BSheng-Liang Song2015-03-021-3/+1
| | | | | | | | | | | | | | | Reduced console log messages BUG=chrome-os-partner:36310 BRANCH=none TEST=Compile Only Change-Id: I0e30a3094d77673a5fd238efed3851a726fdcdb6 Signed-off-by: Sheng-Liang Song <ssl@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/254931 Reviewed-by: Bernie Thompson <bhthompson@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org> Commit-Queue: Bernie Thompson <bhthompson@chromium.org>
* nrf51: Reset clean up.Myles Watson2015-03-023-12/+22
| | | | | | | | | | | | | | | | Use the values from the datasheet to report the reset reason. TEST=hard reset, soft reset, wake from sleep with a GPIO BRANCH=NONE BUG=None Signed-off-by: Myles Watson <mylesgw@chromium.org> Change-Id: I2a45741c9c17f0c2e4eb4b8b12d3231f407244dd Reviewed-on: https://chromium-review.googlesource.com/254112 Tested-by: Myles Watson <mylesgw@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Myles Watson <mylesgw@chromium.org>
* Producer/Consumer: Convert USART and USB Stream driversAnton Staaf2015-03-026-296/+221
| | | | | | | | | | | | | | | | | | | | | | | Previously the USART and USB Stream drivers exposed in_stream and out_stream interfaces, which don't allow for sharing their queues easily. This change converts these drivers over to the producer/consumer model and updates the two uses. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Verify that the discovery echo functionality is unchanged. Change-Id: I29f043ab1712373f638e1621378df98647d736cf Reviewed-on: https://chromium-review.googlesource.com/252820 Trybot-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Todd Broch <tbroch@chromium.org> Tested-by: Todd Broch <tbroch@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org>
* pd: Bugfix for write log entry command.Todd Broch2015-03-021-1/+1
| | | | | | | | | | | | | | BRANCH=samus BUG=chrome-os-partner:37264 TEST=manual, ectool --name cros_pd pdsetmode 0 0xff01 1 0 successfully exits displayPort mode again. Change-Id: Ica2faf8de92460f01c2af9be829795c0cd538135 Signed-off-by: Todd Broch <tbroch@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/254990 Reviewed-by: Shawn N <shawnn@chromium.org>
* plankton: always run as UFP when in USB hub modeVic Yang2015-03-023-10/+25
| | | | | | | | | | | | | | | | | | When Plankton is in USB hub mode, running as DFP doesn't make sense. In this case, ask for a data swap. BRANCH=None BUG=chrome-os-partner:37079 TEST=With Ryu, check Plankton is always UFP no matter it's sink or source. Change-Id: I7752b8c1255234a5ea726138708fe52c5fcd47b2 Signed-off-by: Vic Yang <victoryang@google.com> Reviewed-on: https://chromium-review.googlesource.com/254713 Tested-by: Vic Yang <victoryang@chromium.org> Reviewed-by: Benson Leung <bleung@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Vic Yang <victoryang@chromium.org>
* Revert "mec1322: Fix LPC interrupt bit mask"stabilize-6835.BVic Yang2015-02-281-4/+4
| | | | | | | | | | | | | | | | | | This reverts commit 9ed4434ad8770ca3edd6bccd456738019c9e08b0. According to MEC1322 errata, LRESET# interrupt is indeed GIRQ 19 bit 1. BRANCH=None BUG=chrome-os-partner:36326 TEST=None Change-Id: I9d0dc0ef3abac1ace59b46eafae04f6b9e5c0b9b Reviewed-on: https://chromium-review.googlesource.com/254771 Reviewed-by: Divya Jyothi <divya.jyothi@intel.com> Reviewed-by: Kevin K Wong <kevin.k.wong@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org> Commit-Queue: Vic Yang <victoryang@chromium.org> Tested-by: Vic Yang <victoryang@chromium.org>
* sb_firmware: clean up sb firmware update programSheng-Liang Song2015-02-281-53/+55
| | | | | | | | | | | | | | | | | | | | | | | | - battery firmware filename need match with gs:// filename - changed from "%04X" to "%04x" - A fix for LGC battery firmware update. - Add control flags: F_AC_PRESENT - 1 iff AC is connected. F_VERSION_CHECK - 1 if do version check - option to disk version check for stress test. - Add detail log messages - Remove old debug flag. BUG=chrome-os-partner:36310 BRANCH=none TEST=run ec_sb_firmware_update on glimmer Change-Id: Iebc15222a7a55a786291ce2d8931e70acc5b3c4d Signed-off-by: Sheng-Liang Song <ssl@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/253970 Reviewed-by: Shawn N <shawnn@chromium.org>
* stm32f0: Fix RTC read glitchShawn Nematbakhsh2015-02-281-1/+7
| | | | | | | | | | | | | | | | Reads to RTC_SSR may be invalid if they occur close to the RTCCLK edge. As suggested by the datasheet, perform consecutive identical reads to ensure the read is valid. BUG=chrome-os-partner:37216 TEST=Manual on Samus. Repeatedly call rtc_read in test function, verify that RTC_SSR never incorrectly ticks up. BRANCH=Samus Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: Ib26fbfab4a07263f638c580066e993675dd8c451 Reviewed-on: https://chromium-review.googlesource.com/254725 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* samus: don't unwedge charging when purposely discharging on ACAlec Berg2015-02-283-3/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | For factory testing, when purposely discharging on AC, don't automatically detect and unwedged charge circuit. BUG=chrome-os-partner:37171 BRANCH=samus TEST=plug in AC and run: "ectool chargecontrol discharge". check on ec console that battery is discharging. let sit for 3 minutes and make sure charge circuit unwedge code never runs. run "ectool chargecontrol normal" and make sure battery starts charging again. Also force discharge with "ectool chargecontrol discharge" and then unplug and replug AC, make sure battery is not charging nor discharging, then set mode back to normal and make sure we start charging again. Tested without this CL and everytime you force discharge the charge unwedge is activated and messes everything up. Change-Id: Icc7a504c148e1e08777e7aafce64ff4cc38a32c5 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/254722 Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
* nrf51: add RNG definitions to registers.hMyles Watson2015-02-281-0/+21
| | | | | | | | | | | | | | | | RNG (Random Number Generator) register definitions from the datasheet TEST=buildall BRANCH=NONE BUG=None Signed-off-by: Myles Watson <mylesgw@chromium.org> Change-Id: Id700564edfa8021aa5604ed53f7ccfe8c3c4f6db Reviewed-on: https://chromium-review.googlesource.com/254111 Tested-by: Myles Watson <mylesgw@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Myles Watson <mylesgw@chromium.org>
* nrf51: add definitions for RADIO and FICR registers.Myles Watson2015-02-281-0/+183
| | | | | | | | | | | | | | TEST=tested that the radio sends and receives packets correctly. BRANCH=NONE BUG=None Signed-off-by: Myles Watson <mylesgw@chromium.org> Change-Id: I7f59521062558be90c217013e2ea2dae502005c4 Reviewed-on: https://chromium-review.googlesource.com/254110 Tested-by: Myles Watson <mylesgw@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Myles Watson <mylesgw@chromium.org>
* charge_state_v2: return correct host command error codesAlec Berg2015-02-281-2/+2
| | | | | | | | | | | | | | | | Return host command error codes for EC_CMD_CHARGE_CONTROL instead of returning the result of EC functions which typically return element from enum ec_error_list, which is a different error list. BUG=chrome-os-partner:37171 BRANCH=samus TEST=make -j buildall Change-Id: Ia13cc8a2f747ddeafdc059c6e575dcc2f5b20b8d Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/254721 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* Remove unused CONFIG_PSTATE_AT_END optionRandall Spangler2015-02-274-41/+3
| | | | | | | | | | | | | | | | All current boards in ToT place pstate at the end of the RO section. Remove the unused option to place it at the end of the RW section; we'll never do that again. BUG=none BRANCH=none TEST=make buildall -j Change-Id: I0d279a4c9786bb33367a7387423481cc9b94e115 Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/253636 Reviewed-by: Shawn N <shawnn@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* cr50: avoid shell errors when building for hostBill Richardson2015-02-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | When building hosttests, CONFIG_FLASH_BASE is not a numeric constant (it's a pointer to a buffer). This makes the the shell complain when the Makefile tries to convert it from hex to decimal. Since the Makefile only needs that value to convert .bin to .hex, let's just wait to calculate it until we need it. BUG=chrome-os-partner:37071 BRANCH=none TEST=manual Before, "make hosttests" printed a bunch of this: sh: ((uintptr_t)__host_flash): missing `)' (error token is "__host_flash)") Now it doesn't. Change-Id: If408eb347b4f2385893d53cdfbf8fd5033868737 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/254410 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* samus_pd: Skip pericom detection if we're sourcing VBUSShawn Nematbakhsh2015-02-271-14/+20
| | | | | | | | | | | | | | | | If we're sourcing VBUS, there is no need to proceed with the pericom debounce / reset procedure, since we know that we're not charging. BUG=chrome-os-partner:37137 TEST=Manual on Samus. Insert USB keyboard, verify that pericom reset doesn't occur. Insert SDP port + Apple charger, verify that pericom reset / redetection still occurs. BRANCH=Samus Change-Id: I1a616f6e2287cd474b94e8fb61c19514d2ec2042 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/254140 Reviewed-by: Alec Berg <alecaberg@chromium.org>