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* glados: Initial mainboard commitstabilize-7060.BShawn Nematbakhsh2015-05-1210-1/+436
| | | | | | | | | | | BUG=chrome-os-partner:39510 TEST=Compile Only BRANCH=None Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: If470b00fec56db0884dbd4c9974140951fc214fd Reviewed-on: https://chromium-review.googlesource.com/268780 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* power: skylake: Add support for skylake power sequencingShawn Nematbakhsh2015-05-123-3/+250
| | | | | | | | | | | | | | Add power sequencing for Skylake, following the IMVP8 / ROP PMIC design for SKL-U / SKL-Y. BUG=chrome-os-partner:39510 TEST=Compile only BRANCH=None Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: Ibf6a0e4415544b6b4b2cf28c167106ce4bfdc54e Reviewed-on: https://chromium-review.googlesource.com/269460 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* make: add generation of sorted symbol mapsstabilize-7059.BVadim Bendebury2015-05-112-4/+9
| | | | | | | | | | | | | | | | | | | | | | | | | Sorted symbol maps are useful when one wants to look up an address to associate it with a function or a variable, or to estimate how much room certain components of the image take. This patch adds a rule and creates a dependency to make sure that sorted maps (assigned extension .smap) are generated during builds. BRANCH=none BUG=none TEST=make buildall -j observed 91 .elf files and 89 .smap files generated. the two images not triggering .smap file generation are build/npcx_evb/chip/npcx/lfw/ec_lfw build/npcx_evb/chip/npcx/spiflashfw/ec_npcxflash they could be added in a follow up patch if deemed necessary. Change-Id: I196a2ffe059a83481b7a313617d516634762dc60 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/270117 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* ryu: update PD swaps configurationVincent Palatin2015-05-088-14/+94
| | | | | | | | | | | | | | | | | | | | | | | | | - allow power swap only when we are dual-role toggling (ie in S0). - enable the VCONN swap feature to support more type-C dongles. and allow it using the same rule as power swap. - become a power sink when we are connected to an externally powered DRP. - by default, try to be a data UFP for USB. so Dual Role Device such as laptops can get our data. - add a message to inform the AP that our USB role has changed (but the host events are fully wired yet on Ryu) Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=none TEST=make buildall Change-Id: Id0f9027b140cb20f105bcdbc00cac5cb5f44c9e0 Reviewed-on: https://chromium-review.googlesource.com/269857 Reviewed-by: Alec Berg <alecaberg@chromium.org> Trybot-Ready: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* cr50: add SPI Slave driverVadim Bendebury2015-05-076-0/+561
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The CR50 device will have to have two different drivers, for SPI slave and master modes. This patch adds the slave driver which is called SPS. CR50 SPS controller uses 2KB buffer split evenly between receive and transmit directions as two FIFOs. RX write and TX read pointers are maintained by hardware, RX read and TX write pointers are maintained by software. The FIFO area allows only 32 bit writes from the CPU core, which complicates the function placing TX data into the FIFO. There is no limit to read access size. Another complication is that the hardware pointers in the FIFO in fact have 11 bits (instead of 10 required to address 1K), so the software needs to use 10 bits when accessing the FIFO, but 11 bits when writing the pointers into the registers. Driver API provides three functions: - transmit a packet of a certain size, runs on the task context and can exit before the entire packet is transmitted., - register a receive callback. The callback is running in interrupt context. Registering the callback (re)initializes the interface. - unregister receive callback. A CLI command is added to help testing this driver. When invoked, it installs the callback function to handle receive data. The data is expected to be of the following format: <size/256> <size%256> [<size> bytes of payload] where size should not exceed 1098 bytes. Received frames are saved in a buffer and once received are transmitted back to the host. BRANCH=none BUG=none TEST=used the enhanced 'spiraw' utility which sends frames of random size in 10..1010 bytes, and then clocks the line to receive the same amount of bytes back, syncs up in the returning stream of bytes and compares received and transmitted data. # run 'sps 100' on the target $ src/examples/spiraw.py -l 100 -f 2000000 FT232H Future Technology Devices International, Ltd initialized at 2000000 hertz $ which is an indication of the successful loop back of 100 frames. The cli command on the target exits and reports the stats: > sps 100 Processed 100 frames rx count 108532, tx count 51366, tx_empty count 100, max rx batch 11 Change-Id: I62956753eb09086b5fca7504f2241605c0afe613 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/269794 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* cr50: share board directory among board variantsVadim Bendebury2015-05-0710-219/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The code in board/cr50 and board/cr50_a1 directories is pretty much identical apart from a few lines related to USB. Let's consolidate the both board variants in the same source directory. The command to build the cr50 board remains the same. The command to build cr50_a1 becomes $ make BOARD=cr50 CHIP_VARIANT=cr50_a1 out=build/cr50_a1 This is a small inconvenience to pay to avoid duplicating many patches in two subdirectories. BRANCH=none BUG=none TEST='make buildall' still succeeds compared map files for cr50_a1 before and after the change. They are identical modulo addition of the empty function send_hid_event() in board.o. Change-Id: I7584c8f215945b8b33eea4eff50c872a09ef349d Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/269160 Reviewed-by: Bill Richardson <wfrichar@chromium.org> Reviewed-by: Sheng-liang Song <ssl@chromium.org>
* ec: Add Inventory commandGwendal Grignou2015-05-074-1/+233
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add command that list supported features by the firmware. Also let the firmware indicates if more features are expected in the RW version. This will help the cros_ec framework load the right driver(s) for exposing information via sysfs. BUG=chromium:428364 BRANCH=none TEST=Test on samus on both ec and pd: localhost ~ # ectool inventory EC supported features: 1 : Flash support 2 : Direct Fan power management support 3 : Keyboard backlight support 4 : Lightbar support 6 : Motion Sensors support 7 : Keyboard support 9 : BIOS Port 80h access support 10 : Thermal management support 11 : Switch backlight on/off support 12 : Switch wifi on/off support 13 : Host event support 14 : GPIO support 15 : I2C master support 16 : Charger support 17 : Simple Battery support 18 : Smart Battery support 21 : Control downstream MCU support localhost ~ # ectool --name cros_pd inventory EC supported features: 1 : Flash support 14 : GPIO support 15 : I2C master support 22 : USB Cros Power Delievery support Change-Id: Ib6eaac91fda86835e754c5316ecf81fbc27786e5 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/263463 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Sameer Nanda <snanda@chromium.org>
* ryu: enable alternate modes for USB PDVincent Palatin2015-05-074-26/+258
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the support to be a USB-PD alternate mode DFP and add configuration for the DisplayPort alternate mode and the GFU mode. Only on Ryu P6 as the P5 board is using the HPD line for the power sequencing workaround. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=chrome-os-partner:39946 chrome-os-partner:38689 TEST=on Ryu P6, plug a Hoho dongle, see that the superspeed muxes are in DP1 or DP2 mode (using the "typec 0" command), plug and unplug an HDMI monitor and see the HPD line moving when typing "gpioget USBC_DP_HPD". > pd 0 state Port C0, Ena - Role: SRC-DFP-VC Polarity: CC1 Flags: 0x1150, State: SRC_READY > adc VBUS = 4980 CC1_PD = 992 CC2_PD = 57 > typec 0 Port C0: CC1 993 mV CC2 58 mV (polarity:CC1) Superspeed DP1 > gpioget USBC_DP_HPD 0 USBC_DP_HPD <--- PLUG monitor ---> > gpioget USBC_DP_HPD 1* USBC_DP_HPD Change-Id: Ie25a3bb0d6331c1d931b7f542fbc637270c20b3b Reviewed-on: https://chromium-review.googlesource.com/269855 Trybot-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Reviewed-by: Todd Broch <tbroch@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* power: Move EC_CMD_GSV_PAUSE_IN_S5 handler to common codeShawn Nematbakhsh2015-05-0716-138/+87
| | | | | | | | | | | | | | | | The same code exists in four (soon to be five!) different power sequencing drivers, so move it up to common. BUG=None TEST=Manual on Samus. Run "pause_in_s5 on" on EC console, verify that system stops in S5 on shutdown. Run "pause_in_s5 off" on EC console, verify that system again goes to G3 on shutdown. BRANCH=None Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: Iaf05ef7ce017be4f9d173e83e985a7a879ba278c Reviewed-on: https://chromium-review.googlesource.com/269566 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* CCD: Add documentationAnton Staaf2015-05-071-0/+143
| | | | | | | | | | | | | | | | | | | | This document is a user HOWTO for Case Closed Debugging in Markdown format. It can be converted to HTML using pandoc if desired. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=pandoc case_closed_debugging.pm > case_closed_debugging.html RTFM Change-Id: I66870894309d20c4cc8e5139b7f4e4aed0b1d9f6 Reviewed-on: https://chromium-review.googlesource.com/269744 Reviewed-by: Bill Richardson <wfrichar@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org> Trybot-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org>
* CCD: Disable ModemManager for CCD USB consolesAnton Staaf2015-05-062-14/+33
| | | | | | | | | | | | | | | | | | | | | | | | ModemManager likes to play with serial ports it shouldn't play with, mark our serial ports as off limits. This also bumps the ordering of this rules file just past the udev default rules because it uses environment variables populated by that file. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=install new rules file, delete old rules file verify that symlinks to TTY's are still created verify that ModemManager leaves them alone now Change-Id: I4ded95192d78b5b1bbc661ca5b762e18307d2d60 Reviewed-on: https://chromium-review.googlesource.com/269743 Trybot-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org> Commit-Queue: Anton Staaf <robotboy@chromium.org>
* twinkie: fix initialization in sniffer modeVincent Palatin2015-05-061-0/+2
| | | | | | | | | | | | | | | | | | | | Do not set the Rd pull-down by default when we are passively sniffing and we don't need VBUS detection in sniffer mode. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=none TEST=run Twinkie without any type-C connected, using the "adc" command, check that both CC are floating at startup. Change-Id: I8889b22d978b9911bc4441e485e1984ccedf3425 Reviewed-on: https://chromium-review.googlesource.com/269782 Trybot-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Todd Broch <tbroch@chromium.org> Tested-by: Todd Broch <tbroch@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* twinkie: Fix memcpy_to_usbsram destination address.Todd Broch2015-05-061-1/+1
| | | | | | | | | | | | | | | | | | | | | Change: * 8c0cef2 - USB: Fix memcpy routines Modified memcpy_to_usbsram destination address from AHB address space mapped to packet RAM instead. This CL makes same change to memcpy_to_usbram call in twinkie's sniffer code. Signed-off-by: Todd Broch <tbroch@chromium.org> BRANCH=none BUG=none TEST=twinkie boots and sniffer works as intended. Change-Id: I0842cc3fcefaf7f0b66dfc1bacd4e8620a75b384 Reviewed-on: https://chromium-review.googlesource.com/269651 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Todd Broch <tbroch@chromium.org> Tested-by: Todd Broch <tbroch@chromium.org>
* ryu: add control of switch for USB D+/D-Alec Berg2015-05-062-2/+58
| | | | | | | | | | | | | | | | | | | Add setting the Pericom D+/D- switch state to board_set_usb_mux(). This is useful on Ryu because we have to fully debounce the type-C CC lines before setting the SS muxes, ~100ms, and we don't want the host to give up on enumerating SS while we are debouncing. So, instead, we keep the D+/D- lines disconnected until after we debounce and right before setting type-C muxes for SS. BUG=none BRANCH=none TEST=make -j buildall Change-Id: Ifb7c06d82e35c312ebfce871bff0056a83b4887a Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/269250 Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* ryu: remove charge rampingVincent Palatin2015-05-063-54/+0
| | | | | | | | | | | | | | | | | The charger chip is supposed to handle this feature in hardware. Let's disable the software version to exercise the hardware. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=chrome-os-partner:38603 TEST=on Ryu P6, plug BC1.2 chargers through legacy A-to-C cable. Change-Id: I074eee0621ba8d23c7ef87dd251ce8fbf86a0265 Reviewed-on: https://chromium-review.googlesource.com/269518 Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* ryu: fix Rp pull-ups on CCVincent Palatin2015-05-061-0/+6
| | | | | | | | | | | | | | | | | | | the USBC_CC_PUENx resistors are actually stuffed on P6, we need to drive the corresponding GPIOs to set the high side of the Rp pull-ups when we are a power source. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=none TEST=on Ryu P6, check the ADC values on CC lines when dual role toggling. Change-Id: Ic8943268615597f114672df7c42a0292c985e994 Reviewed-on: https://chromium-review.googlesource.com/269517 Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* Braswell: Turn on/off the USB power while S5->S3/S3->S5.Hsu Henry2015-05-053-4/+11
| | | | | | | | | | | | | | The USB power is off in S5 with previous ChromeBook. The braswell platfrom should be the same as before. BUG=chrome-os-partner:39507 BRANCH=cyan TEST=The usb power is off in G3/S5 and is on in S3/S0 by ec console. Change-Id: I719f213a9eb0180f7e95e4c2717c038c79ef56fe Signed-off-by: Henry Hsu <Henry.Hsu@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/267451 Reviewed-by: Shawn N <shawnn@chromium.org>
* mec1322:Flasherase, flashread, flashwrite offsets adjusted.Divya Jyothi2015-05-052-2/+7
| | | | | | | | | | | | | | | | | | | | | Flash read,erase and write should access SPI flash and not read SRAM MAPPED location. flashrom -p and Software sync use the same flash functions to perform flashread,flashearse and flashwrite.So these functions should be reading RW image starting address offset.Address offset sent by host should not depend on the actual SPI flash as the EC code handles the right offset to program the ec.bin(via flashrom -p) and RW image only via software sync. BUG=chrome-os-partner:38103 BRANCH=None TEST=flashrom -p options tested to read and update ec.bin Change-Id: I3fb16accf3e05eaa3469a8a589962164574d5fb2 Signed-off-by: Divya Jyothi <divya.jyothi@intel.com> Reviewed-on: https://chromium-review.googlesource.com/269231 Reviewed-by: Shawn N <shawnn@chromium.org>
* cyan: Set Motion Sensors to Pre-init state in S3Shamile Khan2015-05-053-4/+47
| | | | | | | | | | | | | | | In S3 state, sensors loose their power. Prevent any initiation of communication with the sensors. BUG=None TEST=With Servo connected, verify that no I2C failures are reported on EC Console when system is brought to S3. BRANCH=None Change-Id: I1988c40aa9de48403e9e3a6be5aec3b7267c29e0 Signed-off-by: Shamile Khan <shamile.khan@intel.com> Reviewed-on: https://chromium-review.googlesource.com/268481 Reviewed-by: Shawn N <shawnn@chromium.org>
* pd: fix PDO selection for low voltage boardsstabilize-7039.BVincent Palatin2015-05-051-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | When the policy of the board is to select lowest voltage providing enough power, the current algorithm ignores the fact that the board input current limit might be lower than the charger maximum current for a particular voltage level leading to the possibility of selected a voltage with a lower available power. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=none TEST=set a Ryu board with the following configuration : PD_PREFER_LOW_VOLTAGE PD_MAX_POWER_MW 24000 PD_MAX_CURRENT_MA 1000 PD_MAX_VOLTAGE_MV 20000 connect it a Zinger (offering 3A @ 20V, 3A @ 12V and 3A @ 5V), see it selecting 20V rather 12V before the patch. Change-Id: I8c0589bb5e5705c4d8a6035120d1cdfaacaa14df Reviewed-on: https://chromium-review.googlesource.com/269262 Reviewed-by: Vic Yang <victoryang@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* ryu: update PD electrical parametersVincent Palatin2015-05-052-4/+6
| | | | | | | | | | | | | | | | | | | The new charger has a different input voltage range and has now a 5V boost providing 1.5A when sourcing VBUS (along with an updated 1.5A Rp), update the PD descriptors and voltage thresholds accordingly. Overall, there is no functional change. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=chrome-os-partner:38603 TEST=build and verify 5V and 12V charging is still working Change-Id: Ie3d54956c940781d06039fccd52966f37d7d48e4 Reviewed-on: https://chromium-review.googlesource.com/269261 Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
* pd: add explicit setting of D+/D- switch when setting type-C muxesAlec Berg2015-05-0514-22/+50
| | | | | | | | | | | | | | | | | | | Add explicit setting of USB D+/D- switch when setting the type-C muxes. This fixes a bug in which we would open D+/D- switch when entering DP mode and lose USB2.0 connection. BUG=chrome-os-partner:39766 BRANCH=samus TEST=add printf to board_set_usb_switches() on samus and make sure we don't open the D+/D- switch when entering DP mode. Change-Id: I2b5bb2185298794ddb4cc457f3695ce6adabd9f8 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/268993 Reviewed-by: Todd Broch <tbroch@chromium.org> Tested-by: Todd Broch <tbroch@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Scott Collyer <scollyer@chromium.org>
* ryu: fix physical power button on P5Vincent Palatin2015-05-041-0/+1
| | | | | | | | | | | | | | | | | | | | | | On P5, the lid detection interrupt has been hijacked to workaround the power sequencing issue. So the lid state is sometimes inconsistent, so we need to ignore the current lid state when the power button is pressed, else we sometimes ignore the power-request by wrongly thinking that the lid is closed. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=chrome-os-partner:38689 TEST=on Ryu P5, switch on the system by pressing the power button either on the servo board or the casing and see the system turning on. Change-Id: I88b2e1f06ed8b4a155a42dac640f8b946db214ea Reviewed-on: https://chromium-review.googlesource.com/269132 Trybot-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* ryu: add Proto 6 supportVincent Palatin2015-05-025-23/+29
| | | | | | | | | | | | | | | | | | | | | | | | | - use the TI BQ25892 instead of the BQ24773 as the battery charger, update the board configuration accordingly. => this change is NOT backward compatible with previous boards - upate GPIOs configuration - Use the BQ25892 5V boost to source VBUS. - on the type-C port, Rp has been set to 1.5A, update the USB PD source limit accordingly and set the boost limit to 1.65A. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=chrome-os-partner:38603 chrome-os-partner:39202 TEST=make buildall run on a P4 modified board with BQ25890 and see the battery charging and the system running on AC and battery. Plug on C-to-A receptacle adapter and see 5V. Change-Id: Id28c9dbd155fe5aedc328bf5ab4da4420495e1f5 Reviewed-on: https://chromium-review.googlesource.com/266021 Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* ryu: remove Proto 4 supportVincent Palatin2015-05-023-77/+1
| | | | | | | | | | | | | | | | | | | | Remove all Ryu Proto 4 specific support to make space for Proto 6 configuration : support for both D12 and B8 as PMIC_THERM_L GPIO, old SuperSpeed mux config. People with P4/P5 boards can use the ryu_p4p5 board support instead. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=chrome-os-partner:38333 TEST=make buildall Change-Id: I0c5ab5e098d0e4828bee8f576461cd75bbb7b422 Reviewed-on: https://chromium-review.googlesource.com/266020 Reviewed-by: Alec Berg <alecaberg@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* ryu: fork P4/P5 supportVincent Palatin2015-05-0211-2/+1434
| | | | | | | | | | | | | | | | | | | In preparation for Proto 6 board support which won't be backward compatible, fork the EC for Proto 4 and Proto 5 for people who need to support older boards. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=chrome-os-partner:39202 TEST=make buildall Change-Id: I520bbf146cc1c1dc04e55283be57807ec19ebaa1 Reviewed-on: https://chromium-review.googlesource.com/266064 Reviewed-by: Alec Berg <alecaberg@chromium.org> Reviewed-by: Gwendal Grignou <gwendal@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
* cli: add ability to read/write memory of different bus widthVadim Bendebury2015-05-021-17/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds an optional extra parameter to the 'rw' command. When the first argument is .b or .s, the access size becomes 8 pr 16 bits respectively. BRANCH=none BUG=none TEST=on the EC console: > rw 0x10000 read 0x10000 = 0x00000000 > rw .b 0x10000 0x55 write 0x10000 = 0x55 > rw 0x10000 read 0x10000 = 0x00000055 > rw .b 0x10000 read 0x10000 = 0x55 > rw .s 0x10002 read 0x10002 = 0x0000 > rw .s 0x10002 0x1234 write 0x10002 = 0x1234 > rw 0x10000 read 0x10000 = 0x12340055 > rw .b 0x10000 read 0x10000 = 0x55 > rw .b 0x10001 read 0x10001 = 0x00 > rw .b 0x10002 read 0x10002 = 0x34 > rw .b 0x10003 read 0x10003 = 0x12 > rw .s 0x10000 read 0x10000 = 0x0055 > rw .s 0x10002 read 0x10002 = 0x1234 > rw . 0x10002 Parameter 1 invalid Usage: rw addr [.{b|s}] [value] > Change-Id: Iad1a4b3e297253ffdbf13afeede8ade9451eb11a Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/268897 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* charge_ramp: fix flaky charge_ramp testAlec Berg2015-05-023-17/+19
| | | | | | | | | | | | | | | | | | | | Fix flaky charge_ramp test. The test often delays CHARGE_DETECT_DELAY after a new charger has been plugged in. But, that is the same delay the charge_ramp module uses before starting to ramp. This creates a race condition where sometimes the test resumes before the ramp up starts and sometimes the test resumes after the ramp up starts. This change fixes the problem by modifying the test to delay by 100ms less than the charge_ramp module. BUG=chromium:483543 BRANCH=none TEST=run charge_ramp test 10 times w/o this CL and see failure 4 times. run test 20 times with this CL and observe 0 failures. Change-Id: I5f7a6a05f9293d3dd7db5517a9df7caec95c58ea Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/268798 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* cleanup: Update config.h with some missing optionsBill Richardson2015-05-011-5/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Our goal is to use include/config.h as the canonical list of all CONFIG_ options. Several CONFIG_ options are in use in various places in the code, but aren't mentioned in the header. This CL adds these options: CONFIG_ACCELGYRO_LSM6DS0 CONFIG_BATTERY_BQ27621 CONFIG_BATTERY_RYU CONFIG_BATTERY_SAMUS CONFIG_USB_RAM_ACCESS_SIZE CONFIG_USB_RAM_ACCESS_TYPE CONFIG_USB_RAM_BASE CONFIG_USB_RAM_SIZE And it changes this misspelled one: CONIFG_USB_PD_CHECK_MAX_REQUEST_ALLOWED to this: CONFIG_USB_PD_CHECK_MAX_REQUEST_ALLOWED BUG=none BRANCH=none TEST=make buildall Change-Id: I1b4d7ca65efb356f6450a9bc94bb03c1923d933b Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/268778 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* cleanup: remove/rename unused CONFIG_ optionsBill Richardson2015-05-011-8/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | These CONFIG_ options in include/config.h are not used or referenced anywhere else in the code: CONFIG_ADC_CLOCK CONFIG_USB_PD_IDENTITY_HW_ID CONFIG_USB_PD_IDENTITY_SW_ID The first one is real, but the other two are just the wrong names. They should be: CONFIG_USB_PD_IDENTITY_HW_VERS CONFIG_USB_PD_IDENTITY_SW_VERS This CL removes the unused option and fixes the names of the others. BUG=none BRANCH=none TEST=make buildall Change-Id: I0f6279f362a7aa214ff9b17a2b24b776588a210e Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/268791 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org>
* cleanup: rename motion sensor CONFIG_ optionsBill Richardson2015-05-017-22/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | This renames some motion sensor options to start with more consistent prefixes. For gesture (tap) detection: CONFIG_GESTURE_DETECTION: CONFIG_SENSOR_BATTERY_TAP => CONFIG_GESTURE_SENSOR_BATTERY_TAP For detecting lid angle: CONFIG_LID_ANGLE: CONFIG_SENSOR_BASE => CONFIG_LID_ANGLE_SENSOR_BASE CONFIG_SENSOR_LID => CONFIG_LID_ANGLE_SENSOR_LID BUG=none BRANCH=none TEST=make buildall Change-Id: Ib8f645902a5585346e1d8d2cbf73d825c896a521 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/268777 Reviewed-by: Alec Berg <alecaberg@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* charge_manager: modify PD power HC to give more info on currentAlec Berg2015-05-016-20/+112
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change the EC_CMD_USB_PD_POWER_INFO host command to report the input current limit and the max current theoretically possible given the charger. The input current limit field is useful for logging purposes and the max current field is useful to give to powerd to determine if we have a low power charger connected. The max current is determined by checking if the charge supplier is allowed to ramp. If the charge supplier is allowed to ramp and has not completed ramping yet, then max current is the max current that we are allowed to ramp up to. Once the ramp has completed, then max current is the stable charging current. If the charge supplier is not allowed to ramp, then max current is simply the max current as registered with charge_manager. The point here is to keep the max as high as possible until we know for sure it is lower to avoid showing the user the low power notification until we know for sure. This CL also adds a new charger type, USB_CHG_TYPE_UNKNOWN. For a short period after a charger is plugged in, the supplier type may change and PD negotiation is still in process, and therefore we tell the host we have an unknown charger type. This allows powerd to show the charging icon, but delay determining if this is a low power charger until we know for sure. BUG=chrome-os-partner:38548 BRANCH=samus TEST=tested with zinger, a DCP, an SDP, and a proprietary charger. tested that low power notification never pops up with zinger, even if you purposely wedge charge circuit with "charger voltage 7000" on EC console. tested that the other chargers all pop up low power notification once the supplier changes from UNKNOWN to the real supplier. used "ectool --name=cros_pd usbpdpower" to check current values. Change-Id: If8a9a1799504cc2a13238f4e6ec917d25d972b22 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/265066 Reviewed-by: Sameer Nanda <snanda@chromium.org>
* pd: Allow for setting USB mux when swapping into DFP roleScott2015-05-015-20/+38
| | | | | | | | | | | | | | | | | | | | | - Added config option CONFIG_USBC_SS_MUX_DFP_ONLY - If this options is enabled, then the mux is set to TYPEC_USB_MUX only is data role is DFP. - If this option is not enabled, the mux is set for both UFP and DFP (i.e. RYU) BUG=chrome-os-partner:39059 TEST=Manual samus to plankton, switching between source and sink modes. Forced data role swap via ec console command. BRANCH=Samus Change-Id: Ibc2fb0ad42d0fe415d3338d38da94ad4b041513b Signed-off-by: Scott Collyer <scollyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/266916 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Alec Berg <alecaberg@chromium.org>
* samus_pd: Increase HPD IRQ pulse to 2msec.Todd Broch2015-05-011-2/+2
| | | | | | | | | | | | | | | | | | | Intel DP sees HPD pulse as 2msec < x < 100msec. While DP spec mentions pulse widths >250usec as acceptable they aren't recognized by i915 driver. CL increases the HPD_IRQ pulse width to 2msec minimum. BRANCH=samus BUG=chrome-os-partner:39717 TEST=manual samus + apple hdmi multiport dongle drivers external screen. Change-Id: I32c33f938ba1aa7a3927a0f75a1269b1278e82de Signed-off-by: Todd Broch <tbroch@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/268653 Reviewed-by: Alec Berg <alecaberg@chromium.org> Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
* plankton: Reset USB hub when switch from DP mode to USB modeVic Yang2015-05-011-0/+2
| | | | | | | | | | | | | | | | | | | | | | If we are switching from DP mode to USB mode, reset the USB hub to make sure the hub recognizes USB connection properly. Note that we only reset the hub when making the switch by pressing the button on the board. This is to prevent disrupting BFT test flow, during which we don't want to reset the hub so as to maintain the USB link between the test host and Plankton MCU. BRANCH=None BUG=chrome-os-partner:34296 TEST=Press the button to toggle between DP and USB mode. Measure USB hub reset signal with a scope. Change-Id: I69bdee292fe414abbe0a4778b8f5e8041e4534c1 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/237606 Reviewed-by: Alec Berg <alecaberg@chromium.org> Reviewed-by: Todd Broch <tbroch@chromium.org> Commit-Queue: Todd Broch <tbroch@chromium.org> Tested-by: Todd Broch <tbroch@chromium.org>
* plankton: treat USB mode as DP detachedVic Yang2015-05-011-2/+16
| | | | | | | | | | | | | | | | | | | | | | | When a DP cable is attached, if we toggle the USB/DP mux to USB mode, the DP data link is broken. In this case, we should send a HPD event to notify the host. Similarily, when we switch back to DP mode when a cable is attached, we should send a HPD attachment event and then a HPD IRQ to notify the host that the DP link is ready. BRANCH=None BUG=chrome-os-partner:34296 TEST=Connect Plankton to Samus. Perform the following tests: 1. Attach a cable, and switch between USB and DP mode. 2. Attach a cable in DP mode, switch to USB mode, unplug the cable, and then switch back to DP mode. 3. Similar to 2 but start without the cable. Change-Id: I5db0c036ce45850b2f4ca142957f4a235673df6f Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/237604 Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Todd Broch <tbroch@chromium.org> Tested-by: Todd Broch <tbroch@chromium.org>
* cr50: uart: increase console tx buffer sizzeVadim Bendebury2015-05-011-0/+9
| | | | | | | | | | | | | | | | | | Sometimes default buffer size in not enough to collect debug information generated before console is initialized. This helps when debugging, allowing to enable fairly large amount of data printed before console is available, could be reduced if memory becomes tight. BRANCH=none BUG=none TEST=early debug information previously truncated is printed fully now. Change-Id: I647c6064a44f7558414f72f399280b5780a4b1ec Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/268640
* plankton: HPD over USB PD.Todd Broch2015-05-016-10/+273
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | HPD needs to be transported over USB PD as both SBU lines are consumed for differential AUX signalling. This CL does the following: 1. Enables GPIO DPSRC_HPD as interrupt. 2. Sends debounced HPD across CC via the SVDM DP status message. 3. Adds polling for GPIO_DBG_20V_TO_DUT_L as it shares the same interrupt as DPSRC_HPD. 4. Configures DP redriver in presence of HPD high. Signed-off-by: Todd Broch <tbroch@chromium.org> BRANCH=none BUG=chrome-os-partner:33132,chrome-os-partner:33761 TEST=manual, 1. Connect samus -> plankton via type-C 2. Connect plankton -> DP monitor via displayport See initial SVDM discovery on samus console See EDID information See SVDM status message correct when plug/unplug DP cable from plankton 3. Press 'CHARGING_20V_TO_DUT_L' button and see below on plankton console. Button 8 = 0 Change-Id: Id95567a3bfa073ffa2c699335be8c5bf0327675f Reviewed-on: https://chromium-review.googlesource.com/229429 Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Todd Broch <tbroch@chromium.org> Tested-by: Todd Broch <tbroch@chromium.org>
* plankton: Reset re-driver on boot and configure training more.Todd Broch2015-05-011-10/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit, '0016de8 - plankton: Initialize re-driver', didn't account for the state of the redriver at the time it was being initialized in manual training mode. This led to inconsitencies of manual training configuration. This CL resets the SN75DP130 via software to guarantee configuration regardless of cold versus warm boot. Additionally I learned that manual training requires setting of both the link_bw_set (5.4gbps) and lane_count_set (4) in order make the back side of the redriver happy. This can ONLY be done however in the presence of HPD high. Future CL will incorporate this DPCD init into HDP interrupt handler as well. Signed-off-by: Todd Broch <tbroch@chromium.org> BRANCH=none BUG=chrome-os-partner:35153 TEST=manual, samus + plankton successfully drives Samsung U28D590 from cold or warm boot of either plankton or samus in both polarities. Note DisplayPort cable must be connected to external monitor prior to power on or reset. macbook (2015 type-C) + plankton also works. Change-Id: I8b34341d10f64abfa55c18f70c842a4446f36fa8 Reviewed-on: https://chromium-review.googlesource.com/266526 Reviewed-by: Alec Berg <alecaberg@chromium.org> Commit-Queue: Todd Broch <tbroch@chromium.org> Tested-by: Todd Broch <tbroch@chromium.org>
* improve enum readabilityVadim Bendebury2015-04-301-8/+8
| | | | | | | | | | | | | | A purely cosmetic change making it easier to convert numbers into enums when analyzing debug printouts. BRANCH=none BUG=none TEST='make buildall -j' still succeeds. Change-Id: I078a1d253fe928a1390cbed9baf7786a239fa01d Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/268402 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* samus_pd: Request different DP pin modes including multi-function.Todd Broch2015-04-303-6/+86
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously samus_pd just picked pin mode E without regard to what the UFP was requesting. This change surveys the UFP's DP pin capabilities and then requests the appropriate pin config. Additionally if the UFP supports multi-function and has preferred it during the initial DP status message, samus will configure its type-c mux in 'dock' mode. Signed-off-by: Todd Broch <tbroch@chromium.org> BRANCH=samus BUG=chrome-os-partner:38728 TEST=manual, 1. hoho + samus, pin mode = 'C' 2. dingdong + samus, pin mode = 'E'. 3. apple type-C HDMI multiport + samus, pin mode = 'D' and USB device enumerates as SuperSpeed. 4. plankton + samus w/ patch asserting alternate mode with multi-function preferred sets config to 'F' now and only drives DP out on 2 lanes w/ other two allowing USB key to be seen. Change-Id: Ie4764c33f108e8a88f0052b64ddb96cb92e5a78b Reviewed-on: https://chromium-review.googlesource.com/267796 Commit-Queue: Todd Broch <tbroch@chromium.org> Tested-by: Todd Broch <tbroch@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* cr50: allow using ccprintf() early in the processVadim Bendebury2015-04-302-6/+8
| | | | | | | | | | | | | | | | | | | | Attempts to use ccprinf() before both uart and usb consoles have been initialized cause the device lock up. Luckily both console channels are buffered (and usb console buffering is about to be greatly improved), all what needs to be done is to hold on to the attempts to start transmit interrupts until hardware has been initialized. BRANCH=none BUG=none TEST=attempts to print something on the console early in the process do not cause the device to lock up any more, and the printouts show up where expected. Change-Id: I16cd1fab79bceaf7c2334a955fdb6046d21ed550 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/268379 Reviewed-by: Bill Richardson <wfrichar@chromium.org> Reviewed-by: Sheng-liang Song <ssl@chromium.org>
* samus_pd: Cleanup HPD port calls.Todd Broch2015-04-301-10/+5
| | | | | | | | | | | | | | | Signed-off-by: Todd Broch <tbroch@chromium.org> BRANCH=samus BUG=chrome-os-partner:38728 TEST=make buildall -j Change-Id: I6be4e59daf7d79f643a6e4fa6400d6f13f521ea4 Reviewed-on: https://chromium-review.googlesource.com/267795 Reviewed-by: Alec Berg <alecaberg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Todd Broch <tbroch@chromium.org> Tested-by: Todd Broch <tbroch@chromium.org>
* samus_pd: Remove pin configuration for DFP_D.Todd Broch2015-04-302-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | Samus does NOT provide any sink capabilities for DisplayPort or USB device mode so it should NOT request UFP_U select any pin assignments for DFP_D. Additionally even if this functionality was provided by the DFP the specification states, 'and one pin assignment for either the DFP_D or UFP_D'. This did NOT cause any functional issues but strictly speaking is a compliance bug. Signed-off-by: Todd Broch <tbroch@chromium.org> BRANCH=samus BUG=chrome-os-partner:38728 TEST=manual, hoho still successfully drives external monitor. Change-Id: Iea3441989924dcee69fdb83299ef7e817df55683 Reviewed-on: https://chromium-review.googlesource.com/267794 Reviewed-by: Alec Berg <alecaberg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Queue: Todd Broch <tbroch@chromium.org> Tested-by: Todd Broch <tbroch@chromium.org>
* pd: cleanup PD receive error enumAlec Berg2015-04-294-18/+18
| | | | | | | | | | | | | | Cleanup PD receive error enum by including RX in name since we will have a different enum for TX errors. BUG=none BRANCH=none TEST=make -j buildall Change-Id: I355092e0e73a022acb4a92736374cd2289d324bf Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/267670 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* braswell: Support added for suspend/resume and shutdownDivya Jyothi2015-04-291-10/+11
| | | | | | | | | | | | | | | | | | The current power sequencing would shutdown the system when suspend command or reboot was initiated from the kernal. Proper transitions from S0-S3 and S3-S0 are handled. BUG=None BRANCH=None TEST=Tested on Braswell reference design. Issued commands from kernel:For shutdown - "shutdown -P now" and suspend - "powerd_dbus_suspend" Change-Id: I7cc734f29c0dca89f7d9564f175895467b405df0 Signed-off-by: Divya Jyothi <divya.jyothi@intel.com> Reviewed-on: https://chromium-review.googlesource.com/265091 Reviewed-by: Shawn N <shawnn@chromium.org> Commit-Queue: Eric Caruso <ejcaruso@chromium.org>
* bq24770: Corrected charger driver used an incorrect SMBUS address.Kevin K Wong2015-04-292-14/+19
| | | | | | | | | | | | | | BUG=none TEST=Verified with a SMBus analyzer that only the expected device address is detected on the bus. BRANCH=none Change-Id: Ib8c8589544b9ec11127619a1120eb21f211fd690 Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com> Reviewed-on: https://chromium-review.googlesource.com/267472 Reviewed-by: Alec Berg <alecaberg@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org> Commit-Queue: Divya Jyothi <divya.jyothi@intel.com>
* Strago: enabled I2c wedge functionality on all i2c portsstabilize-7019.Bstabilize-7018.BDivya Jyothi2015-04-292-4/+12
| | | | | | | | | | | BUG=chrome-os-partner:39400 BRANCH=None TEST=make -j buildall Change-Id: Iba2ce1395e1f8e662db4888e3cec79d5e4bbce82 Signed-off-by: Divya Jyothi <divya.jyothi@intel.com> Reviewed-on: https://chromium-review.googlesource.com/267470 Reviewed-by: Shawn N <shawnn@chromium.org>
* stm32: spi: Fix race condition with the enabled booleanAlexandru M Stan2015-04-281-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Sometimes the chipset task is slow enough that we might get messages from the AP before chipset_in_state(CHIPSET_STATE_ON) is true. This causes us to leave the spi off after our usual reset after every transaction (see chrome-os-partner:31390). This would put an end to any EC communications. Instead of relying on CHIPSET_STATE_ON we could just save the value of "enabled" before we turn it off, then use that as a condition instead. There shouldn't be a race condition on "enabled" because the only other place it gets modified is in the hooks, which can't preempt spi_init (which usually happens in the host command task). The only problem is that in case of a sysjump enabled will be 0, so CHIPSET_STATE_ON was left as a backup to handle that case. This fixup was squashed from Ied3788f83fef548dff3b01bec93d0e40101ba0f7 TEST=Resume minnie from "echo mem>/sys/power/state" a few times, note ec still works BUG=chrome-os-partner:39564, chrome-os-partner:39576 BRANCH=veyron Change-Id: I7c33243faebfd74dc33451024c1d75080babee03 Signed-off-by: Alexandru M Stan <amstan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/267593 Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* Strago: Added support for ALS light sensor.li feng2015-04-272-0/+17
| | | | | | | | | | | | | BUG=none TEST=Verified als reading changed on Strago. BRANCH=none Change-Id: I4c29234121f19ed35ac3a5ff7cf6fe51996c5bfb Signed-off-by: li feng <li1.feng@intel.com> Reviewed-on: https://chromium-review.googlesource.com/267273 Reviewed-by: Divya Jyothi <divya.jyothi@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org> Commit-Queue: Kevin K Wong <kevin.k.wong@intel.com>
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