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* pd: make sure attention command is treated as an SVDMstabilze-7441.Bstabilize-7442.BAlec Berg2015-09-081-1/+1
| | | | | | | | | | | | | | | Make sure attention command is treated as a standard VDM. BUG=none BRANCH=none TEST=make -j buildall Change-Id: I7b181cbae9836b13bd461efd15c96f5cb414d0c0 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/297971 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Todd Broch <tbroch@chromium.org>
* mec1322: bug fix for hibernation timerKyoung Kim2015-09-081-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | When system timer stops while in heavysleep idle task, hibernation timer maintains system time and system timer's recovery is done with reading from hibernation timer. If hibernation timer setting/reading is incorrect, system timer recovery is incorrect and evenytually this will result in quicker/more frequent task scheduling and eventually faster sleep LED blinking at S3 and higher S3 power consumption. BRANCH=firmware-strago-7287.B BUG=chrome-os-partner:37576 TEST=1. measure S3 LED blinking time(probing GPIO pin with scope 2. For debug purpose, let system timer keeps running and compare internval from system timer reading (t1 - t0) and one from hibernation timer. Change-Id: Iace3d29c9e20c0ea863c25eacb69d50858e204b7 Signed-off-by: Kyoung Kim <kyoung.il.kim@intel.com> Reviewed-on: https://chromium-review.googlesource.com/297753 Reviewed-by: Shawn N <shawnn@chromium.org> (cherry picked from commit 86e7e64e3b5d27a80e1fac296776c0e2fb57912d) Reviewed-on: https://chromium-review.googlesource.com/297796 Commit-Ready: Divya Jyothi <divya.jyothi@intel.com> Tested-by: Divya Jyothi <divya.jyothi@intel.com>
* charge_manager: ensure we source power when not chargingAlec Berg2015-09-082-23/+23
| | | | | | | | | | | | | | | | | | | | Move asking for a power swap to become a source to happen anytime we stop charging from a dual-role port. We used to ask for a power swap when a dual-role override port was cancelled, but with CONFIG_CHARGE_MANAGER_DRP_CHARGING we can be charging from a dual-role port without having chosen it as the override port, so this guarantees that we always ask to become the source when we stop charging from a port. BUG=chrome-os-partner:44958 BRANCH=smaug TEST=build and run unit tests Change-Id: I009178b479a4626888d11a9993c8738d928fbaf9 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/297880 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* charge_manager: add option to charge from dual-role devicesAlec Berg2015-09-086-26/+118
| | | | | | | | | | | | | | | | | Add option to charge automatically from dual-role devices. This also changes the charge override behavior such that any new device attached will clear the override because any new source is a potential device we might charge from. BUG=chrome-os-partner:44958 BRANCH=smaug TEST=tested charge_manager unittests with CONFIG_CHARGE_MANAGER_DRP_CHARGING both defined and undefined Change-Id: Iac77ff0c501826d5fb5a9d50f88399ebc3955b87 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/297789 Reviewed-by: Shawn N <shawnn@chromium.org>
* eoption: Remove unused eeprom option storage codeAnton Staaf2015-09-0810-247/+0
| | | | | | | | | | | | | | | Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Change-Id: I2174a904df160d19d47f1aa2d053349356cb4291 Reviewed-on: https://chromium-review.googlesource.com/297805 Commit-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* update case closed debugging partial mode policyVincent Palatin2015-09-089-13/+36
| | | | | | | | | | | | | | | | | | | | | | | When a debug accessory is connected to the type-C port while the write protection is enabled, put the case closed debugging in "partial" mode rather than "full". Update the "partial" mode to provide read-only access to the AP and EC consoles. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=smaug BUG=chrome-os-partner:44700 TEST=check the EC console input/output over USB is still working with SuzyQ on a write-protected system, verify that the console input is disabled. Change-Id: I5baa03d6e738d06437c45469f46b286e76a755a4 Reviewed-on: https://chromium-review.googlesource.com/297141 Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org>
* Cleanup: Remove COMPILE_FOR_RAM option from linker scriptsBill Richardson2015-09-088-54/+3
| | | | | | | | | | | | | | | This option was added way back in January 2012 for early EC bringup, and never used since. We can probably remove it. BUG=none BRANCH=none TEST=make buildall Change-Id: Idc8c3099388f2e28d620848a0e78b555b02fba9c Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/297334 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* UART: Remove unused uart.h header includesAnton Staaf2015-09-0814-14/+0
| | | | | | | | | | | | | | Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Change-Id: Ife068807f79f6435292643c49afa1a9a30ae7080 Reviewed-on: https://chromium-review.googlesource.com/296733 Commit-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* I2C: Remove unused arbitration supportAnton Staaf2015-09-086-152/+0
| | | | | | | | | | | | | | | | | The i2c_claim and i2c_release routines are no longer in use, removing this code removes one odd usecase of the panic printing routines. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Change-Id: I76c1d90738e1e39b4b3226c31085513a20bbd769 Reviewed-on: https://chromium-review.googlesource.com/296732 Commit-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* driver: bmi160: Prevent crash when FIFO is not validGwendal Grignou2015-09-073-17/+57
| | | | | | | | | | | | | | | | | | | | | | | | | When all BMI160 sensors are suspended, FIFO is invalid. Put the test to check if all sensors are disable within the processing loop: otherwise, the FIFO can become invalid while we are processing it. Add printf to be sure we are not processing invalid FIFO. Add a macro around ODR to really check the ODR rate, excluding the roundup flag. BRANCH=smaug BUG=chrome-os-partner:44381 TEST=Using a special patch (see 44381#14) add delay to simulate a loaded EC (like at resume). Using a script flip-flop sensors frequency (to simulate suspend/resume). Check that: - we are not crashing anymore (we were before this patch) - the driver is not hitting invalid FIFO content. Change-Id: I7c9e86f5dcfc231ab89472a6ea03af22e2c2ac32 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/297178 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* oak: shutdown tmp432 if AC isn't present in non-S0 stateBen Lok2015-09-074-53/+80
| | | | | | | | | | | | | | | | | | | | | | | To reduce the power consumption in non-S0 AP power state, Shut tmp432 down if external power isn't present. BRANCH=none BUG=chrome-os-partner:43118 TEST=manual 1. make BOARD=oak -j 2. shutdown AP by EC console command: > apshutdown 3. plug external power 4. check whether tmp432 is still running: > tmp432 5. unplug external power 6. check whether tmp432 is shutdown: > tmp432 Change-Id: I4726a18c8754dbe60070d878dff143c76d586dcc Signed-off-by: Ben Lok <ben.lok@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/295059 Reviewed-by: Shawn N <shawnn@chromium.org>
* nuc: Fixed the bugs for flash and i2c drivers.Mulin Chao2015-09-062-58/+126
| | | | | | | | | | | | | | | | | | | | | | | | | | | Since the length of flash-write function used by host command is not aligned to 256 bytes, we need to split it into several sequences to make sure it won't exceed page buffer size of flash. Add i2c stop condition checking to avoid unnecessary i2c unwedge operations. We found some battery will held scl for a while and master cann't issue stop condition immediately. Modified drivers: 1. flash.c: Add support for sequence programing. 2. i2c.c: Add i2c stop condition checking mechanism. 3. i2c.c: Fixed bug of i2c_is_raw_mode. (wrong bit offset) BUG=chrome-os-partner:34346 TEST=make buildall -j; test nuvoton IC specific drivers BRANCH=none Change-Id: I4f35a617466ba37bcc4e3aa5324c8950f824a4c2 Signed-off-by: Ian Chao <mlchao@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/295662 Commit-Ready: Mulin Chao <mlchao@nuvoton.com> Tested-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* Kunimitsu: Enable support for limiting the inrush currentVijay Hiremath2015-09-044-11/+23
| | | | | | | | | | | | | | | | | | | | | | Enable the support for limiting the inrush current by routing the PCH_SLP_SUS through EC gpio PMIC_SLP_SUS which allows the DUT to boot on charger without the battery / dead battery. This is applicable to Kunimitsu FAB4 only. Enabling the Glados patch for Kunimitsu FAB4. Change-Id: I55de857f7006777640f7853b7bde98ba97e8bd13 Reviewed-on: https://chromium-review.googlesource.com/287378 BUG=chrome-os-partner:44706 TEST=FAB4 prototype boots to UI without battery / dead battery. BRANCH=none Change-Id: Ie81cdf3c59fc02d6d59dd06ca321705ca06e7b88 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/296521 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* Kunimitsu: Workaround for PMIC emergency shutdownVijay Hiremath2015-09-031-0/+20
| | | | | | | | | | | | | | | | | | | | | | | When the DUT enters to SOC G3 or rebooted, SLP_SUS assertion turns off the A-rails which is causing the PMIC emergency shutdown. As a workaround this patch disables the power fault in the PMIC register. BUG=chrome-os-partner:44693 BRANCH=none TEST=Manually tested on Kunimitsu FAB3. - "reboot" from the EC console command works - "ectool reboot_ec" from the Kernel terminal works - "shutdown -h now" command from the Kernel terminal puts the device in SoC G3 / PG3. - cold reset from the servo board works Change-Id: Id5e091ace876d7655f64e61cca4a9f0303b69604 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/297045 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* Update some TODO comments.Bill Richardson2015-09-032-4/+1
| | | | | | | | | | | | | BUG=chrome-os-partner:44803 BRANCH=none TEST=make buildall Comment change only. Change-Id: I68c2fba64b7f613e3936f4e7ddf6b48430c7b858 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/297021 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* oak: handle USB BC 1.2 status changeRong Chang2015-09-036-4/+119
| | | | | | | | | | | | | | | | Before oak rev4, BC 1.2 status change was polled on VBUS change. The designed is changed to use a single interrupt pin for both ports. BRANCH=none BUG=chrome-os-partner:42610 TEST=manual make EXTRA_CFLAGS=-DBOARD_REV=3 BOARD=oak -j emerge-oak chromeos-ec load on oak rev3 and check BC 1.2 charging current Change-Id: I9e6cdbb83468b5e4086cc86caadf7f2e3cbe6e48 Signed-off-by: Rong Chang <rongchang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/294442
* driver/temp_sensor: Add power control API for TMP432Ben Lok2015-09-032-4/+83
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some boards didn't define the CONFIG_TEMP_SENSOR_POWER_GPIO (such as: Oak), Due to the hardware design, the power of temp sensor is always on. But, we can enable/disable the temperature measurement circuitry of tmp432 by setup the shutdown (SD) bit. Add a new API: tmp432_set_power() to let upper layer to control the power of tmp432 by SW approach for power saving. BRANCH=none BUG=chrome-os-partner:44170 TEST=manual 1. make BOARD=oak -j 2. Turn off the TMP432: > tmp432 power off 3. check whether tmp432 is shutdown: > tmp432 ERROR: Temp sensor not powered. Not Powered 4. Turn on the TMP432: > tmp432 power on 5. check whether tmp432 is running: > tmp432 Local: Temp 29C Therm Trip 85C High Alarm 85C Low Alarm 0C Remote1: Temp 27C Therm Trip 85C High Alarm 85C Low Alarm 0C Remote2: Temp 27C Therm Trip 85C High Alarm 85C Low Alarm 0C STATUS: 10000000 CONFIG1: 00000000 CONFIG2: 00111100 Change-Id: Iab95c4c0b0130baf3bce380a8132e08ded8d159e Signed-off-by: Ben Lok <ben.lok@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/295058 Reviewed-by: Rong Chang <rongchang@chromium.org>
* mec1322: Remove FPU support by defaultShawn Nematbakhsh2015-09-021-1/+0
| | | | | | | | | | | | | | | | | | Floating point is used in very few places in the code, none of which are needed by mec1322 boards (yet). If needed, individual boards can define CONFIG_FPU. BUG=None TEST=Verify glados continues to boot AP successfully and image is shrunk by 64 bytes. BRANCH=Strago Change-Id: I6ea46c15bedbc498e7baa96098b002d711ac20fb Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/297029 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org>
* strago: Remove temp-sensor console commandsShawn Nematbakhsh2015-09-021-0/+1
| | | | | | | | | | | | | | | | | command_tmp432 will soon grow with the addition of power control which will exhaust our program memory space. BUG=chrome-os-partner:44170 TEST=`make buildall -j` BRANCH=Strago Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I5789ab86ad022bdc3e985794f40b3a25e44ad458 Reviewed-on: https://chromium-review.googlesource.com/296992 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Divya Jyothi <divya.jyothi@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* cleanup: Clarify use of flash layout CONFIGsShawn Nematbakhsh2015-09-026-96/+152
| | | | | | | | | | | | | | | | | | | | | | | | | | | Based on feedback from programmers, it's not clear when config_std_internal_flash should be used, and when non-standard chip-specific layouts need to be defined. Add clarity here with the following changes: - Explain in-depth the one config that config_std_internal_flash should be used for. - Move non-standard chip-level flash layout CONFIGs to their own new chip-level file, config_flash_layout. All chips should either include config_std_internal_flash.h OR define their own layout in their own config_flash_layout. Functionally, this change is a NOP. BUG=chrome-os-partner:23796 TEST=`make buildall -j` BRANCH=None Change-Id: I6037b68db9048d90fa2a2da4c9c9e09d1143fa68 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/296527 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* Cr50: Add stub to implement native NV storageBill Richardson2015-09-022-2/+174
| | | | | | | | | | | | | | | | | | | | | This adds the unimplemented NVMem.c functions from libtpm2 to the local repo. It depends on the libtpm2 CL that removes NVMem.c from the embedded library. BUG=chrome-os-partner:44745 BRANCH=none CQ-DEPEND=CL:296476 TEST=manual sudo emerge tpm2 tpm2-simulator cd src/platform/ec make buildall Change-Id: If7f0d5d71b3e68626cf2c80ea3335ebb9bc9902f Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/296525 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* pd: send soft reset before an EC resetAlec Berg2015-09-013-10/+20
| | | | | | | | | | | | | | | | | Send soft reset to all connected USB PD ports before a user initiated reset (via console or host command). This fixes a problem where EC will send PD hard reset to a charger after an EC reboot, which will cause another reboot if battery is not present. BUG=chrome-os-partner:44085 BRANCH=none TEST=tested on glados without a battery. with zinger attached, issue 'reboot' from console and verify that we only reboot once. Change-Id: Id6c56cda33c289e3425cb433f7fcbe76669d2dff Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/295889 Reviewed-by: Shawn N <shawnn@chromium.org>
* oak: usb_pd: avoid broken SS connection during enter DP mode.Ben Lok2015-09-011-2/+14
| | | | | | | | | | | | | | | | | | | | | | For type-c multi-function accessory (for example: apple's HDMI adapter, or type-c dock), it has SS & DP connection. The SS connection may be established before enter DP mode. The SS connection will be broken if the mux is disabled during enter DP mode. So, it needs to check the mux status and avoid to disable the mux if SS connection is already existed. BRANCH:none BUG=chrome-os-partner:43096 TEST=Manual on Oak rev3 1. connect apple type-C HDMI adapter to right side port(C0). 2. list usb devices in AP console: > lsusb Bus 002 Device 017: ID 05ac:100e Apple, Inc. 3. confirm that apple's device is present. Change-Id: I47a52076de45da9f9a78d114f20c4ff6bb4aa2bc Signed-off-by: Ben Lok <ben.lok@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/295351 Reviewed-by: Rong Chang <rongchang@chromium.org>
* driver: si114x: Convert unit to distanceGwendal Grignou2015-09-013-3/+11
| | | | | | | | | | | | | | Instead of returning the amount of light returned, convert the data into distance (cm). It can be adjust via range. BRANCH=smaug BUG=chrome-os-partner:42526 TEST=check the data is usable by HAL. Change-Id: I97510246ce054af4e61325d7e295ca09cc536457 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/296472 Reviewed-by: Hung-Te Lin <hungte@chromium.org>
* oak: enable MBKP events for PD eventsBen Lok2015-08-3113-14/+50
| | | | | | | | | | | | | | | | | | | (refer to CL:273620) enable the MKBP event feature to send host event and wire up the PD specific events. But, CONFIG_MKBP_EVENT conflicts with CONFIG_KEYBOARD_PROTOCOL_MKBP, due to the GPIO name of EC interrupt pin. Align the GPIO naming of EC interrupt pin to EC_INT_L. BRANCH=none BUG=chrome-os-partner:44643 TEST=On Oak rev3, plug/unplug USB devices and add kernel trace to see the PD events happening. Change-Id: I10de9c6611583bb6165bdc1848e542d4b8bba954 Signed-off-by: Ben Lok <ben.lok@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/296012 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Rong Chang <rongchang@chromium.org>
* Fixed a failure of power button press while entering G3 state.Kaiyen Chang2015-08-311-6/+43
| | | | | | | | | | | | | | | | | | | | | | If the power button is pressed while S5 inactivity timer is about to expire, EC need to give CPU a little time to start up before changing the state from S5 to G3 (the hard off state); otherwise the system will not start up. This issue can be reproduced on Rambi. BUG=chrome-os-partner:42728, chrome-os-partner:42811 BRANCH=None TEST=Implement an ec command to simulate power button press while S5 inactivity timer is about to expire, and then make sure that the patch did solve the issue. Change-Id: I022e8e14fd41447898760a4d57a4702e2c00a0d5 Signed-off-by: Kaiyen Chang <kaiyen.chang@intel.com> Reviewed-on: https://chromium-review.googlesource.com/290280 Reviewed-by: Shawn N <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/296436 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* cortex-m: Fix sysjump to RO with CONFIG_RO_HEAD_ROOMBill Richardson2015-08-311-1/+8
| | | | | | | | | | | | | | This accounts for the extra head room in the RO image. BRANCH=none BUG=chrome-os-partner:43025, chrome-os-partner:44625 TEST=the cr50 image validates *and jumps to* the RW image at boot. Change-Id: I8c87e7a9e7da187c19f135176ae5144cbc609cb9 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/296453 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* cortex-m: CONFIG_RO_HEAD_ROOM should only affect RO imageBill Richardson2015-08-311-1/+1
| | | | | | | | | | | | | | | | When we add head room to the RO image, it's generally to provide a chip-specific boot header of some sort. That header is only needed for the RO image, not the RW image. The macro name implies this, but this CL makes it so. BRANCH=none BUG=chrome-os-partner:43025, chrome-os-partner:44625 TEST=the cr50 image validates *and jumps to* the RW image at boot. Change-Id: I0e5b2c32e232418970e01c7409ddcbbabd4786d5 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/296451 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* kunimitsu: port increase powerbtn task stack sizeWenkai Du2015-08-311-1/+1
| | | | | | | | | | | | | | | | | This patch port powerbtn stack patch from glados. Original-change-Id: I858ad50e86b998e4283a5e11d3a720212150f657 Originally-signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Originally-reviewed-on: https://chromium-review.googlesource.com/295571 BUG=chrome-os-partner:44202 TEST=build EC for kunimitsu and boot BRANCH=None Change-Id: I96d295748a2a557621ea17a4e3f9fce629861d5f Signed-off-by: Wenkai Du <wenkai.du@intel.com> Reviewed-on: https://chromium-review.googlesource.com/295916 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* glados: document behavior of SLP_S0_LAaron Durbin2015-08-311-0/+6
| | | | | | | | | | | | | | | | Note the current behavior and mitigation with the current design regarding SLP_S0_L. BUG=chrome-os-partner:44098 BRANCH=None TEST=Built. Change-Id: I784dda5e442496c48a5b74614996ff19285e2812 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/295248 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* skylake: allow power button power ons in S5 after apshutdownAaron Durbin2015-08-311-3/+3
| | | | | | | | | | | | | | | | | | | On skylake the apshutdown command holds the power button asserted until the power state machine decides to deassert the power button. Previously this check was taking place in G3 state. As such when the board waited in S5 for 10 secs one couldn't re-power on the system. To alleviate that move the logic for power button deassertion into the S5 state. BUG=chrome-os-partner:44532 BRANCH=None TEST=Used apshutdown. When device got to S5 power noted another powerb command would bring the system back up instead of waiting to enter G3 power state. Change-Id: I9989b27bd48819d7c3e5efd071b0327c38fe91e2 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/295198 Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
* cyan, kunimitsu, strago: motion_sense: use new rate calculationGwendal Grignou2015-08-293-73/+137
| | | | | | | | | | | | | | | | | | | | | | Use new config structure. Remove pre-init when sensors are shutdown in S3 on strago: motion_sense is not setting ODR to 0 inconditionally when sensors are not active. active_mask now means state (S0, S3, S5) where sensors are powered on. When sensor is powered but unused, EC can use the config array to set the polling and ODR to 0. BUG=chromium:513458 TEST=On Cyan, verify the sensors are working in S0. In S3, check the motion_sense task is idle (now sensor to probe). Check the task comes back on resume. BRANCH=cyan,strago Change-Id: Ib3d118b7139f94755fef4cb73fc1274e9e2f2826 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/295781 Reviewed-by: Sheng-liang Song <ssl@chromium.org>
* samus: Use new config, fix gestureGwendal Grignou2015-08-294-36/+73
| | | | | | | | | | | | | | Use new config table. Move ODR setting in motion sense, fix variable names. BRANCH=samus BUG=chromium:513458 TEST=Test accelerator and double tap on Samus Change-Id: I341add11a18de8e4cc97c57da29f9114bd2014cf Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/295638 Reviewed-by: Alec Berg <alecaberg@chromium.org>
* motion_sense: Add more complex EC/AP sensor rate support.Gwendal Grignou2015-08-2911-218/+427
| | | | | | | | | | | | | | | | | | | | | Add config settings for ODR and EC rate per requestor and per power state (1 for the AP, 3 for the EC). This way we can finely set ec rate and ODR depending on usage. On chromeos, AP is not setting frequency, so EC sets for different power state. On some platform, sensors can now be suspended in S3/S5. Allow EC oversampling when AP is only looking for a few samples. It is useful for double tap detection where high accelerator ODR is required. BRANCH=ryu TEST=Tested on Ryu BUG=chromium:513458 Change-Id: Ic3888a749699f07b10c5da3bc07204afd4de70da Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/295637
* driver: kxcj9: Remove some printf to fit into kunimitsuGwendal Grignou2015-08-291-5/+0
| | | | | | | | | | | | | Remove some printfs for the new sensor code to compile. BRANCH=kunimitsu BUG=None TEST=compile Change-Id: Ia7b203a03866fd497cdfaf5fa91f651423279f61 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/295856 Reviewed-by: Sheng-liang Song <ssl@chromium.org>
* common: motion_sense: Fix Light sensor sequencingGwendal Grignou2015-08-291-5/+6
| | | | | | | | | | | | | | | | Light was gathered too often: - missing timestamp when reading completes. - error when calculating next timestamp. BRANCH=ryu BUG=chrome-os-partner:32829 TEST=check the light is sampled ~ every seconds, whatever the motion task frequency Change-Id: Id070af3c8d2e080780334822278dda267bea058c Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/295636 Reviewed-by: Sheng-liang Song <ssl@chromium.org>
* driver: change get_ interface.Gwendal Grignou2015-08-297-81/+48
| | | | | | | | | | | | | | | Simplify sensor get_data_rate, get_range and get_resolution. Error code was not checked and these functions as currently implemented have no reason to fail. BRANCH=ryu,samus,cyan,strago BUG=chromium:513458 TEST=Check on ryu, compile Change-Id: I40dca41cee29a19f65b2f84d434b4c19eb6cbf3c Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/295635 Reviewed-by: Sheng-liang Song <ssl@chromium.org>
* glados: increase voltage hysteresis in fast chargingAlec Berg2015-08-281-2/+2
| | | | | | | | | | | | | | | | Increase voltage hysteresis in fast charging to 100mV to avoid bouncing back and forth between low and high voltage profiles. BUG=chrome-os-partner:44299 BRANCH=none TEST=test on glados, charge up from below 8.2V to above 8.3V with zinger and verify that we switch cleanly from the low voltage profile to the high voltage profile. Change-Id: Ia4c03b93da66c4913848ba8eec0e09988c4d71d8 Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/296024 Reviewed-by: Shawn N <shawnn@chromium.org>
* Keyboard: Add a macro to conditionally compile the console commandsVijay Hiremath2015-08-284-2/+6
| | | | | | | | | | | | | | | | | | | | Added macros to conditionally compile the keyboard test console commands to save the memory. These macros can be enabled/disabled in the board specific files. BUG=none TEST=make buildall -j BRANCH=none Change-Id: I3ad190f1f3c9310e4f706b3b23cb8ca8755e49ef Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/295942 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Commit-Ready: Divya Jyothi <divya.jyothi@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Divya Jyothi <divya.jyothi@intel.com> Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* twinkie firmware: add support for vbus voltage and currentDawei Li2015-08-283-8/+192
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The format of an ep packet header (8 bytes) : Packets for cc1: [sample_tstamp, sample_seq, vbus_voltage, tstamp_offset] Packets for cc2: [sample_tstamp, sample_seq, vbus_current, tstamp_offset] Updated: use array to implement a circular queue; when a forming a packet, remove one element from the queue. In this way, we can capture more samples of vbus information. Updated: when sniffer task has not started sending packets, most recent vbus info is always stored at the first position of the queue, making sure that the first reported vbus info is the most recent one. Updated: allow user to compile the original version or the new version of the source code. In ec/board/twinkie/board.h Use #define CONFIG_USBC_SNIFFER_HEADER_V1, if you do not want twinkie to send out vbus info; Use #define CONFIG_USBC_SNIFFER_HEADER_V2, if you want twinkie to send out vbus info. Signed-off-by: Dawei Li <daweili@google.com> BUG=chrome-os-partner:42703 BRANCH=none TEST=BEGIN connect Twinkie to a waveform generator, record data using: sudo sigrok-cli -d chromium-twinkie --continuous -o test.sr then check the resulting waveforms on pulseview. END Change-Id: Ifdb6402eb7d998ffb25128c510d1780491b11872 Reviewed-on: https://chromium-review.googlesource.com/282388 Commit-Ready: Sheng-liang Song <ssl@chromium.org> Tested-by: Dawei Li <daweili@google.com> Reviewed-by: Sheng-liang Song <ssl@chromium.org>
* twinkie_sink: allow twinkie commands in the sink mode twinkieDawei Li2015-08-283-2/+18
| | | | | | | | | | | | | | | | | | | | | | Previously, the "twinkie" commands are only avaible in sniffer/normal mode. By allowing the twinkie commands in sink mode. We can do more testings in the sink mode. The following important commands are now available in sink mode: twinkie bufrd, twinkie bufwr, twinkie fsm, twinkie send. With these commands, we can command sink mode twinkie to send arbitrary USB PD packets, and see how the target devices respond. Since sink mode and sniffer mode may have conflicts with each other, the commands may not behave in the same way as in sniffer mode. See the #ifdef HAS_TASK_SNIFFER ... #endif blocks for details. Signed-off-by: Dawei Li <daweili@google.com> Change-Id: I06d4a7674d9aa897d09d4a2e6f2410f2c84f8f4b Reviewed-on: https://chromium-review.googlesource.com/294956 Commit-Ready: Sheng-liang Song <ssl@chromium.org> Tested-by: Dawei Li <daweili@google.com> Reviewed-by: Sheng-liang Song <ssl@chromium.org>
* Kunimitsu: Buffer AC status to the PCHVijay Hiremath2015-08-272-1/+13
| | | | | | | | | | | | | | | | | | | Ported the patch from Glados. Change-Id: Id7e6ca674e35c98594d09b86ab5bdf518f8b3984 Reviewed-on: https://chromium-review.googlesource.com/288922 BUG=none BRANCH=none TEST=boot on Kunimitsu and verify PCH_ACOK is asserted when the device starts to charge and is deasserted when no cable is connected. Change-Id: I869dab9dacc9c80da1cff79d795f07e16cbd37de Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/295864 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* ectool: Add description for new sensors.Gwendal Grignou2015-08-271-0/+12
| | | | | | | | | | | | | | | | Add string for new sensors. BUG=none BRANCH=ryu TEST=show newest sensor properly: Type: proximity Location: lid Chip: si1141 Change-Id: Ia41f845cd02ba7a1fd322c15692be0bb177eada4 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/295634 Reviewed-by: Sheng-liang Song <ssl@chromium.org>
* kunimitsu: battery led implementationMike M Hsieh2015-08-274-1/+172
| | | | | | | | | | | | | | | | Implement LED function for battery charging behavior BUG=none BRANCH=none TEST=checked and verified LED behavior while charging and remaining battery capacity under 3%/10% Signed-off-by: Mike Hsieh <mike.m.hsieh@intel.com> Change-Id: Ic340d4ea428f7726611b2ae24a4d18563c63ee80 Reviewed-on: https://chromium-review.googlesource.com/295476 Commit-Ready: Wenkai Du <wenkai.du@intel.com> Tested-by: Wenkai Du <wenkai.du@intel.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* ryu: Change charger termination current to 192mA.Todd Broch2015-08-272-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Good rule of thumb for charger current is that it should be set between C/20 & C/50 for the battery of the device. For ryu its presently set at 64mA which may explain why we see charger's status as charging even when battery is full. In any case its well below recommendation so lets change it to something within that. Sampled data (see issue tracker) indicates charging current is ~256mA when battery reaches 100% charged. Setting to 192mA (3 * 64) to error on the side of charging slightly longer. This number is still within termination current recommendation: C/20 > term_current >= C/50 Note, also changing bq2589x default termination to match its POR value of 256 as no other board uses this charger presently. Signed-off-by: Todd Broch <tbroch@chromium.org> BRANCH=smaug BUG=chrome-os-partner:42848 TEST=manual, read charger IC termination register and see termination current set to 192mA Change-Id: I60dbb9326c3abb8091fd9ab18eda08b9eabb197b Reviewed-on: https://chromium-review.googlesource.com/293096 Commit-Ready: Todd Broch <tbroch@chromium.org> Tested-by: Todd Broch <tbroch@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* glados: implement x86 power cycle on EC resetAaron Durbin2015-08-262-2/+41
| | | | | | | | | | | | | | | | | | | On certain glados boards (board id >= 2) there is a gpio conntected to the LDO_EN pin of the BD99992 pmic. This is a requirement for pulling power from the x86 side of the system. Add a check at HOOK_INIT time to check the current system reset flags. If a watchdog, hard, or soft reboot occurred the LDO_EN is deasserted to bring down the DSW and primary rails. BUG=chrome-os-partner:44527 BRANCH=None TEST='reboot', 'reboot ap-off', host cmd reboot. Change-Id: I7e971a03c8894e1cbf20aaad67903db2057aad41 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/295116 Reviewed-by: Shawn N <shawnn@chromium.org>
* system: provide optional chip_save_reset_flags()Aaron Durbin2015-08-262-1/+9
| | | | | | | | | | | | | | | | | | | Certain boards may need to handle fixing up the RESET_FLAG_s because of the boards' designs. Provide an optional per-chip implementation to save the reset flags. Note that this function is not protected by a CONFIG_ option as it can just be implemented by the chip if a board requires it. Lastly, implement chip_save_reset_flags() for mec1322 for future use. BUG=chrome-os-partner:44527 BRANCH=None TEST=Built and booted on glados. Change-Id: I604fe4e6a069f31727bab52288595a349e3dbe72 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/295115 Reviewed-by: Robbie Zhang <robbie.zhang@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* glados: disable console historyAaron Durbin2015-08-261-0/+1
| | | | | | | | | | | | | | We're already too close to limits. Disable console history to provide more breathin room for features. BUG=chrome-os-partner:44527 BRANCH=None TEST=Can build with follow up code that actually links. Change-Id: I53f9fdace64e01d28081f62fa535bb6efd0f5675 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/295114 Reviewed-by: Shawn N <shawnn@chromium.org>
* glados: enable CONFIG_BOARD_VERSIONAaron Durbin2015-08-272-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Glados has board ids, but the config variable was never set. Enable the config and also change the name of the GPIOs to match the expectations of the common infrastructure. Prior: > version Chip: smsc mec1322 81 Board: 0 RO: glados_1.1.9999-f3a5046 RW: glados_1.1.9999-f3a5046 Build: glados_1.1.9999-f3a5046 2015-08-26 10:42:45 @adurbin-chromium With chnage: > version Chip: smsc mec1322 81 Board: 1 RO: glados_1.1.9999-028832d RW: glados_1.1.9999-028832d Build: glados_1.1.9999-028832d 2015-08-26 11:41:43 @adurbin-chromium BUG=chrome-os-partner:44527 BRANCH=None TEST=version command reports board id strapping. Change-Id: I9b7e41d2f61a91de4648a09ac9da9f101f7bb830 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/295113 Reviewed-by: Leroy P Leahy <leroy.p.leahy@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* util: More enhancements to config_option_check.py.Aseda Aboagye2015-08-271-51/+139
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit enhances the config_option_check.py script a little bit more. Firstly, I fixed a bug where lines beginning with an '*' were treated as a comment where it was not so. ex: *status = (CONFIG_BAR_PORT & 0x23); Additionally, I added support for considering deletions. This allows the script to check to see if a CONFIG_* option being removed is being used anywhere else in the repo. If the option isn't used elsewhere, then it appears to be the removal of the last use. An error is flagged informing the user to remove that option from the main config file. This helps to keep the config file up to date without leaving stale CONFIG_* options where one might not know if they still work or not. Debug config options are always assumed to be used as those are typically enabled locally. BUG=chromium:510672 BRANCH=None TEST=Used a new config option without adding it to the main config file and watched the error be flagged. TEST=Removed the last use of a CONFIG_* option while leaving the option in the main config file. Observed that it was flagged. TEST=cros lint --debug util/config_option_check.py TEST=make -j buildall tests Change-Id: I8702ad06d9856c14f7bcd4592e917a5d3fcb6b57 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/294620 Trybot-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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