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* Elm: update LED controlstabilize-8481.BRyan Zhang2016-06-201-9/+39
| | | | | | | | | | | | | following Change#227416 to meet client's spec. BUG=chrome-os-partner:54263 BRANCH=master TEST=`make -j BOARD=elm`, check factory force IDLE, works good Change-Id: I1f0abdcbd56eeab379a6258869ccc133ff80736d Signed-off-by: Ryan Zhang <Ryan.Zhang@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/353521 Reviewed-by: Shawn N <shawnn@chromium.org>
* npcx: vbnvcontext: Fix misaligned accessShawn Nematbakhsh2016-06-201-11/+18
| | | | | | | | | | | | | | | | | | | | We have no guarantee about the alignment of our input buffer so don't use 32-bit access. BUG=chrome-os-partner:54561 BRANCH=None TEST=Manual on gru. Enable CHROMEOS_VBNV_EC, verify exception isn't encountered on host command 0x17. Also verify call to system_set_vbnvcontext followed by system_get_vbnvcontext results in same data being read back. Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I4df636b70c71a43a2dd6f584ee965135e90b4351 Reviewed-on: https://chromium-review.googlesource.com/354132 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* kevin: add CHARGER_NARROW_VDC to prevent DC-DC stoppingWonjoon Lee2016-06-191-0/+1
| | | | | | | | | | | | | | | | BD99955 DCDC wiil turn off Vsys voltage under VSYSVAL_THL_SET or VREF_BAT<VBAT if Charging Voltage set under actual battery voltage or VSYSVAL_THL_SET. BUG=chrome-os-partner:53777 BRANCH=none TEST=boot-up without battery. using zinger or oem supplier used kevin rev2, rev3 Change-Id: I03c5c52790b2d481be3fa942054516fbefa3ce98 Signed-off-by: Wonjoon Lee <woojoo.lee@samsung.com> Reviewed-on: https://chromium-review.googlesource.com/348563 Reviewed-by: Shawn N <shawnn@chromium.org>
* cr50: Add pull down on UART TX signalsMary Ruthven2016-06-191-5/+9
| | | | | | | | | | | | | | | | | We need to have an internal pull down so the UART TX signals will be pulled low when servo is disconnected. BUG=chrome-os-partner:54547 BRANCH=none TEST=On gru test that servo detection works. Change-Id: I7d549766273862eb23c0645b887f3db4a0adbab1 Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/353764 Commit-Ready: Vadim Bendebury <vbendeb@chromium.org> Tested-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* kevin / gru: Enabling charging at up to 20VShawn Nematbakhsh2016-06-191-3/+2
| | | | | | | | | | | | | | | BUG=chrome-os-partner:54551 BRANCH=None TEST=Manual on kevin. Verify negotiation to 20V when zinger is plugged. Also verify "pd 0 dev 12" and "pd 0 dev 5" cause 12V/5V to be requested from zinger. Change-Id: I0298d535b791fa0c6f8ca077a6fd09a27e8ce77b Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/353804 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* ec_commands: use hex to make EC_PWM_MAX_DUTY clearerBrian Norris2016-06-171-2/+2
| | | | | | | | | | | | | | | Some comments in upstream Linux review have suggested this be hex. Makes sense to me. BUG=chromium:621123 TEST=build BRANCH=none Change-Id: Ib7143acc96a2fe593d5e02ad0fba3a501bd8cea2 Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/353681 Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* driver: si114x: Handle overflow properly.Gwendal Grignou2016-06-171-12/+16
| | | | | | | | | | | | | | Overflow happens when raw value from ADC is greater than 0x7FFF. When it happens, skip the result. BRANCH=ryu,jerry TEST=Without this code, the proximity sensor would show 22000in instead of staying close to 0 when thumb is near sensor. BUG=chrome-os-partner:53851 Change-Id: Id2182acbbf7b00157d9fee5d28bb61df4f166246 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/348300
* pd: Set PD_FLAGS_VBUS_NEVER_LOW after tcpm_initKoro Chen2016-06-171-4/+4
| | | | | | | | | | | | | | | | | | | | | | When we jump from RO to RW, tcpc_vbus declared in tcpci.c is initialized to 0. So even if we had VBUS present before, PD_FLAGS_VBUS_NEVER_LOW is not set and soft reset cannot be used later when source cap is timeout. This causes power loss and reboot when we boot up system without battery. Set PD_FLAGS_VBUS_NEVER_LOW after tcpm_init() so we can refresh tcpc_vbus from TCPC first. BUG=chrome-os-partner:53496 BRANCH=none TEST=test on elm. Remove battery and boot up successfully only with AC. Use "sysjump rw" command and ec won't reboot by pd hard reset. Change-Id: Id4737f076a9572cb540310f9fdce062198257967 Signed-off-by: Koro Chen <koro.chen@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/352833 Reviewed-by: Rong Chang <rongchang@chromium.org>
* Revert "elm: get VBUS statue from GPIO"Koro Chen2016-06-173-7/+2
| | | | | | | | | | This reverts commit abe2a55191dbcdf8c92bfea64601b607471d75be due to it triggers Issue 54108. Change-Id: I19c89511e31b056285680e3afff95f44b4d932a6 Signed-off-by: Koro Chen <koro.chen@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/352832 Reviewed-by: Shawn N <shawnn@chromium.org>
* gru: Add battery status LED controlShawn Nematbakhsh2016-06-163-3/+132
| | | | | | | | | | | | | | | | | | | | | | | | Implement the standard LED control scheme for gru, using a single PWM to set the battery status LED color rather than the traditional GPIOs. BUG=chrome-os-partner:54379 BRANCH=None TEST=Manual on gru. Verify LED is green when charging w/ nearly full battery, off when discharging w/ nearly full battery, amber when charging otherwise. Also verify LED control host commands work as expected: ectool led battery green=1 // green ectool led battery amber=1 // amber ectool led battery red=1 // red ectool led battery red=0 // off Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I184e72c552e6d2196aef2724af9292806e0ea8c0 Reviewed-on: https://chromium-review.googlesource.com/352520 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: David Schneider <dnschneid@chromium.org> Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* usb_updater: allow to define target environmentVadim Bendebury2016-06-161-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | It is necessary to be able to build usb_updater for both host and board environments. When building for board environments the appropriate compiler and binutils are defined in the environment. Allow the environment definitions to take precedence over local definitions. BUG=none TEST=inside and outside chroot: . ran 'make clean; make; verified that command can be run on the host. inside chroot: . ran 'emerge-kevin ec-utils' and verified using the 'file' utility that the executable in /build/kevin/usr/sbin/usb_updater is built for arm Change-Id: If2ac4a4e7f7ece188eba5ff917a510363c6d1990 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/353165 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* g: remove the fuse override in rboxMary Ruthven2016-06-162-15/+1
| | | | | | | | | | | | | | | | FUSE_CTRL_OVERRIDE overrides all rbox fuse values with the values in RBOX_DEBUG not just the ones that are explicitly set. This change removes the override from rbox. BUG=chrome-os-partner:54238 BRANCH=none TEST=on gru and kevin check that pressing 'c' registers on the EC. Change-Id: I655e9ca96e52359a7d36e0d691f838c335df8cb8 Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/353033 Reviewed-by: Bill Richardson <wfrichar@chromium.org> Reviewed-by: David Schneider <dnschneid@chromium.org>
* Enable 1 slot of secure temporary storage in reef.Ravi Chandra Sadineni2016-06-161-2/+2
| | | | | | | | | | | | | | BUG=chrome-os-partner:53877 BRANCH=None TEST=Boots successfully without any error in retrieving hash code. Change-Id: Ia6ff6b702c8ac15ce8ab546595c36ce148bf6480 Signed-off-by: ravi chandra sadineni <ravisadineni@google.com> Reviewed-on: https://chromium-review.googlesource.com/352826 Commit-Ready: Ravi Chandra Sadineni <ravisadineni@chromium.org> Tested-by: Ravi Chandra Sadineni <ravisadineni@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Ravi Chandra Sadineni <ravisadineni@chromium.org>
* bd99955: Improve interrupt / USB charger task wake schemeShawn Nematbakhsh2016-06-163-83/+56
| | | | | | | | | | | | | | | | | | | | | | | | | Previously our charger ISR called a deferred task which woke our charger task. We can skip the deferred task and just wake our charger task directly. The other meaningful change here is to assume that we're using the charger for VBUS detection / BC1.2 if we have a usb_chg task, which holds true for all of our current boards with this charger. BUG=None TEST=Manual on kevin with subsequent commit. Verify charger connect / disconnect detection works properly on both ports, with zinger, donette and generic DCP charger. BRANCH=None Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: Iad4f3ea90947b50859c549b591675e325717209f Reviewed-on: https://chromium-review.googlesource.com/352822 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Mary Ruthven <mruthven@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* elm: anx7688: make anx7688 always onKoro Chen2016-06-161-17/+10
| | | | | | | | | | | | | | | | | This makes the boot time less painful since it requires a long delay for FW loading after power on this chip. This also makes it easier to upgrade FW as we don't need to power on the chip before doing upgrade. BRANCH=none BUG=chrome-os-partner:52815 TEST=plug and unplug dongle and check DP output plug/unplug adapter and check pd 0 state Change-Id: Ia344c748697a3b1d06c9b442e1bf1d7227861f9b Signed-off-by: Tang Zhentian1 <ztang@analogixsemi.com> Signed-off-by: Koro Chen <koro.chen@mediatek.com> Reviewed-on: https://chromium-review.googlesource.com/347181 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* elm: anx7688: add anx7688 hpd driverRong Chang2016-06-1610-48/+324
| | | | | | | | | | | | | | | | | | | | ANX7688 is a TCPCI compatible port controller with HDMI to DP converter. The HDMI converter needs a reset every time after enabling its function. BRANCH=none BUG=chrome-os-partner:52815 TEST=manual boot elm proto plug and unplug dingdong and check DP output plug/unplug adapter and check pd 0 state Change-Id: I774421d7b0b8d2cfd31e860fcd4eaed08ee48ac7 Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Tang Zhentian1 <ztang@analogixsemi.com> Reviewed-on: https://chromium-review.googlesource.com/340371 Commit-Ready: Koro Chen <koro.chen@mediatek.com> Tested-by: Koro Chen <koro.chen@mediatek.com> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* kevin / gru: Enable charger interrupt and connect USB data switchesShawn Nematbakhsh2016-06-152-2/+15
| | | | | | | | | | | | | | | | | | | | Enable charger interrupt for VBUS / BC1.2 detection on kevin / gru. Also, keep our USB data switches connected while we figure out how to implement USB mux control. BUG=None TEST=Manual on kevin with subsequent commit. Verify charger connect / disconnect detection works properly on both ports, with zinger, donette and generic DCP charger. BRANCH=None Change-Id: I602e7bd3180110d351ec4c2916a6b8612c7e5f82 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/352821 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Mary Ruthven <mruthven@chromium.org> Reviewed-by: Shelley Chen <shchen@chromium.org>
* USB Serial: Add README and update CCD docsAnton Staaf2016-06-152-12/+23
| | | | | | | | | | | | | | | | | | | | The README points the reader back to the docs directory where the CCD documentation lives. I've added information about the install script, and about how the raiden module identifies a CCD serial console. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Change-Id: I8714dffcad0b8c30f46529a8f2d670b5d432cda6 Reviewed-on: https://chromium-review.googlesource.com/352787 Commit-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* CR50: refactor debug_printf() for use as a library functionnagendra modadugu2016-06-153-18/+29
| | | | | | | | | | | | | | | | | | | | | loader/key_ladder.c depends on debug_printf(). Refactor the printf function so that key_ladder.c need not depend on main.c. This change being made in preparation for a future change which introduces a dependency between RW and key_ladder.o BRANCH=none BUG=chrome-os-partner:43025,chrome-os-partner:47524 TEST=build succeeds Change-Id: I5c9bf7bd6dd9f76ab6410e6e797973bdb072ec16 Signed-off-by: nagendra modadugu <ngm@google.com> Reviewed-on: https://chromium-review.googlesource.com/351760 Commit-Ready: Nagendra Modadugu <ngm@google.com> Tested-by: Nagendra Modadugu <ngm@google.com> Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* CR50: give ecc and rsa keys distinct derivation templatesnagendra modadugu2016-06-152-4/+35
| | | | | | | | | | | | | | | | | | | This change implements distinct key derivation trees for ECC and RSA key generation. The seed used for derivation is HMAC(primary_seed, ALG), where ALG is either "ECC", or "RSA". BRANCH=none BUG=chrome-os-partner:43025,chrome-os-partner:47524 TEST=all tests in test/tpm_test/tpmtest.py pass Change-Id: Iee85731bdac02b7b1061e9220786bee52dbf6289 Signed-off-by: nagendra modadugu <ngm@google.com> Reviewed-on: https://chromium-review.googlesource.com/351750 Commit-Ready: Nagendra Modadugu <ngm@google.com> Tested-by: Nagendra Modadugu <ngm@google.com> Reviewed-by: Marius Schilder <mschilder@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* USB Serial: Add fallback rule and scriptAnton Staaf2016-06-153-7/+114
| | | | | | | | | | | | | | | | | | | | | | This rule makes it easier to use CCD devices when the raiden module can't be installed for some reason. The rule informs the usbserial module that it should handle anything that looks like a simple serial port for any CCD compatible USB devices. The install script now detects failure when building and installing the raiden module and offers the --fallback option in that case. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Change-Id: I617bbdfb4c5cb9e9803f4088c651f84e3f72bd28 Reviewed-on: https://chromium-review.googlesource.com/351873 Commit-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* pd: tcpci: Don't wait forever for init() on i2c errorShawn Nematbakhsh2016-06-152-5/+15
| | | | | | | | | | | | | | | | | | If i2c communication with the TCPC is failing after 300ms+ then it's likely going to fail forever, so return an error to allow the PD task to continue initialization. BUG=chrome-os-partner:53815 BRANCH=None TEST=Manual on reef. Disconnect TCPC, attach charger to other port, and verify charge manager correctly sets current limit based on detection. Change-Id: I2c12320971a77504292f75393791e609e34897b4 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/352501 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* it83xx: Support different PLL frequencies setting (24/48/96 MHz)Dino Li2016-06-148-36/+161
| | | | | | | | | | | | | | | | | | | | | | | Default setting is at 48MHz. For PLL frequency at 24MHz: 1. USB module can't work, it requires 48MHz to work. 2. SSPI clock frequency is divide by two. Signed-off-by: Dino Li <dino.li@ite.com.tw> BRANCH=none BUG=none TEST=1. uart, i2c, timer, and pd modules are function normally at different PLL frequency settings. 2. use 'flashrom' utility to flash EC binary with different PLL settings. Change-Id: Iabce4726baff493a6136136af18732b58df45d7f Reviewed-on: https://chromium-review.googlesource.com/347551 Commit-Ready: Dino Li <Dino.Li@ite.com.tw> Tested-by: Dino Li <Dino.Li@ite.com.tw> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* npcx: Fixed host access pending bit issue in INT11 ISR.Mulin Chao2016-06-141-10/+10
| | | | | | | | | | | | | | | | | | | | Since the pending bit of host access interrupt is set frequently if PCH accesses KBC/PM_Channel/Shared Memory through LPC after entering S0. It's better to add checking enable bit of MIWU of it in case huge latency between gpio interrupt and serving its own ISR in INT11's ISR. Modified sources: 1. gpio.c: Add checking enable bit of MIWU of host access in INT11 ISR. BRANCH=none BUG=chrome-os-partner:34346 TEST=make buildall -j; test nuvoton IC specific drivers Change-Id: I1ae57173eb208fa78218bc01cfbc91f9a29c5c81 Signed-off-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/352362 Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* amenia: Support DP alt mode of Type-C controller in amenia.li feng2016-06-144-2/+39
| | | | | | | | | | | | | | | BUG=none BRANCH=none TEST=On Amenia TR1.2, tested with HDMI to Type-C dongle. Both Analogix and Parade ports have HDMI on extended display. Change-Id: Ifb95c289019063a8a24d135e3b3a09cb4d446210 Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com> Signed-off-by: li feng <li1.feng@intel.com> Reviewed-on: https://chromium-review.googlesource.com/348881 Commit-Ready: Li1 Feng <li1.feng@intel.com> Tested-by: Li1 Feng <li1.feng@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* driver/tcpm: add Type-C controller ps8751 DP alt mode APIli feng2016-06-144-0/+82
| | | | | | | | | | | | | | | BUG=chrome-os-partner:49431 BRANCH=none TEST=On Amenia TR1.2, verified display port outptu is enabled on exteneded display. Seperate patches are needed for testing. Change-Id: I5ca54c91c566725c612a01a51f1af32e2a819e2d Signed-off-by: li feng <li1.feng@intel.com> Reviewed-on: https://chromium-review.googlesource.com/351319 Commit-Ready: Li1 Feng <li1.feng@intel.com> Tested-by: Kevin K Wong <kevin.k.wong@intel.com> Reviewed-by: Kevin K Wong <kevin.k.wong@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* gru/kevin: Turn PP1800_PMU on earlier in sequenceDavid Schneider2016-06-141-2/+2
| | | | | | | | | | | | | | | PP1800_PMU impacts the initial centerlogic voltage due to DVS circuitry. Since there's no other sequencing dependency, turn it on earlier. This fixes centerlogic from initially starting too high (1.5V). BUG=none BRANCH=none TEST=Watch PPVAR_CENTERLOGIC and confirm that it starts at the target voltage Change-Id: Icac076a7e8aef978401452a98d9f6bc8b373d94f Signed-off-by: David Schneider <dnschneid@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/352247 Reviewed-by: Shawn N <shawnn@chromium.org>
* BD99955: Use only one USB charger task for both the portsVijay Hiremath2016-06-146-35/+62
| | | | | | | | | | | | | | | | | | | | | There is only one charger IC and one interrupt PIN for both the ports and also from the ISR it's not possible to decode from which port the interrupt is triggered hence a deferred function is used to trigger the wake event for the ports. As there is no additional benefit of having an extra task, added code to use only one USB charger task for both the ports. BUG=chrome-os-partner:54272 BRANCH=none TEST=Manually tested on Amenia. BC1.2 detection is success and the battery can charge on both the ports (VBUS/VCC). Change-Id: I2745a5a179662aaeef8d48c8c1763919e8853fd0 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/351752 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* gru: Enable charging of USB-A devices in S3Shawn Nematbakhsh2016-06-142-15/+18
| | | | | | | | | | | | | | | | | Leave USB-A charging enabled in S3, and move gru-specific code into board hooks, out of the power state driver. BUG=chrome-os-partner:54159 BRANCH=None TEST=Manual on gru. Verify USB-A enable GPIOs are asserted in S0 and deasserted in G3. Change-Id: Icadeb771226dd0fda4ae96fdde9b3984d87fdd15 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/351670 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* power: rk3399: Add power-down sequencingShawn Nematbakhsh2016-06-141-51/+37
| | | | | | | | | | | | | | | | | Power-down sequence in reverse order of power-up, with delays extended to 10ms, to allow rails extra time to decay. BUG=chrome-os-partner:54159 BRANCH=None TEST=Manual on gru. Verify repeated `powerbtn` commands on console boot + power-down the SOC. Change-Id: I2e8fb39f8f900e56deef6b386bae1c336aa1f963 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/351520 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* reef: corrections to motion sensorsDavid Hendricks2016-06-132-39/+34
| | | | | | | | | | | | | | | | The motion sensors array as well as the config variables were copied from another board and mostly wrong for Reef. BUG=none BRANCH=none TEST=sensors which are connected successfully initialize, still need to test lid sensors. Change-Id: If8e1ec79803c7f378b21f4e9423a56bd6763eb4e Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/349733 Reviewed-by: Kevin K Wong <kevin.k.wong@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* lid_switch: disable keyboard scan based on the initial lid stateKevin K Wong2016-06-131-0/+1
| | | | | | | | | | | | | | | | | If the lid is initially closed, keyboard scan should be disabled. BUG=chrome-os-partner:53566 BRANCH=none TEST=Check ESC+Refresh+PwrBtn is detected. Check keyscan is enabled if lid is open. Check keyscan is disabled if lid is closed. Check power button is functional if lid is opened. Check power button is masked if lid is closed. Change-Id: I2354a657d8bf0c13207517cc789547a68befd240 Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com> Reviewed-on: https://chromium-review.googlesource.com/351534 Reviewed-by: Shawn N <shawnn@chromium.org>
* tcpci: anx7688: enable message passing after hard reset sentRong Chang2016-06-131-0/+10
| | | | | | | | | | | | | | | | | | | | | | | In TCPCI specifiction R1.0 4.7.2, the last step of transmitting hard reset message is enable PD message passing by writing to RECEIVE_MESSAGE register. BRANCH=none BUG=chrome-os-partner:52815 TEST=manual build and load on reference board with anx7688 port controller. connect zinger to port 0, and use ec uart console to send hard reset message: pd 0 hard check PD communication Signed-off-by: Rong Chang <rongchang@chromium.org> Change-Id: I52968b603f0227d7d9a112b0216cd5fd6362a0b2 Reviewed-on: https://chromium-review.googlesource.com/348142 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Koro Chen <koro.chen@mediatek.com> Reviewed-by: Wei-Ning Huang <wnhuang@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* CR50: add a simple ASN.1 parser & certificate verifierstabilize-8447.Bnagendra modadugu2016-06-126-5/+380
| | | | | | | | | | | | | | | | | Add a certificate verifier, so that endorsement certificates may be verified upon installation. Doing so allows for catching certificate errors early. BRANCH=none BUG=chrome-os-partner:43025,chrome-os-partner:47524 TEST=all tests in test/tpm_test/tpmtest.py pass Change-Id: I9339a6bc36e4d82ae875ce774e31848ae983fa1f Signed-off-by: nagendra modadugu <ngm@google.com> Reviewed-on: https://chromium-review.googlesource.com/351031 Commit-Ready: Nagendra Modadugu <ngm@google.com> Tested-by: Nagendra Modadugu <ngm@google.com> Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* tpm: allow less-than-4-bytes writes to TPM_STS registerAndrey Pronin2016-06-111-1/+1
| | | | | | | | | | | | | | | | | Section 5.3.1 TPM Register Space Decode of TCG PC Client Platform TPM Profile (PTP) Specification Rev 00.43 allows partial access to registers: "Software may access only part of a register, e.g. read or write one byte of a 4 byte register." BUG=chrome-os-partner:54286 BRANCH=none TEST=tpm driver successfully sets TPM_STS_COMMAND_READY (see more details in BUG) Change-Id: I92995f04c6f6221ab7e00d086c4067e447557476 Signed-off-by: Andrey Pronin <apronin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/351701 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* amenia: reject charge port on init till battery is initializedVijay Hiremath2016-06-113-11/+42
| | | | | | | | | | | | | | | | | | Ported from the below patch Change-Id: I981f9dbf3d84390550bb696e561f5fa51ffc573a Reviewed-on: https://chromium-review.googlesource.com/351224 BUG=chrome-os-partner:54058 BRANCH=none TEST=Amenia system does not reboot before booting to OS. Active port is set once battery is available. Change-Id: If8fd84f82f5a7fb7ca3736031a161d90e5e77c12 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/349853 Commit-Ready: Kevin K Wong <kevin.k.wong@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* CR50: add support for writing to info banknagendra modadugu2016-06-103-8/+76
| | | | | | | | | | | | | | | | | | | | | | | | | State that needs to survive re-flashing of RO+RW is stored in the INFO bank. An example of such state is manufacture secrets, which need to survive reflashing from the personalize firmware to the initial TPM2 firmware. This change adds support for writing to the writeable flash info bank. BRANCH=none BUG=chrome-os-partner:43025 TEST=manually verified info1 reads and writes Signed-off-by: nagendra modadugu <ngm@google.com> Change-Id: I9226e2161e036d1dacccbe55b67724b449983008 Reviewed-on: https://chromium-review.googlesource.com/351274 Commit-Ready: Nagendra Modadugu <ngm@google.com> Tested-by: Nagendra Modadugu <ngm@google.com> Reviewed-by: Marius Schilder <mschilder@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* reef: Add internal pull-up on LID_OPEN gpioFurquan Shaikh2016-06-101-1/+2
| | | | | | | | | | | | | | | | | | | | LID_OPEN gpio is present on the daughter card and provided by the EC. Add an internal pull-up on it for the cases when the daughter card isn't plugged in. This fix won't be required starting EVT. BUG=chrome-os-partner:54143, chrome-os-partner:53566 BRANCH=None TEST=Compiles successfully. "gpioget LID_OPEN" returns 1 without daughter card. Change-Id: Ieff281b489e4f3f8be184a55b7975fb2efcc1099 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/350460 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* charge_manager: Allow rejected 'Dont charge' request on initShawn Nematbakhsh2016-06-102-2/+22
| | | | | | | | | | | | | | | | | | | | If our battery isn't able to provide enough power to the EC on boot, we should not cut off our input power, regardless of dual role determination or other charging policy. BUG=chrome-os-partner:54058 BRANCH=None TEST=Manual on gru. Drain battery completely, attach USB-C charger, verify that "Battery critical, don't disable charging" is seen on the console and the EC doesn't brown out. Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I981f9dbf3d84390550bb696e561f5fa51ffc573a Reviewed-on: https://chromium-review.googlesource.com/351224 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* CR50: fix bug in rom_flash.c debug print messagenagendra modadugu2016-06-101-2/+3
| | | | | | | | | | | | | BRANCH=none BUG=chrome-os-partner:43025 TEST=build succeeds Change-Id: Ieecf5072f821ec65f308604f9153c938ee08620a Signed-off-by: nagendra modadugu <ngm@google.com> Reviewed-on: https://chromium-review.googlesource.com/351332 Commit-Ready: Nagendra Modadugu <ngm@google.com> Tested-by: Nagendra Modadugu <ngm@google.com> Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* CR50: add support for hardware modexpnagendra modadugu2016-06-094-3/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | This commit includes changes required for supporting a hardware based montgomery modexp (r = a ^ e mod N). The function bn_is_bit_set() was previously static, and now added to internal.h, as this function is used by the hardware implementation. Add function declarations for new functions related to the hardware implementation to chip/g/dcrypto/internal.h BRANCH=none CQ-DEPEND=CL:*260618,CL:*260895 BUG=chrome-os-partner:43025,chrome-os-partner:47524 TEST=all tests in test/tpm_test/tpmtest.py pass Change-Id: I5fe4a6692678b64f27659f42a08d200b6fe6f0cc Signed-off-by: nagendra modadugu <ngm@google.com> Reviewed-on: https://chromium-review.googlesource.com/347462 Commit-Ready: Nagendra Modadugu <ngm@google.com> Tested-by: Nagendra Modadugu <ngm@google.com> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* npcx: i2c: Return slave ACK status on zero-byte read / writeShawn Nematbakhsh2016-06-081-38/+52
| | | | | | | | | | | | | | | | | | | | The `i2cdetect` tool will scan certain slave addresses with a zero byte read / write. Reply to such requests with the ACK status of the slave device. BUG=chrome-os-partner:53324 BRANCH=None TEST=Verify `i2cdetect -y -a 9` on kevin yields the ACK status of each slave address. Change-Id: If080cc9f1b7dfefb0025fef448c5b177a2a50137 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/350102 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Mulin Chao <mlchao@nuvoton.com> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Mulin Chao <mlchao@nuvoton.com>
* make: Fix npcx compile error due to missing ecst binaryShawn Nematbakhsh2016-06-081-1/+1
| | | | | | | | | | | | | | | | | | Add an explicit dependency on utils-build (includes ecst) to prevent ec_elf_to_flat from running before ecst is built during parallel make. BUG=chrome-os-partner:52777 BRANCH=None TEST=Modify Makefile.rules to add 5sec sleep in $(build-utils) rule, verify that `make BOARD=kevin clean && make BOARD=kevin -j` still succeeds. Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: Ia443f8b880cbd4451d41302817e176201f7870dc Reviewed-on: https://chromium-review.googlesource.com/350162 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* npcx: gpio: Don't increase priority of SHI_CS for non-SHI boardsShawn Nematbakhsh2016-06-081-0/+4
| | | | | | | | | | | | | | | | Systems that don't use SHI don't need elevated SHI_CS interrupt priority. BUG=None TEST=`make buildall -j` BRANCH=None Change-Id: Ica6e82332bc7ef8f92c00d847cd3ff0df7ede429 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/350570 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* reef: Minimum battery voltage settings in no battery conditionVijay Hiremath2016-06-082-1/+10
| | | | | | | | | | | | | | | | | | | In no battery condition set the battery minimum voltage to the battery maximum voltage so that the charger voltage is set to the battery maximum voltage. This adds more reliability for the system and also avoids system reboot due to voltage drop on VBATA. BUG=chrome-os-partner:53968 BRANCH=none TEST=If battery is not present, EC console command 'charger' gives battery maximum value. Change-Id: I1f7740977cbe7087c27de95036a0eb5c385c0a54 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/348942 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: David Hendricks <dhendrix@chromium.org>
* reef: Enable BC1.2 supportVijay Hiremath2016-06-084-69/+17
| | | | | | | | | | | | | | | BUG=chrome-os-partner:53688, chrome-os-partner:53721 BRANCH=none TEST=Type-C, DCP & SDP chargers can negotiate to desired current & voltage. Battery can charge. USB3.0 & USB2.0 sync devices are detected by the Kernel. Change-Id: I37890518c151ef94da2b2ade67a023f72d48fce6 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/346784 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: David Hendricks <dhendrix@chromium.org>
* Driver: BD99955: Use Charger interrupt to detect VBUS activityVijay Hiremath2016-06-088-38/+144
| | | | | | | | | | | | | | | | | | | Added support to enable the BD99955 charger interrupt to detect the VBUS activity. With this approach GPIO USB_Cx_VBUS_DET_N pin can be removed. BUG=chrome-os-partner:53688 BRANCH=none TEST=Manually tested on Amenia. Type-C, DCP & SDP chargers can negotiate to desired current & voltage. Battery can charge. USB3.0 & USB2.0 sync devices are detected by the Kernel. Change-Id: I5470092c5cd43026aafc1a638ba446d0037c71e7 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/343650 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* BD99955: Add support to detect non-BC1.2 compliant chargersVijay Hiremath2016-06-083-11/+22
| | | | | | | | | | | | | | | | | | | If a non-BC1.2 compliant charger is attached and if the USB charge port detection is success then setting the charger supplier type as CHARGE_SUPPLIER_OTHER. BUG=none BRANCH=none TEST=Manually tested on Amenia. Used Apple USB charger (5.1V & 2.1A) and few non-BC1.2 chargers (5V & 1A, 5V & 2.1A). Charger is detected as CHARGE_SUPPLIER_OTHER and the battery can charge. Change-Id: I35458dc173505cea970afc37d8f9ffb3c4376fe2 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/348060 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* g: Enable SOF calibration after first SOF tokenBill Richardson2016-06-082-8/+23
| | | | | | | | | | | | | | | | | | | | | | | Instead of enabling the SOF calibration at usb_init(), enable it only when the first SOF packet is seen following the usb_init(), as suggested in the recommendations document linked from the bug report. Also fix the code to do the right thing. The original reference code had errors. BUG=chrome-os-partner:50800 BRANCH=none TEST=make buildall; test on Cr50 After adding some instrumentation code, I see the SOF being detected and the calibration started. It only happens once after each usb_init() and only when the USB traffic begins. Change-Id: Id2b9a41d90ce9cc9e467fb759463d69a57bb5540 Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/350371 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* elm: Add support for pd_control commandstabilize-8429.BNicolas Boichat2016-06-071-0/+1
| | | | | | | | | | | BRANCH=none BUG=chrome-os-partner:52433 TEST=ectool pdcontrol {suspend,resume,reset,disable} Change-Id: I6a9ba3f9c1739bc35c6290dd317b43054b0b52f4 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/347731 Reviewed-by: Randall Spangler <rspangler@chromium.org>
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