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* hammer: Add elan trackpad supportstabilize-8975.BNicolas Boichat2016-11-094-1/+12
| | | | | | | | | | | | BRANCH=none BUG=chrome-os-partner:59083 TEST=make BOARD=hammer -j && bash flash_hammer Change-Id: I8b0e2f3e33f48622097ce698c9548d3e96ac75f1 Reviewed-on: https://chromium-review.googlesource.com/407741 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* driver/touchpad_elan: Basic elan touchpad driverNicolas Boichat2016-11-085-0/+274
| | | | | | | | | | | | BRANCH=none BUG=chrome-os-partner:59083 TEST=make BOARD=hammer -j && bash flash_hammer Change-Id: I0ff4f48ff1399e054f745ac13ffacf81dffedeab Reviewed-on: https://chromium-review.googlesource.com/407740 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* hammer: Initial checkoutNicolas Boichat2016-11-087-0/+262
| | | | | | | | | | | | BRANCH=none BUG=chrome-os-partner:59083 TEST=make BOARD=hammer -j && bash flash_hammer Change-Id: I8cc11408d28677a800af58e738f47d5dcadea3e6 Reviewed-on: https://chromium-review.googlesource.com/407739 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* ec_commands: Add a new host event for extended eventsFurquan Shaikh2016-11-081-0/+6
| | | | | | | | | | | | | | | Since we are out of host event bits, add a bit to indicate extended host event exists. This is put in as a placeholder for now so that we don't lose out the last available hostevent bit. BUG=chrome-os-partner:59352 BRANCH=None TEST=Compiles successfully Change-Id: If35a246f3da511fde9f8c0bba419afb76a1a9827 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/407804 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* common: Add new recovery mode button combinationFurquan Shaikh2016-11-086-48/+70
| | | | | | | | | | | | | | | | | | This adds new key combination (Left_Shift+Esc+Refresh+Power) that triggers recovery mode by setting a new host event EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT. This host event can be used whenever user wants to request entry into recovery mode by reinitializing all the hardware state (e.g. memory retraining). BUG=chrome-os-partner:56643,chrome-os-partner:59352 BRANCH=None TEST=Verified that device retrains memory in recovery mode with (Left_Shift+Esc+Refresh+Power) on reef. Change-Id: I2e08997acfd9e22270b8ce7a5b589cd5630645f8 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/407827 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* driver: sensor: Remove set_interruptGwendal Grignou2016-11-085-50/+0
| | | | | | | | | | | | | | Remove set_interrupt(), was always a noop. Unused, interrupt is done inside the init routine. BUG=none BRANCH=none TEST=buildall Change-Id: I0ff4843212ea8140be41dcd17af130991117e3da Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/407968 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* common: Add tablet_mode APIGwendal Grignou2016-11-0811-29/+49
| | | | | | | | | | | | | | | | | | | Simple API to set/get the tablet mode. It can be set via lid angle calculation or if a board has a dedicated HAL sensor/GPIO. Merged from glados branch, add MKBP switch support. BUG=chromium:606718 BRANCH=gru TEST=Check with Cave that both mode works. Reviewed-on: https://chromium-review.googlesource.com/402089 Reviewed-by: Shawn N <shawnn@chromium.org> (cherry picked from commit c940f36ceabcf2425284001298f03ebdb4c3079e) Change-Id: I2ee5130f3e0a1307ec3ea543f7a32d66bc32b31d Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/404915 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* usb_serial: add python consoleNick Sanders2016-11-081-0/+287
| | | | | | | | | | | | | | | console.py can access a Google USB serial endpoint specified by vid:pid and serial number BUG=chromium:608039 TEST=open console to send and receive text. BRANCH=None Change-Id: I735692b7031d73506be2745a2cd5225bfcefd396 Reviewed-on: https://chromium-review.googlesource.com/405030 Commit-Ready: Nick Sanders <nsanders@chromium.org> Tested-by: Nick Sanders <nsanders@chromium.org> Reviewed-by: Kevin Cheng <kevcheng@chromium.org>
* bd9995*: maintain VBAT voltage as battery maximumWonjoon Lee2016-11-086-6/+2
| | | | | | | | | | | | | | | | BUG=chrome-os-partner:54248 BRANCH=gru TEST=Manual on kevin, high temperature chamber(60C), battery will require 0 voltage because of high temp, then check 'chgstate' vbat maintained at 8688 mV. Change-Id: I3b5835701c42a0cd861400ba921b3d3797152bbd Signed-off-by: Wonjoon Lee <woojoo.lee@samsung.com> Reviewed-on: https://chromium-review.googlesource.com/400088 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Cr50: Let NVMEM take more time and memoryBill Richardson2016-11-052-1/+3
| | | | | | | | | | | | | | | | | | | | | | We were getting occasional stack overflow and watchdog timeouts when clearing NVMEM. Bump up the stack size a bit in the HOOKS task, and pet the watchdog before invoking the tpm2 init functions. BUG=chrome-os-partner:59419 BRANCH=none TEST=make buildall, manual Lock the console, then unlock it. This will reboot the EC & AP, but should never reboot the Cr50. Before this CL, it did about half the time. After, it doesn't. Change-Id: I33adfeb7360bf7d146a55ef16c923a1a0416393d Signed-off-by: Bill Richardson <wfrichar@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/407847 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* reef: Update battery structure info as in the specVijay Hiremath2016-11-051-46/+43
| | | | | | | | | | | | | | BUG=chrome-os-partner:59285 chrome-os-partner:55861 BRANCH=none TEST=make buildall -j Change-Id: I2a22f5ef0072793701f4899cd6e669b8cccca78b Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/406682 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* elm / kevin / oak: Don't wake from S3 on lid closeShawn Nematbakhsh2016-11-053-6/+3
| | | | | | | | | | | | | | | BUG=chrome-os-partner:59256 BRANCH=gru TEST=None Change-Id: I8e41dc131343e7639850364db27a3ff926164fba Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/407078 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* anx74xx: Modifed tcpm_get_cc function to fix check for 3.0 A typeScott2016-11-042-37/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When attaching a dump (not PD protocol) TypeC charger, the incorrect charger type was being selected and therefore it was not enabling 3A charging. I tracked this issue down to the anx74xx_tcpm_get_cc() function returning a incorrect value. The expected value was TYPEC_CC_VOLT_SNK_3_0, but instead it was returning TYPEC_CC_VOLT_SNK_DEF. The reason the incorrect cc type was being returned is because the if, else if, construct didn't work properly for the 3A case where the upper 2 bits are set. Modified this routine to use a case statement and consolidated the checks for both cc1 and cc2 into one helper function. BRANCH=none BUG=chrome-os-partner:58738 TEST=manual Connected zinger and guppy chargers and verified correct cc type was being returned. In addition tested hoho/dingdong adapters as well as suzyq. Tested both cable orientations to verify that cc1 and cc2 returned the correct values. With guppy connected, now see this output on ec console: C0 HARD RST TX C0 st5 C0 st36 C0 st37 C0 HARD RST TX C0 st5 [1921.980074 AC on] [1922.008140 charge_request(8688mV, 9280mA)] C0 st6 [1922.910539 Ramp p0 st5 3000mA 3000mA] Change-Id: I8b31c7ce366f383dfcc2f6e850b76a83340a02a1 Signed-off-by: Scott <scollyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/406642 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Kevin K Wong <kevin.k.wong@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* host_command_pd: reduce to 5msec delay in between PD interrupt handlingKevin K Wong2016-11-041-1/+2
| | | | | | | | | | | | | | | | | | | | | | Since PD task are highest priority, the 50msec delay between was intended allow other tasks to execute if PD has continuous interrupt. With two separate TCPC handled by host_command_pd task, interrupt from one TCPC will block the interrupt handling of another TCPC by this 50msec and cause error in the PD negotiation. Reduced to 5msec to ensure TCPC interrupt is handled as soon as possible while allow other tasks to execute if needed. BUG=chrome-os-partner:59061 BRANCH=none TEST=Verify zinger can negotiate to 20V, hoho can get display. Also tested with faking PD interrupt always asserted to check for watchdog reset. Change-Id: I9b71277a3d65923f1f5bbfd744b3399e34fd0e6c Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com> Reviewed-on: https://chromium-review.googlesource.com/407542 Tested-by: Divya S Sasidharan <divya.s.sasidharan@intel.com> Reviewed-by: Scott Collyer <scollyer@chromium.org>
* Cr50: I2CS TPM: Ensure HW read fifo is empty for register readsScott2016-11-043-21/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change is a safegaurd to ensure that TPM register data is always placed in the correct location in the HW read I2CS fifo. It is only checked for 1 or 4 byte regsiter reads. Because of the way in which a TPM command is sent and the response is read, there are multiple reads of the STS register prior to reading the TPM fifo register. Therefore ensuring the fifo has zero depth when 1 or 4 byte regsiter reads, improves the robustness of the design. Added a counter to track the number of times the fifo is adjusted and a new console command 'i2cs disp|rst' to display the count and reset it to 0 if desired. Removed section in code for TPM fifo register reads intended to handle the case where there was a mismatch between how many bytes were copied into the fifo and the number read by the host. Since the burstcount field in the status register always contains a valid amount of data that can be read by the host, there should not be cases where the host reads less data than was copied from the TPM fifo register. In the unexpected cases where the host may not drain all of the I2CS read fifo data during a TPM register read, the I2CS fifo depth will be corrected the next time that it reads either the access or STS register which happens prior to the start of any TPM transaction. BRANCH=none BUG=chrome-os-partner:57338,chrome-os-partner:59191 TEST=manual Booted Reef and verfied that TPM functionality is working. Change-Id: I065a55e64bbcc0cb3357a2bd83447a05400b8899 Signed-off-by: Scott <scollyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/382689 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* g: add permission level checksMary Ruthven2016-11-047-47/+82
| | | | | | | | | | | | | | | | | | | The jittery clock and trng security features require high permissions to be initialized. In the future these initializations and the permission level drop may be moved to RO. This change adds permission level checks before trying to access any registers that require high permission, so when we update RO to change the permission RW can still function fine. BUG=chrome-os-partner:59107 BRANCH=none TEST=Move the permission drop to the beginning of main and verify the system still boots. Change-Id: I5b7cb856decd0640288ad3476f875ec9edc42635 Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/405840
* mkbp_event: Properly queue events during host sleepShawn Nematbakhsh2016-11-043-20/+19
| | | | | | | | | | | | | | | | | | | | | | | | Don't queue non-wake events, and ensure wake events (and all subsequent events) always get queued. BUG=chrome-os-partner:59248, chrome-os-partner:59336 BRANCH=gru TEST=Manual on kevin, go to suspend, press volume keys dozens of times, press 'shift', verify device wakes. Place cursor on URL bar, go to suspend, type "google" quickly, verify device wakes and "google" appears on URL bar. Go to suspend, press 'VolUp' key 5 times, press keyboard, verify device wakes and no volume meter is seen on display. Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: Ibe761187fbcefd686776a512786550970a6fc067 Reviewed-on: https://chromium-review.googlesource.com/405717 Commit-Queue: Douglas Anderson <dianders@chromium.org> Tested-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> (cherry picked from commit aa2f01566314604404e104d7975c6c755c22a601) Reviewed-on: https://chromium-review.googlesource.com/407958 Commit-Ready: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
* mkbp_event: Don't use memmap'd host event maskShawn Nematbakhsh2016-11-041-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | Previously the memmap'd host event mask copy wasn't always updated. Be consistent with other mkbp code and call host_get_event() to get our current mask. BUG=chrome-os-partner:59241 BRANCH=gru TEST=Manual on kevin, close lid to suspend, press volume keys, verify device doesn't wake. Open lid, verify device wakes. Run 'powerd_dbus_suspend', press volume keys, verify device doesn't wake. Press keyboard key, verify device wakes. Change-Id: I3de49efa1ebc53a9c56bed57007c48356c7e97bb Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/406547 Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> (cherry picked from commit 763d3b2c6f26d41e7147f860e59755af2fe87fe4) Reviewed-on: https://chromium-review.googlesource.com/407957 Commit-Ready: Douglas Anderson <dianders@chromium.org> Tested-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
* minute-ia: Revise macros to be version independentJaiber John2016-11-042-8/+8
| | | | | | | | | | | | | | | | | | | A few macros that were defined for ISH3.0 were renamed to be generic for all ISH generations - e.g, ISH30_I2C0_IRQ -> ISH_I2C0_IRQ. Similarly macros representing base addresses were revised to add ISH_ prefix. BUG=chrome-os-partner:51851 BRANCH=None TEST=`make buildall -j` Change-Id: Idf6657a112b9bd0f73a77f13d02e327c10a9a272 Signed-off-by: Jaiber John <jaiber.j.john@intel.com> Reviewed-on: https://chromium-review.googlesource.com/403550 Commit-Ready: Raj Mojumder <raj.mojumder@intel.com> Tested-by: Jaiber J John <jaiber.j.john@intel.com> Tested-by: Kyoung Il Kim <kyoung.il.kim@intel.com> Reviewed-by: Jaiber J John <jaiber.j.john@intel.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* ish: Add support for ISH chipJaiber John2016-11-0417-0/+2245
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the initial support for ISH chip to enable the EC firmware to boot on Intel Integrated Sensor Hub (ISH). The following are enabled: 1. Inter-Processor Communication (IPC) driver that enables the ISH to communicate with the host Operating system via shared registers. 2. High Precision Event Timer (HPET) driver that provides configurable timers for the FW to use in task scheduling. 3. I2C bus driver for accessing sensors. 4. UART console driver with TX support only. BUG=chrome-os-partner:51851 BRANCH=None TEST=`make buildall -j` Change-Id: I15d4c201b799cfa79bed220ee573b75f5cd7b1f7 Signed-off-by: Jaiber John <jaiber.j.john@intel.com> Signed-off-by: Alex Brill <alexander.brill@intel.com> Signed-off-by: Gomathi Kumar <gomathi.kumar@intel.com> Reviewed-on: https://chromium-review.googlesource.com/336710 Commit-Ready: Raj Mojumder <raj.mojumder@intel.com> Tested-by: Jaiber J John <jaiber.j.john@intel.com> Tested-by: Raj Mojumder <raj.mojumder@intel.com> Reviewed-by: Jaiber J John <jaiber.j.john@intel.com> Reviewed-by: Raj Mojumder <raj.mojumder@intel.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* kevin: Add Sensor in S3, disable keyboard wakeup in tablet mode.Gwendal Grignou2016-11-043-22/+31
| | | | | | | | | | | | | | | | | | | | Let sensor be powered on in S3. It is useful for Android and if we want to disable keyboard wakeup based on lid angle. Allow EC to disable touchpad and not send keyboard events when lid angle is greater than 180. BUG=chrome-os-partner:57510,chromium:620633 BRANCH=gru TEST=In S3, check the sensors are readable. Check that when in S3 and lid angle is < 180 EC sends keyboard events. Check that when in S3 and lid angle is > 180 EC does not send keyboard events. Change-Id: I4e7959ed37bc5dfdf9c105ecae94c314b253d77f Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/406739 Commit-Ready: Gwendal Grignou <gwendal@google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* bn_div and faster modular inverse.Marius Schilder2016-11-033-111/+338
| | | | | | | | | | | | | | | | | | | | | | | We previously used binary extended Euclid. That does not perform well when inverting a small public exponent. We also abused that routine to perform the division of n by one of its factors. Really did not perform well there either. This CL introduces a classic Knuth long division and a normal extended Euclid based on that. This drops the execution time of the common inversions into the single msec range (vs. multiple seconds before..) TEST=tcg_tests pass the usual 381/391; test/tpm_test/bn_test passes. BUG=chrome-os-partner:57422 BRANCH=none Change-Id: Ic9b4aecd0356fcab3e823dbd60c5b228a87447d3 Reviewed-on: https://chromium-review.googlesource.com/406940 Commit-Ready: Marius Schilder <mschilder@chromium.org> Tested-by: Marius Schilder <mschilder@chromium.org> Reviewed-by: Marius Schilder <mschilder@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* Add prod RW manifest and public key.Marius Schilder2016-11-032-0/+167
| | | | | | | | | Change-Id: If008b0dc388fdd81366e52aab8046af83a288e12 Reviewed-on: https://chromium-review.googlesource.com/407050 Commit-Ready: Marius Schilder <mschilder@chromium.org> Tested-by: Marius Schilder <mschilder@chromium.org> Reviewed-by: Marius Schilder <mschilder@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* gru: fix the power led colorphilipchen2016-11-021-1/+1
| | | | | | | | | | | | | | | | | | | | In the current implementation, it's hard to tell when led turns from amber to green. BUG=chrome-os-partner:57079 BRANCH=None TEST=Verify LED is green when charging w/ nearly full battery. Also verify LED control host commands work as expected: ectool led battery green=1 // green ectool led battery amber=1 // amber ectool led battery red=1 // red ectool led battery red=0 // off Change-Id: Ie18162fd1608a0548e25472faeca026f1995fc8d Reviewed-on: https://chromium-review.googlesource.com/406471 Commit-Ready: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* usb_i2c: refactor into commonNick Sanders2016-11-029-7/+13
| | | | | | | | | | | | | | | | This combines stm32 and chip/g usb_i2c interfaces so they will not diverge. Note that this fixes the chip/g implementation to use 8-bit i2c addresses. BUG=chrome-os-partner:57059 BRANCH=none TEST=servod interacts with servo_micro and servo_v4 Change-Id: Ibff217d84b132556202c8a71e3d42c07d546c634 Reviewed-on: https://chromium-review.googlesource.com/405108 Commit-Ready: Nick Sanders <nsanders@chromium.org> Tested-by: Nick Sanders <nsanders@chromium.org> Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* Fix bugs.Marius Schilder2016-11-021-30/+30
| | | | | | | | | | | | | | | | | | | | L_fallback_32bits: section did not compute remainder correctly. L_sub_loop1: section did not track r6 correctly. Also correctly annotate which instructions need to set the flags. BRANCH=none BUG=none TEST=now passes the tests in http://www.hackersdelight.org/hdcodetxt/divmnu64.c.txt Change-Id: Ib55a3bbbcee35c7f21dc67f51038783ea1d26f6c Reviewed-on: https://chromium-review.googlesource.com/396397 Commit-Ready: Marius Schilder <mschilder@chromium.org> Tested-by: Marius Schilder <mschilder@chromium.org> Reviewed-by: Marius Schilder <mschilder@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
* reef: enable tcpc-controlled drp toggleKevin K Wong2016-11-029-34/+208
| | | | | | | | | | | | | | | | BUG=chrome-os-partner:54668 BRANCH=none TEST=Verified SNK is detected in S0 (toggle on), S3 (toggle off), and S5 (force sink). SRC is detect in S0 only, stays detected when entered S3, but unplug/plug while in S3 will not re-detect until system back in S0. When go to S5, SRC will get disconnected until back in S0, and hotplug SRC in S5 will not get detected. Checked power role swap with another chromebook in the above scenario also. Change-Id: I2a487fca5cb04c45524aa3efde84fcd10ff0579e Signed-off-by: Kevin K Wong <kevin.k.wong@intel.com> Reviewed-on: https://chromium-review.googlesource.com/396918 Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* g: i2cm: Changed the slave address assumption to 8 bitsScott2016-11-021-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | The i2c_xfer API assumes it's getting an 8 bit slave address, but the driver was assuming a 7 bit slave address was being passed in. Fixed the location where this is used to shift it back to 7 bits. BRANCH=none BUG=chrome-os-partner:57059 TEST=manual Cr50 console 'ccd i2c on' then > i2cxfer r16 0 0x40 0 Unknown error Usage: i2cxfer r/r16/rlen/w/w16 port addr offset [value | len] > i2cxfer r16 0 0x80 0 0x2771 [10097] Shows that it's now assuming an 8 bit address Change-Id: I791b7c136a741856749c281dd4c8166b5cf97ef9 Signed-off-by: Scott <scollyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/405780 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* driver: bmi160: Autocalibrate Accelerometer properly.Gwendal Grignou2016-11-021-1/+6
| | | | | | | | | | | | | | | Take into account the rotation matrix to do calibration. In particular the Z axis: if board is upside down, we need to use MINUS_1G instead of PLUS_1G when setting online calibration. BRANCH=kevin BUG=none TEST=Before, calibration would not work on the Z axis. Change-Id: Ifaec331aac40a4be0e34fcab5dd3752d2d59b91f Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/405854 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* usb_update: increase read timout for fw_update.pyNick Sanders2016-11-011-1/+1
| | | | | | | | | | | | | | | sweetberry takes a bit longer to erase flash and seems to be timing out. This fix gets sweetberry to update reliably. BUG=chromium:608039 TEST=update sweetberry firmware BRANCH=None Change-Id: I9a0cbeae3b7ce0e4b87840fe8bf24bb2e10777e9 Reviewed-on: https://chromium-review.googlesource.com/404710 Commit-Ready: Nick Sanders <nsanders@chromium.org> Tested-by: Nick Sanders <nsanders@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* cr50: remove pullups on dioa9 and a1Mary Ruthven2016-11-011-6/+0
| | | | | | | | | | | | BUG=chrome-os-partner:59238 BRANCH=none TEST=verify reef still boots and cr50 still goes to sleep in s3 and s5. Change-Id: Ibea9ae5ca501dc4bd9ff87d7c702f232be24acbd Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/405837 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* BD9995X: Fix disable case in bd9995x_select_input_portScott2016-11-011-1/+1
| | | | | | | | | | | | | | | | | | | | The 'else' was missing in the for the check of port == BD9995X_CHARGE_PORT_BOTH. So if it wasn't this port type then it would always hit the panic. BUG=chrome-os-partner:59189 BRANCH=none TEST=Manual Verfied the failure case using a type C to type A adapter. After applying the fix verified that it no longer panics. Change-Id: Ia5a16c39e226d5e648c20d0c8675d6433d083f22 Signed-off-by: Scott <scollyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/405747 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Snappy: support LED behaviorBruce2016-10-314-72/+74
| | | | | | | | | | | | | | | Support LED behavior. BUG=chrome-os-partner:58771, chrome-os-partner:58772 BRANCH=None TEST=make buildall Signed-off-by: Bruce.Wan <Bruce.Wan@quantatw.com> Change-Id: Ieb323b5ff5e1096febef9948cf39b1fb22ff094a Reviewed-on: https://chromium-review.googlesource.com/403674 Commit-Ready: Bruce Wan <Bruce.Wan@quantatw.com> Tested-by: Bruce Wan <Bruce.Wan@quantatw.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* Pyro: Add firmware for shipping mode follow Pyro battery spec.Bruce2016-10-311-14/+45
| | | | | | | | | | | | | | | Add firmware for shipping mode follow Pyro battery spec. BUG=None BRANCH=None TEST=The battery could enter shipping mode and wake up Change-Id: If1b6e88192ad0a59b19b6b6b664b46780596fa18 Signed-off-by: Bruce.Wan <Bruce.Wan@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/403731 Commit-Ready: Keith Tzeng <keith.tzeng@quantatw.com> Tested-by: Keith Tzeng <keith.tzeng@quantatw.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* eve: Enable BMI160 and BMM150 gyro/compass sensorsScott2016-10-313-6/+228
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Added necessary CONFIG options and board specific info to enable the following sensors: 1. KXCJ9 Lid motion sensor 2. BMI160 motion sensor 3. BMI160 gyro sensor 4. BMM150 magnetometer sensor BRANCH=none BUG=chrome-os-partner:58894 TEST=manual accelrate 2 10000 -> enable gyro accelrate 3 10000 -> enable magnetometer accelinfo on 1000 -> display sensor outputs once per second See outputs like the following: Base Accel=3022 , 1685 , -15925 Base Gyro=188 , -1404, -300 Base Mag=-253 , 218 , 1004 Moved eve board around and saw the readings change accordingly. Have not tested lid motion sensor at this stage. Change-Id: Ia658de4cbf441759482a053358230793550ef5ab Signed-off-by: Scott <scollyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/404987 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Gwendal Grignou <gwendal@google.com>
* anx74xx: Added check for hard reset done bit in IRQ statusScott2016-10-311-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The check for hard reset complete was missing. Because of this, the USB PD protocol state machine would get stuck in state 36 PD_STATE_HARD_RESET_SEND waiting for the pd_task to be woken following the tx_complete. Instead it would always trip the 100 msec timeout. BRANCH=none BUG=chrome-os-partner:58738 TEST=manual Without this CL, connect to a Guppy TypeC charger and observe: > C0 st3 [101.946607 event set 0x00200000] C0 st15 C0 st3 C0 st6 C0 st36 [102.466846 New chg p0] [102.470376 Ramp reset: st1] [102.470905 CL: p0 s2 i2000 v5000] [103.543623 AC on] After adding the fix for checking hard reset done: > C0 st3 [32.880946 event set 0x00200000] C0 st15 C0 st3 C0 st6 C0 st36 [33.410038 New chg p0] C0 st37 [33.415641 Ramp reset: st1] [33.416160 CL: p0 s2 i2000 v5000] C0 HARD RST TX C0 st5 C0 st36 C0 st37 C0 HARD RST TX C0 st5 [34.489611 AC on] [34.489965 event set 0x00000008] [34.520457 event set 0x00400000] [34.520876 charge_request(8688mV, 4608mA)] C0 st6 [35.419391 Ramp p0 st2 500mA 0mA] Change-Id: I6822983002fa387c85f7e55af5fe1e142c7b88e2 Signed-off-by: Scott <scollyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/404878 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Kevin K Wong <kevin.k.wong@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* kevin: set accurate current limit on USB load switchVincent Palatin2016-10-3110-13/+81
| | | | | | | | | | | | | | | | | | | | | | | | When sourcing current on the type-C port, set the OCP limit on the VBUS load switch according to current dynamic capability. (3.0A when only one port is a power source, 1.5A else) Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=gru BUG=chrome-os-partner:56110 TEST=manual: connect Caroline to Kevin with Twinkie in between, ask Caroline to sink current through the UI. without anything else connected on Kevin, see 3A flowing when measuring with Twinkie ('tw vbus'), plug a dangling C-to-A receptacle dongle on the other Kevin port and see 1.5A flowing through Twinkie. Force the input current limit on Caroline to 3.0A and see Kevin cutting VBUS. Change-Id: Ib879b1ed720b20aa702c5f3643948ba0575d1193 Reviewed-on: https://chromium-review.googlesource.com/403869 Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* gru: Enable barometer and ALSphilipchen2016-10-293-8/+92
| | | | | | | | | | | | BUG=chrome-os-partner:59084 BRANCH=gru TEST=ec console command 'accelread' and 'als' Change-Id: I2385799626eabef1ad7af5afe96e3d62ecaf7dd4 Reviewed-on: https://chromium-review.googlesource.com/402693 Commit-Ready: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* reef: Enable BD9995X power save mode when hibernatedVijay Hiremath2016-10-283-12/+19
| | | | | | | | | | | | | | | | | | | | | Turn off the charger BGATE when the system is hibernated to save maximum power. BUG=chrome-os-partner:59001 BRANCH=none TEST=Manually verified on the Reef. System can boot from hibernate wake sources. Following are the power measurement values at Battery voltage = 8.3V & temperature = 23 deg C. a. Normal operation 540uA, 3.500mW b. BGATE OFF 80uA, 0.592mW Change-Id: Ia30655ccefbf0dded623246150d53b2a815df2de Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/404685 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Shawn N <shawnn@chromium.org>
* Pyro: Yoga sensor setting fine tuneBruce2016-10-281-5/+5
| | | | | | | | | | | | | | | | Fine tune matrix of base and lid. BUG=chrome-os-partner:58798 BRANCH=None TEST=check sceen rotate normally Change-Id: Ib6740f0f5d6cda87d937b95dfa5788ae72b6aaaf Signed-off-by: Bruce.Wan <Bruce.Wan@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/403694 Commit-Ready: Saurabh Madan <ssmadan@chromium.org> Tested-by: Devin Lu <Devin.Lu@quantatw.com> Tested-by: Saurabh Madan <ssmadan@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* g: usb: do not invoke reset twiceVadim Bendebury2016-10-281-13/+2
| | | | | | | | | | | | | | | The RESETDET and USBRST USB interrupt status bits are often set together. There is no point in resetting USB twice. BRANCH=none BUG=none TEST=verified that cr50 still operates fine of Reef and ec and ap consoles are available (still intermittently). Change-Id: I467d975a3a5955b6072a2a3376de7a1501e7c6c5 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/404910 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* Pyro: modify led behaivor for Pyro specBruce2016-10-284-92/+176
| | | | | | | | | | | | | | | modify led behaivor for Pyro spec BUG=chrome-os-partner:58696 BRANCH=None TEST=make buildall Signed-off-by: Bruce.Wan <Bruce.Wan@quantatw.com> Change-Id: I072dee0d15e83e6ea537b52e5475ed6c894e64ef Reviewed-on: https://chromium-review.googlesource.com/403578 Commit-Ready: Keith Tzeng <keith.tzeng@quantatw.com> Tested-by: Keith Tzeng <keith.tzeng@quantatw.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* reef: clear hpd bit in board level tcpc initli feng2016-10-281-0/+12
| | | | | | | | | | | | | | | | | | | | | PD alternate mode is covered in tcpc interface. So tcpci_tcpm_init() doesn't reset HPD. If keeping HDMI/DP type-C cable connected, doing sysjump sets HPD signal to high while it's already high(this high comes from previous state), then OS doesn't output to HDMI/DP monitor. Reef Type-C port 1 follows TCPCI and has this issue. BUG=chrome-os-partner:57689 BRANCH=none TEST=Connect HDMI/DP type-C dongle, boot up system, OS detects HDMI/DP monitor and extends screen to it; in console doing "sysjump RO" or "sysjump RW", display goes out then comes back. Change-Id: I12239a86490f29d0123fe8bad1b813d3be28d041 Signed-off-by: li feng <li1.feng@intel.com> Reviewed-on: https://chromium-review.googlesource.com/398444 Commit-Ready: Li1 Feng <li1.feng@intel.com> Tested-by: Li1 Feng <li1.feng@intel.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
* kevin: Set BMI160 interruptGwendal Grignou2016-10-281-0/+3
| | | | | | | | | | | | | Interrupt from BMI160 was not set up. BRANCH=gru BUG=none TEST=compile Change-Id: I7d4bdb0b83ffb5de25c40e2c11b6e53b55863dcd Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/404914 Reviewed-by: Shawn N <shawnn@chromium.org>
* driver: bma2x2/kionix remove unused fieldsGwendal Grignou2016-10-283-9/+1
| | | | | | | | | | | | | Remove fields that are not used anymore. BRANCH=gru BUG=none TEST=make buildall Change-Id: If4128a5db05e14314bba6c1d367774f098854ac5 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/404913 Reviewed-by: Shawn N <shawnn@chromium.org>
* power: rk3399: Decrease max. latency for aborted suspendShawn Nematbakhsh2016-10-281-20/+20
| | | | | | | | | | | | | | | | Make several calls to msleep() rather than one single call. BUG=chrome-os-partner:58474 BRANCH=gru TEST=S/R stress test on kevin. Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: Icdc8f221c51519e0f2b95d273aa0523ea3a4eeee Reviewed-on: https://chromium-review.googlesource.com/401930 Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/403460 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org>
* power: rk3399: Adjust power-down sequencing delaysShawn Nematbakhsh2016-10-281-12/+10
| | | | | | | | | | | | | | BUG=chrome-os-partner:58474 BRANCH=gru TEST=suspend_stress_test on kevin for 50 cycles. Change-Id: Ice721e04c6d4389520f40c4ca72f5bec0e1bdb5b Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/399992 Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/403459 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org>
* kevin: Remove PD related TODOs.Aseda Aboagye2016-10-282-5/+0
| | | | | | | | | | | | | | | | It was confirmed that these values were correct. BUG=chrome-os-partner:59074 BUG=chrome-os-partner:59075 BRANCH=gru TEST=make -j buildall Change-Id: I8c63d563515c1fdcbd9f83203c193ba09f8f3447 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/404709 Commit-Ready: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org>
* cr50: bump up minor RW version field againVadim Bendebury2016-10-271-1/+1
| | | | | | | | | | | | | | | In preparation to a new CR50 image release one more bump up the minor version number is required. BRANCH=none BUG=none TEST=none Change-Id: I1ac48eb01cb9d48fb796c79b2676399e7bb57b18 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/403455 Reviewed-by: Marius Schilder <mschilder@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org>
* power: rk3399: turn off the center logic in s3Caesar Wang2016-10-271-5/+6
| | | | | | | | | | | | | CQ-DEPEND=CL:386537 BUG=chrome-os-partner:54291 TEST=turn off the center-logic BRANCH=None Change-Id: I73577e15cc0a8474d8eb2ed1a48f5aba59e54c6a Signed-off-by: Caesar Wang <wxt@rock-chips.com> Reviewed-on: https://chromium-review.googlesource.com/381158 Reviewed-by: Catherine Xu <caxu@google.com> Reviewed-by: Shawn N <shawnn@chromium.org>
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