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* core/nds32: remove unnecessary conditionDino Li2020-09-154-11/+20
| | | | | | | | | | | | | | | | | In the previous implementation, we added conditions to prevent stack overflow panic or memory get overwritten at first context switch. Actually, we won't hit these two situation if scratchpad size is correct. Let's remove them. BUG=none BRANCH=none TEST=EC boots, and the "runtime" is saved in scratchpad at first context switch. Change-Id: I647e1ebb01dbb8fe24adc9f22b6581bb8f8f97fb Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1980097 Reviewed-by: Jett Rink <jettrink@chromium.org>
* fpsensor: Do not compile driver invocations for public unittest buildsYicheng Li2020-09-141-2/+5
| | | | | | | | | | | | | | | | | | | | | | | If HAVE_FP_PRIVATE_DRIVER is defined, the build will compile fingerprint driver routines when compiling "common/fpsensor/fpsensor.c". Previously we enable HAVE_FP_PRIVATE_DRIVER for both public and private unittest builds. This was because we wanted to test "common/fpsensor/fpsensor.c" with our mocks. However on public unittest builds this will break. This change limits the compilation of driver-related code to private builds. BRANCH=none BUG=b:166807240, b:158580909 TEST=make -j buildall TEST=make -j BOARD=bloonchipper test-rsa (private build) TEST=mv private private-2 (hide private directory) make -j BOARD=bloonchipper clean make -j BOARD=bloonchipper test-rsa (public build) Signed-off-by: Yicheng Li <yichengli@chromium.org> Change-Id: Id144435bf1a60c259f4c1b120b9fc85ef85b7f4c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2406189 Commit-Queue: Tom Hughes <tomhughes@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org>
* TCPMv2: Print PRL states on higher levelDiana Z2020-09-141-6/+6
| | | | | | | | | | | | | | | | | This change moves the PRL state prints up to debug level 3. This way, debug level 2 can be used to easily just see incoming packets without the state prints cluttering the EC console. BRANCH=None BUG=None TEST=on drawlat, set "pd dump 2" and confirm responses are printed but PRL states are not Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I8dc96c3d60176597cb0b9fab29e031a9d7e84147 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2406335 Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org>
* SM5803: Enable hibernate function for z-stateDiana Z2020-09-144-2/+107
| | | | | | | | | | | | | | | | Enable SM5803 hibernation and restore registers after booting back from z-state. BRANCH=None BUG=b:166648029 TEST=on drawlat, z-state power usage is reduced and booting after z-state the charger chips can sink and source as expected Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I6e9f9f29a184fa6177e589b3b7810f51a1b3345b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2393225 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* voxel: delete voxel_npcx797fc switch variantBen Chen2020-09-141-6/+0
| | | | | | | | | | | | | the only support CHIP_VARIANT npcx797fc ec chip BUG=b:163687531 BRANCH=master TEST=make buildall, workable on the re-worked Board. Change-Id: I313d3669d6acc7815dbd67e0730b5ae2bcf9522e Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2405714 Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* Puff: Set correct LED state when alert turned offAndrew McRae2020-09-141-2/+2
| | | | | | | | | | | | | | | | | When the LED alert is turned off, set the correct LED state by using the hook functions. BUG=b:168189235 TEST=Check LED state during multiple power cycles when powering with type-C adapter. BRANCH=none Signed-off-by: Andrew McRae <amcrae@google.com> Change-Id: I0c81878cffb7fc89902e0364448b958a755d8de7 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2404909 Tested-by: Andrew McRae <amcrae@chromium.org> Reviewed-by: Peter Marheine <pmarheine@chromium.org> Commit-Queue: Andrew McRae <amcrae@chromium.org>
* Eldrid: Implement LED functionlennon chen2020-09-124-101/+108
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Modify LED behavior to meet LED specification 1.Power led: System is S0: White System is suspend/S0ix: blinking white (1 sec on/off) System is S5: Off 2.charger led: Charging: amber on Full charged: white on Discharging: led Off Blinking white (0.4 sec on/off): battery error Blinking white (1 sec on/off): Fuel < 10%, blinking on right side port Blinking amber (1 sec on/off): Force idle for factory BUG=b:165875385 BRANCH=none TEST=Check behavior to meet LED specification TEST=make -j BOARD=eldrid TEST=make buildall Change-Id: I693137e5512e4c8a2f8cac39389bd23e0ca2f2c7 Signed-off-by: lennon chen <lennon_chen@wistron.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2385023 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Tested-by: Scott Chao <scott_chao@wistron.corp-partner.google.com> Commit-Queue: caveh jalali <caveh@chromium.org>
* OCPC: Check ADCs only with AC presentDiana Z2020-09-121-1/+2
| | | | | | | | | | | | | | | The OCPC ADCs should only be necessary when AC is present. When AC isn't present, skip gathering them to avoid unnecessary i2c traffic. BRANCH=None BUG=b:165030094 TEST=on drawlat, verify no i2c traffic is seen going to the sub-board with no charger plugged in Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I8319290c52795d009af449644af96bf3a264ab70 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2405494 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* SM5803: Disable charging timeoutDiana Z2020-09-111-2/+2
| | | | | | | | | | | | | | | Since the smart battery is able to control the end of charge conditions for the board, disable the charger timeout feature. BRANCH=None BUG=b:166924833 TEST=on drawlat, board does not begin discharging 8 hours after charger insertion Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ic2ca94f58d34417a8037505bda6d5d4dd7080d49 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2405493 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* usb: Ignore overcurrent while disconnectedZick Wei2020-09-111-1/+6
| | | | | | | | | | | | | Don't count faults while disconnected as PPC OC events. BUG=b:166536767, b:165946265 BRANCH=zork TEST=verified that USB-C device can work after ESD test. Change-Id: I1a749649dd40d6977cbb37ba7fb97d899244e821 Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2391029 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* careena/barla: enable 2nd TCPC source PS8755 for port 1Devin Lu2020-09-113-0/+27
| | | | | | | | | | | | | | | | | | | | | | This patch adds one more TCPC PS8755 in the port 1. These two are all supported by ps8xxx.c and the board function board_get_ps8xxx_product_id is implemented to judge the source by checking TCPC ID pin. BUG=b:157298401, b:158983814 BRANCH=firmware-grunt-11031.B TEST=Verify DUT with PS8755 or PS8751 in the sub-board can work correctly in sink and source roles. Verify USBC charger is able to charging. Change-Id: I867e925ee5bb54597ba09539743a0048c220e298 Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2393407 Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org> (cherry picked from commit 09fd4554bfbc055f67a7a51a4858b27f6bebc878) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2404907
* tcpmv2: Fix PD_EVENT_SEND_HARD_RESETEdward Hill2020-09-111-0/+3
| | | | | | | | | | | | | | PD_EVENT_SEND_HARD_RESET was not connected up to anything. BUG=b:166536767 BRANCH=zork TEST=hard reset on OC Signed-off-by: Edward Hill <ecgh@chromium.org> Change-Id: I2d6fd660ce5b8b9208ae74cb9a128aae3ba2b51f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2402138 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* SM5803: Ramp Vbus output voltageDiana Z2020-09-111-0/+18
| | | | | | | | | | | | | | | | If the initial Vbus voltage for a peripheral is set to 5.0 V, the signal may overshoot beyond spec. Vbus should be set to 4.8 V to begin with, and then ramped up to 5.0 V after 4 ms. BRANCH=None BUG=b:153899150 TEST=on waddledee, verify that Vbus doesn't overshoot past allowed range Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ie17e2e3a3e67c0773f7e3f8f33d80b97f3c16adc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2405492 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* eve: Set dual role state on AC change in suspendPatryk Duda2020-09-111-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Eve doesn't provide VBUS in suspend when charger is disconnected. When charger is connected - VBUS is provided. Therefore we need to update dual role state on every AC change in suspend state. This commit also provides implementation of pd_get_drp_state_in_suspend() which is suitable for eve (return PD_DRP_FORCE_SINK when charger is not connected). BUG=b:162254118 BRANCH=none TEST=Flash on eve. Connect charger. Connect some device which acts as sink (eg. USB-C hub). Make sure that eve is providing power to USB-C hub (port in Attached.SRC state). Issue 'powerd_dbus_suspend' from developer console. Port should be still in Attached.SRC state. Disconnect charger, port should exit from Attached.SRC state. DRP state should be set to force sink. Flash on eve. Connect some device which acts as sink (eg. USB-C hub). Make sure that eve is providing power to USB-C hub (port in Attached.SRC state). Issue 'powerd_dbus_suspend' from developer console. Port should exit from Attached.SRC state. DRP state should be set to force sink. Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: I690552d4330c4599ac997b7d64c314b2cae323db Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2395559 Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org>
* syv682: Shorten discharge timeAbe Levkoy2020-09-111-1/+1
| | | | | | | | | | | | | | | | | This part ignores I2C writes while discharging VBUS. This effectively elongates transitions out of Attached.SRC by the Type-C state machine to the amount of time required to discharge VBUS. Mitigate this by configuring the shortest possible VBUS discharge time (50 ms). BUG=b:163143427 TEST=Connect Volteer C1 to Volteer C1; observe stable Attached states BRANCH=none Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: I072888f9ac8d3d06321872a237d9848688eced55 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2401583 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* TCPMv2: Improve timing in Attached.SRCAbe Levkoy2020-09-111-40/+28
| | | | | | | | | | | | | | | | Don't wait an extra 15 ms to debounce CC after detecting CC open. Don't wait to react to CC open until PD is enabled. BUG=b:163143427 TEST=Attach volteer C1 to volteer C1; observe unstable Attach.SRC, but PE doesn't start BRANCH=none Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: Ibd4bd4948fefd5f931dcdc98b1716744c46682b8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2392563 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* tcpmv2: SRC->SNK PR_Swap if partner has unconstrained powerDenis Brockus2020-09-111-4/+8
| | | | | | | | | | | | | | | BUG=b:165983983 BRANCH=none TEST=connect bug mentioned dock make sure we are SNK Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: I60b0b8fb9b4d9dd2a232f053a40f0c4f33b57bc9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2402339 Tested-by: Denis Brockus <dbrockus@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Denis Brockus <dbrockus@chromium.org>
* willow: Support new battery AP19B8KDavid Huang2020-09-112-0/+29
| | | | | | | | | | | | | Add new battery config : AP19B8K. BUG=b:166225039 BRANCH=master TEST=Check found battery info in console and cutoff work. Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com> Change-Id: I80ee052832dd03eb985fa746b7c3565ce11fbbad Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2400548 Reviewed-by: Zhuohao Lee <zhuohao@chromium.org>
* tcpmv2: Enable AutoDischarge on SRC->SNK PrSwap only if VbusDenis Brockus2020-09-111-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | AutoDischargeDisconnect should not be re-enabled during SRC->SNK PR_Swap if Vbus is not present. This would happen only as an error condition with the connected partner becoming unattached during the swap. Also, when we are SNK, we should disable/re-enable AutoDischargeDisconnect when we hard reset because we are shutting off sinking and Vbus will drop to Safe0V BUG=b:168128121 BRANCH=none TEST=PR_Swaps with bug mentioned dock Signed-off-by: Denis Brockus <dbrockus@google.com> Change-Id: I891857967559ecea0a7990626ef8fc3c6835797a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2402338 Tested-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org> Auto-Submit: Denis Brockus <dbrockus@chromium.org>
* ectool: Display new activitiesGwendal Grignou2020-09-111-0/+6
| | | | | | | | | | | | | | | | | | | Match ec_commands.h and allow display of all sensors activities. BUG=b:123434029 BRANCH=none TEST=On eve with on body activities change: 'ectool motionsense list_activities 1' returns: Enabled: 2: Double tap Disabled: 4: Body Detection Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Change-Id: I6cf09ea218e59f2ae52ecf97015fb3a16d5fc7e6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2402082 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Ching-Kang Yen <chingkang@chromium.org>
* TCPMv2: Set mux state on updating partner's USB comm capabilityAyushee2020-09-111-0/+6
| | | | | | | | | | | | | | | | | On updating the port partner's USB communication capability, the mux should also be configured into USB/disconnect mode accordingly. Hence, this CL sets the mux setting according to the partner's USB capability. BUG=b:157163664 BRANCH=None TEST=Able to update the mux state on updating the port part USB comm capability. Signed-off-by: Ayushee <ayushee.shah@intel.com> Change-Id: Ic2d27e2a0af6dad54a875a589b85f8a5d583b5b4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2388972 Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Keith Short <keithshort@chromium.org>
* util: modify getversion to use proper timestamps.Vadim Bendebury2020-09-111-9/+19
| | | | | | | | | | | | | | | | | | | | The getversion.sh utility even when compiling the version string based on the state of several git trees always uses the ec tree for timestamps, be it the latest modified file if the tree is 'dirty' or the last commit time if the tree is clean. It should be using the latest time from all of the trees included in the build. BRANCH=none BUG=none TEST=verified operation for Cr50 with both main and secondary trees clean and dirty Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Change-Id: I72dc1d49ec997c789697b15f7d79fa9f4a8f8adc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2393101 Reviewed-by: Craig Hesling <hesling@chromium.org>
* TCPMv2: Change the comparison of battery socWai-Hong Tam2020-09-111-1/+1
| | | | | | | | | | | | | | | | Change the comparison from soc > CONFIG_USB_PD_TRY_SRC_MIN_BATT_SOC to soc >= CONFIG_USB_PD_TRY_SRC_MIN_BATT_SOC. It accepts the case of configuring CONFIG_USB_PD_TRY_SRC_MIN_BATT_SOC to 0, meaning it skips the check. BRANCH=None BUG=None TEST=Trivial change; built an image without error. Change-Id: I1781f168aedfa9b061c6effe468b141f04d82687 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2404477 Reviewed-by: Jett Rink <jettrink@chromium.org>
* TCPMv2: Block enabling PD in RO for non-EFS2 and dead-batteryWai-Hong Tam2020-09-111-2/+17
| | | | | | | | | | | | | | | | | If enable PD in RO on a non-EFS2 device, a hard reset will be issued when sysjump to RW that makes the device brownout on the dead-battery case. For this special case, disable PD in RO as a workaround. BRANCH=None BUG=b:166307654,b:168134171 TEST=Tested on Pompom, without battery attached. EC warm reset and sysjump to RW won't cause the board power-lost. EC warm reset may be brownout but the next boot is fine. Change-Id: Ie6e7687aa8e160012f9bbd725e0fbcbacae94cf2 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2402150 Reviewed-by: Jett Rink <jettrink@chromium.org>
* thermal: Add documentationAbe Levkoy2020-09-111-1/+6
| | | | | | | | | | | | | | Comment parameters for board_override_fan_control. BUG=none TEST=make buildall BRANCH=none Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: Ib3bda463b67cb5181869f1aadb48124616d42c8e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2403804 Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org>
* TCPMv2:Correct get_usb4_cable_speed() functionAyushee2020-09-111-2/+2
| | | | | | | | | | | | | | | | | | | | | If a passive USB3gen2 cable NAKs to the discover SVID/mode query, we need to enter USB4 with USB3gen2 passive cable. When a cable NAKs to discover query, the port limits it's Thunderbolt speed to Passive Gen 2 cable speed. So, this CL modifies the get_usb4_cable_speed() function, to obtain the thunderbolt speed from get_tbt_cable_speed() instead of board_get_max_tbt_speed() function BUG=b:168060760 BRANCH=None TEST=Checked on volteer, able to enumerate the USB3Gen2 cables that NAKs to discover SVID query. Signed-off-by: Ayushee <ayushee.shah@intel.com> Change-Id: Id38ca12bb695ed256098d66b098aafa1bc75aed9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2404604 Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* TCPMv2: Obtain correct dual role state when going suspendPatryk Duda2020-09-113-3/+17
| | | | | | | | | | | | | | | | | | | | | Some boards (eg. eve) don't source VBUS in S3 state. In this case DRP state should be set to force sink instead of toggle off. This CL introduces pd_get_drp_state_in_suspend() function and uses it to obtain correct DRP state when entering suspend. Default implementation of pd_get_drp_state_in_suspend() returns PD_DRP_TOGGLE_OFF, so this commit introduces no functional changes. BUG=b:162254118 BRANCH=none TEST=No functional changes in this CL make -j buildall Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: Iacf8fcdbad027563015f593653d3ed8a49752131 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2395558 Reviewed-by: Jett Rink <jettrink@chromium.org>
* Meep: Enable SSFC for PPC on C1 portDevin Lu2020-09-102-17/+56
| | | | | | | | | | | | | | BRANCH=firmware-octopus-11297.B BUG=none TEST=Set SSFC value for SYV682x and NX20P348x for two daughterboards. Make sure port can be charged. Remove SSFC field and make sure board is able to recongize correct ppc type by PPC ID. Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Change-Id: I1be1c5cf23f1fd7f049fdc3879f16334547ec16a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2396097 Reviewed-by: Marco Chen <marcochen@chromium.org>
* Octopus: Add SSFC field for PPCDevin Lu2020-09-103-6/+23
| | | | | | | | | | | | | | Octopus already supported SSFC with CL:2377058. This patch extends SSFC field of CBI for PPC. BRANCH=firmware-octopus-11297.B BUG=none TEST=EC log of Meep device can output value of SSFC in CBI. Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Change-Id: I1d0815a29673d535e53fdb7efe6b756999bc9f3a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2396096 Reviewed-by: Marco Chen <marcochen@chromium.org>
* Meep: Set SYV682x high voltage path ilimit to 5.5ADevin Lu2020-09-101-0/+2
| | | | | | | | | | | BUG=b:162221222 BRANCH=firmware-octopus-11297.B TEST=EC console ppc_dump <port> to make sure setting. Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Change-Id: I3840e6a86563d2e7faa6eb3c12c51925718ef306 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2396098 Reviewed-by: Marco Chen <marcochen@chromium.org>
* Meep: Fix triggering condition for PPC interrupt of SYV682ADevin Lu2020-09-102-10/+23
| | | | | | | | | | | | | | Apply CL:2309522 to meep. BUG=none BRANCH=firmware-octopus-11297.B TEST=1. make BOARD=meep. 2. Verify USBC charger is able to charging. Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Change-Id: I7407e360bb1521e4a9c5be38111508545a970733 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2396095 Reviewed-by: Marco Chen <marcochen@chromium.org>
* voxel:Switch RT1715 TCPC for TUSB422Ben Chen2020-09-102-29/+32
| | | | | | | | | | | | | | | Replace the TUSB422 driver/I2C address with the RT1715 of C0/C1 type-C port by BOARD version define BUG=b:165765710 BRANCH=master TEST=check usb and DP function workable. Change-Id: Id53e4b05e9a5509e8af9eb7ffff35c2941899104 Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2389725 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* run_device_tests.py: Add type informationTom Hughes2020-09-101-15/+20
| | | | | | | | | | | | BRANCH=none BUG=b:162009542 TEST=mypy ./test/run_device_tests.py TEST=./test/run_device_tests.py Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I46d83c15eeaba03abd3477b516be22278a3dcf2b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2316522 Reviewed-by: Craig Hesling <hesling@chromium.org>
* TCPCI: Stop I2C transfer after discovering no message to readDiana Z2020-09-101-6/+15
| | | | | | | | | | | | | | Set I2C_XFER_STOP after reading an invalid number of bytes, either a count less than 0 or one larger than the driver can cache. Also ensure the STOP is sent on failed header reads. BRANCH=None BUG=b:162557086 TEST=on boten, charging ports do not become stuck on dongle unplug Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I51a07fe629a58b61fe2f1d34425741acbfab8cba Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2380174
* chgstv2: ocpc: Log both Rbatt & Rsys if possibleAseda Aboagye2020-09-101-1/+7
| | | | | | | | | | | | | | | | | | | | | | | It can useful to view the separated out Rsys and Rbatt without having to enable OCPC debug mode. This commit adds those parameters to the `chgstate` console command output. If the system cannot separate out Rsys from Rbatt, only the combined number will be logged. Furthermore, Isys will not be logged. BUG=b:168054855 BRANCH=None TEST=Build and flash waddledee, verify that only the combined resistance is printed when `chgstate` is run. TEST=Build and flash waddledoo, verify that Rsys and Rbatt are printed when `chgstate` is run. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I2bee1afb545ed6e29b14e0b1ca779a0250460970 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2399657 Reviewed-by: David Schneider <dnschneid@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org>
* Volteer: Add support for RT1715Eric Herrmann2020-09-093-1/+33
| | | | | | | | | | | | | | | | | | | Add support for replacing the TUSB422 with the RT1715. Since they are pin-to-pin compatible and currently only used with a rework, make the decision of which to use at runtime. The logic is to check if the RT1715 is both on the I2C bus and the vendor ID matches. If either fail, default to the TUSB422 address and driver. BUG=b:162617664 TEST=make buildall TEST=check both TUSB422 functionality and RT1715 functionality BRANCH=none Change-Id: I8306f086bf030ddd7238532b1f12aa259cb72422 Signed-off-by: Eric Herrmann <eherrmann@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2343734 Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* tcpmv2: Increase SOP' Discovery Identity timeoutKeith Short2020-09-091-8/+28
| | | | | | | | | | | | | | | | | | | | Increase the tDiscoveryIdentity timer outside of an explicit contract so that SOP' Discover Identity commands are only sent at the same rate as Source Cap messages. This allows operation with captive cable devices that power the SOP' responder from VBUS instead of VCONN. BUG=b:166650426 BRANCH=none TEST=make buildall TEST=Verify TBT entry with the TBT loopback device. Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I862a0284f36fe8aa2fb78eeaa3ac9db2764da32f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2399036 Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* ec: remove "sushi" variant.Paul Fagerburg2020-09-097-1026/+0
| | | | | | | | | | | | | | | | | Sushi is not a real product, just a test of the new_variant program. The effort to keep it up-to-date with the rest of Hatch is no longer worth it. Remove the variant. BUG=b:168030592 BRANCH=None TEST=hatch-cq builds successfully Signed-off-by: Paul Fagerburg <pfagerburg@chromium.org> Cq-Depend: chrome-internal:3259091, chromium:2398781 Change-Id: I161bff8ba529b94aaaa9a119155cc2962c686d36 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2399199 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Commit-Queue: Patrick Georgi <pgeorgi@chromium.org>
* Woomax: Set HDMI_DATA_EN_DB low after pi3hdx1204_enableEdward Hill2020-09-091-1/+2
| | | | | | | | | | | | | | | | Setting HDMI_DATA_EN_DB low to make PI3HDX1204 go into power down mode before pi3hdx1204_enable would give "pi3hdx1204 enable failed: 1" error. BUG=none BRANCH=zork TEST=none Signed-off-by: Edward Hill <ecgh@chromium.org> Change-Id: Ief512912c7d048c4ac66dfed62e3d42b0bba4214 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2401580 Commit-Queue: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* Ezkinil: Set HDMI_DATA_EN_DB low after pi3hdx1204_enable doneSue Chen2020-09-091-1/+2
| | | | | | | | | | | | | | | | | Setting HDMI_DATA_EN_DB low to make PI3HDX1204 go into power down mode before pi3hdx1204_enable would got "pi3hdx1204 enable failed: 1" error. BUG=none BRANCH=zork TEST=EC log doesn't show "pi3hdx1204 enable failed: 1" while the DUT is entering S3. Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com> Change-Id: I1a54264ebe515acd8ff334fee47f7e46ddffdd4f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2397935 Reviewed-by: Edward Hill <ecgh@chromium.org> Commit-Queue: Edward Hill <ecgh@chromium.org>
* TCPMv2: Add board_tcpc_init() call during initializationPatryk Duda2020-09-091-0/+5
| | | | | | | | | | | | | | | | | | | | Some platforms (eg. eve) need to call board_tcpc_init() from PD task. This patch makes board_tcpc_init() to be called if CONFIG_USB_PD_TCPC_BOARD_INIT is defined. For more information please refer to commit: bd018841f6f2856c949dcf9b6dd462872cd18d7f BUG=b:162254118, b:63957122 BRANCH=none TEST=Compile firmware with TCPMv2 support, flash on eve, check if charging works. Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: Ib680cddc6c693bd02031100d38bb5edfebad57fc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2395560 Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Dedede: Disable pull-ups on C0 and C1 interrupts before z-stateDiana Z2020-09-091-0/+4
| | | | | | | | | | | | | | | | Disabling pull-ups on the C0 and C1 interrupt lines before z-state prevents EN_PP3300_G_L from being pulled down. BRANCH=None BUG=b:153684907 TEST=on waddledee, verify EN_PP3300_G_L is no longer pulled down as z-state is entered Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ia5614bf32fe1a77255d990bc610fe2f09cf502c4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2391214 Tested-by: Divagar Mohandass <divagar.mohandass@intel.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Dedede: Define GPIO_USB_C1_INT_ODL for all variantsDiana Z2020-09-095-0/+24
| | | | | | | | | | | | | | | | | Naming for the C1 interrupt line varies slightly between variants due to schematic name differences, and version or functional differences. This change ensures all boards have GPIO_USB_C1_INT_ODL defined for baseboard code to reference. BRANCH=None BUG=b:153684907 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I9303be2f9f142eed249da4f2f5e660985ceb7fdd Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2391213 Tested-by: Divagar Mohandass <divagar.mohandass@intel.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Revert "Waddledoo: Add thermistors"Sooraj Govindan2020-09-092-27/+0
| | | | | | | | | | | | | | | | This reverts commit e834efc7488bc98211084f54fad9da9b584daec1. Reason for revert: DUT fails to enter G3 state on shutdown BUG=b:164202851, b:163486924 BRANCH=None TEST=Verify DUT entering into G3 after shutdown. Change-Id: I67876ec7ed22526770ac38e261b5b1903bcb6476 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2397934 Tested-by: Sooraj Govindan <sooraj.govindan@intel.corp-partner.google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* cleanup: Move High-priority interrupt task to a separate fileVijay Hiremath2020-09-094-193/+109
| | | | | | | | | | | | BUG=none BRANCH=none TEST=make buildall -j Change-Id: I63a964721a5471d6a00894cb0cb94e9656c10893 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2389325 Reviewed-by: Poornima Tom <poornima.tom@intel.com> Reviewed-by: Keith Short <keithshort@chromium.org>
* baseboard/dedede: Enable PD control command handlerKarthikeyan Ramasubramanian2020-09-091-0/+1
| | | | | | | | | | | | | | To enable PD Firmware update, enable PD control command handler. BUG=b:159832325 BRANCH=None TEST=Build and ensure that the PD control command is enabled. Change-Id: I3bd12e29b65575bca08fede9544dff409ba38004 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2382552 Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* util: ecst: add support for chip variant npcx9Wealian Liao2020-09-092-2/+17
| | | | | | | | | | | | | | | | | | | | Allow ecst tool to compose the correct firmware header for npcx993f & npcx996f. BRANCH=none BUG=b:165777478 TEST=pass "make buildall" TEST=with the related CLs, change CHIP_VARIANT to npcx996f in board/npcx9_evb/build.mk; "BOARD=npcx9_evb make"; check the image can be built and the image header is correct. Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com> Signed-off-by: CHLin <CHLin56@nuvoton.com> Change-Id: Ia48b19854850a642a2f4ed97ca45230f46fbd65c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2393403 Reviewed-by: CH Lin <chlin56@nuvoton.com> Reviewed-by: caveh jalali <caveh@chromium.org> Commit-Queue: caveh jalali <caveh@chromium.org>
* util: uut: add npcx9 to the device-to-flash_size mapping tableWealian Liao2020-09-091-0/+14
| | | | | | | | | | | | | | | | | | | | | uut maintains a mapping table to look up the internal flash size with the device id (chip variant.) This CL adds a new entry in the table for npcx993f & npcx996f. BRANCH=none BUG=b:165777478 TEST=pass "make buildall" TEST="./build/npcx9_evb/util/uartupdatetool --port=pts/15 --baudrate=115200 --read-flash --file=<file_name>" "diff ./build/npcx9_evb/ec.bin <file_name>" Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com> Signed-off-by: CHLin <CHLin56@nuvoton.com> Change-Id: Iccaa2068dfba8382fe0885ffc2f8105345f73de9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2393402 Reviewed-by: CH Lin <chlin56@nuvoton.com> Reviewed-by: caveh jalali <caveh@chromium.org> Commit-Queue: caveh jalali <caveh@chromium.org>
* Fennel: Add batterys for fennel.Aaron Zhang2020-09-092-76/+51
| | | | | | | | | | | | | | | Add L20L3PG2,L20D3PG2,L20M3PG2 battery information for fennel. BUG=b:163110890 BRANCH=master TEST=make -j BOARD=fennel Change-Id: I0a8eda12dca924831a5536242e4ff77b03cb3cd9 Signed-off-by: Aaron Zhang <zhangjianbo@huaqin.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2342955 Reviewed-by: Zhuohao Lee <zhuohao@chromium.org> Reviewed-by: Hash.Hung <hongzhaoyou@huaqin.corp-partner.google.com> Commit-Queue: Zhuohao Lee <zhuohao@chromium.org>
* Puff: Add setup_thermal for setting thermal configDavid Huang2020-09-091-1/+33
| | | | | | | | | | | | | Use FW_CONFIG to set correct thermal config for different sku. BUG=b:166696500, b:167477885 BRANCH=master TEST=Thermal team verified thermal policy is expected. Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com> Change-Id: I53a4998da5b01cfa4c69335062a64cbff2433752 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2391033 Reviewed-by: Andrew McRae <amcrae@chromium.org>
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