| Commit message (Collapse) | Author | Age | Files | Lines |
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Always ensure we update our source PDO flags when storing partner source
cap replies during PE_SNK_Evaluate_Capability. However, only propose a
power role swap the first time we're storing source capabilities to
prevent infinite PR swap loops between Chromebooks.
BRANCH=volteer
BUG=b:184971310
TEST=ensure connection with a DRP partner results in correct setting of
dual role flags (dual-role for anything we don't want to automatically
charge from, dedicated for anything we do want to automatically charge
from).
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Ida139af43fb384096b14e686cf5bd6bbfdf16aa9
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2821602
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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When we have an overcurrent, or when we have one of the USB-A fault
interrupts asserted, we should in turn assert USB_FAULT_ODL to the SoC.
BRANCH=None
BUG=b:184884741
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Ib0861cc973813ba5c052fddde03ff2775ef2f24f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2822812
Reviewed-by: Rob Barnes <robbarnes@google.com>
Commit-Queue: Rob Barnes <robbarnes@google.com>
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wad -> was
BUG=none
TEST=make buildall
BRANCH=none
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Change-Id: I75647696c7150b03d681e190d803fd5de28523d5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2812140
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Remove PD_T_CHUNK_SENDER_REQ and PD_T_CHUNK_SENDER_RSP. They are
redundant with PD_T_CHUNK_SENDER_REQUEST and PD_T_CHUNK_SENDER_RESPONSE.
BUG=b:179443762
TEST=make buildall
BRANCH=firmware-volteer-13672.B-main
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Change-Id: Idf12b08af92bbff57fc9a587d17367ade7d8cef3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2812139
Reviewed-by: Diana Z <dzigterman@chromium.org>
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If entering DP or TBT alt mode fails, leave the state machine in an
inactive state. Allow the DPM to see that the mode entry process is done
and stop trying to send more VDMs.
BUG=b:184197145,b:179443762
TEST=make buildall
TEST=Pass TDA.2.1.2.1 on Voxel with AP-driven mode entry
TEST=Enter, exit, and reenter DP and TBT mode with host commands
BRANCH=firmware-volteer-13672.B-main
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Change-Id: If72b3410f9aa174c48c65a8ca908d79e2090fa62
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2798525
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When requesting the next chunk in the RCH state machine, set the SOP
type for the request to the type of the just-received chunk response. Do
not just use the SOP type of the last transmitted message.
BUG=b:179443762
TEST=Pass TD.PD.SRC3.E32 with SOP' traffic immediately before chunk 0
BRANCH=firmware-volteer-13672.B-main
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Change-Id: Ifb520bb7ee439ea895b11938395a943d5ca32edf
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2812138
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Scott Collyer <scollyer@chromium.org>
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This reverts commit ca160a3394c952f0732f66eb113b9735b5655ed2.
Reason for revert: responsible for CQ failures (crbug.com/1198472)
BUG=chromium:1198472
BRANCH=none
TEST=pytest zephyr/zmake/test
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I273ee3e26309d595973ec8040a2d835169096670
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2824028
Reviewed-by: Sonny Rao <sonnyrao@chromium.org>
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This reverts commit ee4257735632f5453b9377f9f60f5c68f6917537.
Reason for revert: depends on CL:2807486, which is responsible for CQ
failures (crbug.com/1198472).
BUG=chromium:1198472
BRANCH=none
TEST=pytest zephyr/zmake/test
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I5face75f3e59858b68a0b6e77d5c5b1a9881008a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2823547
Reviewed-by: Sonny Rao <sonnyrao@chromium.org>
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This reverts commit 6b3b01cbf8a7c2a6a41402fcbc504028b4434497.
Reason for revert: depends on CL:2807486, which is responsible for CQ
failures (crbug.com/1198472).
BUG=chromium:1198472
BRANCH=none
TEST=pytest zephyr/zmake/test
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I3f05e547c95b05d0ac3803bed946d7666346bf25
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2823546
Reviewed-by: Sonny Rao <sonnyrao@chromium.org>
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Remove --fail-fast parameter to "zmake testall" call in
firmware_builder.py since it's causing flakes in the CQ and postsubmit
builders.
The reason this parameter causes flakes is because it allows a
zmake.multiproc.Executor object to be considered "finished" (thus
allowing a .wait() to return) before all jobs have finished. This
means that we might start removing temporary directories before Ninja
has finished executing, causing obscure behavior, like an rmdir
operation failing because the directory is not empty, or the
compiler/linker erroring because required files have suddenly gone
missing.
This parameter can just go away.
BUG=chromium:1188822,b:182818881
BRANCH=none
TEST=monitor CQ to see flakes go away
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I2ab86ef884075745a5d47d9025de717d5867099e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2821604
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Yuval Peress <peress@chromium.org>
Commit-Queue: Yuval Peress <peress@chromium.org>
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In the original watchdog driver, we use an ITIM (auxiliary) timer to
check the watchdog counter periodically (every 1100 ms). If the counter
value is less than WDCNT_DELAY, which means more than 1600 ms has passed
since the last watchdog reloads, the watchdog panic should be issued.
However, this mechanism may cause the watchdog to happen randomly at
1600~2700 ms. This is because the aux timer and watchdog timer are not
aligned. In this CL, we aligned the watchdog timer and aux timer by
reloading both watchdog count and aux timer count in HOOK_TICK.
BRANCH=none
BUG=b:184681421
TEST=
1. "watims 1200", see panic trace printed but no EC reset.
2. "waitms 2000", see panic trace printed and EC reset.
2. "crash watchdog", see panic trace printed and EC reset.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Change-Id: Ic86d1b238d40fda76af9c38561e5669c13167a32
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2814041
Tested-by: CH Lin <chlin56@nuvoton.com>
Reviewed-by: Wai-Hong Tam <waihong@google.com>
Commit-Queue: CH Lin <chlin56@nuvoton.com>
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Some errors are currently suppressed by default which is not very
friendly. Fix this.
BUG=b:177096315
BRANCH=none
TEST=(cd zephyr/zmake/ && python3 -m pytest .)
Signed-off-by: Simon Glass <sjg@chromium.org>
Change-Id: Icdf8e8c91003a3f89d20c704a324673e1269cb0a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2809781
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Yuval Peress <peress@chromium.org>
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At present if one process finishes with an error the output of other
processes may be truncated, since zmake exits immediately. This can be
confusing since running repeatedly gives different output.
Fix it by waiting until all processes are complete before exiting.
BUG=b:184298184
BRANCH=none
TEST=(cd zephyr/zmake/ && python3 -m pytest .)
Change-Id: Ib6c3dd5966c2b381d811c84e3c1c5b5f5fc3cf9a
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2801173
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Yuval Peress <peress@chromium.org>
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At present there are no tests for zmake.py itself. Add a simple one to
provide some coverage.
Use this to test that the filtering does what we expect. This works by
using some pre-canned output for the RO and RW, running each file
through a separate 'cat' command in its own process, then comparing
the results obtained in the log.
In creating this test, unexpected behaviour was found with the
image-size logging (Memory, FLASH:, etc), in that they end up on the
ERROR level, if previous output has appeared on that level. This is
because the default log level changes to whatever the last log output
was. So fix this at the same time.
For now we don't check the DEBUG level, since it has a bug.
BUG=b:177096315
BRANCH=none
TEST=(cd zephyr/zmake/ && python3 -m pytest .)
Signed-off-by: Simon Glass <sjg@chromium.org>
Cq-Depend: chromium:2819138
Change-Id: Iaa777815b577ab814eb2e69d34a3047ae57f0b45
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2807486
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Use the common LED on/off states for LED behavior. Set it up for our
two colors: amber and white.
BRANCH=None
BUG=b:184845299
TEST=on guybrush, confirm charging shows Amber, discharging is white,
shutdown shows no LED on
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: Idc57de843fd2addaaa3006d4abd8566d76b2de6b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2818151
Reviewed-by: Rob Barnes <robbarnes@google.com>
Commit-Queue: Rob Barnes <robbarnes@google.com>
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config adc temp senosr enable, re-config KB_BL_EN
to gpioG3 from GPIOI7
BUG=b:184885443
BRANCH=asurada
TEST=make buildall PASS
Change-Id: Ia0d12724ca33295f2817ee2a9a32dbff09aba87a
Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2816939
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
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Some of the choices are incorrect here due to the defaults not lining up
with what lazor wants. Fix them.
BUG=b:183296099
BRANCH=none
TEST=Build lazor on zephyr; no obvious changes when run
Signed-off-by: Simon Glass <sjg@chromium.org>
Change-Id: Id42c6db80276ba110fe12afa70823709b0b42888
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2822392
Reviewed-by: Wai-Hong Tam <waihong@google.com>
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This function is needed to detect the correct product ID for each port.
Add it.
BUG=b:183296099, b:183118990
BRANCH=none
TEST=Build lazor on zephyr; no obvious changes when run
Signed-off-by: Simon Glass <sjg@chromium.org>
Change-Id: I1c7637a6fa6ccd1f0b82cbbd62575c43f096b641
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2822391
Reviewed-by: Wai-Hong Tam <waihong@google.com>
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It turns out we need more symbols for some boards, such as when the
board_get_ps8xxx_product_id() function is implemented.
Export some more things.
BUG=b:183296099
BRANCH=none
TEST=make BOARD=lazor -j30
Build lazor on zephyr
Change-Id: Iccef72582f6033a1a34abe28a636ebe254f1bd5a
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2822390
Reviewed-by: Wai-Hong Tam <waihong@google.com>
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We did this in volteer but not with trogdor. Add it for consistency and
to make things easier when we move away from shimming
BUG=b:183296099
BRANCH=none
TEST=build zephyr on lazor and boot
(no apparent change)
Signed-off-by: Simon Glass <sjg@chromium.org>
Change-Id: I661089ead0c0d0ea97d6082cbd7a6e41939aa1ef
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2822389
Reviewed-by: Wai-Hong Tam <waihong@google.com>
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This extends the ADC conversion timeout to 2x 25ms. The bq25720 spec is
25ms whereas the bq25710 spec is 10 ms. So, increase the timeout. Also,
to keep the math simple, time out after 200% of the expected time
instead of 160%.
Hopefully, this fixes the "Could not read VBUS ADC! Error: 4" messages
(and root cause) in the EC console.
BRANCH=none
BUG=b:185004089
TEST=no timeouts observed during a 48 hour run, previously timeouts
would happen within a few hours.
Change-Id: Iaed0c000577d71eb7d1d136dd81f598b9087ee80
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2819584
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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This adds the wake source pin definitions needed by the NPCX9 chip
support code for brya board ID 1. Note that board ID 1 needs a rework on
VCC1_RST to prevent it from falsely waking the board.
BRANCH=none
BUG=b:183246197
TEST=booted same image on old and new rev. of board
Used "hibernate" on EC console hibernate the system. It woke
up immediately (b/183412004) with cause "hibernate" indicating
this was a PSL wake:
--- UART initialized after reboot ---
[Image: RO, brya_v2.0.8357-19a8f337db 2021-04-08 01:09:30 caveh@caveh]
[Reset cause: power-on hibernate wake-pin]
LID_OPEN was tested as a PSL wake source by artificially disabling
CONFIG_HIBERNATE_PSL_VCC1_RST_WAKEUP to eliminate VCC1 as a false
wake source.
Change-Id: If4cca6d1e20ddc3c422697e6838c9df0ddd8cb15
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2728679
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
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This updates the GPIO functional changes to support the new rev. (ID 1)
of the brya board.
EC_KB_BL_EN moved from GPIO85 to GPIOA3 (was EN_SLP_Z). EC_KB_BL_EN is
set to low since that's the preferred setting for the initial keyboard
backlight. This does not break the old board due to a hardware bug on
the old board that causes it to come out of sleep unconditionally.
GPIO85 does not need to be configured here when PSL is enabled.
EN_SLP_Z is no longer used.
EC_RST_ODL (VCC1_RST#/GPO77) has been removed from config. This was an
unused input on the old board. This pin functions as a wake source when
we enable HIBERNATE_PSL_VCC1_RST_WAKEUP and does not need to be
configured here.
finally, PSL is enabled on pins PSL_IN1-3.
BRANCH=none
BUG=b:184811017,b:183246197
TEST=both old new new revision of the brya board can boot
Cq-Depend: chromium:2728679
Change-Id: I4b3ab17bb44d18167328faee1a1b604bf0428dd3
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2813460
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
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Add a new config CONFIG_USB_PD_ONLY_FIXED_PDOS. If that config is
enabled, ignore non-FIXED PDOs in both the console command `ada_srccaps`
and also when selecting the preferred PDO for a voltage.
Enable CONFIG_USB_PD_ONLY_FIXED_PDOS for servo_v4 and servo_v4p1, since
they don't expose non-fixed PDO in their srccaps. Without this change,
there is a risk that the "best" PDO for a given voltage will be
non-FIXED and then that voltage just won't be supported at all.
BRANCH=none
BUG=b:178484932
TEST=added
Change-Id: I0d1187ca372120c7fe21d627e1b82b59f6334add
Signed-off-by: Jeremy Bettis <jbettis@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2809353
Tested-by: Jeremy Bettis <jbettis@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
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Enable pull-down of GPIOB4 & GPIOB5
BUG=b:184914946
BRANCH=None
TEST=make -j BOARD=sasuke
Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com>
Change-Id: I27e1b612956f217418178783cf28c5c466f281ba
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2817140
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Port discovery DR and VCONN Swap Policy.
For port0: If dr_swap_to_dfp_flag is true and port
data role is DFP, transition to pe_drs_send_swap
For port1: If dr_swap_to_dfp_flag is true and port
data role is UFP, transition to pe_drs_send_swap
BUG=b:183026242
BRANCH=none
TEST=make runtests
Tested on Voxel by plugging in a dock
Signed-off-by: Sam Hurst <shurst@google.com>
Change-Id: I2f7d29264bfc978d54675aab5faa9d2c6bc30a80
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2783441
Reviewed-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Verified-boot (EC software sync) asks the hash of the EC RW to check
if it is a correct version. Enable the hashing function.
BRANCH=None
BUG=b:184981521
TEST=Modified GBB flags in the AP firmware to allow EC software sync.
Checked the hash was different and performed update:
check_ec_hash: Hexp RW(active): ece8070d7fba2eff80eb8c936ba3dca9b...
check_ec_hash: Hmir: ece8070d7fba2eff80eb8c936ba3dca90...
check_ec_hash: Heff RW(active): 5270d6de9dbca79be7cb27ef9e5fd0535...
check_ec_hash: Heff != Hexp. Schedule update
After updated, the hash was correct:
check_ec_hash: Hexp RW(active): ece8070d7fba2eff80eb8c936ba3dca9b...
check_ec_hash: Hmir: ece8070d7fba2eff80eb8c936ba3dca9b...
vboot_hash_image: No valid hash (status=0 size=0). Compute one...
check_ec_hash: Heff RW(active): ece8070d7fba2eff80eb8c936ba3dca9b...
update_ec: Updated RW(active) successfully
Change-Id: I8071579e69a38f8950aa0e70bb4bee4419d11be9
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2821853
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
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CL:2819147 fixed the name of nodes in devoce-tree file following
rules:
If object is 'phandles', use underscores for object name.
If not, such as 'node' or 'property', use hyphens for object name.
Modify the related files for build pass.
BUG=none
BRANCH=none
TEST=zmake testall
Cq-Depend: chromium:2819147
Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com>
Change-Id: I70284ecb168234493d04b8b26433ec7009232132
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2817684
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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Disable CC_LPC console channel by default, to avoid noisy
"ACPI kblight" filling up logs.
BUG=none
BRANCH=zork
TEST=check console output
Signed-off-by: Edward Hill <ecgh@chromium.org>
Change-Id: I53d3181d25cce4451e9602eb590504ac9e739d2e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2821361
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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Fixes pd_extract_pdo_power() to output the correct voltage and current
for non-fixed PDOs. Add unit test.
BRANCH=none
BUG=b:178484932
TEST=added
Signed-off-by: Jeremy Bettis <jbettis@google.com>
Change-Id: I6de55be3c753e01ef26424896c6fd41b8df8f94b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2805226
Commit-Queue: Jeremy Bettis <jbettis@chromium.org>
Tested-by: Jeremy Bettis <jbettis@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
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Enable CONFIG_PLATFORM_EC_EXTPOWER_GPIO and add the necessary emulated
gpio pin. Remove the stub from stubs.c.
BUG=b:185118990
TEST=zmake testall
BRANCH=none
Signed-off-by: Jeremy Bettis <jbettis@google.com>
Change-Id: Ibfd455f6be4efecd3b686a293ea7a2da8f7ca518
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2821358
Tested-by: Jeremy Bettis <jbettis@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
Commit-Queue: Jeremy Bettis <jbettis@chromium.org>
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There is no reason to prevent CONFIG_SHIMMED_TASKS and CONFIG_ZTEST from
being used together.
BUG=b:185118990
TEST=zmake testall
BRANCH=none
Signed-off-by: Jeremy Bettis <jbettis@google.com>
Change-Id: I024ef0faea14fa9ddc38c5ca688e8fa4448691c2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2821357
Tested-by: Jeremy Bettis <jbettis@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit-Queue: Jeremy Bettis <jbettis@chromium.org>
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Remove a hang during the buffer initialization caused by not releasing
the lock.
BRANCH=none
BUG=b:181352041
TEST=build/run on volteer
TEST=zmake testall
Change-Id: I49f5514d413fb8577e11b9e3b3dd5ac9eaffccec
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2821360
Commit-Queue: Yuval Peress <peress@chromium.org>
Commit-Queue: Simon Glass <sjg@chromium.org>
Tested-by: Yuval Peress <peress@chromium.org>
Auto-Submit: Yuval Peress <peress@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Enable the volume up/down button interrupts.
BUG=b:184667396
BRANCH=none
TEST=verify physical volume buttons on side of volteer
Signed-off-by: Keith Short <keithshort@chromium.org>
Change-Id: I24c19ed9a50b19a52a4bef07254dfd03b2bc2c83
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2809355
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
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Correct i2c address of ANX7451 on guybrush.
Do not attempt to read or write mux in Z1 since mux is not powered.
The only required init step is to disable ultra low power. So init can
be removed if ultra low power is always set inside set.
Prevent disabling both DP and USB at the same time since this causes mux
to fail.
BUG=b:184907521, b:184908498
TEST=Display port works on Guybrush B2
BRANCH=None
Signed-off-by: Rob Barnes <robbarnes@google.com>
Change-Id: Icdcc2df6034680844635c8b8675402d0825f34a8
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2816306
Reviewed-by: Diana Z <dzigterman@chromium.org>
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Remove GPIO43 of ADC Alternate function and set Input and Internal pull up.
BUG=b:181325655
BRANCH=dedede
TEST=make BOARD=cret
Signed-off-by: johnwc_yeh <johnwc_yeh@compal.corp-partner.google.com>
Change-Id: I3e506c0916a284a57afa93f8e100f45c285a38bb
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2817683
Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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Use the Forest Creek battery to Cret.
BUG=b:185066840
BRANCH=dedede
TEST=make BOARD=cret
Signed-off-by: johnwc_yeh <johnwc_yeh@compal.corp-partner.google.com>
Change-Id: Ib4c9c3feb7236b2d2a3d6224249003797ce1c189
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2817691
Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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Create a shell of a test that can have many test suites for device
drivers. Currently this test only checks that the EC_BATT_PRES_ODL can
be read correctly by battery_is_present(). But it links in many device
drivers and is a starting point for the next test.
BUG=b:185118990
TEST=It is one
BRANCH=none
Signed-off-by: Jeremy Bettis <jbettis@google.com>
Change-Id: I07c8835015cbe0fec6aaf82f782400e894043a90
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2819029
Tested-by: Jeremy Bettis <jbettis@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit-Queue: Jeremy Bettis <jbettis@chromium.org>
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This CL aligns the ECOS's setting for flash erase size (i.e. 64K.)
With this change, the time to erase 256KB RW in Zephyr is close to that in ECOS.
BRANCH=none
BUG=b:184981080
TEST=
Before this CL:
flasherase 0x40000 0x40000
Erasing 262144 bytes at 0x40000...
t = 1787100
With this CL:
flasherase 0x40000 0x40000
Erasing 262144 bytes at 0x40000...
t = 414700
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Change-Id: I11478f92641cd1110177c552bd7d93276c94f381
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2821111
Tested-by: CH Lin <chlin56@nuvoton.com>
Reviewed-by: Yuval Peress <peress@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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The previous equation in CL:2771482,
would cause lux = 0 on some ALS board in specific ambient light
, we worked with vendor and update the lux equation:
Lux = LuxScalar * (DGFn * ((C * Ccoefn) + (R * Rcoefn) +
(G * Gcoefn) + (B * Bcoefn)) / (Atime*Again))
Lux = MAX(0, Lux)
If (G+B)/C < 0.692 n=1
If (G+B)/C >= 0.692 and < 1.012 n=2
else n=3
LuxScalar = 1.00
Coeffs n=1(Lo) n=2(Med) n=3(Hi)
Ccoef 0.009 0.202 -0.661
Rcoef 0.056 - 1.1 1.334
GCoef 2.735 8.692 1.095
BCoef -1.903 -7.068 -1.821
DGF 799.797 801.347 795.574
BUG=b:184238881
BRANCH=puff
TEST=verify equation works as intended.
Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com>
Change-Id: Ic9e41579c37544496f54a4faeb1a0d0aeea8f7c3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2812601
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Commit-Queue: Gwendal Grignou <gwendal@chromium.org>
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This config is a no-op in AMD power sequencing.
BRANCH=None
BUG=None
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I16424c94e48916946e9928707681c30de856eb16
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2818530
Reviewed-by: Edward Hill <ecgh@chromium.org>
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This config is a no-op in AMD power sequencing.
BRANCH=None
BUG=None
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I4982732f23b59a7a26cd80752874b0b640f3deea
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2818529
Reviewed-by: Rob Barnes <robbarnes@google.com>
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This config is a no-op in AMD power sequencing.
BRANCH=None
BUG=None
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I195d98f57d392db9886a3a544b4707c1aff19b9a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2818528
Reviewed-by: Rob Barnes <robbarnes@google.com>
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The AMD power states don't actually reference the S5 pause variable, and
instead always pause in S5 when power transitioning. It appears only
braswell and samus power transitions actually use this pause to change
their power sequencing.
BRANCH=None
BUG=None
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I0bdaa714fa41a696a8e446b04a62aba793e59432
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2818527
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Rob Barnes <robbarnes@google.com>
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This CL is the starting image for baklava which is a quiche
varaint. The only changes made are updating the year and board
name. The follow on CL contains changes relative to quiche.
BUG=b:184595837
BRANCH=quiche
TEST=make -j BOARD=baklava
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I62f1b6cd710f272833a97f50dc7fe7e1ac27b85e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2806185
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
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CPU temp is hotter than SOC temp.
The CPU thermal params have not been tuned.
High CPU temps is causing shutdowns.
Removing CPU temp from thermal_params and relying on SOC temp.
BUG=b:183561584
BRANCH=None
TEST=Build
Change-Id: I195bfefaafc300503c189c04e00f85dccb07a8b9
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2821120
Tested-by: Matt Wang <matt_wang@compal.corp-partner.google.com>
Reviewed-by: Rob Barnes <robbarnes@google.com>
Commit-Queue: Rob Barnes <robbarnes@google.com>
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Add basic fan support. More tuning will be needed.
BUG=b:178217015
BRANCH=None
TEST=Build
Change-Id: I09b598c48c74bf8c3edbe80ec0084c8d68287386
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2821118
Tested-by: Matt Wang <matt_wang@compal.corp-partner.google.com>
Reviewed-by: Rob Barnes <robbarnes@google.com>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Diana Z <dzigterman@chromium.org>
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Set fan off threshold to 0 to ensure fan is always running SOC is on.
This is a helpful visual and audible signal during bringup.
BUG=b:183544852
BRANCH=None
TEST=Build
Change-Id: Ifb2571694e7a3b5e68db2f90aaf8d2c6a913693c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2821121
Tested-by: Matt Wang <matt_wang@compal.corp-partner.google.com>
Reviewed-by: Rob Barnes <robbarnes@google.com>
Commit-Queue: Rob Barnes <robbarnes@google.com>
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Configuring the eSPI signals to default may be causing a conflict with
the npxc eSPI driver.
BUG=b:182989724
BRANCH=None
TEST=Build
Change-Id: I1566e79141c702457853c72a3992820beeef7e23
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2821119
Tested-by: Matt Wang <matt_wang@compal.corp-partner.google.com>
Reviewed-by: Rob Barnes <robbarnes@google.com>
Commit-Queue: Rob Barnes <robbarnes@google.com>
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Enable EFS2 and CBI for mancomb boards.
BUG=b:182795161
BRANCH=None
TEST=Build
Change-Id: I716a42d9980cd47459f26a554cf86d57d6d5038e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2821114
Tested-by: Matt Wang <matt_wang@compal.corp-partner.google.com>
Reviewed-by: Rob Barnes <robbarnes@google.com>
Commit-Queue: Rob Barnes <robbarnes@google.com>
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