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* ss-mux: remove unused port_addr initializationv2.1.0Jett Rink2018-09-1823-44/+8
| | | | | | | | | | | | | | | | | | | | | | | We do not need to set the port_addr variable most places because the SS-MUX is also the TCPC and the tcpc_config_t information is used instead. Remove unused variable setting to avoid confusion. BRANCH=none BUG=none TEST=buildall. phaser USB-C communication (and muxs) still work which is a nominal case for all of these changes. Change-Id: I72ee5da251956eb133091974e8dce5ac7f8787c6 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1200064 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1231473 Reviewed-by: Martin Roth <martinroth@chromium.org> Commit-Queue: Martin Roth <martinroth@chromium.org> Tested-by: Martin Roth <martinroth@chromium.org>
* isl923x: initially disable autonomous chargingJett Rink2018-09-182-0/+14
| | | | | | | | | | | | | | | | | | | | | | | We do not use autonomous charging since it is automatically disabled when ever we set the current limits manually (which we always do). Allowing autonomous charging for the short period during initialization can cause current over protection events on devices with 2S batteries. BRANCH=none BUG=b:114318779 TEST=meep can boot without battery from daughter board USB-C port without boot looping Change-Id: Id50517d7e34bb5be171fe8b781b3ccf835db1f88 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1227411 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Justin TerAvest <teravest@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1231364 Reviewed-by: Martin Roth <martinroth@chromium.org> Commit-Queue: Martin Roth <martinroth@chromium.org> Tested-by: Martin Roth <martinroth@chromium.org>
* pd: Check for dual-role partner when TOGGLE_OFF/FORCE_SINKEdward Hill2018-09-181-29/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Charging via hub with the ANX3429 TCPC sometimes fails when the system is in S5/G3. Both the hub and the ANX3429 are auto-toggling, so source and sink roles depend on the timing of the connection. Charging will fail when the hub expects the ANX3429 to be a source, but the drp_state in S5/G3 is TOGGLE_OFF/FORCE_SINK. Ideally we wouldn't use auto-toggle when drp_state is TOGGLE_OFF/FORCE_SINK, but with the ANX3429 TCPC, auto-toggle can't be prevented in low power mode. To fix this, try being a sink in case the connected device is dual-role. 100 ms is enough time for a dual-role partner to switch from sink to source. If the connected device is sink-only, then we will attempt SNK_DISCONNECTED twice (due to debounce time), then return to low power mode (and stay there). After 200 ms, reset ready for a new connection. Move the next_state selection out into a function since things were getting very narrow inside PD_STATE_DRP_AUTO_TOGGLE. BRANCH=none BUG=b:72007056 TEST=sink device + ANX3429: low power mode TEST=sink device + PS8751: low power mode TEST=charger via hub + ANX3429: starts charging (20/20 tries) TEST=charger via hub + PS8751: starts charging (all tests with Grunt in G3) Change-Id: I097dcace96bc6e6e9cfab279bcbded50ef9951e3 Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1194678 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1231363 Reviewed-by: Martin Roth <martinroth@chromium.org> Commit-Queue: Martin Roth <martinroth@chromium.org> Tested-by: Martin Roth <martinroth@chromium.org>
* pd: Don't auto toggle when DRP state is not dual role.Edward Hill2018-09-182-39/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When in PD_STATE_DRP_AUTO_TOGGLE, we were always enabling DRP auto-toggle, even when drp_state is PD_DRP_TOGGLE_OFF or PD_DRP_FORCE_SINK, which prevents us from acting as source. This caused an infinite loop of entering and exiting low power mode when a sink-only device was plugged into a PS8751 port when the system is in S5/G3. To fix this, only enable DRP auto-toggle when drp_state allows us to be dual-role. One problem with doing this is that the ANX3429 doesn't support low power mode with auto-toggle disabled. Luckily, the ANX3429 will stay in low power mode when a sink-only device is connected. BRANCH=none BUG=b:72007056,b:111663127 TEST=sink device + ANX3429: low power mode [1] TEST=sink device + PS8751: low power mode [1] TEST=charger via hub + ANX3429: 50% chance fail to charge [2] TEST=charger via hub + PS8751: starts charging (all tests with Grunt in G3) [1] dut-control pp3300_tcpc_mw -> 3.5 [2] b/72007056 still remains to be fixed. Change-Id: Id190a3daa78847871288e66d8f229a485a6522e3 Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1194352 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1231362 Reviewed-by: Martin Roth <martinroth@chromium.org> Commit-Queue: Martin Roth <martinroth@chromium.org> Tested-by: Martin Roth <martinroth@chromium.org>
* pd: Ensure TCPC exits low power modeEdward Hill2018-09-182-12/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Ensure the TCPC is awake when leaving PD_STATE_DRP_AUTO_TOGGLE and when there is a new PD event to handle. Move the exit_low_power_mode() call from the PD_STATE_DRP_AUTO_TOGGLE case statement into set_state(), to catch all possible paths that exit the state. Add a new exit_low_power_mode() call to the top of the main task loop if there is a new event to handle. This allows the exit_low_power_mode() call to be removed from pd_update_dual_role_config() (since PD_EVENT_UPDATE_DUAL_ROLE is included in PD_EXIT_LOW_POWER_EVENT_MASK). Clear PD_FLAGS_LPM_REQUESTED when PD_FLAGS_LPM_ENGAGED is cleared in handle_device_access() and wake the PD task to ensure we will make another pass through the main task loop (and check the CC lines) before deciding to enter low power mode again. BRANCH=none BUG=b:111663127,b:112039224 TEST=PD and TCPC low power still work on Grunt Change-Id: I99063ce0d02af65de74f4c6f73f7a15600d2eac9 Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1225352 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1231361 Reviewed-by: Martin Roth <martinroth@chromium.org> Commit-Queue: Martin Roth <martinroth@chromium.org> Tested-by: Martin Roth <martinroth@chromium.org>
* pd: Change tcpm_set_drp_toggle() to tcpm_enable_drp_toggle()Edward Hill2018-09-186-18/+9
| | | | | | | | | | | | | | | | | | | Change tcpm_set_drp_toggle() to tcpm_enable_drp_toggle(), since enable=0 was unused. BRANCH=none BUG=b:111663127 TEST=PD and TCPC low power still work on Grunt Change-Id: I760a067b11984a579261deac856419d46400497b Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1194353 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1230999 Reviewed-by: Martin Roth <martinroth@chromium.org> Commit-Queue: Martin Roth <martinroth@chromium.org> Tested-by: Martin Roth <martinroth@chromium.org>
* pd: Add PD_FLAGS_LPM_TRANSITIONEdward Hill2018-09-183-26/+21
| | | | | | | | | | | | | | | | | | | Add PD_FLAGS_LPM_TRANSITION and use this to allow the PD task to call tcpc_read/tcpc_write from tcpm_enter_low_power_mode() and tcpm_init(). BRANCH=none BUG=b:111663127 TEST=PD and TCPC low power still work on Grunt Change-Id: I12ddb58667c171068e1be6d136f22f2062959c8c Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1194351 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1230998 Reviewed-by: Martin Roth <martinroth@chromium.org> Commit-Queue: Martin Roth <martinroth@chromium.org> Tested-by: Martin Roth <martinroth@chromium.org>
* pd: Cleanup lpm_debounce_deadlines and tasks_waiting_on_resetEdward Hill2018-09-181-9/+14
| | | | | | | | | | | | | | | | | | | Move lpm_debounce_deadlines and tasks_waiting_on_reset into struct pd_protocol. BRANCH=none BUG=b:111663127 TEST=PD and TCPC low power still work on Grunt Change-Id: Ied7777175f0b9a8efbda42ecbc4b9147d5564649 Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1194350 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1230997 Reviewed-by: Martin Roth <martinroth@chromium.org> Commit-Queue: Martin Roth <martinroth@chromium.org> Tested-by: Martin Roth <martinroth@chromium.org>
* pd: Cleanup request_low_power_mode() and pd_set_drp_toggle()Edward Hill2018-09-181-26/+4
| | | | | | | | | | | | | | | | | | | Replace request_low_power_mode() with set/clear of PD_FLAGS_LPM_REQUESTED. Remove pd_set_drp_toggle() since it was only called from one place. BRANCH=none BUG=b:111663127 TEST=PD and TCPC low power still work on Grunt Change-Id: I7692d9101f2ba44ad395a8b71b62f63bc00b8404 Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1194349 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1230996 Reviewed-by: Martin Roth <martinroth@chromium.org> Commit-Queue: Martin Roth <martinroth@chromium.org> Tested-by: Martin Roth <martinroth@chromium.org>
* pd: Replace pd_set_drp_toggle() with exit_low_power_mode()Edward Hill2018-09-181-6/+16
| | | | | | | | | | | | | | | | | | | Replace pd_set_drp_toggle(port, 0) with exit_low_power_mode() that calls reset_device_and_notify() to ensure TCPC is out of standby. BRANCH=none BUG=b:111663127 TEST=PD and TCPC low power still work on Grunt Change-Id: I1a8f858040514e138e5bc712a998d1e8fc28e21f Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1194348 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1230995 Reviewed-by: Martin Roth <martinroth@chromium.org> Commit-Queue: Martin Roth <martinroth@chromium.org> Tested-by: Martin Roth <martinroth@chromium.org>
* npcx7: Report PSL_CTS on wake from hibernateFurquan Shaikh2018-09-181-0/+14
| | | | | | | | | | | | | | | | | | | | This is useful when debugging random wake issues from PSL hibernate to identify the actual cause of wake. BUG=b:115664415 BRANCH=None TEST=make -j buildall Change-Id: Id35be96aef2d73426781d0bf88bf5f6268bc3b6b Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1225353 Commit-Ready: Jett Rink <jettrink@chromium.org> Tested-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1230994 Reviewed-by: Martin Roth <martinroth@chromium.org> Commit-Queue: Martin Roth <martinroth@chromium.org> Tested-by: Martin Roth <martinroth@chromium.org>
* ectool: Allow usbpdpower command to take port #Daisuke Nojiri2018-09-181-4/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, usbpdpower command enumerates all USB-C ports found on the board. Since barrel jack adapters are not recognized as a USB-C port, they're not handled by the command. This patch allows the command to take a port number as a new parameter. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=chromium:841944 BRANCH=none TEST=Verify ectool usbpdpower 1 return 'Port 1: Disconnected' and 'Port 1: SNK (not charging)' without and with a BJ adapter connected respectively on Fizz. Change-Id: If3437c8f3f9952a4cc6004614ccff7bb6bbb4de5 Reviewed-on: https://chromium-review.googlesource.com/1217606 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1230993 Reviewed-by: Martin Roth <martinroth@chromium.org> Commit-Queue: Martin Roth <martinroth@chromium.org> Tested-by: Martin Roth <martinroth@chromium.org>
* charge_manager: Use enum for CHARGE_SUPPLIER_NONEDaisuke Nojiri2018-09-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Currently, CHARGE_SUPPLIER_NONE is defined as a macro. This causes the compiler to allocate uint8_t to enum charge_supplier. When -1 passed to or returned from a function, it's cast to 0xff. This patch defines CHARGE_SUPPLIER_NONE in enum charge_supplier. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=none BRANCH=none TEST=Verify ectool usbpdpower 1 return 'Port 1: Disconnected' and 'Port 1: SNK (not charging)' without and with a BJ adapter connected respectively on Fizz. Change-Id: I31bfa33efa91f60c6667f3b0de9cbdf9c6b3e8bf Reviewed-on: https://chromium-review.googlesource.com/1217605 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1230992 Reviewed-by: Martin Roth <martinroth@chromium.org> Commit-Queue: Martin Roth <martinroth@chromium.org> Tested-by: Martin Roth <martinroth@chromium.org>
* type: Rename matrix_3x3_t to mat33_fp_tYilun Lin2018-09-1831-54/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Naming of many vector types and matrix types are not clear enough. For example, we have: vector_3_t, which is a vector of three int. vec3_t, which is a vector of three float. size4_t, which is a vector of four size_t. mat33_t, which is a 3x3 matrix of float. matrix_3x3_t, which is a 3x3 matrix of fixed point. Besides, we have types like int8_t, uint16_t types. To clearly distinguished types, the CL propose to, For vector types, naming should be `$type + 'v' + $num + '_t'`: vector_3_t becomes intv3_t vec3_t becomes floatv3_t vector 4 of uint16_t becomes uint16v4_t (which doesn't exist yet) For matrix types, naming should be `mat$N$N_` + $type + '_t', where $N is the matrix size: matrix_3x3_t becomes mat33_fp_t # fp: fixed point mat33_t becomes mat33_float_t TEST=make buildall -j BUG=b:114662791 Change-Id: I51d88d44252184e4b7b3564236833b0b892edc39 Signed-off-by: Yilun Lin <yllin@google.com> Reviewed-on: https://chromium-review.googlesource.com/1215449 Commit-Ready: Yilun Lin <yllin@chromium.org> Tested-by: Yilun Lin <yllin@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1230991 Reviewed-by: Martin Roth <martinroth@chromium.org> Commit-Queue: Martin Roth <martinroth@chromium.org> Tested-by: Martin Roth <martinroth@chromium.org>
* type: Rename mat44_t to mat44_float_t.Yilun Lin2018-09-184-11/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Naming of many vector types and matrix types are not clear enough. For example, we have: vector_3_t, which is a vector of three int. vec3_t, which is a vector of three float. size4_t, which is a vector of four size_t. mat33_t, which is a 3x3 matrix of float. matrix_3x3_t, which is a 3x3 matrix of fixed point. Besides, we have types like int8_t, uint16_t types. To clearly distinguished types, the CL propose to, For vector types, naming should be `$type + 'v' + $num + '_t'`: vector_3_t becomes intv3_t vec3_t becomes floatv3_t vector 4 of uint16_t becomes uint16v4_t (which doesn't exist yet) For matrix types, naming should be `mat$N$N_` + $type + '_t', where $N is the matrix size: matrix_3x3_t becomes mat33_fp_t # fp: fixed point mat33_t becomes mat33_float_t TEST=make buildall -j BUG=b:114662791 Change-Id: I188305fc2f4fcff6ec4343f68e1aa1d2d185f6cf Signed-off-by: Yilun Lin <yllin@google.com> Reviewed-on: https://chromium-review.googlesource.com/1215448 Commit-Ready: Yilun Lin <yllin@chromium.org> Tested-by: Yilun Lin <yllin@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1230990 Reviewed-by: Martin Roth <martinroth@chromium.org> Commit-Queue: Martin Roth <martinroth@chromium.org> Tested-by: Martin Roth <martinroth@chromium.org>
* type: Rename mat33_t to mat33_float_tYilun Lin2018-09-183-28/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Naming of many vector types and matrix types are not clear enough. For example, we have: vector_3_t, which is a vector of three int. vec3_t, which is a vector of three float. size4_t, which is a vector of four size_t. mat33_t, which is a 3x3 matrix of float. matrix_3x3_t, which is a 3x3 matrix of fixed point. Besides, we have types like int8_t, uint16_t types. To clearly distinguished types, the CL propose to, For vector types, naming should be `$type + 'v' + $num + '_t'`: vector_3_t becomes intv3_t vec3_t becomes floatv3_t vector 4 of uint16_t becomes uint16v4_t (which doesn't exist yet) For matrix types, naming should be `mat$N$N_` + $type + '_t', where $N is the matrix size: matrix_3x3_t becomes mat33_fp_t # fp: fixed point mat33_t becomes mat33_float_t TEST=make buildall -j BUG=b:114662791 Change-Id: Ia601bfc9f9fb311f6ca91bfa2e8fa34259ed6c5b Signed-off-by: Yilun Lin <yllin@google.com> Reviewed-on: https://chromium-review.googlesource.com/1215447 Commit-Ready: Yilun Lin <yllin@chromium.org> Tested-by: Yilun Lin <yllin@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1230989 Reviewed-by: Martin Roth <martinroth@chromium.org> Commit-Queue: Martin Roth <martinroth@chromium.org> Tested-by: Martin Roth <martinroth@chromium.org>
* type: Rename size3_t to sizev3_tYilun Lin2018-09-182-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Naming of many vector types and matrix types are not clear enough. For example, we have: vector_3_t, which is a vector of three int. vec3_t, which is a vector of three float. size4_t, which is a vector of four size_t. mat33_t, which is a 3x3 matrix of float. matrix_3x3_t, which is a 3x3 matrix of fixed point. Besides, we have types like int8_t, uint16_t types. To clearly distinguished types, the CL propose to, For vector types, naming should be `$type + 'v' + $num + '_t'`: vector_3_t becomes intv3_t vec3_t becomes floatv3_t vector 4 of uint16_t becomes uint16v4_t (which doesn't exist yet) For matrix types, naming should be `mat$N$N_` + $type + '_t', where $N is the matrix size: matrix_3x3_t becomes mat33_fp_t # fp: fixed point mat33_t becomes mat33_float_t TEST=make buildall -j BUG=b:114662791 Change-Id: I4fea3bb2c1781a91f1c12ad66f25382cc0be3611 Signed-off-by: Yilun Lin <yllin@google.com> Reviewed-on: https://chromium-review.googlesource.com/1215446 Commit-Ready: Yilun Lin <yllin@chromium.org> Tested-by: Yilun Lin <yllin@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1230988 Reviewed-by: Martin Roth <martinroth@chromium.org> Commit-Queue: Martin Roth <martinroth@chromium.org> Tested-by: Martin Roth <martinroth@chromium.org>
* type: Rename size4_t to sizev4_tYilun Lin2018-09-183-9/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Naming of many vector types and matrix types are not clear enough. For example, we have: vector_3_t, which is a vector of three int. vec3_t, which is a vector of three float. size4_t, which is a vector of four size_t. mat33_t, which is a 3x3 matrix of float. matrix_3x3_t, which is a 3x3 matrix of fixed point. Besides, we have types like int8_t, uint16_t types. To clearly distinguished types, the CL propose to, For vector types, naming should be `$type + 'v' + $num + '_t'`: vector_3_t becomes intv3_t vec3_t becomes floatv3_t vector 4 of uint16_t becomes uint16v4_t (which doesn't exist yet) For matrix types, naming should be `mat$N$N_` + $type + '_t', where $N is the matrix size: matrix_3x3_t becomes mat33_fp_t # fp: fixed point mat33_t becomes mat33_float_t TEST=make buildall -j BUG=b:114662791 Change-Id: I3b63b4b1eb4c9ca4166ad207a5646e0c307cd418 Signed-off-by: Yilun Lin <yllin@google.com> Reviewed-on: https://chromium-review.googlesource.com/1215445 Commit-Ready: Yilun Lin <yllin@chromium.org> Tested-by: Yilun Lin <yllin@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1230987 Reviewed-by: Martin Roth <martinroth@chromium.org> Commit-Queue: Martin Roth <martinroth@chromium.org> Tested-by: Martin Roth <martinroth@chromium.org>
* type: Rename vec4_t to floatv4_tYilun Lin2018-09-185-7/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Naming of many vector types and matrix types are not clear enough. For example, we have: vector_3_t, which is a vector of three int. vec3_t, which is a vector of three float. size4_t, which is a vector of four size_t. mat33_t, which is a 3x3 matrix of float. matrix_3x3_t, which is a 3x3 matrix of fixed point. Besides, we have types like int8_t, uint16_t types. To clearly distinguished types, the CL propose to, For vector types, naming should be `$type + 'v' + $num + '_t'`: vector_3_t becomes intv3_t vec3_t becomes floatv3_t vector 4 of uint16_t becomes uint16v4_t (which doesn't exist yet) For matrix types, naming should be `mat$N$N_` + $type + '_t', where $N is the matrix size: matrix_3x3_t becomes mat33_fp_t # fp: fixed point mat33_t becomes mat33_float_t TEST=make buildall -j BUG=b:114662791 Change-Id: Ia61493b9f7303c720fba50d6f481316c6d75cc79 Signed-off-by: Yilun Lin <yllin@google.com> Reviewed-on: https://chromium-review.googlesource.com/1215444 Commit-Ready: Yilun Lin <yllin@chromium.org> Tested-by: Yilun Lin <yllin@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1230986 Reviewed-by: Martin Roth <martinroth@chromium.org> Commit-Queue: Martin Roth <martinroth@chromium.org> Tested-by: Martin Roth <martinroth@chromium.org>
* type: Rename vec3_t to floatv3_t.Yilun Lin2018-09-185-19/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Naming of many vector types and matrix types are not clear enough. For example, we have: vector_3_t, which is a vector of three int. vec3_t, which is a vector of three float. size4_t, which is a vector of four size_t. mat33_t, which is a 3x3 matrix of float. matrix_3x3_t, which is a 3x3 matrix of fixed point. Besides, we have types like int8_t, uint16_t types. To clearly distinguished types, the CL propose to, For vector types, naming should be `$type + 'v' + $num + '_t'`: vector_3_t becomes intv3_t vec3_t becomes floatv3_t vector 4 of uint16_t becomes uint16v4_t (which doesn't exist yet) For matrix types, naming should be `mat$N$N_` + $type + '_t', where $N is the matrix size: matrix_3x3_t becomes mat33_fp_t # fp: fixed point mat33_t becomes mat33_float_t TEST=make buildall -j BUG=b:114662791 Change-Id: I8cac6a7c0abe3d462326291b76b1ed44ce6c9a9c Signed-off-by: Yilun Lin <yllin@google.com> Reviewed-on: https://chromium-review.googlesource.com/1215443 Commit-Ready: Yilun Lin <yllin@chromium.org> Tested-by: Yilun Lin <yllin@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1230985 Reviewed-by: Martin Roth <martinroth@chromium.org> Commit-Queue: Martin Roth <martinroth@chromium.org> Tested-by: Martin Roth <martinroth@chromium.org>
* type: Rename vector_3_t to intv3_t.Yilun Lin2018-09-1827-59/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Naming of many vector types and matrix types are not clear enough. For example, we have: vector_3_t, which is a vector of three int. vec3_t, which is a vector of three float. size4_t, which is a vector of four size_t. mat33_t, which is a 3x3 matrix of float. matrix_3x3_t, which is a 3x3 matrix of fixed point. Besides, we have types like int8_t, uint16_t types. To clearly distinguished types, the CL propose to, For vector types, naming should be `$type + 'v' + $num + '_t'`: vector_3_t becomes intv3_t vec3_t becomes floatv3_t vector 4 of uint16_t becomes uint16v4_t (which doesn't exist yet) For matrix types, naming should be `mat$N$N_` + $type + '_t', where $N is the matrix size: matrix_3x3_t becomes mat33_fp_t # fp: fixed point mat33_t becomes mat33_float_t TEST=make buildall -j BUG=b:114662791 Change-Id: I865aa3ecbab6cb97f8585a081a679adf00febe1d Signed-off-by: Yilun Lin <yllin@google.com> Reviewed-on: https://chromium-review.googlesource.com/1215442 Commit-Ready: Yilun Lin <yllin@chromium.org> Tested-by: Yilun Lin <yllin@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1230984 Reviewed-by: Martin Roth <martinroth@chromium.org> Commit-Queue: Martin Roth <martinroth@chromium.org> Tested-by: Martin Roth <martinroth@chromium.org>
* servo_updater: more informative error on failNick Sanders2018-09-181-1/+2
| | | | | | | | | | | | | | | | | | 'Can't detect updater version' is replaced with an error specifying the failed regex string. BRANCH=None BUG=None TEST=None Change-Id: Ia3a52ee27e31d0b4aab0d8f04d5cf5f346498c37 Signed-off-by: Nick Sanders <nsanders@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1213556 Reviewed-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1230983 Reviewed-by: Martin Roth <martinroth@chromium.org> Commit-Queue: Martin Roth <martinroth@chromium.org> Tested-by: Martin Roth <martinroth@chromium.org>
* usb-pd: disconnect USB SS MUX when S5 or lowerJett Rink2018-09-182-41/+85
| | | | | | | | | | | | | | | | | | | | | | | Especially for SS MUX that have redrivers in them, we should disable the MUX while the chipset is off because the data line will not be used. This give decent power savings for redriver MUXs (e.g. PS8751) BRANCH=none BUG=b:112136208,b:111196155 TEST=On Phaser the 3300_pd_a drops from 92mW to 32 mW when the charger is plugged into C1 and the SoC is in S5. The rail also says at 32mW after removing and plugging the power back in while the SoC is in S5. Also ensured that power is low upon first insertion and AP does not come on automatically. Change-Id: I0601fbb506ad3eff902cf6562a6408292ef70e3a Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1185485 Reviewed-by: Justin TerAvest <teravest@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1230982 Reviewed-by: Martin Roth <martinroth@chromium.org> Commit-Queue: Martin Roth <martinroth@chromium.org> Tested-by: Martin Roth <martinroth@chromium.org>
* power: add chipset_in_or_transitioning_to_stateJett Rink2018-09-182-0/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | We need a method that we can call from the chipset notify hooks that can clearly distinguish which state you are about to be in. This is made evident by the child CL for putting a MUX into low power mode in S5. Without this method, we have to put chipset state into the PD task variable and use that instead (since chipset_in_state won't work because we are in the S3S5 state) BRANCH=none BUG=b:112136208,b:111196155,chromium:736508 TEST=On Phaser the 3300_pd_a drops from 92mW to 32 mW when the charger is plugged into C1 and the SoC is in S5. The rail also says at 32mW after removing and plugging the power back in while the SoC is in S5. Also ensured that power is low upon first insertion and AP does not come on automatically. Change-Id: I93cce2aa319c9689efce222919e5389471001a00 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1211368 Reviewed-by: Justin TerAvest <teravest@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1230981 Reviewed-by: Martin Roth <martinroth@chromium.org> Commit-Queue: Martin Roth <martinroth@chromium.org> Tested-by: Martin Roth <martinroth@chromium.org>
* keyboard: Ignore refresh button at bootDaisuke Nojiri2018-09-183-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | Any buttons except esc, left-shift, and down-arrow are considered as 'other key' and can cancel recovery mode entry if it's pressed at boot. On some chromebooks (e.g. Grunt, Nami), the refresh key is not scanned early enough (i.e. before the power button is released). Thus, the refresh key unintentionally cancels recovery mode entry. This change makes the EC ignore the refresh key at boot. This is already done for Grunt using CONFIG_KEYBOARD_IGNORE_REFRESH_BOOT_KEY. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b:114134666 BRANCH=none TEST=Put Akali in recovery mode without holding power button long. Change-Id: I57d7cb8fb320a4960125cd96d4d3ae84687a74df Reviewed-on: https://chromium-review.googlesource.com/1208229 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1230980 Reviewed-by: Martin Roth <martinroth@chromium.org> Commit-Queue: Martin Roth <martinroth@chromium.org> Tested-by: Martin Roth <martinroth@chromium.org>
* ss-mux: update semantics for TCPC/MUX only used as MUXJett Rink2018-09-1818-176/+181
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This converts the compile time option of CONFIG_USB_PD_TCPM_TCPCI_MUX_ONLY into a runtime option to better support draggon egg designs and reduce CONFIG complexity in general. Introduce new mux_read/write to read from tcpc_config_t or mux driver depending on new flag setting. Audited all mux drivers for any use of tcpc_read/write and updated to mux_read/write. BRANCH=none BUG=b:110937880 TEST=On Bip with CL stack: Verified by connecting DP monitor at boot; Verified plug / unplug of DP cable works; Change-Id: I968893b886ff0ccc4074beae5ec42973814ae77c Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1200062 Commit-Ready: Gaggery Tsai <gaggery.tsai@intel.corp-partner.google.com> Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1230979 Reviewed-by: Martin Roth <martinroth@chromium.org> Commit-Queue: Martin Roth <martinroth@chromium.org> Tested-by: Martin Roth <martinroth@chromium.org>
* hwtimer: Tidy up and clarify some hw_clock commentsSimon Glass2018-09-181-3/+20
| | | | | | | | | | | | | | | | | From what I can tell the counter has to tick over at the rate of 1MHz. Update the comments to make that clear. BUG=chromium:876737 BRANCH=none TEST= make buildall -j50 Change-Id: Ib04731c10a68c544973b810cf70ce9ffba556b89 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1185230 Reviewed-on: https://chromium-review.googlesource.com/1230978 Reviewed-by: Martin Roth <martinroth@chromium.org> Commit-Queue: Martin Roth <martinroth@chromium.org> Tested-by: Martin Roth <martinroth@chromium.org>
* Add CONFIG_GPIO_INIT_POWER_ON_DELAY_MSEdward Hill2018-09-185-3/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On power on, H1 releases the EC from reset but then quickly asserts and releases the reset a second time (so that the EC comes out of reset the second time after the SPI buffers have been configured by H1). Add a delay so the EC can wait for this second reset before configuring GPIO outputs, to avoid extra output toggles. Unfortunate the timer is not set up by the time gpio_pre_init() is called, so we add a new __hw_early_init_hwtimer() function to set it up so that mdelay() worked. Without that, mdelay() hangs. BUG=b:72132384 BRANCH=none TEST=GPIO_OUT_HIGH has a single rising edge after power on (before it would rise-fall-rise) Check that mdelay(10) delays for about 10ms (actually perhaps a little more using a scope line on KB_BL_EN Change-Id: Iadc96fceb190e43ac0758f291f22e03aef81c379 Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/879353 Commit-Ready: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1230977 Reviewed-by: Martin Roth <martinroth@chromium.org> Commit-Queue: Martin Roth <martinroth@chromium.org> Tested-by: Martin Roth <martinroth@chromium.org>
* cbi: fail set command early if WP is assertedJett Rink2018-09-181-5/+12
| | | | | | | | | | | | | | | | | | | | We are changing the in-memory version of CBI but cannot write it out to the EEPROM. This causes weird behavior when reading the CBI setting out again because it does not match the EEPROM values BRANCH=none BUG=b:113577856 TEST=Values aren't written to CBI in-memory when WP is asserted. Change-Id: Ie74fd3e47b3fabe6436e2787931b7238a112ec94 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1196846 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1230976 Reviewed-by: Martin Roth <martinroth@chromium.org> Commit-Queue: Martin Roth <martinroth@chromium.org> Tested-by: Martin Roth <martinroth@chromium.org>
* tablet-mode: add disable functionJett Rink2018-09-182-0/+26
| | | | | | | | | | | | | | | | | | | | For clamshell SKUs, we do not want to ever enable tablet mode. Since the firmware is shared between convertibles and clamshells, we need to compile in the tablet mode switch support but have a way to disable it at run-time BRANCH=none BUG=b:113837268 TEST=verify that a clamshell SKU does not go into tablet mode when a free magnet gets close to the sensor (with CL stack) Change-Id: Icc0f72253014f05598d658601eb8437bfe0ff488 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1204451 Reviewed-on: https://chromium-review.googlesource.com/1230975 Reviewed-by: Martin Roth <martinroth@chromium.org> Commit-Queue: Martin Roth <martinroth@chromium.org> Tested-by: Martin Roth <martinroth@chromium.org>
* npcx: WoV: enhance the WoV driver and fix bugsCHLin2018-09-185-157/+401
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Firmware bugs fix: ---------------------------------------------------------------------- 1. wov mode change is malfunctional. 2. wov_set_mic_source set in VAD_0.VAD_INSEL field 0x3 when requested wov_mic_source is WOV_SRC_STEREO. 3. wov_set_mic_source doesn't disable I2S channel 1 when using only left or right channel. 4. wov_start/stop_ram_capture is called when needed by the driver, it is used in wov_set_mode. 5. Never activate Automatic wake-up enabled. VAD_0.VAD_ADC_WAKEUP remain '0' forever. 6. Set DMIC clock signal output to use fast transitions. (set DEVALTE.DMCLK_FAST to be '1'). 7. for VAD and RAM modes, DMIC clock setting should be 750 KHz. 8. for I2S mode (and RAM and I2S mode), DMIC clock should be 3 MHz. 9. fix issue "WoV driver may cause unsynchronized data in the I2S output" 10. fMUL2 clock tuning to LFCLK reference remain enabled when FMUL2 is enabled. 11. core-FIFO status bits in WOV_STATUS register are cleared when FIFO is reset. 12. i2S-FIFO status bits in WOV_STATUS register are cleared when FIFO is reset. 13. reset I2S FIFO when FIFO is underrun. 14. increase delay to 1msec when resets the FIFOs. 15. set MIC source prior start capturing data. 16. fix issue "enables ADC path in VAD mode when it isn't needed" 17. Increase delay in all places from 10Usec to 100Usec Firmware enhancement: ---------------------------------------------------------------------- 1. Add support for DMIC clock rate of 750 KHz and 1.2 MHz. 2. Add console command to enable/disable fmul2 tunning. > wov fmul2 <enable|disable> 3. Originally, the console command "wov cfgmod ram" will tie the function wov_set_mode(WOV_MODE_RAM) and start RAM capture together. In the CL, we split it into two console commands: > wov cfgmod ram > wov capram 4. Add APIs to set DMIC clk rate for different mode (VAD/RAM/I2S) and thier related console commands. > cfgdckV <0.75|1.0|1.2|2.4|3.0> > cfgdckR <0.75|1.0|1.2|2.4|3.0> > cfgdckI <0.75|1.0|1.2|2.4|3.0> This change allows to modify setting (ex: fmul2 tunning on/off) after the wov mode is set to RAM and before the voice capture to RAM starts. BRANCH=none BUG=b:74600211, b:74617334, b:72213375 TEST=No build errors for make buildall. TEST=Test bugs described above are fixed. TEST=Test enhancement described above is well functional. Change-Id: Id97b51fbd3e6e495d48aedf000a427538d91adf7 Signed-off-by: Dror Goldstein <dror.goldstein@nuvoton.com> Signed-off-by: Simon Liang <CMLiang@nuvoton.com> Signed-off-by: CHLin <CHLIN56@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/942286 Commit-Ready: CH Lin <chlin56@nuvoton.corp-partner.google.com> Tested-by: CH Lin <chlin56@nuvoton.corp-partner.google.com> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1230974 Reviewed-by: Martin Roth <martinroth@chromium.org> Commit-Queue: Martin Roth <martinroth@chromium.org> Tested-by: Martin Roth <martinroth@chromium.org>
* npcx: Change sleep in flash_wait_ready to 10usecFurquan Shaikh2018-09-171-15/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | flash_wait_ready had a sleep of 1 msec to check for busy bit status. This is too long of a wait for flash chip operation to complete and hence adds unnecessary delay during flash write. Changing the delay to 10usec helps cut the flash write time by 50%. This change reduces the delay to check busy bit to 10usec and also organizes the code slightly differently to use timestamp_expired() instead of decrementing timeout and checking it against 0. BUG=b:113530328 BRANCH=nocturne,grunt TEST=Verified that EC SW sync time is down to 3.4 seconds with this change. Change-Id: I5796ac3c493031c9623a9e5171ce9c5a7087089e Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1213553 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> (cherry picked from commit bd34ba0abea5246d47571eb12416b07b68b3c692) Reviewed-on: https://chromium-review.googlesource.com/1229134 Reviewed-by: Martin Roth <martinroth@chromium.org> Commit-Queue: Martin Roth <martinroth@chromium.org> Tested-by: Martin Roth <martinroth@chromium.org>
* ppc: Increase deglitch time on SN5S330Jonathan Brandmeyer2018-09-142-0/+28
| | | | | | | | | | | | | | | | | | | | | The default deglitch time is short enough to trip the current limit with some commercially available USB-C -> HDMI adapters. Increase the deglitch timeout to improve compatibility with those adapters. BUG=b:113777138, b:113365815 BRANCH=none TEST=Insert 7 different USB-C to HDMI adapters, including both single-function and multifunction devices, and observe that a Careena clamshell will extend the screen to include the attached monitor on both USB-C ports 0 and 1. Brands tested include SIIG, StarTech, Amazon basics, iogear, Apple, and an unlabeled device. Change-Id: I403e4a65e90c85bdaa8078230751d611d04c9c67 Signed-off-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1225354 Reviewed-by: Jett Rink <jettrink@chromium.org> (cherry picked from commit 6b72a548f7a0999a43259426432132295635624b) Reviewed-on: https://chromium-review.googlesource.com/1227270
* tcpm: add higher priority tasks to handle TCPC intJett Rink2018-09-102-0/+61
| | | | | | | | | | | | | | | | | | | See go/usb-pd-slow-response-time for more information BRANCH=none BUG=b:112088135 TEST=CL stack on fleex and bobba consistently meet PD timing spec Also tested that PD firmare upgrade still works (uses PD suspend) on phaser. Change-Id: If789e79dcb9b69bc7ab5cb729189ca7b651b3a46 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1185728 (cherry picked from commit 7fdbe282d79bcb23f9507b3a128998e44285b451) Reviewed-on: https://chromium-review.googlesource.com/1215450 Reviewed-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org> Tested-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org>
* tcpm: add TCPC RX circular buffer in ECJett Rink2018-09-1020-108/+252
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The alert line for TCPC will stay asserted as long as there are RX messages for the TCPM (i.e. EC) to pull from the TCPC. We should clear all of the RX messages we know about during a single alert handling session. This CL can stand on its own, but it is a part of a CL stack that will tighten the critical section of time between received messages from the TCPC and sending follow up message out through the TCPC. See go/usb-pd-slow-response-time for more details. BRANCH=none BUG=b:112088135,b:112344286,b:111909282,b:112848644,b:113124761 BUG=b:113057273,b:112825261 TEST=Reduces reset issue in most cases for phaser, bobba. Does not seem to adversely affect state machine negotiation. Full CL stack consistently sends a REQUEST at 18ms after a SRC_CAP GoodCRC, which is well below the 24 ms threshold we need to be under for USB PD spec compliance. Also testing pd_suspend scenario manually and EC was responsive after port 1 suspend because of "bad behavior" Change-Id: I1654b46400e9881f2927a5f6d6ace589edd182de Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1185727 (cherry picked from commit e8070b44b088e99e38ec741ed8091c7e4a033bef) Reviewed-on: https://chromium-review.googlesource.com/1215451 Reviewed-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org> Tested-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org>
* grunt: Use higher priority TCPC interrupt tasks.Jonathan Brandmeyer2018-09-1010-68/+35
| | | | | | | | | | | | | | | | | | | | See also go/usb-pd-slow-response-time. Lift tcpc_alert_event interrupt handler to baseboard.c to reduce duplication. BUG=b:112848644, b:111909282 BRANCH=none TEST=Observe response time after SrcCap to Sink Request is 15ms on Careena and Grunt hardware after forcing a sysjump. Repeat test on Careena Port 0 with the DB disconnected (containing Port 1), also 15ms. Change-Id: I501bd86d84ba84eea0a705731e59e2431fc9a2ac Signed-off-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1194669 Commit-Ready: Jett Rink <jettrink@chromium.org> Tested-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> (cherry picked from commit a530eb162a6aab5db3dee940ba2718e5a1924f8a) Reviewed-on: https://chromium-review.googlesource.com/1215452
* Liara: Add supported batteriesJonathan Brandmeyer2018-09-063-6/+79
| | | | | | | | | | | | | | | | | | | These are two of the three batteries for Liara. Retain the Grunt reference design battery for testing purposes only. BUG=b:113823864 TEST=buildall BRANCH=none Change-Id: Ibfdfa08298ec142504b24477746ebb87aebc913c Signed-off-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1204696 Reviewed-by: Jett Rink <jettrink@chromium.org> (cherry picked from commit 0a61685bef7501b5028c8a3b5e4d7abfe05791e2) Reviewed-on: https://chromium-review.googlesource.com/1211366 Reviewed-by: Martin Roth <martinroth@chromium.org> Commit-Queue: Martin Roth <martinroth@chromium.org> Tested-by: Martin Roth <martinroth@chromium.org>
* npcx: Decide erase size based on ro/rw region sizeFurquan Shaikh2018-09-065-10/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change updates the erase operation in npcx chip to use 64k/32k/4k block erase depending upon the alignment of CONFIG_RO_SIZE. This helps reduce the EC SW sync time from ~9.5 seconds to ~5.4 seconds on NPCX7. Ideally, we would want to check the offset and size of region to be erased dynamically and decide which erase operation to use. However, common flash code checks against CONFIG_FLASH_ERASE_SIZE to ensure that the area being erased is aligned to that size. Thus, even if we add dynamic erase at chip level, it isn't going to help. This change also updates CONFIG_FLASH_BANK_SIZE to be the same as CONFIG_FLASH_ERASE_SIZE since it is checked by common code. I am honestly not sure why the CONFIG_FLASH_BANK_SIZE is tightly coupled with CONFIG_FLASH_ERASE_SIZE. But, based on the usage, it seems to be a safe change. On the other hand, changing CONFIG_FLASH_BANK_SIZE helps reduce the write time as well, thus overall helping with the EC SW Sync time. Please see go/cros-npcx7-ec-sw-sync for more details. BUG=b:113530328 BRANCH=nocturne TEST=Verified that EC SW sync time goes down from 9.5 seconds to 5.4 seconds. Change-Id: I5908eeeb3e4207a27abe804db8eb9d39ef9d73c4 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1195598 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> (cherry picked from commit 76e1d976246d90918e5f18d12d1df194b39cd90c) Reviewed-on: https://chromium-review.googlesource.com/1211365 Reviewed-by: Martin Roth <martinroth@chromium.org> Commit-Queue: Martin Roth <martinroth@chromium.org> Tested-by: Martin Roth <martinroth@chromium.org>
* grunt: Enable CONFIG_I2C_BUS_MAY_BE_UNPOWEREDEdward Hill2018-09-062-1/+11
| | | | | | | | | | | | | | | | | | | | | Enable CONFIG_I2C_BUS_MAY_BE_UNPOWERED option to avoid attempting to unwedge the I2C bus when sensor power is off in S5 (and G3). This will avoid the unwedge causing a watchdog reset. BUG=b:112553833 BRANCH=none TEST=Verify that board_is_i2c_port_powered() is called. Change-Id: I4e37ab17cba0d947bc8840b507a191541894d36c Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1186067 Commit-Ready: Jonathan Brandmeyer <jbrandmeyer@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> (cherry picked from commit fc2140871e7d2d81b89a7e7043bd361f89189e99) Reviewed-on: https://chromium-review.googlesource.com/1211364 Reviewed-by: Martin Roth <martinroth@chromium.org> Commit-Queue: Martin Roth <martinroth@chromium.org> Tested-by: Martin Roth <martinroth@chromium.org>
* driver: accel: Prevent ODR from crashing the ECGwendal Grignou2018-09-063-32/+21
| | | | | | | | | | | | | | | | | | | | | | | For accelerometers which are interrupt driven, setting ODR too high may exhaust the EC and trigger the watchdog timer. Use config variable to verify the ODR requested is not too big. Return an error when setting unsupported parameters. BUG=b:112672627 BRANCH=nocturne,eve TEST=Without this change, ectool motionsense odr 0 500000 crashes the EC Now, it returns EC result 3 (INVALID_PARAM) Change-Id: I64a4e522dcad450d619a7fc48a1330479f1cf81f Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1200068 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> (cherry picked from commit f932679e653a4b62fbe1fb28fba8a20d7a7e38c2) Reviewed-on: https://chromium-review.googlesource.com/1211363 Reviewed-by: Martin Roth <martinroth@chromium.org> Commit-Queue: Martin Roth <martinroth@chromium.org> Tested-by: Martin Roth <martinroth@chromium.org>
* chip/npcx: Tidy up comments for init_hw_timer()Simon Glass2018-09-062-2/+9
| | | | | | | | | | | | | | | | | | | The comments suggest that this function only operates with ITIM16 timers but it seems to support ITIM32 as well. Also it allows selecting the clock source. Update the comments, hopefully making them correct. BUG=chromium:876737 BRANCH=none TEST= make buildall -j50 Change-Id: Ic4ec2457cde2de55d51371f781d49bae80365989 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1185225 (cherry picked from commit e192f71aed932b88f3c42df4653a430a2e8ba10e) Reviewed-on: https://chromium-review.googlesource.com/1211362 Reviewed-by: Martin Roth <martinroth@chromium.org> Commit-Queue: Martin Roth <martinroth@chromium.org> Tested-by: Martin Roth <martinroth@chromium.org>
* flash_ec: Look for npcx_monitor.bin in the same dir as ec.binRaul E Rangel2018-09-061-0/+10
| | | | | | | | | | | | | | | | | | | | | crrev.com/1194646 makes it so chromeos-ec installs the monitor.bin as part of the build. The script just needs to be updated to use it. This will allow using flash_ec for downloaded firmware or firmware built using emerge chromeos-ec. BUG=b:113288489 BRANCH=none TEST=emerge-grunt chromeos-ec && flash_ec --board=grunt Change-Id: Ie92b75a750dbf8ce4e01eafec7a01479915b1270 Signed-off-by: Raul E Rangel <rrangel@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1194354 Reviewed-by: Jett Rink <jettrink@chromium.org> (cherry picked from commit 16839242bf1309feabbdc4ba52d4b19ede8dbd0a) Reviewed-on: https://chromium-review.googlesource.com/1211342 Reviewed-by: Martin Roth <martinroth@chromium.org> Commit-Queue: Martin Roth <martinroth@chromium.org> Tested-by: Martin Roth <martinroth@chromium.org>
* whiskers: Drive DETECT_PATH_DISABLE_L low, pull-up on BACKLIGHT_ENNicolas Boichat2018-09-031-1/+2
| | | | | | | | | | | | | | BRANCH=nocturne BUG=b:111191396 BUG=b:109853051 TEST=make BOARD=whiskers -j TEST=Without external pull-up, backlight still works TEST=Check power consumption lower than without patch Change-Id: I4be8726672936ccbc45b262d94085de320c35e54 Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1163234 Reviewed-by: Wei-Han Chen <stimim@chromium.org>
* iteflash : fix program page addressDonald Huang2018-09-031-7/+8
| | | | | | | | | | | | | | | | | | | | | The original program only assign the eflash high byte address. Filled the eflash address for high byte, mid byte , low byte. BUG=none BRANCH=none TEST=1.make -j BOARD=reef_it8320 2.sudo servod -b reef & 3.~/trunk/src/platform/ec/util/flash_ec --board=reef_it8320 It also test ok with different block size as below. Change-Id: I7c27836b667b078e88e0a12a3ea79c97f3de38e3 Signed-off-by: Donald Huang <donald.huang@ite.com.tw> Reviewed-on: https://chromium-review.googlesource.com/1195309 Commit-Ready: Donald Huang <cguwinds@gmail.com> Tested-by: Donald Huang <cguwinds@gmail.com> Tested-by: Matthew Blecker <matthewb@chromium.org> Reviewed-by: Matthew Blecker <matthewb@chromium.org>
* whiskers: Disable keyboard scanning and touchpad in tablet modeNicolas Boichat2018-09-033-30/+105
| | | | | | | | | | | | | | | | | | | | When in tablet mode, disable keyboard scanning and touchpad. Refactor touchpad_*.c power management to take both into account (there is some duplicated code here, that we may want to merge in the future). This will also prevent magic keyboard from working, but we are ok with this, at least for now. BRANCH=none BUG=b:73133611 TEST=In tablet mode, keyboard scanning and touchpad are both disabled. Change-Id: I51b7c50b90cca9b9f574c5c611daa89fe8a480bb Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1180639 Tested-by: Wei-Han Chen <stimim@chromium.org> Reviewed-by: Wei-Han Chen <stimim@chromium.org>
* meep: Add Power LED behaviorZick Wei2018-09-023-10/+44
| | | | | | | | | | | | | | | | | | | | | | Add Power LED behavior to meet spec: System is ON(S0):LED solid ON White. System is Suspend/S0ix: LED blink White(1 sec on, 1 sec off). System is OFF: LED OFF. BUG=none BRANCH=none TEST=manual Check Power LED solid on White when system is ON(S0). Check Power LED blink White(1 sec on, 1 sec off) when system is Suspend/S0ix. Check Power LED off when system is OFF. Change-Id: I0e53a51446735dee0296e9f2c5eb3ceb84313720 Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1196642 Commit-Ready: Devin Lu <Devin.Lu@quantatw.com> Tested-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-by: Diana Z <dzigterman@chromium.org>
* rammus: Fix the dut keeps reboot due to the EC assert.Zhuohao Lee2018-09-021-6/+5
| | | | | | | | | | | | | | | | | | The dut keeps reboot due to the EC Assert. The problem is caused by the changing of I2C_PORT_TCPC1 to NPCX_I2C_PORT0_0 (cl:1189663) and the NPCX_I2C_PORT0_1 is removed from the i2c_ports[]. As a result, when someone uses NPCX_I2C_PORT0_1, the assert popped out. This patch changes the 'name' and 'port' of i2c_ports[] to avoid this problem. BUG=b:113715116 BRANCH=master TEST=dut boot successfully Change-Id: I90f7a1dcdec3ff2719f34786e9e57411b703562b Signed-off-by: Zhuohao Lee <zhuohao@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1200662 Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* cheza: Enable floating point unitWai-Hong Tam2018-08-311-0/+1
| | | | | | | | | | | | | Speed-up some math operations. BRANCH=none BUG=b:74395451 TEST=Flashed the image. It booted properly. Change-Id: Ia3cdb31535889840b3a2fe2de14ba1338c839285 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/1200071 Reviewed-by: Alexandru M Stan <amstan@chromium.org>
* cheza: Enable some button featuresWai-Hong Tam2018-08-311-0/+3
| | | | | | | | | | | | | | | | | | | | | | | Enable the following button features: * CONFIG_BUTTON_TRIGGERED_RECOVERY: Use volume buttons to trigger recovery mode during reboot. * CONFIG_EMULATED_SYSRQ: Send sysrq events when pressing some volume button sequences. * CONFIG_CMD_BUTTON: Console commands to emulate the volume buttons. BRANCH=none BUG=b:74395451 TEST=Holding power, volume_up, and volume_down buttons to reboot. Checked the hostevent mask 0x4000 set. TEST=Holding volume_up and volume_down to trigger debug mode. Pressing some volume_up and volume_down sequences to send sysrq. TEST=Typing "button vup" and "button vdown" console commands. Change-Id: I7000012d85faf71a022cc8056bb7799c29f9d0bf Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/1200070 Reviewed-by: Alexandru M Stan <amstan@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* rammus: decrease UART bufferJett Rink2018-08-311-1/+1
| | | | | | | | | | | | | | | We are running out of RAM space for rammus and the UART buffer does not need to be 4KB. 1KB is almost enough, so 2KB should be plenty. In the long term chromium:826592 will allow us to use even smaller buffers. BRANCH=none BUG=chromium:826592,b:112088135 TEST=builds and links with child CL stack Change-Id: I31bee3a8c5093e05dc5f27bcc99b8b19a8f022d5 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1200262 Reviewed-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org>
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