| Commit message (Collapse) | Author | Age | Files | Lines |
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When kodama's bitbang driver sometime fails, will reset request voltage and
current, which may trigger charger EOC event and terminate charging. On the
other hand, charger has EOC accuracy issue.
So mt6370's VOREG always be set as 4400mV and minimum value of mt6370's
ICHG is limited as 500mA. Set IEOC as 150mA.
BUG=b:145474380
TEST=Verified on both SMP battery and Celxpert battery, all can be charged
to full.
BRANCH=kukui
Change-Id: Ie1427448e22261d33cb83f4cc6c30e428b97292c
Signed-off-by: Xiong Huang <xiong.huang@bitland.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1943636
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
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PD_MAX_VOLTAGE/PD_MAX_CURRENT/PD_MAX_POWER/PD_OPERATING_POWER/"
This reverts commit 89197aceaf26ccf33b143c7a5e95eb07ba4c7464.
Reason for revert: It is not necessary to change the PD setting, so revert it.
Original change's description:
> hatch: refactor PD_MAX_VOLTAGE/PD_MAX_CURRENT/PD_MAX_POWER/PD_OPERATING_POWER/
>
> 1) The four config is determined by board, move it into board.h.
> 2) Update the config variables above for stryke.
>
> BUG=b:145257655
> BRANCH=hatch
> TEST=make buildall
>
> Change-Id: I1dd6a4f2a78b5196006821bc5d2686f68206c2e1
> Signed-off-by: Josh Tsai <josh_tsai@compal.corp-partner.google.com>
> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1950270
> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Bug: b:145257655
Change-Id: Ib2cb2db51b15f0974d2b22ef8e0e3e6d4e6b60d6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1958299
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Josh Tsai <josh_tsai@compal.corp-partner.google.com>
Commit-Queue: Josh Tsai <josh_tsai@compal.corp-partner.google.com>
Tested-by: Josh Tsai <josh_tsai@compal.corp-partner.google.com>
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This was changed in PD 2.0 years ago (via ECN authored by our own David
Schneider), but our codebase still refers to BIT 27 of the Fixed PDO as
"Externally powered" instead of "Unconstrained Power".
This will search and replace all instances of "Externally powered" when it
refers to BIT 27, as well as function names, other internal representations
of that property, strings, and comments.
seds:
s/PD_FLAGS_PARTNER_EXTPOWER/PD_FLAGS_PARTNER_UNCONSTR/g
s/partner_extpower/partner_unconstrained/g
s/externally powered/unconstrained/g
Some others too.
Signed-off-by: Benson Leung <bleung@chromium.org>
BUG=chromium:1030990
TEST=Codebase builds clean. No functional change, except for the property shows
up in ectool as "Unconstrained power" now.
Change-Id: I5ececa03f29eb31057be3d0ad5311117093bc6da
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1956147
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Benson Leung <bleung@google.com>
Tested-by: Benson Leung <bleung@google.com>
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When translating RGB to XYZ, don't add in the offset value for
LUX.
BUG=b:144319657
BRANCH=NONE
TEST="make -j BOARD=kohaku", flash EC on kohaku, place
kohaku in a dark location and verify it reads 0.
Change-Id: I4c6dcc01999ca5e4390f97c31e50b27075ed9ce4
Signed-off-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1959458
Tested-by: Mengqi Guo <mqg@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
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Update board files for kohaku to use new coefficients for als and
rgb sensor.
BUG=b:145701281
BRANCH=master
TEST='make -j BOARD=kohaku' in EC repo, verified builds succeed.
Verify on the device that ALS readings are valid.
Cq-Depend: chromium:1879189
Change-Id: I01d9ab3c50f352bc45aaf9bba7eb7dd56cc07faa
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1960921
Tested-by: Nick Vaccaro <nvaccaro@google.com>
Commit-Queue: Nick Vaccaro <nvaccaro@google.com>
Auto-Submit: Mengqi Guo <mqg@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
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A new irt scaling factor was added to the tcs3400 driver to further
improve the sensor CCT accuracy, requiring a structure definition to
change. This change fixes existing boards that use the tcs3400 to
use this new structure definition.
Boards modified include flapjack, hatch, kohaku, kukui, and stryke.
BUG=b:143246741
BRANCH=master
TEST=execute "make -j BOARD=<boardname>" for kukui, kohaku, flapjack,
and hatch and make sure they build without error.
Cq-Depend: chromium:1879188
Change-Id: Icad96877b5cd9966e927e4dd150335c988725f0c
Signed-off-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1879189
Tested-by: Mengqi Guo <mqg@chromium.org>
Reviewed-by: Mengqi Guo <mqg@chromium.org>
Reviewed-by: Scott Collyer <scollyer@chromium.org>
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This change adds a new scaling factor used in IR separation that
further improves sensor CCT accuracy. The following restructure of
calibration structure was required :
- renamed rgb_calibration_t struct to rgb_channel_calibration_t
- added new rgb_calibration_t structure definition to include
new irt scaling factor to the rgb calibration structure
BUG=b:143246741
BRANCH=master
TEST=none
Cq-Depend: chromium:1879189
Change-Id: Idb3325be828e8ed15747144670230963c369a461
Signed-off-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1879188
Tested-by: Mengqi Guo <mqg@chromium.org>
Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-by: Mengqi Guo <mqg@chromium.org>
Reviewed-by: Scott Collyer <scollyer@chromium.org>
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Current read_matrix() function didn't handle keyboard state change
during the scanning loop.
For example, consider keys J(c6r4), L(c9r4), H(c6r1) and F9(c9r1), and the
following sequence:
- User presses and holds J
- Key scan task reads col 6, got state[6] = 0x10 (J)
- User presses H+J+L, ghost key F9 is also "pressed" at this point.
- Key scan task reads col 9, got state[9] = 0x12 (L+F9)
- state[6] and state[9] has only one common bit, so it passes has_ghosting
check.
- EC thinks J+L+F9 clicked.
Implemented a simple heuristic to detect this case, and update
state[] array to something likely to be the state after the key press.
With this change, we will no longer distinguish J -> H+J+L and J->F9+J+L.
The latter used to be accepted but it'll be rejected by this change.
BUG=b:145405136
TEST=hold J and L, press H repeatedly, make sure F9 never triggered.
BRANCH=kukui,hatch
TEST=make run-kb_scan (uncomment kb_scan in test/build.mk).
TEST=The average wait_time is reduced about 100 usec on Nami:
1746 msec (old) v.s. 1636 msec (new).
Change-Id: Ia20d5a283639d291530e5983254f6163f5c3537f
Signed-off-by: Ting Shen <phoenixshen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1955105
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
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Correct batteery discharging parameter to follow datasheet.
BUG=b:145494158
BRANCH=octopus
TEST=make buildall
Change-Id: Ib5e134af912d99a27d5f2b55d206a7bee7f5f74c
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1958391
Reviewed-by: Diana Z <dzigterman@chromium.org>
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tcpci_nct38xx_set_cc() only sets the pull resistor on one CC line according
to polarity. This is correct when attached, but on disconnect we need to
set the pull resistor on both CC lines, since polarity is no longer known
(unless DRP toggle is enabled, since that will take care of setting both
CC lines to do the toggling).
This workaround for chromium:951681 can be removed once that bug is fixed
in the TCPCI common code.
BUG=b:146003980, chromium:951681
BRANCH=none
TEST=Charging works with both plug orientations with AP off
Change-Id: I1406263011a4c8d595be0d7093f2ab220690de3f
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1961305
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
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nct38xx was using tcpci_nct38xx_set_cc() but this uses selected_rp[]
which was never being set. Add tcpci_nct38xx_select_rp_value() to
set it correctly.
BUG=b:146003980
BRANCH=none
TEST=none
Change-Id: Iaf08b82c41e42f2db233681824b1a36c967fb628
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1960724
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
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It was originally thought the connect/disconnect would be
a good generic way to set/clear auto_discharge_disconnect
but it was not working reliably. Although the points that
we are calling to perform this enable/disable are close to
the connect/disconnect, there is more fine tuning required
to make this work.
BUG=b:144126745,chromium:951683
BRANCH=none
TEST=attach/disconnect charger with and without AP running
TEST=attach/disconnect device with AP running
Change-Id: Ib1418771aec6d0a52895972e4db6881b072c0c3d
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1960514
Reviewed-by: Edward Hill <ecgh@chromium.org>
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This brings initial support for the Nucleo-H743ZI
development board.
This configuration is similar to nocturne_fp, but without
fingerprint sensor support, without rollback secret
support, and with an adjusted console USART selection.
The included README.md shows some quick steps to
get a Nucleo-H743ZI up and running EC.
Note that the RSA key included is only for test builds.
It should not be used for any production builds.
BRANCH=none
BUG=none
TEST=make BOARD=nucleo-h743zi
make BOARD=nucleo-h743zi flash
minicom -D/dev/ttyACM0
Change-Id: Ibe4b19e51467831f53365a0a7f52bec3d854f806
Signed-off-by: Craig Hesling <hesling@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1952290
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Currently, the discharge minimum temperature is always checked when
determining if the system should shut down, even if the system is not
discharging. This change allows the system to run below the discharging
minimum temperature as long as AC is present.
BRANCH=octopus
BUG=b:145494158
TEST=loaded onto octopus unit, faked low battery temperature and
verified the system did shut down when discharging and did not with AC
Change-Id: I4f6549b04dc1e7b55e410d3ae4f67dc6126f9c7c
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1958853
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Add the configuration and support for the USB Type C power
delivery, at least enough for proto.
BRANCH=none
BUG=b:143256147
TEST=EC buildall, tests
Change-Id: I8b1c2f27b31ba163716d8a50b76ad967260ae2f2
Signed-off-by: Andrew McRae <amcrae@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1958250
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Andrew McRae <amcrae@chromium.org>
Commit-Queue: Andrew McRae <amcrae@chromium.org>
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As part of the new changes in CL:1949052 getting DP pin mode status
is removed hence adding back old CL:1646534 on TOT.
BUG=b:146006717
BRANCH=none
TEST=Manually tested on TGLRVP, able to see DP working
Change-Id: I09cee179ad64c1b7753ec87ce83a1d5dc54770cd
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1961150
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Add the spi slave function which is required to
communicate with the EC when the CPU is the ARM
processor.
BUG=none
BRANCH=none
TEST=Replaced board elm's EC with it83202 and
boot kernel and keyboard work.
Change-Id: I7ce3bb56450276997b58e84b1c6de3f8e45bb4b7
Signed-off-by: tim <tim2.lin@ite.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1918991
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Clone from CL:1693863
Added IT8801 io expandor (which include keyboard controller) and
the keyscan task.
BUG=none
BRANCH=none
TEST=make buildall
Change-Id: Ibd74f55e37e8c9bef1d1866b0e538dec37000d66
Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1943496
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
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Nothing reads this file anymore.
BUG=chromium:1025955
TEST=CQ passes
BRANCH=None
Change-Id: Id3002b9f28f2136b2e7fe28d0d023ee37103e843
Signed-off-by: Mike Frysinger <vapier@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1961306
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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Set correct fan maxima/minimum and initial speed for EVT.
To provent fan loudly after ec reset. Set lower initial speed to 10
percent.
BUG=none
BRANCH=hatch
TEST=make buildall
Change-Id: I468b82942ec2e5841ed35ced9baea296b35f620b
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1958390
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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Clone from CL:1928422
BUG=none
BRANCH=hatch
TEST=make buildall
Change-Id: I488ecaa317b2164d693c9acea2ed010da2e26e2b
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1958386
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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Clone from CL:1928421
BUG=none
BRANCH=hatch
TEST=make sure AP reset pass.
Change-Id: I98f8160c9d948a89e8f9a3fd0a3f85b6a7b95b82
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1958385
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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BUG=b:145959769
BRANCH=none
TEST=make buildall
TEST=press volume up/down buttons. Verify press/release events on EC
console, verify volume control shown on ChromeOS login screen.
Change-Id: I6f32de10275f2e2d78b508109a4676344215811c
Signed-off-by: Keith Short <keithshort@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1960917
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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The fingerprint drivers use CC_FP and is included in the build
when one of the CONFIG_FP_SENSOR_FPC???? is defined.
In interesting situations, you can pull in the fingerprint
driver without the FPSENSOR task.
This would yield an error because CC_FP was not defined.
BRANCH=none
BUG=none
TEST=make buildall -j
TEST=# Remove the FPSENSOR task from nocturne_fp ec.tasklist
make BOARD=nocturne_fp
Change-Id: Ie5d1e50f876b30d3a92d3acc1744a968b83b9a4b
Signed-off-by: Craig Hesling <hesling@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1952289
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
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This include is not needed and not available when
CONFIG_ROLLBACK_SECRET_SIZE is not defined.
BRANCH=none
BUG=none
TEST=make buildall -j
TEST=# undefine CONFIG_ROLLBACK_SECRET_SIZE in nocturne_fp board.h
make BOARD=nocturne_fp
# This will not compile without this fix
# With this fix, no compilation errors are output
Change-Id: I651f4e254189f34228f1aa2f2a2ff21808ab5d5c
Signed-off-by: Craig Hesling <hesling@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1952291
Reviewed-by: Jett Rink <jettrink@chromium.org>
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BRANCH=none
BUG=none
TEST=view in gitiles
Change-Id: Ib3d85c5fc4301b9db01d0bf288f2952f8553d14d
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1960928
Reviewed-by: Craig Hesling <hesling@chromium.org>
Commit-Queue: Craig Hesling <hesling@chromium.org>
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There is a board specific usb_pd_policy.c file that contains a lot of
code for handling DisplayPort Alternate mode, Google Firmware Update
Alternate mode, as well as some PD policy functions such as deciding to
Accept or Reject a data role swap or a power role swap. Several boards
simply copy/paste this code from project to project as a lot of this
functionality is not actually board specific.
This commit tries to refactor this by pulling the functions that are not
mainly board specific into common code. The functions are made
overridable such that boards that truly do require a different
implementation may do so.
Additionally, this consolidation changes the policy behaviour for some
boards, but they should be for the better. Some examples include that
data swaps are always allowed if we are a UFP (no system image
requirement), power swaps are allowed to become a sink if we are no
longer dual role (e.g. - in suspend), and DisplayPort Alternate Mode is
not entered if the AP is off.
In order to facilitate this refactor, a couple CONFIG_* options were
introduced:
- CONFIG_USB_PD_DP_HPD_GPIO
/* HPD is sent to the GPU from the EC via a GPIO */
- CONFIG_USB_PD_CUSTOM_VDO
/*
* Define this if a board needs custom SNK and/or SRC PDOs.
*
* The default SRC PDO is a fixed 5V/1.5A with PDO_FIXED_FLAGS indicating
* Dual-Role power, USB Communication Capable, and Dual-Role data.
*
* The default SNK PDOs are:
* - Fixed 5V/500mA with the same PDO_FIXED_FLAGS
* - Variable (non-battery) min 4.75V, max PD_MAX_VOLTAGE_MV,
* operational current PD_MAX_CURRENT_MA,
* - Battery min 4.75V, max PD_MAX_VOLTAGE_MV, operational power
* PD_OPERATING_POWER_MW
*/
BUG=chromium:1021724,b:141458448
BRANCH=<as many as we can that are still supported>
TEST=`make -j buildall`
TEST=Flash a kohaku, verify that DP Alt Mode still works with a variety
of DP peripherals
TEST=Repeat above with a nocturne
TEST=Repeat above with an atlas
Change-Id: I18fd7e22dc77fe1dc6c21c38cd7f1bc53cae86cb
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1949052
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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Hardware rework on Volteer, stuff ISH UART0 and I2C1 path.
BRANCH=none
BUG=b:145946347
TEST=Verified ISH console output from ISH UART0; sensor i2c access from
ISH I2C1 port.
Change-Id: I5cd20c38fa8f321c886091799c52555e796fd747
Signed-off-by: li feng <li1.feng@intel.com>
Signed-off-by: Leifu Zhao <leifu.zhao@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1959825
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
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When a port partner TrySrc's the DUT, stop sending SrcCap
message retries immediately.
BUG=chromium:1020760
BRANCH=none
TEST=make -j buildall
manual tests:
using total phase, I verified that SrcCap message retries
are not sent when the DUT get's TrySrc'ed.
Signed-off-by: Sam Hurst <shurst@google.com>
Change-Id: Ia71d863e151221d5ad7c291b7a76d64c0caa8b99
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1924783
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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In any case failing to talk to the PPC chip, e.g. a hardware bug or
a daughter-board not attached, returning a failure return code will
result a boot loop assertion failure.
Should prevent this case. This is the same behavior as other boards,
like octopus, grunt, etc.
BRANCH=None
BUG=b:145648750
TEST=Don't attach the daughter-board, unplug and plug the charger.
No assertion boot loop.
> [26.148463 USB MUX 1]
C0 st2 SNK_DISCONNECTED
[26.150189 Disabling all charging port]
[26.151815 ppc p1: Failed to set FUNC_SET3!]
[26.152277 Disabling p1 sink path failed.]
[26.157214 CL: p-1 s-1 i0 v0]
[26.180500 AC off]
[27.198359 Battery 99% (Display 0.0 %) / 44h:22 to empty, not
accepting current]
C0 st3 SNK_DISCONNECTED_DEBOUNCE
[30.896588 VBUS p0 1]
C0 st14 SRC_DISCONNECTED
[30.934551 VBUS p0 0]
C0 st3 SNK_DISCONNECTED_DEBOUNCE
[31.170306 VBUS p0 1]
[31.189848 USB MUX 0]
C0 st5 SNK_DISCOVERY
C0 RECV 51a1/5 [0]0801912c [1]0002d12c [2]0003c12c [3]0004b12c
[4]000640e1
C0 Req [1] 5000mV 3000mA
[31.283610 New charge port: p0]
[31.284181 ppc p1: Failed to set FUNC_SET3!]
[31.284585 p1: sink path disable failed.]
...
Change-Id: Ifa81eea0a7d2fc2f90b1a64dacce2a6802165b0a
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1954915
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
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The TCPC PS8805 firmware seems to old that:
* can't do DRP auto-toggle;
* can't be waked up from the low power mode.
It blocks delivering 5V to the USB device.
Before we enable the PD software sync to update the firmware,
tempoary disable these features so people can use the Type-C
ports.
BRANCH=None
BUG=b:145723652
TEST=Plugged an unpowered USB sink to port 0 and 1. The USB sink
was powered.
Change-Id: Ia83f30a4e4658a893b3b7e878a2b229556f3b981
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1955109
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
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The VBOB rail is for backup only. Verified the hardware that it works
without this rail. Should be OK to remove the control of it.
BRANCH=None
BUG=b:143616352
TEST=Verified AP power on and power off.
Change-Id: I9632d881b590482a07482e23aba88bc7ffec4521
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1955108
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
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The original check in the init hook (power_chipset_init) may cause
watchdog reset, as the init hook is earlier than the task execution
that we should not perform any long action, like waiting for a signal
in our case.
We should simply turn off the switchcap without any check.
In most of the common cases (except flashing EC/AP), the switchcap
should be off and the check is unnecessary.
BRANCH=None
BUG=b:145843686
TEST=Performed flashing EC and AP, EC watchdog reset not seen.
Change-Id: I36873e773800def7e3dfceaec28c294dee9a09c7
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1955107
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
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Add ADC5 which measure the rail PP868_S1C_S2C_S3C.
BRANCH=None
BUG=b:143616352
TEST=Checked the ADC values when AP on and off.
Change-Id: I8b33e199a9c7214d748c5435d9a77d0bf1fd7c15
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1954981
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
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cr50_rma_open can be run without servod. dut-control
cr50_uart_timestamp:off fails if the script isn't running through
servod. This change moves disabling timestamps, so it's only done on
servod.
BUG=none
BRANCH=none
TEST=run with and withoout servod
Change-Id: Icc80d021dd7cbad8ae3632625b32b30368e5a94c
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1960919
Reviewed-by: Evan Green <evgreen@chromium.org>
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The new ectool command 'ectool reboot_ap_on_g3' will reboot AP from
G3 state on initiation of DUT shutdown. Thus eliminating the dependency
of servo to trigger wake events when testing AP cold boot cycles.
BUG=b:129507479
BRANCH=None
TEST=Tested on hatch board.
From Kernel console, entered the below commands:
$ectool reboot_ap_on_g3
$shutdown -h now
Observed AP boots back to S0 upon G3.
Change-Id: Ie6fcbd2f00eb6c22ed498ab82dac53132dbbf4a3
Signed-off-by: Poornima Tom <poornima.tom@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1918993
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Jett Rink <jettrink@chromium.org>
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CONFIG_EC_FEATURE_BOARD_OVERRIDE is deprecated by CL:1951810.
Signed-off-by: dnojiri <dnojiri@chromium.org>
BUG=none
BRANCH=none
TEST=buildall
Change-Id: I2e8a66b47bb5a29184dae0d7ba56381f5b1f59e4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1960490
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org>
Tested-by: Daisuke Nojiri <dnojiri@chromium.org>
Auto-Submit: Daisuke Nojiri <dnojiri@chromium.org>
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GLaDOS and chell are out of space, so stop building these boards now.
Deleting the boards is problematic since the ec-utils ebuild still
expects the board directory to exist, but only builds the utils-host
target. In order to prevent that, the 'cros_ec' USE flag needs to be
removed from their bsp as well.
BUG=None
BRANCH=None
TEST=`make -j buildall`
TEST=`cros_workon --board chell start ec-utils && emerge-chell ec-utils`
Cq-Depend: chrome-internal:2296525, chrome-internal:2295865
Change-Id: I249bb2b3957d2f237a63207c91f0bd2e973d5dca
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1959962
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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Revert the change made by crrev.com/c/1940777 to where
hook_notify(HOOK_USB_PD_CONNECT) is called in
PD_STATE_SRC_DISCONNECTED_DEBOUNCE and PD_STATE_SNK_DISCONNECTED_DEBOUNCE.
For the source case, it needs to be before pd_set_power_supply_ready(),
because tcpci_tcpc_connect_state_change() needs to set
TCPC_REG_POWER_CTRL_AUTO_DISCHARGE_DISCONNECT before
ppc_vbus_source_enable() sends TCPC_REG_COMMAND_SRC_CTRL_HIGH to the
NCT3807 TCPC.
BUG=b:145095935
BRANCH=none
TEST=VBUS source enabled when sink device plugged into USB-C1
Change-Id: I9dc98b2deb5e8dde0cd2ae9267d7952967551e02
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1958572
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
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Both ports require setting the SOC internal mux.
BUG=b:143147353
BRANCH=none
TEST=USB3 device enumerates on C1
Change-Id: Iad64a4c361e95164dd3c1c4ac7ea3ce444f366f1
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1955147
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
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BUG=none
BRANCH=none
TEST=make buildall -j
Change-Id: I26eeba971cea3f470c7e54fa325e361a2a26b313
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1958413
Reviewed-by: Jett Rink <jettrink@chromium.org>
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BUG=none
BRANCH=none
TEST=make buildall -j
Change-Id: I8ff09ef662d4bb4f02749cb1c004541a44c8cad8
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1958412
Reviewed-by: Jett Rink <jettrink@chromium.org>
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BUG=none
BRANCH=none
TEST=verify TCPCI is still functional
Change-Id: Id5004076ecf8eb7d9bd2e4f12a23d612cc5a8e33
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1956439
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Bits 1-7 were getting clobbered when we updated Bit 0
BUG=none
BRANCH=none
TEST=verify tcpci still functions
Change-Id: Ida60a08aa9e250e1dfb640caff44efc75c8ca1a9
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1956438
Reviewed-by: Jett Rink <jettrink@chromium.org>
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BUG=none
BRANCH=none
TEST=make buildall -j
Change-Id: I93add5d4e3f633ad9ce799576407835b6d1e41e8
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1958410
Reviewed-by: Jett Rink <jettrink@chromium.org>
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Kodama needs to reconfigure i2c bus frequency at runtime.
Expose i2c_init_port so we can re-init i2c bus at board_rev_init().
BUG=b:143677811
TEST=verify sensor/battery works on kodama EVT and DVT
BRANCH=kukui
Change-Id: I4050179d24f05db1ef20270ebbb567eba429546c
Signed-off-by: Ting Shen <phoenixshen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1959669
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
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Initial files for foob are copied from phaser,
BRANCH=octopus
BUG=b:144890301
TEST=make BOARD=FOOB
Change-Id: I63a8263d0f24b5295fd3385beb60afb1ebd25bb1
Signed-off-by: peichao.wang <peichao.wang@bitland.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1948683
Reviewed-by: Henry Sun <henrysun@google.com>
Tested-by: Henry Sun <henrysun@google.com>
Commit-Queue: Henry Sun <henrysun@google.com>
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The power rail should be turned on at G3S5 rather than S5S3,
and should be turned off after stay in G3 for 20ms.
TEST=Ensure the power rail is on/off at correct timing
BUG=b:144144075 b:145255107
BRANCH=none
Change-Id: Ie621ab1ac5332da6718201c44266f41aafcac296
Signed-off-by: Yilun Lin <yllin@chromium.org>
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1928413
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
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Glados' RO space is full again since CL:1258569.
BUG=None
TEST=make
BRANCH=None
Change-Id: I33d979cde819a900626a10f740125b837f3ecfb5
Signed-off-by: Ting Shen <phoenixshen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1957338
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
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Seeing stack overflow on recent squash, increase the stack size
to fix this.
BUG=None
TEST=boot on juniper
BRANCH=None
Change-Id: I95bd4f14c032d35857df5ec9d8e96f8283155114
Signed-off-by: Ting Shen <phoenixshen@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1957341
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Alexandru M Stan <amstan@chromium.org>
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