| Commit message (Collapse) | Author | Age | Files | Lines |
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We need to (at least) build CTS for all boards & suites supported by CTS.
This will prevent our investment from accidentally being broken.
BUG=chromium:627252
BRANCH=none
TEST=make buildall builds CTS suites
Change-Id: Ib7bceaafd5e27ce9285b9d1bf35339bf6b04ba72
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/359947
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BUG=chromium:621993
BRANCH=None
TEST=`make buildall -j` from public checkout succeeds. Also verify cr50
still built from private checkout.
Change-Id: I982806e282146aab76154b51c366226d3d1aed14
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/354540
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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Add an explicit dependency on utils-build (includes ecst) to prevent
ec_elf_to_flat from running before ecst is built during parallel make.
BUG=chrome-os-partner:52777
BRANCH=None
TEST=Modify Makefile.rules to add 5sec sleep in $(build-utils) rule,
verify that `make BOARD=kevin clean && make BOARD=kevin -j` still
succeeds.
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: Ia443f8b880cbd4451d41302817e176201f7870dc
Reviewed-on: https://chromium-review.googlesource.com/350162
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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Unified board name for IT83-series.
Signed-off-by: Dino Li <dino.li@ite.com.tw>
BRANCH=none
BUG=none
TEST="make BOARD=it83xx_evb -j" and "make buildall -j"
Change-Id: Ic96d0132fb31fcc8715d0dd810f8bd340035a640
Reviewed-on: https://chromium-review.googlesource.com/341843
Commit-Ready: Dino Li <dino.li@ite.com.tw>
Tested-by: Dino Li <dino.li@ite.com.tw>
Reviewed-by: Shawn N <shawnn@chromium.org>
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It is quite annoying to see an error reported by buildall, but not
knowing what board(s) actually failed to build.
Create file for each board being built, put build progress information
in it, and remove it if the board build succeeded. Then, once the
build is completed see the failed boards in .failedboards/, if any,
and the states they failed at.
BRANCH=none
BUG=none
TEST=verified that the directory is empty after a successful buildall
run, and has files named after failed boards in case of build
failures.
Change-Id: I67eb1671cadf58d9f8feccebfcc860524f33c2a0
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/338883
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
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The new signer command line option should be used by some boards, not
all of them. Add it for cr50 for now.
BRANCH=none
BUG=none
TEST=verified that --cros is added to the command line when cr50 blobs
are signed, and that the signed blob boots fine on b1.
Change-Id: Ibc38cc6233b57838129ae7d554921c1bae0e6b8c
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/329595
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
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Creating bootloader for the chip involves signing the image with an
'air gap' - some physical presence action is required. We don't want
this to be required when the builder is building cr50 for test
purposes.
The solution is to keep using the dummy private key when building by
default, and invoking make differently when building an image which
would be accepted by the hardware.
Setting CR50_RO_KEY variable in the environment or in the make command
line will cause the signer use the value of this variable as the name
of the file containing the key to use for signing the RO image.
Should this file be a public key, the signer will stop and look for a
fob containing the matching private key, and will stream the RO image
through the fob for signing.
Using the fob requires that the signer runs under sudo, but we do not
want the generated files to belong to root, some more code is added to
change the generated files' ownership to user running the make.
BRANCH=none
BUG=chrome-os-partner:49950
TEST=ran the following tests:
- verified that the build still succeeds by default.
- invoked make as follows:
CR50_RO_KEY=cr50_rom0-dev-blsign.pem.pub make BOARD=cr50
observed the signer stop to wait for the user to interact with the
USB fob and proceed. Made sure that the generated image runs
successfully on the evaluation board.
- verified that 'make BOARD=cr50 clean' still works (i.e. none of the
generated files is owned by root).
Change-Id: I733ec6386c1dfd838d83d22fb589fa64e5eeaced
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/326484
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
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A typical EC image includes two similar in their functionality
subsections, RO and RW. CR50 has a small RO subsection, all it does -
detects a proper RW image to run and starts it up. To provide for
reliable firmware updates, the CR50 image needs to include two RW
sections, while the code is running from one RW subsection, the other
one can be upgraded.
This patch adds the ability to generate two identical RW sections,
mapped half flash size apart, and include them into the resulting EC
image.
To keep things simple the previously existing RW section's name is not
being changed, while the new (identical) RW section is named RW_B.
Two configuration options need to be defined to enable building of the
new image type: CONFIG_RW_B to enable the feature and
CONFIG_RW_B_MEM_OFF to define where RW_B should be mapped into the
flash.
A new rule added to Makefile.rules allows to generate a different lds
file from the same source (core/cortex-m/ec.lds.S) by defining a
compile time variable to pick a different base address for the
rewritable section, when RW_B is built.
BRANCH=none
BUG=chromium:43025
TEST=as follows:
- make buildall -j still succeeds
- verified that regular CR50 image starts successfully
- modified chip/g/loader/main.c to launch RW_B first, re-built and
re-run the image, observed on the console:
vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv
cr50 bootloader, 20151118_11218@80881, no USB, full crypto
Valid image found at 0x00084000, jumping
--- UART initialized after reboot ---
[Reset cause: power-on]
[Image: unknown, cr50_v1.1.4160-4c8a789-dirty 2015-12-07 18:54:27 vbendeb@eskimo.mtv.corp.google.com]
[0.001148 Inits done]
This FPGA image has no USB support
Console is enabled; type HELP for help.
> [0.002212 task 2 waiting for events...]
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
(note that the image base address is 0x840000, which is RW_B).
Change-Id: Ia2f90d5e5b7a9f252ea3ecf3ff5babfad8a97444
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/316703
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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This commit introduces a new CONFIG_* option. To utilise the
experimental console, simply define the following config option in the
board's board.h file.
#define CONFIG_EXPERIMENTAL_CONSOLE
This is a temporary option which allows the EC console to be work with
the EC-3PO interactive console interface. When this option is enabled,
the EC expects commands to packed in a particular format. This is for
command integrity and allows the interpreter to perform automatic
command retrying in the event that a character is dropped from the sent
command.
It also removes a lot of the console editing methods since they are now
being served by EC-3PO.
Once the EC-3PO interpreter is pulled into servod, we can enable this
feature by default and the config option can go away.
BUG=chrome-os-partner:46054
BRANCH=None
TEST=make -j buildall tests
TEST=Enable CONFIG_EXPERIMENTAL_CONSOLE on GLaDOS; Flash EC and verify
that console works via the EC-3PO interactive console interface.
TEST=Build and flash on GLaDOS and verify normal console operation on
standard EC UART.
CQ-DEPEND=CL:308615
Change-Id: I5e66eb94e31299b27ce029b7f7ce6ba0a7fb6816
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/309991
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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This patch completes introduction of building of proper RO and RW
images for cr50.
A few small mods were required:
- both RO and RW images have to be signed, using the same dedicated
signer, but with different keys, dev_key.pem is not needed any more.
- the RW image offset is not at the half of available flash, a chip
specific value of 16K is used instead.
The suggested new image layout is as follows:
+----------------------------------------+
| 1KB RO signature header. |
+----------------------------------------+
- -
| 15KB RO image. |
- -
+========================================+
| 1KB RW-A signature header. |
+----------------------------------------+
- -
- -
| 239K RW-A image. |
- -
- -
+========================================+
- -
| 16 KB NVRAM, shared |
- -
+========================================+
| 1KB RW-B signature header. |
+----------------------------------------+
- -
- -
| 239K RW-B image. |
- -
- -
+========================================+
BRANCH=none
BUG=chrome-os-partner:43025
TEST=The combined image (build/cr50/ec.hex) is successfully loaded and
started by the spiflash utility from the latest FPGA tarball.
Corrupting a byte in the generated image in the RW section causes
failure to verify.
Change-Id: I41a05168b0d4e9f88efa1003f261b6dd03972a24
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/311422
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
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When building with -j, it's easy to miss errors. If you don't
have your shell configured to warn you about nonzero exit, you
may not even notice that "make buildall -j" failed. To make it
more obvious, we'll do one level of recursion for that target.
That will ensure that the last line of output is always a
pass/fail message.
BUG=none
BRANCH=none
TEST=make buildall -j (with and without errors)
Before this CL, a successful "make buildall -j" ends with this:
MV ec.bin
OBJCOPY ec.hex
LD RW/ec.RW.elf
NM RO/ec.RO.smap
OBJCOPY RO/ec.RO.flat
NM RW/ec.RW.smap
OBJCOPY RW/ec.RW.flat
CAT ec.obj
OBJCOPY ec.bin
COPY_RW ec.bin
MV ec.bin
buildall completed successfully!
(cr) ((fa7baa6...)) ~/trunk/src/platform/ec $
while a failing one looks like this:
MV ec.bin
OBJCOPY ec.hex
LD RW/ec.RW.elf
NM RO/ec.RO.smap
OBJCOPY RO/ec.RO.flat
NM RW/ec.RW.smap
OBJCOPY RW/ec.RW.flat
CAT ec.obj
OBJCOPY ec.bin
COPY_RW ec.bin
MV ec.bin
(cr) ((fa7baa6...)) ~/trunk/src/platform/ec $
Did you see the difference? I suspect some people miss it.
With this CL, a failing "make buildall -j" looks like this:
NM RW/ec.RW.smap
OBJCOPY RW/ec.RW.flat
CAT ec.obj
OBJCOPY ec.bin
NM RW/chip/mec1322/lfw/ec_lfw-lfw.smap
OBJCOPY RW/chip/mec1322/lfw/ec_lfw-lfw.flat
COPY_RW ec.bin
MV ec.bin
COPY_RW ec.bin
MV ec.bin
OBJCOPY ec.bin
COPY_RW ec.bin
MV ec.bin
make[1]: Leaving directory '/mnt/host/source/src/platform/ec'
Makefile.rules:93: recipe for target 'buildall' failed
make: *** [buildall] Error 2
(cr) (stopit) ~/trunk/src/platform/ec $
Change-Id: Id9b47d2869f61e8e3e44b3c618399ca9223f0a71
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/303811
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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This patch brings in the enhanced signer utility published along with
FPGA version 20150925_21715, and the image.cc file updated to fix the
bug where it was not picking up the initialized data segment from the
elf file.
The new signed image header format, among other things, describes
memory areas as read-only and read-execute, which allows the bootrom
to configure the MMU appropriately.
Makefiles had to be modified to reflect the fact that the signed image
now depends on .elf, not on .raw, and that building the signer
requires more source files. Note that some signer features are not yet
being utilized (like processing xml files describing fuses or
retrieving keys from gnubby), the source are kept for completeness.
BRANCH=none
BUG=chrome-os-partner:43791
TEST=build the cr50 image and boot in on the FPGA board using the
spiflash utility outside chroot. Observe the target starting the
console session.
Change-Id: Ib59b8ebbeb98a8146d4d997e1f78178c4fbc031a
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/303070
Commit-Ready: Marius Schilder <mschilder@chromium.org>
Reviewed-by: Marius Schilder <mschilder@chromium.org>
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For signed EC RW images (CONFIG_RWSIG), there's no point in
embedding the public key or signature into the image itself since
it will just be replaced by the signer (either as the next step
in the build process, or after the fact for MP releases). This
takes that out and just points to where the pubkey and signature
will be placed.
BUG=none
BRANCH=none
TEST=make buildall
I also checked the signatures with
futility show -t build/*/ec.bin
They still look good, and the one signed image I booted (Cr50)
works as before.
Change-Id: Ib39b7c508914851f81a1bebb2450e08ef0def76c
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/302630
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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We have been using the time of compilation to determine the
version string. This CL will keep doing that if the git repo has
uncommitted changes, but if the repo is clean we'll just use the
author date of the last commit. This ensures that the same source
will produce bitwise-identical builds (assuming no toolchain
changes, of course).
BUG=chrome-os-partner:45616
BRANCH=none
TEST=manual
cd src/platform/ec
make buildall
mv build build.one
make buildall
md5sum build{,.one}/*/ec.bin | sort
Observe that successive builds produce identical binaries.
Change-Id: Ie2ef44b216586097589c9c15f12e05c87a53f991
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/302140
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
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The linker scripts are passed through the preprocessor so that
they can distinguish between RO and RW images. This change makes
the same macros available when compiling, so that code can
contain directives like
#ifdef SECTION_IS_RO
or
#define FW_SIZE_(section) CONFIG_##section##_SIZE
#define FW_SIZE(section) FW_SIZE_(section)
int size = FW_SIZE(SECTION);
BUG=none
BRANCH=none
TEST=make buildall
Nothing uses this yet, so there's no change to the images.
Change-Id: I6e03cd07c134f4b86aeddd9d516b74bbdb95b8a8
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/301255
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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This removes an unused vboot recipe left over from long, long ago.
It was added with commit 8101b71 (May 2012) to enable vboot on
EC. It should have been removed with commit 45cd846 (Aug 2012),
but wasn't. It hasn't been useful since then.
BUG=none
BRANCH=none
TEST=make buildall
Change-Id: I1176898064c4e714639dc63f041fb0fd85d73bab
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/301254
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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Rename and add geometry constants to match spec doc -
https://goo.gl/fnzTvr.
CONFIG_FLASH_BASE becomes CONFIG_PROGRAM_MEMORY_BASE
CONFIG_FLASH_MAPPED becomes CONFIG_MAPPED_STORAGE
Add CONFIG_INTERNAL_STORAGE, CONFIG_EXTERNAL_STORAGE and
CONFIG_MAPPED_STORAGE_BASE where appropriate.
This CL leaves chip/npcx in a broken state -- it's fixed in a follow-up
CL.
BRANCH=None
BUG=chrome-os-partner:23796
TEST=With entire patch series, on both Samus and Glados:
- Verify 'version' EC console command is correct
- Verify 'flashrom -p ec -r read.bin' reads back EC image
- Verify software sync correctly flashes both EC and PD RW images
Change-Id: Idb3c4ed9f7f6edd0a6d49ad11753eba713e67a80
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/297484
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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The signer utility needs to be built and the flat image needs to be
signed. The signer utility is written in C++, supporting this required
adding a new make command to Makefile.rules and a build file for the
utility.
The signing now needs to be a part of generating the .flat file. To
achieve this an alternative set of rules is defined in Makfile.rules
for targets where RO image needs to be signed.
Rules for converting elf to hex have been consolidated as there is no
need to omit the --set-section-flags when it does not apply.
BRANCH=none
BUG=chrome-os-partner:43025
TEST=as follows:
- ran 'rm build/cr50; make BOARD=cr50'
- observed that both build/cr50/ec.bin and
build/cr50/RO/ec.RO.flat have the required signature header in
the first 1024 bytes.
- verified that the cr50 board can be booted over SPI using the
image in build/cr50/RO/ec.RO.flat
Change-Id: Iacc22561de67fadfaf8e049bf9578cbd08cfad86
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/295291
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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The public sources look for board configurations in directories
named board/$BOARD/
Sometimes it's necessary to keep sensitive projects out of the
public view for a bit.
This CL allows board configurations to also appear in directories
named private*/board/$BOARD/
BUG=none
BRANCH=none
TEST=manual
First, ebuilds and "make buildall" seem to work just as before.
Second, I copied 24 of the existing boards (those without
board-specific #ifdefs in the code) into a private*/board/
directory, renamed them to something unique, and ran "make
buildall" again.
Both public and private boards compiled and passed their tests.
Change-Id: I977c23cb8e73e40677c8f329abca8bbc51fd53df
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/292428
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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The ec_date.h file had incorrect dependencies. $(objs) had no meaning
outside of the building the object files as it gets privately overidden
with the corresponding target objects (RO, RW, libsharedobjs). This
caused ec_date.h to only be generated once from a clean. This commit
fixes that by adding all of the RO and RW objects as dependencies (with
the exception of version.o).
BUG=chrome-os-partner:43373
BRANCH=None
TEST=Built ryu, checked build timestamp in build_info. Touched a file,
rebuilt, verified that build timestamp was updated.
TEST=make -j buildall tests
Change-Id: I0ab107efc1a504b4f871ebcf595754db1d414c7a
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/289338
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Trybot-Ready: Aseda Aboagye <aaboagye@chromium.org>
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Add ECST tool to modify the header used by npcx booter.
Modified drivers:
1. i2c.c: Modify for i2c_port design.
2. i2c.c: Fixed bugs when mutil-tasks use the same i2c port and pull-up issue.
3. hwtimer.c: Fixed bug whcih event expired time is behide current timer.
4. lpc.c: Add intializing host settings after pltrst is deasserted.
5. uart.c/clock.c/register.h: Fixed bug which cannot enter deep-idle
when gpio is any-edge trigger mode.
6. task.c: Add workaround method for hard fault issue.
7. keyboard_raw.c: Modified for support CONFIG_KEYBOARD_KSO_BASE
8. lpc.c: Modified for support CONFIG_KEYBOARD_IRQ_GPIO
9. lpc.c: fixed obe interrupt bug during 8042 initialization
10.Adjust path of flat files for new Makefile rules
11.Fixed build error on lpc.c without CONFIG_KEYBOARD_IRQ_GPIO
BUG=chrome-os-partner:34346
TEST=make buildall -j; test nuvoton IC specific drivers
BRANCH=none
Change-Id: Icf9494174b245b4026e396be877d578f36b6f6a5
Signed-off-by: Ian Chao <mlchao@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/284036
Reviewed-by: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Commit-Queue: Shawn N <shawnn@chromium.org>
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This commit introduces the build infrastructure changes needed for
creating a shared RO library. (libsharedobjs). The end goal is for the
library to contain various objects that can be shared with both the RO
and RW EC images.
Now, there are 3 make goals: ro, rw, and libsharedobjs.
In order for changes that are only specific to a single image (ie: RW
only) to be applied correctly, the object files are now built separately
for the RO, RW, shared objects library targets.
NOTE: Certain EC targets are incompatible with this model due to the
fact that only one image is present within flash at a time.
BRANCH=none
BUG=None
TEST=make -j buildall tests
TEST=make -j BOARD=cr50 xrefs
TEST=make BOARD=samus dis
TEST=Built samus EC image and compared that the final EC image was
identical to the upstream version (except for the git SHAs & version
strings).
CQ-DEPEND=CL:285934
Change-Id: I8e67f089710be9c6d7017718109262394bdad2f5
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/274079
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
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Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
Change-Id: Ic67fa454fe61c8b3419934c98ade75099163f7f2
Reviewed-on: https://chromium-review.googlesource.com/285022
Trybot-Ready: Anton Staaf <robotboy@chromium.org>
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Stephen Barber <smbarber@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
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Add npcx_evb_arm board-level driver for arm-based platform.
Add header.c: for booting from NPCX5M5G A3 Booter.
Remove lfw folder due to those functionalitie have been replaced with Booter
Modified drivers for
Patch Set 1:
1. flash.c: Implement UMA lock, tri-state and selection register lock functionalities
2. hwtimer.c: Add ITIM32 for hwtimer
3. lpc.c: Add checking for LRESET
4. system.c: Modified CODERAM_ARCH functions for NPCX5M5G A3 Booter.
5. uart.c: Add support for module 2
Patch Set 2:
6. lpc.c: Modified lpc_get_pltrst_asserted() func
Patch Set 3:
7. minimize the changes for CONFIG_CODERAM_ARCH in common layer
8. comments of Patch Set1/2
Patch Set 4:
9. Modified CONFIG_RO_MEM_OFF point to ro image and keep header as a part of ec.RO.flat.
10. Fixed RO_FRID and RW_FRID issues which caused by CONFIG_CODERAM_ARCH.
Patch Set 5:
11. Modified system.c in common folder for supporting *_STORAGE_OFF.
12. Use *_STORAGE_OFF in firmware_image.lds.S to indicate flat file layout in flash.
Patch Set 6:
13. rebase to newest version
14. system.c: Modified for the newest include/system.h
Patch Set 7:
15. Merge from version 0625
BUG=chrome-os-partner:34346
TEST=make buildall -j; test nuvoton IC specific drivers
BRANCH=none
Change-Id: Ifd7c10b81b5781ccd75bb2558dc236486976e8ed
Signed-off-by: Ian Chao <mlchao@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/272034
Reviewed-by: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Commit-Queue: Shawn N <shawnn@chromium.org>
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This puts the .PHONY declaration next to the target, so that we
don't overlook any.
BUG=none
BRANCH=none
TEST=make buildall
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Change-Id: I944537fdc3a90691a7f2de0bff9d7f9df4898cf8
Reviewed-on: https://chromium-review.googlesource.com/278019
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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The flash_ec rule calls the flash_ec tool, passing the inferred board
and image based on where make was run. This means that from a board
directory you can run "make flash_ec" and an up to date image will be
flashed using flash_ec.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
cd board/ryu_p4p5
make flash_ec
Change-Id: I51e2a62f4d0de427f8d36e0848941aef742e0d3d
Reviewed-on: https://chromium-review.googlesource.com/272264
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
Trybot-Ready: Anton Staaf <robotboy@chromium.org>
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Invoke the linker through gcc rather than directly with ld.
This will allow us to use some more advanced features : e.g. LTO.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=none
BRANCH=none
TEST=make buildall
then compare manually old and new binaries
Change-Id: I101b1edbaebd5628624a5a8c12d5c0b5fa9e2c50
Reviewed-on: https://chromium-review.googlesource.com/271290
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Trybot-Ready: Vincent Palatin <vpalatin@chromium.org>
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Sorted symbol maps are useful when one wants to look up an address to
associate it with a function or a variable, or to estimate how much
room certain components of the image take.
This patch adds a rule and creates a dependency to make sure that
sorted maps (assigned extension .smap) are generated during builds.
BRANCH=none
BUG=none
TEST=make buildall -j
observed 91 .elf files and 89 .smap files generated.
the two images not triggering .smap file generation are
build/npcx_evb/chip/npcx/lfw/ec_lfw
build/npcx_evb/chip/npcx/spiflashfw/ec_npcxflash
they could be added in a follow up patch if deemed necessary.
Change-Id: I196a2ffe059a83481b7a313617d516634762dc60
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/270117
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
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Previously for the mec1322 chip an ec.bin file was created in the normal way
and then it was "packed" in a post-processing stage to produce ec.spi.bin.
This change allows a chip or board build.mk file to specify the rules used to
produce ec.bin, and uses this for the mec1322 to do the packing. This means
that we can use the standard "ec.bin" name, and do not need to alter other
scripts, such as the script which creates chromeos-firmwareupdate.
BUG=None
TEST=buildall -j, flash on strago and see it still works.
BRANCH=NONE
Change-Id: I3f880d64e60d14f82cb1d21c8b3f2d4ae5e0dfef
Signed-off-by: Icarus Sparry <icarus.w.sparry@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/265544
Tested-by: Kevin K Wong <kevin.k.wong@intel.com>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Kevin K Wong <kevin.k.wong@intel.com>
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This replaces a special-purpose python script with futility, to
sign the firmware for those boards that require a signed RW image
instead of using software sync.
Currently, the only boards that do that use a signature scheme
that is somewhat opaque (refer to commit b5a439241fee55863 in the
vboot_reference repo for details). Futility calls that scheme
"--type usbpd1".
BUG=chromium:231574
BRANCH=ToT
CQ-DEPEND=CL:*212135
TEST=manual
To test, I obtained a reworked zinger that could be connected to
servo. I first flashed it with a dev-key-signed RO+RW image built
prior to this CL, then I applied this change, built a new image
(with a minor change to the startup message), and updated only
the RW half from Samus using
ectool --name=cros_pd flashpd 0 1 /mnt/stateful_partition/ec.RW.bin
Watching the zinger console when plugging and unplugging, I
confirmed that the RO firmware was still the original and the
verified-by-RO RW firmware was the new version.
Note: I also had to build a custom AP kernel without the cros_pd
driver, to prevent interference with the manual update.
Change-Id: I22d8e75c85dab7701af8fe98287f14ebe77dbbd4
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/264508
Reviewed-by: Mike Frysinger <vapier@chromium.org>
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This signs the RW firmware (with a non-secret key). The RO
firmware will verify the RW firmware and jump to it if it's good.
Note that this isn't the final solution, just the beginning.
BUG=chrome-os-partner:37071
BRANCH=none
TEST=manual
Build and install it. You'll see something like this:
--- UART initialized after reboot ---
[Reset cause: reset-pin hard]
[Image: RO, cr50_v1.1.2929-27e1b82-dirty 2015-02-24 14:36:29 wfrichar@wfrichar-glaptop]
[0.000444 Verifying RW image...]
[0.423742 RW image verified]
[0.423946 Jumping to image RW[0.428492 UART initialized after sysjump]
[Image: RW, cr50_v1.1.2929-27e1b82-dirty 2015-02-24 14:36:29 wfrichar@wfrichar-glaptop]
[0.428931 Inits done]
Console is enabled; type HELP for help.
>
> sysinfo
Reset flags: 0x00000c02 (reset-pin sysjump hard)
Copy: RW
Jumped: yes
Flags: unlocked
>
Change-Id: Icafa554baca135ff1f80cbce4dad5f980e7fc122
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/253081
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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Up until now, every image includes the time of compilation in the
build information. This makes it impossible to verify that a
particular image came from a particular source code snapshot.
With this change, specifying USE_GIT_DATE=1 to the make command
will use the author date of HEAD as the timestamp. That means
that successive builds from the same source will produce
bitwise-identical output (assuming the same toolchain, of
course).
BUG=none
BRANCH=none
TEST=manual
Do this twice:
\rm -rf build
make BOARD=cr50 USE_GIT_DATE=1
md5sum build/cr50/ec.bin
The md5sum should be the same for both runs.
Change-Id: If64307101a453cb13c62fa003f1bf432f4998273
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/252751
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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P1 boards are not used anymore. We haven't built ryu_p1 EC for a while.
Let's get rid of it.
BRANCH=None
BUG=chrome-os-partner:35138
TEST=make buildall
Change-Id: Ie0c0b91ce0af99a0975050935af920503ca7383a
Signed-off-by: Vic Yang <victoryang@google.com>
Reviewed-on: https://chromium-review.googlesource.com/252340
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Commit-Queue: Vic Yang <victoryang@chromium.org>
Tested-by: Vic Yang <victoryang@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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When the default build target creates .hex files, emit
the complete ec.hex output as well as the RO and RW halves.
BUG=none
BRANCH=none
TEST=make BOARD=cr50
Change-Id: Ia87bbace29d89695ef6a9c090c895ca10f14d919
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/251014
Reviewed-by: Sheng-liang Song <ssl@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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Add npcx_evb in board folder for testing
Add shared-spi arch support in common layer.
Modified drivers for
1. Fan.c: console command “pwmduty”.
2. Pwm.c: for the issue when set duty to 0.
3. System.c: for hw reset only during system reset.
4. Flash.c: Fixed access denied bug of the flash driver for host command.
5. Comments from Patch Set 1
6. Comments from Patch Set 3 (except sha256.c)
7. Add openocd and flash_ec support for npcx_evb
8. Add little FW and spi-flash upload FW in chip folder
9. Add optional make rules for PROJECT_EXTRA
10.Replace CONFIG_SHRSPI_ARCH with CONFIG_CODERAM_ARCH and remove changes
in common layer sources for shared-spi arch. (except sysjump)
11.Find the root cause of JTAG issue and use workaround method
with SUPPORT_JTAG in clock.c
12 Execute hibernate in low power RAM for better power consumption
13 Add workaround method for version console command
14 Modified coding style issues by checkpatch.pl tool
BUG=chrome-os-partner:34346
TEST=make buildall -j; test nuvoton IC specific drivers
BRANCH=none
Change-Id: I5e383420642de1643e2bead837a55c8c58481786
Signed-off-by: Ian Chao <mlchao@nuvoton.com>
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/233742
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Signed-off-by: Todd Broch <tbroch@chromium.org>
BRANCH=none
BUG=chrome-os-partner:35138
TEST='make buildall' no longer builds ryu_p1
Change-Id: I53b5b9a1967ac53faabbe2ee8268328d7a5c3ae7
Reviewed-on: https://chromium-review.googlesource.com/238810
Reviewed-by: Vic Yang <victoryang@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
Commit-Queue: Todd Broch <tbroch@chromium.org>
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Ryu sensor hub has asymectric RO/RW images. The first one is very limited
(not i2c master, no sensor drivers, gesture recognition).
Image size is alter to offer more space for the RW firmware image,
compiled with ryu_sh board.
To write RO image and basic RW image:
flashrom -V -p ec:type=sh,block=0x800 --fast-verify -w /tmp/ryu_sh_loader/ec.bin
To write the expected RW image:
flashrom -V -p ec:type=sh,block=0x800 --fast-verify -w -i EC_RW:/tmp/ryu_sh/ec.bin
BRANCH=ToT
BUG=chrome-os-partner:33908
CQ-DEPEND=CL:231970,CL:233233
TEST=load on Ryu, confirmed limited operation.
Change-Id: Ib976e2b048935adfb9b2b072c071db5be2bc1c09
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/231984
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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burn_my_ec is an utility that flash an image embedded in its code.
We can not compile it as part of ec-[dev]utils, because we have
devices that firmware should be build as part of chrome-ec package.
Remove burn_my_ec, barely used.
Split the makefile to build just the host utility when requested.
BRANCH=ToT
BUG=chrome-os-partner:32025,chromium:408713
TEST=Check that files are stil built when needed and
not when utils-host is invoked.
Change-Id: I3fabe16067d57c74ae36b05138f4c6fd2483c7c4
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/233347
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For accessories without software-sync mechanism, add the option to do a
RSA-based signature verification of the Read-Write firmware.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:31192
TEST=enable the configuration on Fruitpie and see the RW firmware
validated and jump to. Tried with good and bad RW images.
Change-Id: I3c886c2cbe17ca9543e19bf8599061c3f9751d4f
Reviewed-on: https://chromium-review.googlesource.com/229594
Reviewed-by: Todd Broch <tbroch@chromium.org>
Commit-Queue: Todd Broch <tbroch@chromium.org>
Tested-by: Todd Broch <tbroch@chromium.org>
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With this change, when we modify some config file related
to space, the lds is recompiled properly.
TEST=Check that when chip/stm32/configXX.h is modified,
ec.RO.lds is recompiled.
BRANCH=ToT
BUG=None
Change-Id: I0a49065e59f00dd37d945d9593126ab9fd1598b5
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/230908
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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Allow to use larger RSA keys by setting CONFIG_RSA_KEY_SIZE to 4096 or
8192 rather than using the default 2048-bit size.
It's mainly for benchmarking purpose right now as we don't have the RAM
to store the 3x key size buffer and the flash space for the public key
structure.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=samus
BUG=none
TEST=build Zinger with CONFIG_RSA_KEY_SIZE equals to 4096 and run it.
Change-Id: I9839121bf158d0a30dde1e48d875f345191bfec2
Reviewed-on: https://chromium-review.googlesource.com/228925
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
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Add another variable PROJECT_EXTRA which chips and boards can use to
add additional prerequisites to the default all target
Add rules for creating ec.spi.bin to package the ec firmware for
strago
BUG=None
BRANCH=None
TEST=Tested on Braswell Ref Design Board
Signed-off-by: Divya Jyothi <divya.jyothi@intel.com>
Signed-off-by: icarus sparry <icarus.w.sparry@intel.com>
Change-Id: I4fb9f1275dc5bc2987b6abf5d45b0baf363c0d7a
Reviewed-on: https://chromium-review.googlesource.com/226305
Reviewed-by: Vic Yang <victoryang@chromium.org>
Reviewed-by: Icarus W Sparry <icarus.w.sparry@intel.com>
Commit-Queue: Icarus W Sparry <icarus.w.sparry@intel.com>
Tested-by: Icarus W Sparry <icarus.w.sparry@intel.com>
Reviewed-by: Sheng-liang Song <ssl@chromium.org>
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Previously the version string was special cased in the USB stack
because the build system prevented the inclusion of ec_version.h in
any file other than common/version.c. This lead to common/version.c
being the only place that the USB version string could be computed
and thus the special case of filling in the version string descriptor
at run time. This made the USB stack more complex, and lead to the
common/version.c file including usb.h, which is actually STM32
specific.
Now, the portion of ec_version.h that is deterministic is only
updated when something in the tree actually changes (by way of a
conditional in the makefile), and ec_version.h no longer has to
depend on all object files (other than the special version.o).
This allows anyone to include ec_version.h as needed. In particular,
each board that wants to define a USB version string can directly
include ec_version.h and do so.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=None
BUG=None
TEST=make buildall -j
touch files and verify rebuilds happen correctly
Change-Id: Ic84d0b9da90f82ebb4630fb550ec841071e25a49
Reviewed-on: https://chromium-review.googlesource.com/227211
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
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The serial console works. Nothing else is implemented yet.
BUG=none
BRANCH=ToT
TEST=make buildall -j
To build,
make BOARD=cr50 hex
Testing the result requires a development board. I have one. It
works with HW revision m3.dist_20140918_094011
Change-Id: I718d93572d315d13e96ef6f296c3c2796e928e66
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/226268
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
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The Zinger RW is now signed with 2048-bit RSA key (using SHA-256 as
digest).
This CL implements the verification mechanism.
note: the RSA key used for signing must be provided as a .pem file.
The path to .pem file must be provided in the PEM environment variable.
By default, it's using the dev key stored in zinger_dev_key.pem.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=samus
BUG=chrome-os-partner:28336
TEST=on Zinger, run with properly signed RW firmware and corrupted
firmware and check the serial traces.
Change-Id: Ia58482458904a3ed72d6b0e95996cae86a0ead83
Reviewed-on: https://chromium-review.googlesource.com/220178
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
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This ensures that nothing previously flashed to the baord can
interfere with the flashing operation (by wedging the MCU or
putting it into a state that the falshing code can't handle).
This also adds a dependency on ec.bin to the flash
target, ensuring that the firmware image is up to date
when flashing.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=none
TEST=make buildall -j
Change-Id: I8cdfa6f5c84ed84d6b6e6b30d6683a23087f2c63
Reviewed-on: https://chromium-review.googlesource.com/215991
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
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Previously if you were working on a single board you had to add BOARD=
to all of your make command lines. Now if you are in a board directory
you can just use "make", or "make clean", or any other top level make
command.
This commit also adds support for a top level "make flash" command that
can be used from the board directories as well. This command uses
openocd and requires that the board provides an openocd-flash.cfg file.
Signed-off-by: Anton Staaf <robotboy@chromium.org>
BRANCH=none
TEST=(from a few board directories) make clean; make -j
(from the discovery-stm32f072 directory) make flash
Change-Id: Ie09a74881371169a2c3cd9cd9922f39f4873f1a6
Reviewed-on: https://chromium-review.googlesource.com/209669
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>
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When not using gold as the linker the ordering of libraries
with respect to objects and source files is important.
Previously the build placed -l libraries before source and
objects on the gcc command line. This doesn't work with
the default ld linker because since none of the symbols in
the libraries are yet required they are thrown out before
their uses are found in the objects and source.
BUG=none
BRANCH=none
TEST=make buildall
Change-Id: Ic9f83ba6138d6592d3b6e28de6fb0688e664f480
Reviewed-on: https://chromium-review.googlesource.com/202469
Tested-by: Anton Staaf <robotboy@google.com>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Anton Staaf <robotboy@google.com>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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'make buildall' spews out a long long long message, and when an error
occurs, it's sometimes hard to spot the error message. By adding a
explicit success message after a successful run, one can just look for
that success message to determine if it failed.
BUG=None
TEST=Build and see success message.
TEST=Introduce an error, build, and check there is no success message.
BRANCH=None
Change-Id: Ia5468342ad2eb5378c3e10774ed81c5c91f002a2
Signed-off-by: Vic Yang <victoryang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/200618
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
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For targets not using the common runtime functions, the current test
content does not make much sense and fails to build properly :
de-activate the tests build in that case.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:28480
TEST=USE=usbpd emerge-samus chromeos-ec
Change-Id: Ic6477861b5a86916f29a9f6bb70ed0def3661886
Reviewed-on: https://chromium-review.googlesource.com/197883
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-by: Vic Yang <victoryang@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
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