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BUG=chrome-os-partner:7459
TEST=manual
In the chroot:
cd src/platform/ec
make BOARD=link
The firmware image (build/link/ec.bin) is signed with dev-keys. Reflash the
EC and try it, and it should verify and reboot into RW A.
Additional tests (setting USE_RO_NORMAL, poking random values into VBLOCK_A
or FW_MAIN_A to force RW B to run, etc.) are left as an exercise for the
reader. I've done them and they work, though.
Change-Id: I29a23ea69aef02a11aebd4af3b043f6864723523
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
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Add a parameter to define the chip variant and pass it to build/make
processes.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=chrome-os-partner:9057
TEST=make BOARD=daisy ; make BOARD=adv ; make BOARD=discovery
Change-Id: I87b65b582ed5fc2cf5966446e15224ac15e328e9
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BUG=chrome-os-partner:7839
TEST=manual
cd src/platform/ec
make BOARD=link
copy ./build/link/util/lbplay to the host and run it as root.
Change-Id: I6a4a842b7500751185c8f4c2744f4389226bae9b
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
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Also fix a couple places where that makes it fail.
BUG=none
TEST=none
Change-Id: I3b434b4bfa547a579193aac67c1a9d440a2c4e51
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Now, the arm-none-eabi toolchain is available is all chroot,
so ensure that the developers doing a local build using directly the
Makefile pick by default the same toolchain as the one used by the
automated build.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=make BOARD=bds && make BOARD=link && make BOARD=adv
Change-Id: Ib9568cabed3ca77cfa5ebc60479025cbb330b024
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A temperature polling task is added to achieve temporal correction and
also reduce the latency of reading temperature.
Factor out sensor specific part to keep code clean.
Signed-off-by: Vic Yang <victoryang@chromium.org>
BUG=chrome-os-partner:7801
TEST=On link, 'temps' shows all temperature readings.
Cover each sensor with hand and see object temperature rise.
Compilation succeeded on bds/adv/daisy/discovery.
Change-Id: I3c44c8b2e3ab2aa9ce640d3fc25e7fba56534b86
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Preparatory work to introduce a second SoC : 3/5
We split the drivers files which contain SoC specific drivers from the
OS files which only depend the actual CPU core.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=run EC firmware on BDS and test a few commands on the console.
Change-Id: I598f8b23e074da9bd6b0e2ce6689c1075fe854f0
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Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7499
TEST=press and release power button; should see debug messages
Change-Id: I8909ae4643afc98753edb690771618ad43135e3e
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This provides a pty for the EC UART channel on the BD-ICDI-B FTDI
daughtercard for EC debugging.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=none
TEST=make && build/bds/util/ec_uartd (with EC attached to FTDI board)
Change-Id: I51fe50d0da6345962affb860b923425197a04fa1
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Build is the system doing the build (e.g. 64-bit linux) and host is the
target platform on top of the ec (e.g. 32-bit Chromium OS).
Necessary to get ectool properly compiling for Chromium OS.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=none
TEST=make && file build/bds/util/ectool; ectool should be a 32-bit binary
Change-Id: I50eba4c164ece236646a7c6087b1b86769beeb28
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source files mainly done by Vincent.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Change-Id: Ic2d1becd400c9b4b4a14d4a243af1bdf77d9c1e2
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