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* dedede: Set MKBP event wake mask to 0Aseda Aboagye2021-12-091-0/+1
| | | | | | | | | | | | | | | | | | Now that we're sending button events to the AP via MKBP, we should not send any of those events while in suspend. This commit simply enforces that for the dedede platform. BUG=b:207805856 BRANCH=dedede,keeby TEST=Build and flash a dedede convertible device, suspend DUT, press a volume button, verify that DUT does not resume. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I86cd2c22592a234e75e5f2040b15f64c3f8ef1f7 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3324685 Tested-by: Jongpil Jung <jongpil19.jung@samsung.corp-partner.google.com> Reviewed-by: Henry Sun <henrysun@google.com> Commit-Queue: Henry Sun <henrysun@google.com>
* atomic: use atomic_t where it is possibleDawid Niedzwiecki2021-12-081-1/+2
| | | | | | | | | | | | | | | | | | | | | | | There are several places where atomic_t can be a type variables that are use with atomic_* operation, so use it. It sometimes has an impact on the asm code, but it is not significant. The change will be useful for incoming commits related to modifying atomic_t caused by a change in Zephyr upstream (atomic_t from int to long). BUG=b:207082842 TEST=make buildall && zmake testall BRANCH=main Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I5c7fa6b74b84454b22074a2a00b5f10003ee9843 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3306358 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org> Commit-Queue: Dawid Niedzwiecki <dawidn@google.com>
* config: rename CONFIG_HOSTCMD_ESPI to CONFIG_HOST_INTERFACE_ESPIKeith Short2021-11-191-1/+1
| | | | | | | | | | | | | | | Rename CONFIG_HOSTCMD_ESPI to CONFIG_HOST_INTERFACE_ESPI. This makes the host interface selection configs distinct from configs used to enable/disable specific host commands. BUG=b:195416058 BRANCH=main TEST=compare_build.sh Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I7f52614ca9a0dd54cc7e96e51bba40453564198e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3095842 Tested-by: Michał Barnaś <mb@semihalf.com>
* baseboard: dedede: Reduce amount of logsGwendal Grignou2021-11-121-0/+2
| | | | | | | | | | | | | | | When there is a sensor stack, printing a log for every command may overwhelm the EC. Reduce logs by default, consistenly with other boards. BUG=b:201961774 BRANCH=keeby TEST=check the reduce amount of log in servo on bugzzy. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Change-Id: I79b3a2a2d375dfb3a94eb30778f707f0f2fb6aef Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3273095 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* board: Rename RSMRST_L_PGOOD as PG_EC_RSMRST_ODLfirmware-chameleon-14280.B-mainDivya Sasidharan2021-10-121-1/+1
| | | | | | | | | | | | | | | | | GPIO_RSMRST_L_PGOOD is also used as GPIO_PG_EC_RSMRST_ODL creating redundancy. Removing it will help need for redefinitions for zephyr. Remove reference to GPIO_RSMRST_L_PGOOD in zephyr BUG=b:200975143 BRANCH=main TEST=make buildall -j, boot up on brya Change-Id: Iff46595174c54db347b69cff3ad9e266ba9fd535 Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3180808 Reviewed-by: Keith Short <keithshort@chromium.org> Commit-Queue: Keith Short <keithshort@chromium.org>
* keeby: Update USB PID to 0x5059Aseda Aboagye2021-09-151-1/+1
| | | | | | | | | | | | | | | | | | The allocation for keeby's USB PID never actually landed, so it was taken by another project. A new allocation has been made, and this commit updates the USB PID in the EC to match. BUG=None BRANCH=firmware-keeby-14119.B TEST=`make -j BOARD=lalala` Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: Ie9e05de3fd2488c6f19b607e1323e9d193bb6753 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3163308 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* dedede: moving buttons and switches to use MKBPBoris Mittelberg2021-08-181-0/+1
| | | | | | | | | | | | | | | | | | Switching config option to route buttons and switches over MKBP instead of 8042 driver BRANCH=main,dedede BUG=b:170966461 TEST=manual tested on Madoo Cq-Depend: chromium:3094530 Signed-off-by: Boris Mittelberg <bmbm@google.com> Change-Id: I5c82ee09a64b1971e63547220ca20c1226cb5ba3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3069163 Reviewed-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Tested-by: Nick Vaccaro <nvaccaro@google.com> Commit-Queue: Paul Fagerburg <pfagerburg@chromium.org>
* keeby: Add GPIO_EC_CBI_WPAseda Aboagye2021-07-291-0/+3
| | | | | | | | | | | | | | | | | This commit simply adds the GPIO_EC_CBI_WP pin for the keeby boards and also sets CONFIG_EEPROM_CBI_WP. BUG=b:181769483 BRANCH=None TEST=`make -j buildall` Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I31694cb748d8b8a197b84634fbd9417d274a79d7 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3046413 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* dedede: Enable CONFIG_ASSERT_CCD_MODE_ON_DTS_CONNECTRob Barnes2021-07-021-0/+5
| | | | | | | | | | | | | | | | | | Enable CONFIG_ASSERT_CCD_MODE_ON_DTS_CONNECT on all dedede boards. This will assert GPIO_CCD_MODE_ODL when a debug device is connected to a CCD port. GPIO_CCD_MODE_ODL must be configured as an open drain so EC and Cr50 don't drive fight. BUG=b:190189242 TEST=Build dedede BRANCH=None Change-Id: I2d71312967f2d4a693ac9753279f49478e8c092c Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2976759 Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Diana Z <dzigterman@chromium.org>
* keeby/dedede: Gate temp sensor access by GPIOAseda Aboagye2021-06-291-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | On dedede and keeby boards, the thermistors are powered by the EC's GPIO_EN_PP3300_A pin. If the thermistors are read before they are powered then the EC may force a thermal shutdown due to the bad reading. This commit simply defines CONFIG_TEMP_SENSOR_POWER_GPIO along with a CONFIG_TEMP_SENSOR_FIRST_READ_DELAY_MS to ensure we don't get any false positive thermal shutdowns. BUG=b:192053176 BRANCH=dedede TEST=Build and flash lalala. Unplug AC charger from DUT, press refresh+power button to reset DUT, verify that DUT boots up automatically. TEST=Repeat above test with madoo. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I2a49e2f896c4120a8f01f440ea22c9b3763c6589 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2988364 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* chgstv2: Unify power-on and shutdown battery thresholdsDaisuke Nojiri2021-06-231-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, power-on battery SoC and shutdown battery SoC are independently configured by each board. This patch will unify the setting as follows: CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON = 2 (don't boot if soc < 2%) CONFIG_BATT_HOST_SHUTDOWN_PERCENTAGE = 2 (shutdown if soc <= 2%) BATTERY_LEVEL_SHUTDOWN = 3 (shutdown if soc < 3%) CONFIG_BATTERY_EXPORT_DISPLAY_SOC = Y (removed) CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON_WITH_AC = 1 This allows us to show the low battery alert whenever we can because EC doesn't inhibit power-on even if it knows the host would immediately shut down. With CONFIG_BATTERY_EXPORT_DISPLAY_SOC, boards will start using the CONFIG_BATT_HOST_SHUTDOWN_PERCENTAGE = 2% as the low battery threshold (and the SoC will be agreed between the EC and Powerd). Boards with CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON = 1 will keep the same threshold. This is for avoiding degrading the UX by increasing the power-on threshold (even though a question that 1% may not be enough for soft sync to finish consistently remains to be answered). Boards with CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON > 2 will have a lower threshold but we think 2% is enough to finish the software sync. A lower threshold also improves the UX by showing the low battery alert in the situation where otherwise the system would leave the user uninformed by not responding to a power button press. BUG=b:191837893 BRANCH=None TEST=buildall Change-Id: If6ff733bc181f929561a3fffb8a84e760668ce37 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2981468 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* config: Rename CONFIG_CROS_BOARD_INFOPhilip Chen2021-06-161-1/+1
| | | | | | | | | | | | | | | | | | Rename CONFIG_CROS_BOARD_INFO to CONFIG_CBI_EEPROM to make it clear that the information comes from on-board EEPROM. It sets up the groundwork for adding more options of CBI sources later. BRANCH=None BUG=b:186264627 TEST=make buildall -j Signed-off-by: Philip Chen <philipchen@google.com> Change-Id: I9a6feee0a8b35bbf29e445544243485507767ad8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2945792 Reviewed-by: Philip Chen <philipchen@chromium.org> Commit-Queue: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org>
* config: Populate CONFIG_SUPPRESSED_HOST_COMMANDSGwendal Grignou2021-05-191-4/+0
| | | | | | | | | | | | | | | | | | | | | Commands that are send peridically or in high number are not reported on the console through CONFIG_SUPPRESSED_HOST_COMMANDS variable. Use the same set of commands throughout to avoid misses like newer command EC_CMD_GET_UPTIME_INFO. BUG=none BRANCH=none TEST=buildall Signed-off-by: Gwendal Grignou <gwendal@google.com> Change-Id: I0041576538a8cc659c262118b1503777b9ea8578 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2851452 Reviewed-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Craig Hesling <hesling@chromium.org> Tested-by: Gwendal Grignou <gwendal@chromium.org> Commit-Queue: Gwendal Grignou <gwendal@chromium.org>
* baseboard/dedede: Fix compilation errorTom Hughes2021-05-031-2/+5
| | | | | | | | | | | | | | | | | Fixes the following compiler error when using clang: error: macro expansion producing 'defined' has undefined behavior [-Werror,-Wexpansion-to-defined] BRANCH=none BUG=b:144959033 TEST=make buildall TEST=./util/compare_build.sh -b all -j 70 Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I22466f5bc98071100613e4d86b62ce485e3372fe Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2862504 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* keeby/lalala: Initial commitAseda Aboagye2021-04-021-6/+30
| | | | | | | | | | | | | | | | This is the initial commit for lalala, a NPCX797FC variant of keeby. BUG=b:184191507 BRANCH=None TEST=`make -j BOARD=lalala` Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I0420cf7252cba5571fe82d0d88d4dccc5d866782 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2798524 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* Dedede: Add CONFIG_CHIPSET_RESET_HOOKDiana Z2021-03-311-0/+1
| | | | | | | | | | | | | | | | | The chipset reset hook can be used to detect scenarios where the AP rebooted. This will enable features such as resetting our discovery flags for the kernel after a warm reboot. BRANCH=None BUG=None TEST=make -j buildall; run on drawcia and confirm we boot and show discovery events resetting after AP reboot Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I0593ae0f8aa1fba6d497bd199a1606afc25b8a30 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2798294 Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* dedede: Add MKBP_EVENT to baseboardEvan Green2021-01-261-0/+4
| | | | | | | | | | | | | | | | | | CtsSensorTestCases is failing on Drawcia because it requests 100 events from accelerometer and gyroscope but gets zero. We can read sensor events just fine, but they never seem to push to the kernel. Add CONFIG_MKBP_EVENT into the baseboard, and then clean up all the one-off variants that have added this themselves. Also, add some accel commands specific to drawcia for easier debugging. BUG=b:171939568 BRANCH=none TEST=Use amstan's script, which amounts to cat /dev/iio:deviceN Signed-off-by: Evan Green <evgreen@chromium.org> Change-Id: Ia796ec2f9a08d3628dcabb4b5fca425693af4099 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2638636 Reviewed-by: Diana Z <dzigterman@chromium.org>
* config: Provide default VCONN Swap delayAbe Levkoy2021-01-221-1/+0
| | | | | | | | | | | | | | | | | Almost every relevant board copy-pastes 5000 us. Make that the default and get rid of the redundant definitions. This is the approximate result of this command: find . -type f -name *.h | xargs sed -i -E \ '/#define CONFIG_USBC_VCONN_SWAP_DELAY_US[[:space:]]+5000[[:space:]]/d' BUG=b:144165680 TEST=make buildall BRANCH=none Change-Id: Ife86f9752971abcd7ab5ad5a5e607eb2ccbde2ba Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2628132 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* config: Make VCONN Swap delay a documented optionAbe Levkoy2021-01-221-1/+1
| | | | | | | | | | | | | | | | | | | | | Replace PD_VCONN_SWAP_DELAY with CONFIG_USBC_VCONN_SWAP_DELAY_US. This is the approximate result of the following command, run from platform/ec: find . -type f -\( -name '*.c' -o -name '*.h' -\) | \ xargs sed -iE 's/PD_VCONN_SWAP_DELAY/CONFIG_USBC_VCONN_SWAP_DELAY/g' Fix some latent formatting errors in usb_pd_protocol.c, because they were preventing pre-upload hooks from passing. BUG=b:144165680 TEST=make buildall BRANCH=none Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: Icaf3b309c08fdcd162e960cf5dc88185016b5d2d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2628131 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* Refactor CONFIG_FLASH_SIZE to CONFIG_FLASH_SIZE_BYTESYuval Peress2021-01-151-1/+1
| | | | | | | | | | | | | | | | | | | | | In Zephyr CONFIG_FLASH_SIZE is a Kconfig value that is used throughout. The issue is that the units don't match. In Zephyr the value is in KiB instead of bytes. This refactor simply renames CONFIG_FLASH_SIZE in platform/ec to include the unit (via _BYTES). BRANCH=none BUG=b:174873770 TEST=make buildall be generated by the build instead of per board Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: I44bf3c7a20fcf62aaa9ae15715be78db4210f384 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2627638 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
* TCPMv2: Update source-out configsDiana Z2020-12-241-1/+0
| | | | | | | | | | | | | | | | | | | | Now that the DPM will be handling source-out decisions for TCPMv2, remove references to its old configuration options from TCPMv2 boards in order to avoid any confusion as to what code is running now. Also remove the charge manager notifications of sink attach/detach since the policy is being centralized into the DPM. Note that the previous configuration options only ever allocated one 3.0 A port, and so the default number of 3.0 A ports has been set to 1. BRANCH=None BUG=b:168862110,b:141690755 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ie452e3da32b04226503539daa67b6b9f4a58aa58 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2597431 Reviewed-by: Keith Short <keithshort@chromium.org>
* COIL: Rename CONFIG_I2C_CONTROLLERDiana Z2020-11-051-1/+1
| | | | | | | | | | | | | Rename CONFIG_I2C_CONTROLLER and related comments. BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ied6a1829bf54a5c9a32e6772982a4b8aa31aaf23 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2518659 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* it83xx: enable selecting EC's VCCDino Li2020-10-081-0/+3
| | | | | | | | | | | | | | | | | | | The VCC is the power source of EC's GPM0~6, will connect to 1.8v or 3.3v depended on platform design. This change was made to ensure voltage level setting of GPM0~6 matches the corresponded VCC level. So we can enable internal pull-up no matter VCC is connected to 1.8v or 3.3v BUG=b:168783892 BRANCH=none TEST=- buildall. - The level setting is correct on these boards: asurada, drawcia, and reef_it8320 Change-Id: I4eae368e569987381a0437494262d588436bb011 Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2397931 Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
* Dedede: Remove requirement for >15W to boot with no batteryDiana Z2020-09-291-1/+0
| | | | | | | | | | | | | | | Allow dedede boards to boot with only a 15W charger present. BRANCH=None BUG=b:166003337,b:168730307 TEST=on waddledoo and waddledee, confirm board can boot to S0 and remain there with a 15W charger in C0 or in C1 and no battery Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I24f8f2f13bb2b2ba92ba6e2b87db569bd023e5c7 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2438670 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* Dedede: Remove DAC for boards using ITE+SM combinationDiana Z2020-09-281-2/+0
| | | | | | | | | | | | | | | For boards which are using the SM charger chips, they will have a Psys offset register to generate the OCPC Psys output. BRANCH=None BUG=b:168783892 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ib963ed11f73a76dfeffa11d5ab4a81ccbbd71102 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2435746 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* dedede: Set CONFIG_BATTERY_REQUESTS_NIL_WHEN_DEADAseda Aboagye2020-09-281-0/+1
| | | | | | | | | | | | | | | | | | Some dedede batteries have a charge request of (0,0) when the battery is completely depleted. Enable this config option to help revive those batteries. BUG=None BRANCH=None TEST=Build and flash drawcia, drain battery until it's dead, plug in a charger on C1 and verify that the battery can be revived. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I9206120a0c36813cbcd5618fe595faf57741ac47 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2431696 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* dedede/variant_it8320: increase uart tx buffer sizeDino Li2020-09-231-0/+3
| | | | | | | | | | | | | | | | This change increased console output buffer to avoid losing output message since we have the memory space available (17832 bytes in RAM still available on drawcia). BUG=none BRANCH=none TEST=more console message is visible on drawcia after ec reset. Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Change-Id: I660f0114bc2c569b74d35bdbbd63e5819979555b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2423647 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* baseboard/dedede: Enable PD control command handlerKarthikeyan Ramasubramanian2020-09-091-0/+1
| | | | | | | | | | | | | | To enable PD Firmware update, enable PD control command handler. BUG=b:159832325 BRANCH=None TEST=Build and ensure that the PD control command is enabled. Change-Id: I3bd12e29b65575bca08fede9544dff409ba38004 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2382552 Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* Dedede: Move Discharge on AC config to baseboardDiana Z2020-08-271-0/+1
| | | | | | | | | | | | | | | | Now that the SM5803 has support for discharge on AC, move this configuration into the baseboard. BRANCH=None BUG=b:164256610 TEST=on drawlat with a charger in C0, ensure "ectool chargecontrol discharge" shows battery discharging and "ectool chargecontrol normal" shows battery charging again. Repeat on C1 Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ib058095330481fc4aa2f1016ccec6c77b047d8f5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2376467 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Dedede: Move PWM to board levelDiana Z2020-08-211-4/+0
| | | | | | | | | | | | | | | | Move the PWM related defines and arrays into the board level, to allow customization of what PWM channels boards use (if they choose to use the PWM at all). BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Id417a7be079511c17de9f2e5d03c729467435804 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2358899 Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* config: Require battery >5% to enable PD Try.SRCWai-Hong Tam2020-08-181-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Align the CONFIG_USB_PD_TRY_SRC_MIN_BATT_SOC to the value of BATTERY_LEVEL_CRITICAL, which is 5%. The BATTERY_LEVEL_CRITICAL is 5% that means EC will send battery- critical host event when the battery level <= 5%. CrOS PD policies state that the system doesn't source power to any external USB devices when AP is shutdown. So the current CONFIG_USB_PD_TRY_SRC_MIN_BATT_SOC 1% default has no point. When the battery level is <= 5%, AP should be shutdown soon and the system should not be a source, so should not enable Try.SRC. Also change the comparison from soc >= CONFIG_USB_PD_TRY_SRC_MIN_BATT_SOC to soc > CONFIG_USB_PD_TRY_SRC_MIN_BATT_SOC as the battery critical check is soc <= BATTERY_LEVEL_CRITICAL. BRANCH=None BUG=b:165057418 TEST=Plugging a PD charger to a board with the battery level very low, the system boots up (was failed), Change-Id: If6b11feacd62fd003e13b1756eb5c33d2f9bbce4 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2360543 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Clean up: set embedded flash clock 48MHz as defaultRuibin Chang2020-08-171-3/+0
| | | | | | | | | | | | | | | | For chip it8xxx2 series and it8320dx, we set embedded flash clock 48MHz as default. BUG=none BRANCH=none TEST=build all Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw> Change-Id: I100d70fbf80430ae98fa14c557886c4a37d8b93a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2355164 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Ruibin Chang <Ruibin.Chang@ite.com.tw> Tested-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
* baseboard/dedede: Enable AP reset command handlerKarthikeyan Ramasubramanian2020-08-131-0/+6
| | | | | | | | | | | | | | | | | | | | TPMs with old firmware version cannot detect AP initiated reset eg. AP gets reset when CSE Lite SKU jumps from RO to RW. Enable AP reset command handler so that AP can request EC to perform the reset. This will lead to TPM detecting the AP reset. BUG=b:162386991 BRANCH=None TEST=Ensure that the EC handles AP reset command. Ensure that the device boots to OS after the reset. Change-Id: I1e167af89aaa28c731674ee3650904d702efc8df Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2337430 Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Commit-Queue: Karthikeyan Ramasubramanian <kramasub@chromium.org>
* dedede: Enable CONFIG_CMD_CHARGER_DUMPAseda Aboagye2020-08-051-1/+2
| | | | | | | | | | | | | | | | The `charger_dump` command is currently useful for these boards. BUG=None BRANCH=None TEST=Build drawcia, verify charger_dump command is present. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I29cc70113be1c3c3096668c6d5969c4f755f915b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2339843 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* power/intel_x86: Generalize the sleep failure detection, not bound to S0ixWai-Hong Tam2020-08-041-1/+1
| | | | | | | | | | | | | | | | | | | This change prepares to separate the sleep failure detection out of intel_x86, such that other chipset power sequence can reuse the code. It only touches the naming. No logic changes. * Rename to CONFIG_POWER_SLEEP_FAILURE_DETECTION * Modify the function and variable names, to avoid S0ix * Modify the comment to more neutral BRANCH=None BUG=b:162083524 TEST=make buildall -j Change-Id: I6a61c3b0a63af60913ee89e0ca343085fbd22308 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2321872 Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
* Dedede: Enable EFS2Diana Z2020-07-231-0/+1
| | | | | | | | | | | | | | Enables EFS2 for all dedede boards BRANCH=None BUG=b:159350276 TEST=on waddledoo and waddledee, see successful EFS2 jump to RW early in the boot process Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ib2eccb28e0331bee718f8c5aec261d83115ec22e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2299849 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Dedede: Enable i2ctrace commandDiana Z2020-07-211-0/+3
| | | | | | | | | | | | | | | This command allows printing of all the i2c traffic on a given port and address, and can be useful when debugging driver issues. BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I73749c8ba664a8df51e4e846a0e8d848099039cb Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2309065 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* boten: split CONFIG_LED_PWM out into boardsxiong.huang2020-07-151-2/+3
| | | | | | | | | | | | | It will be happy to define LED behavior in boards. BUG=b:160664441 BRANCH=none TEST=make buildall -j4 Signed-off-by: xiong.huang <xiong.huang@bitland.corp-partner.google.com> Change-Id: Ib81fe8d20fa3ab74064958fba3576a1618635e52 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2296544 Reviewed-by: Diana Z <dzigterman@chromium.org>
* dedede: Move adc channel to board variantDevin Lu2020-07-141-8/+0
| | | | | | | | | | | | | | Dedede family may have different temp sensors for other ADCs channel. This patch moves adc channel to board variant. BUG=none BRANCH=none TEST=make buildall -j Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Change-Id: Id34a924fc9431a553a1467068c6ccee6111102bc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2289478 Reviewed-by: Diana Z <dzigterman@chromium.org>
* dedede: add workaround for CR50 double resetJett Rink2020-07-091-0/+3
| | | | | | | | | | | | | | | Hold the EC on the initial power on until the CR50 resets it; this preserves the power on flag for the first boot, which is important when we are deciding if we want to reset the USB-C PD contract. BRANCH=none BUG=none TEST=doo hold on reset Signed-off-by: Jett Rink <jettrink@chromium.org> Change-Id: I6895be11309d2021436ce7b3aab915dbf27d9616 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2289058 Reviewed-by: Diana Z <dzigterman@chromium.org>
* boten: use charger/TCPC RAA48900xiong.huang2020-06-141-11/+0
| | | | | | | | | | | | | | | Use charger/TCPC RAA48900 instead of TCPC IT8320 + charger SM5803 combination at MB side. BUG=b:157626290, b:158023819 BRANCH=none TEST=make buildall -j Signed-off-by: xiong.huang <xiong.huang@bitland.corp-partner.google.com> Change-Id: Ibb97a41e1d280da7c92cf2c00202b5eb205f99b3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2239599 Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* boten: remove DB type-C port and peripheral chipsxiong.huang2020-06-111-7/+0
| | | | | | | | | | | | | | | | | Remove chips: Charge chip - SM5803 TCPC and USB mux chip - ANX7447 USB retimer chip - TUSB544 BC1.2 chip - PI3USB9201 BUG=b:157626290, b:158023819 BRANCH=none TEST=make buildall -j Signed-off-by: xiong.huang <xiong.huang@bitland.corp-partner.google.com> Change-Id: Iac30f683774368b2b5706c5f804caf549a54139a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2235238 Reviewed-by: Diana Z <dzigterman@chromium.org>
* dedede: npcx7: Enable TCPC Low Power ModeAseda Aboagye2020-06-111-1/+1
| | | | | | | | | | | | | | | | | | This commit enables TCPC low power mode for the npcx7 dedede variants. BUG=b:158218613 BRANCH=None TEST=Build and flash waddledoo, verify that DUT boots, TCPCs enter low power mode, and no watchdog resets are seen. Additionally, verify that PD sinks and sources continue to work. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I988a98f778e5f2c4a2fe8257ea27256d7a70b429 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2239484 Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* Dedede: Enable PD 3.0Diana Z2020-05-301-0/+1
| | | | | | | | | | | | | | Semantics to set PD 3.0 on the v2 stack changed recently, so enable PD 3.0 specifically (rather than it being default) BRANCH=None BUG=None TEST=make -j buidall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I681a406665f7f9673bdf96c0a7c8dfcd13a28186 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2219285 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Waddledee: configure ECH1_PACKET_MODEDiana Z2020-05-211-0/+1
| | | | | | | | | | | | | | This GPIO will be used for communication with the cr50 when EFS2 is enabled. BRANCH=None BUG=b:156785198 TEST=make -j buildall, waddledee boots Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ia1193bf61995ec0f1892a753570f28eaba64ab26 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2210863 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Remove unused CONFIG macrosDaisuke Nojiri2020-05-081-1/+0
| | | | | | | | | | | | | | CONFIG_GPU, CONFIG_USB_SM_FRAMEWORK, CONFIG_BOARD_HAS_AFTER_RSMRST are no longer used. This patch removes them. BUG=b/155996358 BRANCH=none TEST=buildall Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: Ia407850398c07b7cdb01cddb0288ae977b9dca82 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2189171 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* dedede: Add support for S0ixAseda Aboagye2020-04-301-0/+3
| | | | | | | | | | | | | | | | | | Dedede will support S0ix, therefore this commit adds support such that the EC can track those sleep states. BUG=None BRANCH=None TEST=`make -j buildall` TEST=Flash waddledee, verify DUT still boots. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I4dd60bfb91af1f1b257440fbd640b8667225d6da Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2171562 Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
* Dedede: Move waddledee chips out of baseboardDiana Z2020-04-211-11/+0
| | | | | | | | | | | | | | Moves chip specifics (ex. charger, TCPC) from baseboard out to the waddledee board files in anticipation of Wheelie. BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I99bf33d683cc89e6508fbbe305cd0b4c05a53090 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2157949 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* waddledoo/waddledee: Deassert ALL_SYS_PGOOD quicklyAseda Aboagye2020-04-211-0/+3
| | | | | | | | | | | | | | | | | | | | | | | According to tPLT17 in the PDG, the time from SLP_S3_L assertion to VCCIN_EN de-assertion should be less than 200us, but this was not occurring on waddledoo. This commit adds a special interrupt handler in order to meet that timing requirement by immediately deasserting ALL_SYS_PGOOD once SLP_S3_L is asserted. BUG=b:152552074 BRANCH=None TEST=Build and flash waddledoo, boot and shut AP down, verify that the time between SLP_S3_L asserting and ALL_SYS_PGOOD deasserting is less than 200us. TEST=`make -j buildall` Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: Ib34016d5bdfa956f410dde3e3b3074bd306a18f9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2142744 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
* Dedede: Enable 3.0A sourcingDiana Z2020-04-161-0/+1
| | | | | | | | | | | | | | | Enables sourcing of 3.0A to a single port, and also activates the charge manager code which will manage setting current limit values per port. BRANCH=None BUG=b:153906171 TEST=on waddledee, DB can source out 3.0A to a dongle when nothing is connected on the MB Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I2a44771ff869602ede1dba8493314e811fc556af Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2151645 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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