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* ish: Trim down the release branchstabilize-wristpin-14469.59.B-ishstabilize-voshyr-14637.B-ishstabilize-quickfix-14695.187.B-ishstabilize-quickfix-14695.124.B-ishstabilize-quickfix-14526.91.B-ishstabilize-14695.85.B-ishstabilize-14695.107.B-ishstabilize-14682.B-ishstabilize-14633.B-ishstabilize-14616.B-ishstabilize-14589.B-ishstabilize-14588.98.B-ishstabilize-14588.14.B-ishstabilize-14588.123.B-ishstabilize-14536.B-ishstabilize-14532.B-ishstabilize-14528.B-ishstabilize-14526.89.B-ishstabilize-14526.84.B-ishstabilize-14526.73.B-ishstabilize-14526.67.B-ishstabilize-14526.57.B-ishstabilize-14498.B-ishstabilize-14496.B-ishstabilize-14477.B-ishstabilize-14469.9.B-ishstabilize-14469.8.B-ishstabilize-14469.58.B-ishstabilize-14469.41.B-ishstabilize-14442.B-ishstabilize-14438.B-ishstabilize-14411.B-ishstabilize-14396.B-ishstabilize-14395.B-ishstabilize-14388.62.B-ishstabilize-14388.61.B-ishstabilize-14388.52.B-ishstabilize-14385.B-ishstabilize-14345.B-ishstabilize-14336.B-ishstabilize-14333.B-ishrelease-R99-14469.B-ishrelease-R98-14388.B-ishrelease-R102-14695.B-ishrelease-R101-14588.B-ishrelease-R100-14526.B-ishfirmware-cherry-14454.B-ishfirmware-brya-14505.B-ishfirmware-brya-14505.71.B-ishfactory-kukui-14374.B-ishfactory-guybrush-14600.B-ishfactory-cherry-14455.B-ishfactory-brya-14517.B-ishJack Rosenthal2021-11-057-1036/+0
| | | | | | | | | | | | | | | | | | | | | | In the interest of making long-term branch maintenance incur as little technical debt on us as possible, we should not maintain any files on the branch we are not actually using. This has the added effect of making it extremely clear when merging CLs from the main branch when changes have the possibility to affect us. The follow-on CL adds a convenience script to actually pull updates from the main branch and generate a CL for the update. BUG=b:204206272 BRANCH=ish TEST=make BOARD=arcada_ish && make BOARD=drallion_ish Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I17e4694c38219b5a0823e0a3e55a28d1348f4b18 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262038 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org>
* keeby: Update USB PID to 0x5059Aseda Aboagye2021-09-151-1/+1
| | | | | | | | | | | | | | | | | | The allocation for keeby's USB PID never actually landed, so it was taken by another project. A new allocation has been made, and this commit updates the USB PID in the EC to match. BUG=None BRANCH=firmware-keeby-14119.B TEST=`make -j BOARD=lalala` Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: Ie9e05de3fd2488c6f19b607e1323e9d193bb6753 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3163308 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* adc: Update board files to match adc.h refactorCaveh Jalali2021-08-271-1/+1
| | | | | | | | | | | | | | This updates a few board files that were including adc_chip.h instead of adc.h. adc_chip.h should not be included explicitly in most cases. BRANCH=none BUG=b:181271666 TEST=buildall passes Change-Id: I42f8b5b2129ebe18a96d089f0355b581cba1b274 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3120316 Reviewed-by: Keith Short <keithshort@chromium.org>
* dedede: moving buttons and switches to use MKBPBoris Mittelberg2021-08-181-0/+1
| | | | | | | | | | | | | | | | | | Switching config option to route buttons and switches over MKBP instead of 8042 driver BRANCH=main,dedede BUG=b:170966461 TEST=manual tested on Madoo Cq-Depend: chromium:3094530 Signed-off-by: Boris Mittelberg <bmbm@google.com> Change-Id: I5c82ee09a64b1971e63547220ca20c1226cb5ba3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3069163 Reviewed-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Tested-by: Nick Vaccaro <nvaccaro@google.com> Commit-Queue: Paul Fagerburg <pfagerburg@chromium.org>
* flash: Set CBI EEPROM WP immediately if SW WP setAseda Aboagye2021-07-301-0/+1
| | | | | | | | | | | | | | | | | | | | | | With `CONFIG_EEPROM_CBI_WP`, the EC will set the the CBI EEPROM WP according to `system_is_locked`. The system lock status is also cached. In order to prevent requiring an EC reboot after setting the software write protect status, this commit will set the CBI EEPROM WP status when the SW WP is asserted along with the HW WP. This is the same criteria that `system_is_locked` would use when deciding if the system is locked. BUG=b:181769483 BRANCH=None TEST=Build and flash a reworked lalala, enable HW WP, enable SW WP via `flashrom -p ec --wp-enable` and verify that EC_CBI_WP is asserted immediately without requiring an EC reboot. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I987a5b7652134be11c82855aab9ed4eb1442b57c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3058077 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* keeby: Add GPIO_EC_CBI_WPAseda Aboagye2021-07-291-0/+3
| | | | | | | | | | | | | | | | | This commit simply adds the GPIO_EC_CBI_WP pin for the keeby boards and also sets CONFIG_EEPROM_CBI_WP. BUG=b:181769483 BRANCH=None TEST=`make -j buildall` Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I31694cb748d8b8a197b84634fbd9417d274a79d7 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3046413 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* cappy2:initial ECwangganxiang2021-07-221-0/+2
| | | | | | | | | | | | | | | create Cappy2 BUG=b:191718716 BRANCH=Keeby TEST=make BOARD=cappy2 pass Signed-off-by: wangganxiang <wangganxiang@huaqin.corp-partner.google.com> Change-Id: Id374b76eb020d429c5281ed6e9b7d1d7050c62d0 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3020642 Reviewed-by: Mike Lee <mike5@huaqin.corp-partner.google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* dedede: Make scope of SSFC definition per boardParth Malkan2021-07-193-124/+1
| | | | | | | | | | | | | | | | | | | | | | SSFC bit definition started diverging between coreboot and EC. To avoid conflicts move the definitions of SSFC bits within EC to per board instead of at a baseboard level. Base sensor and Lid sensor components are common across all boards Base Sensor - bits 0-2 Lid Sensor - bits 3-5 In addition, Sasuke uses bits 6-8 for usb superspeed mux Cret board uses bits 9-11 in coreboot for audio codec BRANCH=firmware-dedede-13606.B BUG=b:187694527 TEST=make buildall Signed-off-by: Parth Malkan <parthmalkan@google.com> Change-Id: Ib0f732e5d41668135ff180c545ff4bb6a1cb1427 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3021932 Reviewed-by: YH Lin <yueherngl@chromium.org> Reviewed-by: Marco Chen <marcochen@chromium.org>
* dedede: Enable CONFIG_ASSERT_CCD_MODE_ON_DTS_CONNECTRob Barnes2021-07-021-0/+5
| | | | | | | | | | | | | | | | | | Enable CONFIG_ASSERT_CCD_MODE_ON_DTS_CONNECT on all dedede boards. This will assert GPIO_CCD_MODE_ODL when a debug device is connected to a CCD port. GPIO_CCD_MODE_ODL must be configured as an open drain so EC and Cr50 don't drive fight. BUG=b:190189242 TEST=Build dedede BRANCH=None Change-Id: I2d71312967f2d4a693ac9753279f49478e8c092c Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2976759 Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Diana Z <dzigterman@chromium.org>
* keeby/dedede: Gate temp sensor access by GPIOAseda Aboagye2021-06-291-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | On dedede and keeby boards, the thermistors are powered by the EC's GPIO_EN_PP3300_A pin. If the thermistors are read before they are powered then the EC may force a thermal shutdown due to the bad reading. This commit simply defines CONFIG_TEMP_SENSOR_POWER_GPIO along with a CONFIG_TEMP_SENSOR_FIRST_READ_DELAY_MS to ensure we don't get any false positive thermal shutdowns. BUG=b:192053176 BRANCH=dedede TEST=Build and flash lalala. Unplug AC charger from DUT, press refresh+power button to reset DUT, verify that DUT boots up automatically. TEST=Repeat above test with madoo. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I2a49e2f896c4120a8f01f440ea22c9b3763c6589 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2988364 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* chgstv2: Unify power-on and shutdown battery thresholdsDaisuke Nojiri2021-06-231-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, power-on battery SoC and shutdown battery SoC are independently configured by each board. This patch will unify the setting as follows: CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON = 2 (don't boot if soc < 2%) CONFIG_BATT_HOST_SHUTDOWN_PERCENTAGE = 2 (shutdown if soc <= 2%) BATTERY_LEVEL_SHUTDOWN = 3 (shutdown if soc < 3%) CONFIG_BATTERY_EXPORT_DISPLAY_SOC = Y (removed) CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON_WITH_AC = 1 This allows us to show the low battery alert whenever we can because EC doesn't inhibit power-on even if it knows the host would immediately shut down. With CONFIG_BATTERY_EXPORT_DISPLAY_SOC, boards will start using the CONFIG_BATT_HOST_SHUTDOWN_PERCENTAGE = 2% as the low battery threshold (and the SoC will be agreed between the EC and Powerd). Boards with CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON = 1 will keep the same threshold. This is for avoiding degrading the UX by increasing the power-on threshold (even though a question that 1% may not be enough for soft sync to finish consistently remains to be answered). Boards with CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON > 2 will have a lower threshold but we think 2% is enough to finish the software sync. A lower threshold also improves the UX by showing the low battery alert in the situation where otherwise the system would leave the user uninformed by not responding to a power button press. BUG=b:191837893 BRANCH=None TEST=buildall Change-Id: If6ff733bc181f929561a3fffb8a84e760668ce37 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2981468 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Metaknight: Reduce i2c frequency to support eeprom 2nd sourceYu-An Chen2021-06-211-1/+1
| | | | | | | | | | | | | Reduce i2c eeprom port frequency to 400kHz from 1000KHz. BUG=b:191414126 BRANCH=dedede TEST=check ectool cbi set/get working in Both source Signed-off-by: yu-an.chen@quanta.corp-partner.google.com Change-Id: I00b0b4b7a8657d934bd139b31546147d3c851c20 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2972524 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* config: Rename CONFIG_CROS_BOARD_INFOPhilip Chen2021-06-161-1/+1
| | | | | | | | | | | | | | | | | | Rename CONFIG_CROS_BOARD_INFO to CONFIG_CBI_EEPROM to make it clear that the information comes from on-board EEPROM. It sets up the groundwork for adding more options of CBI sources later. BRANCH=None BUG=b:186264627 TEST=make buildall -j Signed-off-by: Philip Chen <philipchen@google.com> Change-Id: I9a6feee0a8b35bbf29e445544243485507767ad8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2945792 Reviewed-by: Philip Chen <philipchen@chromium.org> Commit-Queue: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org>
* dedede: Add HDMI Feature in cbi_fw_configjohnwc_yeh2021-06-082-0/+17
| | | | | | | | | | | | | | | | | Add the 17th bit of fw-config to judge whether it supports HDMI feature. BUG=b:189415302 b:183301456 BRANCH=dedede TEST=make BOARD=cret Signed-off-by: johnwc_yeh <johnwc_yeh@compal.corp-partner.google.com> Change-Id: I4f1ee675a0be75173a720632d99c102327d33aa3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2939175 Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* storo: Add motion sensor config for lis2dwl/icm-42607Mike Lee2021-06-031-2/+4
| | | | | | | | | | | | | | | | | Add icm-42607 config for new second source base accel/gyro, and lis2dwl lid accel config for new second source. BUG=b:188373185,b:188373186 BRANCH=dedede TEST=Using ectool 'motionsense' verified lid angle goes from 0 to 360 and swtiches to tablet mode after crossing 200 threshold on re-work lis2dwl/icm-42607 DUT. Signed-off-by: Mike Lee <mike5@huaqin.corp-partner.google.com> Change-Id: I2080816aeb0f5f542d773b8dbe219dbe6efd4226 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2912409 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* Cret: Add SSFC settings for audio codecjohnwc_yeh2021-06-031-0/+5
| | | | | | | | | | | | | | | | Add bits 9 - 11 are for SSFC audio codec. BUG=b:189524295 BRANCH=dedede TEST=make BOARD=cret Signed-off-by: johnwc_yeh <johnwc_yeh@compal.corp-partner.google.com> Change-Id: I6507e8196b7738935837ae00e57941e805cb4bc5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2928677 Reviewed-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Elthan Huang <elthan_huang@compal.corp-partner.google.com> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* dedede: Update cbi_fw_configTommy Chung2021-05-251-1/+4
| | | | | | | | | | | | | | | | Add DB FW_config with DB_1C_1A_LTE, DB_1C, DB_1A_HDMI_LTE, and rename the original DB_1C to DB_1C_1A to meet FW_Config Sheet. BUG=b:186393848 BRANCH=dedede TEST=make -j buildall Signed-off-by: Tommy Chung <tommy.chung@quanta.corp-partner.google.com> Change-Id: I1db8e51ab5ec53255652708837fe7c299b2f26e3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2902070 Reviewed-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-by: Henry Sun <henrysun@google.com> Commit-Queue: Henry Sun <henrysun@google.com>
* dedede: Rework `extpower_is_present()`Aseda Aboagye2021-05-191-11/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | The dedede boards erroneously assumed that if VBUS was present, then "extpower" was present. "extpower" is generally connected to the ACOK signal for the battery charger IC. It indicates that the voltage present at the switching node is valid for bucking or boosting. For our Type-C systems, this needs to be at least 4V. However, just because VBUS is present doesn't mean that the voltage is present at the switching node. The FETs on the selected charge port needs to be enabled first. This commit simply changes the logic to check the battery charger ICs' ACOK status to reflect whether extpower is present. BUG=b:187965740 BRANCH=dedede TEST=Build and flash drawcia and madoo, verify that "AC on" prints are emitted when the charge port is selected and not just when VBUS appears on the port. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: If5a4a10d502f2f08ccf1d3228e42f48fa6d45909 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2901254 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* config: Populate CONFIG_SUPPRESSED_HOST_COMMANDSGwendal Grignou2021-05-191-4/+0
| | | | | | | | | | | | | | | | | | | | | Commands that are send peridically or in high number are not reported on the console through CONFIG_SUPPRESSED_HOST_COMMANDS variable. Use the same set of commands throughout to avoid misses like newer command EC_CMD_GET_UPTIME_INFO. BUG=none BRANCH=none TEST=buildall Signed-off-by: Gwendal Grignou <gwendal@google.com> Change-Id: I0041576538a8cc659c262118b1503777b9ea8578 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2851452 Reviewed-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Craig Hesling <hesling@chromium.org> Tested-by: Gwendal Grignou <gwendal@chromium.org> Commit-Queue: Gwendal Grignou <gwendal@chromium.org>
* baseboard/dedede: Fix compilation errorTom Hughes2021-05-031-2/+5
| | | | | | | | | | | | | | | | | Fixes the following compiler error when using clang: error: macro expansion producing 'defined' has undefined behavior [-Werror,-Wexpansion-to-defined] BRANCH=none BUG=b:144959033 TEST=make buildall TEST=./util/compare_build.sh -b all -j 70 Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I22466f5bc98071100613e4d86b62ce485e3372fe Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2862504 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* magister: config C1 port HDMI/PD function by fw_configBen Chen2021-04-261-1/+2
| | | | | | | | | | | | | | | switch GPIO F5/91/92 type by fw_config for 1A_HDMI/PD function BUG=b:185872184 BRANCH=dedede TEST=EE check with function workable for HDMI by fw_config 1A_HDMI bits map. Change-Id: Id9405b2acf1a163c233239339886c984d00dc544 Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2839967 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* dedede : fix alignment in cbi_ssfcYongBeum.Ha2021-04-222-7/+7
| | | | | | | | | | | | | | fix bit alignment in cbi_ssfc BUG=b:186067339 BRANCH=none TEST=make -j BOARD=sasuke Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com> Change-Id: I15902938ddefe27aeb36530008cfb899440c9d15 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2845195 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* dedede: Add USB SS MUX to SSFCAseda Aboagye2021-04-132-1/+23
| | | | | | | | | | | | | | | | | | | This commit adds a new 3-bit field to the SSFC to accommodate multiple USB SuperSpeed muxes. The first of these variants is the Parade PS8743B. BUG=b:184706456 BRANCH=dedede TEST=`make -j BOARD=sasuke` Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: Ie9bc0b6665efd8dc493bb4a7c0bce787fbfdeb21 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2821600 Reviewed-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com> Reviewed-by: Diana Z <dzigterman@chromium.org> Tested-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
* keeby/lalala: Initial commitAseda Aboagye2021-04-024-8/+34
| | | | | | | | | | | | | | | | This is the initial commit for lalala, a NPCX797FC variant of keeby. BUG=b:184191507 BRANCH=None TEST=`make -j BOARD=lalala` Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I0420cf7252cba5571fe82d0d88d4dccc5d866782 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2798524 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* Dedede: Add CONFIG_CHIPSET_RESET_HOOKDiana Z2021-03-311-0/+1
| | | | | | | | | | | | | | | | | The chipset reset hook can be used to detect scenarios where the AP rebooted. This will enable features such as resetting our discovery flags for the kernel after a warm reboot. BRANCH=None BUG=None TEST=make -j buildall; run on drawcia and confirm we boot and show discovery events resetting after AP reboot Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I0593ae0f8aa1fba6d497bd199a1606afc25b8a30 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2798294 Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Sasukette: Initial EC imageMike Lee2021-02-042-3/+5
| | | | | | | | | | | | | | | | | Initial EC image for Sasukette 1. Only One typeC port 2. Have no motionsense BUG=b:177193132 BRANCH=dedede TEST=make BOARD=sasukette pass boot device successfully Signed-off-by: Mike Lee <mike5@huaqin.corp-partner.google.com> Change-Id: I53116d7bbc29f7cc13bdb51676cd88cf379ddd22 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2652827 Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* dedede : adjust PCH_PWROK signalYongBeum.Ha2021-02-011-0/+1
| | | | | | | | | | | | | | Set PCH_PWROK to low when SLP_S3 is asserted BUG=b:178052179 BRANCH=none TEST=make -j BOARD=sasuke Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com> Change-Id: I6a1dcc146668334026bb01af06d1a11f9d2d6903 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2652829 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* dedede: Add MKBP_EVENT to baseboardEvan Green2021-01-261-0/+4
| | | | | | | | | | | | | | | | | | CtsSensorTestCases is failing on Drawcia because it requests 100 events from accelerometer and gyroscope but gets zero. We can read sensor events just fine, but they never seem to push to the kernel. Add CONFIG_MKBP_EVENT into the baseboard, and then clean up all the one-off variants that have added this themselves. Also, add some accel commands specific to drawcia for easier debugging. BUG=b:171939568 BRANCH=none TEST=Use amstan's script, which amounts to cat /dev/iio:deviceN Signed-off-by: Evan Green <evgreen@chromium.org> Change-Id: Ia796ec2f9a08d3628dcabb4b5fca425693af4099 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2638636 Reviewed-by: Diana Z <dzigterman@chromium.org>
* Metaknight: Support motion sensor 2nd sourceYu-An Chen2021-01-231-1/+2
| | | | | | | | | | | | | | | | | | Support motion sensor 2nd source: -Lid : KX022 -Base : LSM6DSM BUG=b:177868819 BRANCH=main TEST=rework KX022/LSM6DSM on DUT, check ectool motionsense lid_angle is correct. Signed-off-by: yu-an.chen@quanta.corp-partner.google.com Change-Id: If61addd7ca182ff9c3d3e87e1f77076236a006d6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2641705 Tested-by: Yu-An Chen <yu-an.chen@quanta.corp-partner.google.com> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Henry Sun <henrysun@google.com>
* config: Provide default VCONN Swap delayAbe Levkoy2021-01-221-1/+0
| | | | | | | | | | | | | | | | | Almost every relevant board copy-pastes 5000 us. Make that the default and get rid of the redundant definitions. This is the approximate result of this command: find . -type f -name *.h | xargs sed -i -E \ '/#define CONFIG_USBC_VCONN_SWAP_DELAY_US[[:space:]]+5000[[:space:]]/d' BUG=b:144165680 TEST=make buildall BRANCH=none Change-Id: Ife86f9752971abcd7ab5ad5a5e607eb2ccbde2ba Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2628132 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* config: Make VCONN Swap delay a documented optionAbe Levkoy2021-01-221-1/+1
| | | | | | | | | | | | | | | | | | | | | Replace PD_VCONN_SWAP_DELAY with CONFIG_USBC_VCONN_SWAP_DELAY_US. This is the approximate result of the following command, run from platform/ec: find . -type f -\( -name '*.c' -o -name '*.h' -\) | \ xargs sed -iE 's/PD_VCONN_SWAP_DELAY/CONFIG_USBC_VCONN_SWAP_DELAY/g' Fix some latent formatting errors in usb_pd_protocol.c, because they were preventing pre-upload hooks from passing. BUG=b:144165680 TEST=make buildall BRANCH=none Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: Icaf3b309c08fdcd162e960cf5dc88185016b5d2d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2628131 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* Refactor CONFIG_FLASH_SIZE to CONFIG_FLASH_SIZE_BYTESYuval Peress2021-01-151-1/+1
| | | | | | | | | | | | | | | | | | | | | In Zephyr CONFIG_FLASH_SIZE is a Kconfig value that is used throughout. The issue is that the units don't match. In Zephyr the value is in KiB instead of bytes. This refactor simply renames CONFIG_FLASH_SIZE in platform/ec to include the unit (via _BYTES). BRANCH=none BUG=b:174873770 TEST=make buildall be generated by the build instead of per board Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: I44bf3c7a20fcf62aaa9ae15715be78db4210f384 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2627638 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
* Dedede: Initiate the first version of parsing SSFC of CBIBen Chen2021-01-093-2/+95
| | | | | | | | | | | | | | Initiate the helper functions to parse the SSFC of CBI. The first component define lid / base sensors in this version. BUG=b:176314158, b:176314157 BRANCH=main TEST=Make buildall PASS. Change-Id: I1dbf06b7f2c8037a98e4d4c5c3d7beee556270ce Signed-off-by: Ben Chen <ben.chen2@quanta.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2603092 Reviewed-by: Diana Z <dzigterman@chromium.org>
* Metaknight: Remove USB C1Yu-An Chen2021-01-071-0/+1
| | | | | | | | | | | | | | | | | | | | | | Add DB_LTE_HDMI in dedede fw_config_db Remove metaknight USB C1 port Remove C1 PD task and PD int task Remove OCPC BUG=b:176275423 BRANCH=main TEST=make BOARD=metaknight TEST=make BOARD=metaknight_legacy TEST=make buildall -j4 TEST=check EC console ,EC will not init DB raa489000. Signed-off-by: yu-an.chen@quanta.corp-partner.google.com Change-Id: Ibd86ee852ba870a95e5b552588c7f81ce77a122d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2603095 Tested-by: Yu-An Chen <yu-an.chen@quanta.corp-partner.google.com> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org> Auto-Submit: Yu-An Chen <yu-an.chen@quanta.corp-partner.google.com>
* TCPMv2: Update source-out configsDiana Z2020-12-241-1/+0
| | | | | | | | | | | | | | | | | | | | Now that the DPM will be handling source-out decisions for TCPMv2, remove references to its old configuration options from TCPMv2 boards in order to avoid any confusion as to what code is running now. Also remove the charge manager notifications of sink attach/detach since the policy is being centralized into the DPM. Note that the previous configuration options only ever allocated one 3.0 A port, and so the default number of 3.0 A ports has been set to 1. BRANCH=None BUG=b:168862110,b:141690755 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ie452e3da32b04226503539daa67b6b9f4a58aa58 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2597431 Reviewed-by: Keith Short <keithshort@chromium.org>
* galtic: Implement keyboard function.Michael5 Chen2020-12-222-0/+17
| | | | | | | | | | | | | | The galtic/galnat keyboard without keyboard numpad. The galith keyboard with keyboard numpad. BUG=b:175857578 BRANCH=dedede TEST=make BOARD=galtic Signed-off-by: Michael5 Chen <michael5_chen1@pegatron.corp-partner.google.com> Change-Id: I6c143105e67fab207ef50be87ea06caa22e59107 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2597128 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* sasuke : apply EC change in sasukeYongBeum.Ha2020-12-091-0/+4
| | | | | | | | | | | | | | | Sync with schematics of sasuke BUG=b:172869638 BRANCH=None TEST=make BOARD=sasuke Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com> Change-Id: Ib19431e2f4dd6b9da1e5f2e06a44883496bead54 Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2569070 Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Raymond Chung <raymondchung@ami.corp-partner.google.com>
* power: move headers to include/powerJack Rosenthal2020-12-031-1/+1
| | | | | | | | | | | | | | This makes the headers visible to the Zephyr build. BUG=b:173798264 BRANCH=none TEST=buildall Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I3b6d27c1234b3924ee8902a86eec5fdb2ccd9998 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2571897 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* Dedede: Bail out of hibernate if z-state failsDiana Z2020-12-021-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | If we fail to enter z-state, this likely indicates that the z-state circuitry is in a state from which wake sources will not work. This would mean the EC would hibernate until a refresh+power sequence is run. Instead, choose to reset the system with the AP off. The battery will drain more quickly, but will be able to turn on when the power button is pressed normally. BRANCH=dedede BUG=b:166476907 TEST=on drawcia, remove C1 interrupt line sharing and wedge line low. Ensure "hibernate" run on the EC console from both S0 and G3 results in a reset with the AP off, and the system can be turned on with a power button press. Run with normal C1 interrupt line sharing in place and verify "hibernate" enters z-state as expected in S0 and G3. Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I8408522dd1b0bbbce6f4e2bf6d0c550febd27bbf Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2567582 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* COIL: Rename CONFIG_I2C_CONTROLLERDiana Z2020-11-051-1/+1
| | | | | | | | | | | | | Rename CONFIG_I2C_CONTROLLER and related comments. BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ied6a1829bf54a5c9a32e6772982a4b8aa31aaf23 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2518659 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* tree: Use new atomic_* implementationDawid Niedzwiecki2020-10-272-4/+4
| | | | | | | | | | | | | | | | | | | | | | | It is done as a part of porting to Zephyr. Since the implementation of atomic functions is done for all architectures use atomic_* instead of deprecated_atomic_*. Sometimes there was a compilation error "discards 'volatile' qualifier" due to dropping "volatile" in the argument of the functions, thus some pointers casts need to be made. It shouldn't cause any issues, because we are sure about generated asm (store operation will be performed). BUG=b:169151160 BRANCH=none TEST=buildall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I98f590c323c3af52035e62825e8acfa358e0805a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2478949 Tested-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org>
* it83xx: enable selecting EC's VCCDino Li2020-10-081-0/+3
| | | | | | | | | | | | | | | | | | | The VCC is the power source of EC's GPM0~6, will connect to 1.8v or 3.3v depended on platform design. This change was made to ensure voltage level setting of GPM0~6 matches the corresponded VCC level. So we can enable internal pull-up no matter VCC is connected to 1.8v or 3.3v BUG=b:168783892 BRANCH=none TEST=- buildall. - The level setting is correct on these boards: asurada, drawcia, and reef_it8320 Change-Id: I4eae368e569987381a0437494262d588436bb011 Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2397931 Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
* core: rename atomic_clear to atomic_clear_bitsDawid Niedzwiecki2020-10-062-2/+2
| | | | | | | | | | | | | | | | | | Change the name of atomic_clear to atomic_clear_bits to make to name more clear - the function clears only selected bits, but the name may suggest that it clears the whole variable. It is done as a part of porting to Zephyr, where atomic_clear zeros the variable. BUG=b:169151160 BRANCH=none TEST=buildall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I7b0b47959c6c54af40f61bca8d9baebaa0375970 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2428943 Reviewed-by: Jett Rink <jettrink@chromium.org>
* npcx: add ADC support for NPCX9 and remove the deassertion thresholdWealian Liao2020-10-051-2/+0
| | | | | | | | | | | | | | | | | | | 1. Two more ADC channels are added to NPCX9. 2. Remove the three de-assertion threshold detectors in the ADC module because this function is not very useful from the application point of view. 3. Add three more threshold event detectors (from 3 to 6.) BRANCH=none BUG=b:165777478 TEST=pass "make buildall" TEST=Read all ADC channels by the console command 'ADC'. Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com> Change-Id: I64cc9caf8be7e7546e161931ed42d0ea4dda4b47 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2434603 Tested-by: CH Lin <chlin56@nuvoton.com> Reviewed-by: caveh jalali <caveh@chromium.org> Commit-Queue: CH Lin <chlin56@nuvoton.com>
* Dedede: Remove requirement for >15W to boot with no batteryDiana Z2020-09-291-1/+0
| | | | | | | | | | | | | | | Allow dedede boards to boot with only a 15W charger present. BRANCH=None BUG=b:166003337,b:168730307 TEST=on waddledoo and waddledee, confirm board can boot to S0 and remain there with a 15W charger in C0 or in C1 and no battery Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I24f8f2f13bb2b2ba92ba6e2b87db569bd023e5c7 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2438670 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* tree: rename atomic_* functions to deprecated_atomic_*Jack Rosenthal2020-09-292-4/+4
| | | | | | | | | | | | | | | | We will move to an API compatible with Zephyr's API. See the bug for complete rationale and plan. BUG=b:169151160 BRANCH=none TEST=buildall Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: Id611f663446abf00b24298a669f2ae47fef7f632 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2427507 Tested-by: Dawid Niedźwiecki <dn@semihalf.com> Reviewed-by: Tom Hughes <tomhughes@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Dedede: Remove DAC for boards using ITE+SM combinationDiana Z2020-09-281-2/+0
| | | | | | | | | | | | | | | For boards which are using the SM charger chips, they will have a Psys offset register to generate the OCPC Psys output. BRANCH=None BUG=b:168783892 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ib963ed11f73a76dfeffa11d5ab4a81ccbbd71102 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2435746 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* dedede: Set CONFIG_BATTERY_REQUESTS_NIL_WHEN_DEADAseda Aboagye2020-09-281-0/+1
| | | | | | | | | | | | | | | | | | Some dedede batteries have a charge request of (0,0) when the battery is completely depleted. Enable this config option to help revive those batteries. BUG=None BRANCH=None TEST=Build and flash drawcia, drain battery until it's dead, plug in a charger on C1 and verify that the battery can be revived. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I9206120a0c36813cbcd5618fe595faf57741ac47 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2431696 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* dedede/variant_it8320: increase uart tx buffer sizeDino Li2020-09-231-0/+3
| | | | | | | | | | | | | | | | This change increased console output buffer to avoid losing output message since we have the memory space available (17832 bytes in RAM still available on drawcia). BUG=none BRANCH=none TEST=more console message is visible on drawcia after ec reset. Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Change-Id: I660f0114bc2c569b74d35bdbbd63e5819979555b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2423647 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* dedede: add FW_CONFIG field for Keyboard Type supportLeo-Tsai2020-09-162-0/+11
| | | | | | | | | | | | | | | This patch add FW_CONFIG field for Keyboard Type Support BUG=none BRANCH=none TEST=none Signed-off-by: Leo-Tsai <leocx_tsai@compal.corp-partner.google.com> Change-Id: Idb9a352f40abab791e3162470efe8fe242027af5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2402461 Reviewed-by: Henry Sun <henrysun@google.com> Reviewed-by: YH Lin <yueherngl@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
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