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* tree: Use new atomic_* implementationDawid Niedzwiecki2020-10-272-4/+4
| | | | | | | | | | | | | | | | | | | | | | | It is done as a part of porting to Zephyr. Since the implementation of atomic functions is done for all architectures use atomic_* instead of deprecated_atomic_*. Sometimes there was a compilation error "discards 'volatile' qualifier" due to dropping "volatile" in the argument of the functions, thus some pointers casts need to be made. It shouldn't cause any issues, because we are sure about generated asm (store operation will be performed). BUG=b:169151160 BRANCH=none TEST=buildall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I98f590c323c3af52035e62825e8acfa358e0805a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2478949 Tested-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org>
* it83xx: enable selecting EC's VCCDino Li2020-10-081-0/+3
| | | | | | | | | | | | | | | | | | | The VCC is the power source of EC's GPM0~6, will connect to 1.8v or 3.3v depended on platform design. This change was made to ensure voltage level setting of GPM0~6 matches the corresponded VCC level. So we can enable internal pull-up no matter VCC is connected to 1.8v or 3.3v BUG=b:168783892 BRANCH=none TEST=- buildall. - The level setting is correct on these boards: asurada, drawcia, and reef_it8320 Change-Id: I4eae368e569987381a0437494262d588436bb011 Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2397931 Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
* core: rename atomic_clear to atomic_clear_bitsDawid Niedzwiecki2020-10-062-2/+2
| | | | | | | | | | | | | | | | | | Change the name of atomic_clear to atomic_clear_bits to make to name more clear - the function clears only selected bits, but the name may suggest that it clears the whole variable. It is done as a part of porting to Zephyr, where atomic_clear zeros the variable. BUG=b:169151160 BRANCH=none TEST=buildall Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com> Change-Id: I7b0b47959c6c54af40f61bca8d9baebaa0375970 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2428943 Reviewed-by: Jett Rink <jettrink@chromium.org>
* npcx: add ADC support for NPCX9 and remove the deassertion thresholdWealian Liao2020-10-051-2/+0
| | | | | | | | | | | | | | | | | | | 1. Two more ADC channels are added to NPCX9. 2. Remove the three de-assertion threshold detectors in the ADC module because this function is not very useful from the application point of view. 3. Add three more threshold event detectors (from 3 to 6.) BRANCH=none BUG=b:165777478 TEST=pass "make buildall" TEST=Read all ADC channels by the console command 'ADC'. Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com> Change-Id: I64cc9caf8be7e7546e161931ed42d0ea4dda4b47 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2434603 Tested-by: CH Lin <chlin56@nuvoton.com> Reviewed-by: caveh jalali <caveh@chromium.org> Commit-Queue: CH Lin <chlin56@nuvoton.com>
* Dedede: Remove requirement for >15W to boot with no batteryDiana Z2020-09-291-1/+0
| | | | | | | | | | | | | | | Allow dedede boards to boot with only a 15W charger present. BRANCH=None BUG=b:166003337,b:168730307 TEST=on waddledoo and waddledee, confirm board can boot to S0 and remain there with a 15W charger in C0 or in C1 and no battery Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I24f8f2f13bb2b2ba92ba6e2b87db569bd023e5c7 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2438670 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* tree: rename atomic_* functions to deprecated_atomic_*Jack Rosenthal2020-09-292-4/+4
| | | | | | | | | | | | | | | | We will move to an API compatible with Zephyr's API. See the bug for complete rationale and plan. BUG=b:169151160 BRANCH=none TEST=buildall Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: Id611f663446abf00b24298a669f2ae47fef7f632 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2427507 Tested-by: Dawid Niedźwiecki <dn@semihalf.com> Reviewed-by: Tom Hughes <tomhughes@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Dedede: Remove DAC for boards using ITE+SM combinationDiana Z2020-09-281-2/+0
| | | | | | | | | | | | | | | For boards which are using the SM charger chips, they will have a Psys offset register to generate the OCPC Psys output. BRANCH=None BUG=b:168783892 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ib963ed11f73a76dfeffa11d5ab4a81ccbbd71102 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2435746 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* dedede: Set CONFIG_BATTERY_REQUESTS_NIL_WHEN_DEADAseda Aboagye2020-09-281-0/+1
| | | | | | | | | | | | | | | | | | Some dedede batteries have a charge request of (0,0) when the battery is completely depleted. Enable this config option to help revive those batteries. BUG=None BRANCH=None TEST=Build and flash drawcia, drain battery until it's dead, plug in a charger on C1 and verify that the battery can be revived. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I9206120a0c36813cbcd5618fe595faf57741ac47 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2431696 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* dedede/variant_it8320: increase uart tx buffer sizeDino Li2020-09-231-0/+3
| | | | | | | | | | | | | | | | This change increased console output buffer to avoid losing output message since we have the memory space available (17832 bytes in RAM still available on drawcia). BUG=none BRANCH=none TEST=more console message is visible on drawcia after ec reset. Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Change-Id: I660f0114bc2c569b74d35bdbbd63e5819979555b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2423647 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* dedede: add FW_CONFIG field for Keyboard Type supportLeo-Tsai2020-09-162-0/+11
| | | | | | | | | | | | | | | This patch add FW_CONFIG field for Keyboard Type Support BUG=none BRANCH=none TEST=none Signed-off-by: Leo-Tsai <leocx_tsai@compal.corp-partner.google.com> Change-Id: Idb9a352f40abab791e3162470efe8fe242027af5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2402461 Reviewed-by: Henry Sun <henrysun@google.com> Reviewed-by: YH Lin <yueherngl@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* Dedede: Disable pull-ups on C0 and C1 interrupts before z-stateDiana Z2020-09-091-0/+4
| | | | | | | | | | | | | | | | Disabling pull-ups on the C0 and C1 interrupt lines before z-state prevents EN_PP3300_G_L from being pulled down. BRANCH=None BUG=b:153684907 TEST=on waddledee, verify EN_PP3300_G_L is no longer pulled down as z-state is entered Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ia5614bf32fe1a77255d990bc610fe2f09cf502c4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2391214 Tested-by: Divagar Mohandass <divagar.mohandass@intel.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* baseboard/dedede: Enable PD control command handlerKarthikeyan Ramasubramanian2020-09-091-0/+1
| | | | | | | | | | | | | | To enable PD Firmware update, enable PD control command handler. BUG=b:159832325 BRANCH=None TEST=Build and ensure that the PD control command is enabled. Change-Id: I3bd12e29b65575bca08fede9544dff409ba38004 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2382552 Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* Dedede: Move Discharge on AC config to baseboardDiana Z2020-08-271-0/+1
| | | | | | | | | | | | | | | | Now that the SM5803 has support for discharge on AC, move this configuration into the baseboard. BRANCH=None BUG=b:164256610 TEST=on drawlat with a charger in C0, ensure "ectool chargecontrol discharge" shows battery discharging and "ectool chargecontrol normal" shows battery charging again. Repeat on C1 Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ib058095330481fc4aa2f1016ccec6c77b047d8f5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2376467 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Dedede: Move PWM to board levelDiana Z2020-08-212-27/+0
| | | | | | | | | | | | | | | | Move the PWM related defines and arrays into the board level, to allow customization of what PWM channels boards use (if they choose to use the PWM at all). BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Id417a7be079511c17de9f2e5d03c729467435804 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2358899 Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* config: Require battery >5% to enable PD Try.SRCWai-Hong Tam2020-08-181-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Align the CONFIG_USB_PD_TRY_SRC_MIN_BATT_SOC to the value of BATTERY_LEVEL_CRITICAL, which is 5%. The BATTERY_LEVEL_CRITICAL is 5% that means EC will send battery- critical host event when the battery level <= 5%. CrOS PD policies state that the system doesn't source power to any external USB devices when AP is shutdown. So the current CONFIG_USB_PD_TRY_SRC_MIN_BATT_SOC 1% default has no point. When the battery level is <= 5%, AP should be shutdown soon and the system should not be a source, so should not enable Try.SRC. Also change the comparison from soc >= CONFIG_USB_PD_TRY_SRC_MIN_BATT_SOC to soc > CONFIG_USB_PD_TRY_SRC_MIN_BATT_SOC as the battery critical check is soc <= BATTERY_LEVEL_CRITICAL. BRANCH=None BUG=b:165057418 TEST=Plugging a PD charger to a board with the battery level very low, the system boots up (was failed), Change-Id: If6b11feacd62fd003e13b1756eb5c33d2f9bbce4 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2360543 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Dedede: Lower EEPROM i2c speedDiana Z2020-08-171-1/+1
| | | | | | | | | | | | | | | | For ITE variants of dedede, lower the EEPROM i2c speed to 400 kHz. This allows more options for EEPROM parts, but still gives a good speed for flashing the EC. BRANCH=None BUG=b:163846709 TEST=on drawlat, flash and verify CBI can still be read from the EC Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Id7d8190c80e7ff7b75ac0a25af12e7b137ddaaca Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2360457 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* Clean up: set embedded flash clock 48MHz as defaultRuibin Chang2020-08-171-3/+0
| | | | | | | | | | | | | | | | For chip it8xxx2 series and it8320dx, we set embedded flash clock 48MHz as default. BUG=none BRANCH=none TEST=build all Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw> Change-Id: I100d70fbf80430ae98fa14c557886c4a37d8b93a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2355164 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Ruibin Chang <Ruibin.Chang@ite.com.tw> Tested-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
* baseboard/dedede: Enable AP reset command handlerKarthikeyan Ramasubramanian2020-08-131-0/+6
| | | | | | | | | | | | | | | | | | | | TPMs with old firmware version cannot detect AP initiated reset eg. AP gets reset when CSE Lite SKU jumps from RO to RW. Enable AP reset command handler so that AP can request EC to perform the reset. This will lead to TPM detecting the AP reset. BUG=b:162386991 BRANCH=None TEST=Ensure that the EC handles AP reset command. Ensure that the device boots to OS after the reset. Change-Id: I1e167af89aaa28c731674ee3650904d702efc8df Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2337430 Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Commit-Queue: Karthikeyan Ramasubramanian <kramasub@chromium.org>
* dedede: Enable CONFIG_CMD_CHARGER_DUMPAseda Aboagye2020-08-051-1/+2
| | | | | | | | | | | | | | | | The `charger_dump` command is currently useful for these boards. BUG=None BRANCH=None TEST=Build drawcia, verify charger_dump command is present. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I29cc70113be1c3c3096668c6d5969c4f755f915b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2339843 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* ec: change usage of dummySam Hurst2020-08-052-4/+4
| | | | | | | | | | | | | | | | | | Google is working to change its source code to use more inclusive language. To that end, replace the term "dummy" with inclusive alternatives. BUG=b:162781382 BRANCH=None TEST=make -j buildall `grep -ir dummy *` The only results are in "private/nordic_keyboard/sdk8.0.0" which is not our code. Signed-off-by: Sam Hurst <shurst@google.com> Change-Id: I6a42183d998e4db4bb61625f962867fda10722e2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2335737 Reviewed-by: Tom Hughes <tomhughes@chromium.org>
* power/intel_x86: Generalize the sleep failure detection, not bound to S0ixWai-Hong Tam2020-08-041-1/+1
| | | | | | | | | | | | | | | | | | | This change prepares to separate the sleep failure detection out of intel_x86, such that other chipset power sequence can reuse the code. It only touches the naming. No logic changes. * Rename to CONFIG_POWER_SLEEP_FAILURE_DETECTION * Modify the function and variable names, to avoid S0ix * Modify the comment to more neutral BRANCH=None BUG=b:162083524 TEST=make buildall -j Change-Id: I6a61c3b0a63af60913ee89e0ca343085fbd22308 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2321872 Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
* dedede: add FW_CONFIG field for keyboard backlight presentDevin Lu2020-08-013-5/+34
| | | | | | | | | | | | | This patch adds FW_CONFIG field for keyboard backlight present. BUG=none BRANCH=none TEST=make buildall -j Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Change-Id: I9072a6f5a64ff922708201a5d7cc687a3d56e300 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2331976 Reviewed-by: Diana Z <dzigterman@chromium.org>
* Dedede: Move extpower_is_present() to baseboardDiana Z2020-07-281-0/+17
| | | | | | | | | | | | | | | | | | | | This consolidates dedede boards to use a baseboard extpower_is_present() and also adds the condition to verify that the port is sinking, instead of providing Vbus. It also converts the RAA489000 boards to use the cached Vbus presence in pd_snk_is_vbus_provided(). BRANCH=None BUG=None TEST=on waddledoo and waddledee, verify "AC on" prints when a charger or charge-through servo v4 is plugged in, verify no "AC on" prints when a dongle is plugged in Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I5941da789a4e810f6d8cc40cef4d32a5a03c5662 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2317062 Tested-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* Dedede: Restore pull-up on PG_PP1050_ST_OD after jumpingDiana Z2020-07-241-2/+7
| | | | | | | | | | | | | | | | After RSMRST sets, we configure a pull-up on PG_PP1020_ST_OD. This pull-up is lost during GPIO init after a sysjump, so restore it before the chipset init. BRANCH=None BUG=b:159863180 TEST=on waddledee and waddledoo, boot to the OS and run "sysjump rw" and "sysjump ro" on the EC console Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I1b543329de976c5f64dbfbebf8f7576e70e63084 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2314939 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Dedede: Store PP3300_A status before sysjumpsDiana Z2020-07-241-0/+26
| | | | | | | | | | | | | | | | | | Since the chipset task inits before the ADCs, we'll need to provide pp3300_a_good by preserving it in the sysjump tags. BRANCH=None BUG=b:161887378,b:159863180 TEST=on drawlat, boot to S0 and sysjump back and forth between RO and RW. Observe that the DUT remains at the ChromeOS login screen the whole time. Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I3086f0bb2cd4b97c988c2365148b75b99954f380 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2314642 Tested-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* Dedede: Enable EFS2Diana Z2020-07-231-0/+1
| | | | | | | | | | | | | | Enables EFS2 for all dedede boards BRANCH=None BUG=b:159350276 TEST=on waddledoo and waddledee, see successful EFS2 jump to RW early in the boot process Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ib2eccb28e0331bee718f8c5aec261d83115ec22e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2299849 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Dedede: Enable i2ctrace commandDiana Z2020-07-211-0/+3
| | | | | | | | | | | | | | | This command allows printing of all the i2c traffic on a given port and address, and can be useful when debugging driver issues. BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I73749c8ba664a8df51e4e846a0e8d848099039cb Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2309065 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* Dedede: Retrieve FW_CONFIG from CBI at higher priorityDiana Z2020-07-171-1/+1
| | | | | | | | | | | | | | | I2C is initialized before the HOOK inits now, so retrieve CBI FW_CONFIG as soon as possible for use in determining which chips are present. BRANCH=None BUG=None TEST=on waddledoo with HDMI DB, ensure charger init comes after FW_CONFIG is fetched Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ia813a480c5f0d0095a3f2e5442dde9541d368431 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2300687 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* dedede: add FW_CONFIG field for tablet mode present or notDevin Lu2020-07-172-0/+17
| | | | | | | | | | | | | This patch adds FW_CONFIG field for tablet mode present or not. BUG=none BRANCH=none TEST=make buildall -j Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Change-Id: I92432066dee14bb79d882daa9da5d09f4daaecb1 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2299610 Reviewed-by: Diana Z <dzigterman@chromium.org>
* boten: split CONFIG_LED_PWM out into boardsxiong.huang2020-07-151-2/+3
| | | | | | | | | | | | | It will be happy to define LED behavior in boards. BUG=b:160664441 BRANCH=none TEST=make buildall -j4 Signed-off-by: xiong.huang <xiong.huang@bitland.corp-partner.google.com> Change-Id: Ib81fe8d20fa3ab74064958fba3576a1618635e52 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2296544 Reviewed-by: Diana Z <dzigterman@chromium.org>
* dedede: Move adc channel to board variantDevin Lu2020-07-143-74/+0
| | | | | | | | | | | | | | Dedede family may have different temp sensors for other ADCs channel. This patch moves adc channel to board variant. BUG=none BRANCH=none TEST=make buildall -j Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Change-Id: Id34a924fc9431a553a1467068c6ccee6111102bc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2289478 Reviewed-by: Diana Z <dzigterman@chromium.org>
* dedede: add workaround for CR50 double resetJett Rink2020-07-091-0/+3
| | | | | | | | | | | | | | | Hold the EC on the initial power on until the CR50 resets it; this preserves the power on flag for the first boot, which is important when we are deciding if we want to reset the USB-C PD contract. BRANCH=none BUG=none TEST=doo hold on reset Signed-off-by: Jett Rink <jettrink@chromium.org> Change-Id: I6895be11309d2021436ce7b3aab915dbf27d9616 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2289058 Reviewed-by: Diana Z <dzigterman@chromium.org>
* dedede: it83xx: fix adc data structure orderDevin Lu2020-07-022-15/+48
| | | | | | | | | | | | | | | | This is a difference adc data structure order between it83xx and npcx7. The data structure must be in the exactly same order as in enum adc_channel. This patch fixes incorrect order for it83xx. BUG=none BRANCH=none TEST=adc command in EC console Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Change-Id: Ibe7326e897814defb57196fd2213f8a3a5dea9db Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2275503 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Dedede: Set up baseboard FW_CONFIG parsingDiana Z2020-07-023-1/+63
| | | | | | | | | | | | | | | Set up basic files to use for parsing FW_CONFIG. Currently, this just has a function to return the DB enum value. BRANCH=None BUG=b:159246161 TEST=on waddledoo, FW_CONFIG print appears during boot with current value (tested 0, 3, and 4) Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Id9ef2ea5ed297bb662d8455123452b1aeb06ae39 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2274992 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* dedede: npcx7: Toggle ADC interrupts to save powerAseda Aboagye2020-06-211-0/+82
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to save EC power and allow deep sleep to be entered, this change disables the ADC interrupts after booting up into S0, and then enables them when the system is attempting to power on. (Via power button or lid open or something else). BUG=b:157887329 BRANCH=None TEST=Build and flash waddledoo. Boot DUT, verify it can boot to S0. Enter `apshutdown` command on the EC console, verify that DUT shuts down. Verify that 15s later all power signals indicate low. Press power button, verify DUT boots up again. Repeat shutdown but initiated from the AP, verify power button can boot DUT again. Repeat shutdown and verify that a lid open can wake the DUT. TEST=Verify that suspend and resume continue to work. Verify that ADC interrupts remain disabled in suspend. TEST=Setup an RTC wake and shutdown to S5. Verify that AP wakes up after RTC alarm and boots all the way back up. TEST=Verify that power consumption is reduced when ADC interrupts are disabled. Change-Id: Ib9f6c30533afe8f354d731bb0f30ea207b44c601 Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2233847 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
* boten: remove unused I2Cxiong.huang2020-06-191-0/+2
| | | | | | | | | | | | | Remove I2C4. BUG=b:157626290, b:158658777 BRANCH=none TEST=make buildall -j Signed-off-by: xiong.huang <xiong.huang@bitland.corp-partner.google.com> Change-Id: Id1af7591e2bfcc39175470b93c27df257a5dff1f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2245577 Reviewed-by: Diana Z <dzigterman@chromium.org>
* boten: use charger/TCPC RAA48900xiong.huang2020-06-141-11/+0
| | | | | | | | | | | | | | | Use charger/TCPC RAA48900 instead of TCPC IT8320 + charger SM5803 combination at MB side. BUG=b:157626290, b:158023819 BRANCH=none TEST=make buildall -j Signed-off-by: xiong.huang <xiong.huang@bitland.corp-partner.google.com> Change-Id: Ibb97a41e1d280da7c92cf2c00202b5eb205f99b3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2239599 Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* extpower: Add helper function extpower_handle_updateFurquan Shaikh2020-06-121-8/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change adds a helper function extpower_handle_update() that performs all the necessary actions that need to be done on external power state change: 1. Call hook_notify with AC_CHANGE 2. Update memmap_batt_flags to update EC_BATT_FLAG_AC_PRESENT 3. Set host event for EC_HOST_EVENT_AC_CONNECTED or EC_HOST_EVENT_AC_DISCONNECTED. Step#2 above is important because it ensures that the memory map flag is correctly updated when host reads it. Before this change, it was observed that EC_BATT_FLAG_AC_PRESENT is updated only when static/dynamic battery information gets updated. This could result in host reading the wrong AC state if battery information did not update before host acts on the host event bit getting set for AC connect/disconnect. BUG=b:157752693 BRANCH=None TEST=Verified on trembyle that EC ASL routines read the correct state of AC present flag on receiving host event. Signed-off-by: Furquan Shaikh <furquan@google.com> Change-Id: I077de1135320654f571e5cf87ced6f08cbf23876 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2242353 Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Auto-Submit: Furquan Shaikh <furquan@chromium.org>
* boten: remove DB type-C port and peripheral chipsxiong.huang2020-06-111-7/+0
| | | | | | | | | | | | | | | | | Remove chips: Charge chip - SM5803 TCPC and USB mux chip - ANX7447 USB retimer chip - TUSB544 BC1.2 chip - PI3USB9201 BUG=b:157626290, b:158023819 BRANCH=none TEST=make buildall -j Signed-off-by: xiong.huang <xiong.huang@bitland.corp-partner.google.com> Change-Id: Iac30f683774368b2b5706c5f804caf549a54139a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2235238 Reviewed-by: Diana Z <dzigterman@chromium.org>
* dedede: npcx7: Enable TCPC Low Power ModeAseda Aboagye2020-06-111-1/+1
| | | | | | | | | | | | | | | | | | This commit enables TCPC low power mode for the npcx7 dedede variants. BUG=b:158218613 BRANCH=None TEST=Build and flash waddledoo, verify that DUT boots, TCPCs enter low power mode, and no watchdog resets are seen. Additionally, verify that PD sinks and sources continue to work. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I988a98f778e5f2c4a2fe8257ea27256d7a70b429 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2239484 Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* dedede: Pull ALL_SYS_PWRGD low when SLP_S3_L is assertedSooraj Govindan2020-06-101-0/+6
| | | | | | | | | | | | | | | | | | ALL_SYS_PWRGD is an AND of DRAM PGOOD, VCCST PGOOD, and VCCIO_EXT PGOOD. SLP_S3_L is a qualifying input signal to ALL_SYS_PWRGD logic. This patch ensure ALL_SYS_PWRGD remains LOW during SLP_S3_L assertion. BUG=b:158188385 BRANCH=none TEST=run cold reboot tests Signed-off-by: Sooraj Govindan <sooraj.govindan@intel.com> Change-Id: I1bcfbab508220b78df5d21001ecfdb8dcb022022 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2237490 Tested-by: Sooraj Govindan <sooraj.govindan@intel.corp-partner.google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* Dedede: Enable PD 3.0Diana Z2020-05-301-0/+1
| | | | | | | | | | | | | | Semantics to set PD 3.0 on the v2 stack changed recently, so enable PD 3.0 specifically (rather than it being default) BRANCH=None BUG=None TEST=make -j buidall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I681a406665f7f9673bdf96c0a7c8dfcd13a28186 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2219285 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* dedede:Pull VCCIO_EXT low within 200us of SLP_S3_LSooraj Govindan2020-05-281-0/+3
| | | | | | | | | | | | | | | | | | | | | | There is a potential race condition where VCCST_PWRGD gets pulled LOW, while EN_VCCIO_EXT is still HIGH, during SLP_S3_L assertion. EN_VCCIO_EXT was not driven low in the baseboard_all_sys_pgood_interrupt(). So VCCST_PWRGD was getting SET again by the time EN_VCCIO_EXT is driven LOW in the switch case. This patch ensures that VCCST_PWRGD gets pulled low along with EN_VCCIO_EXT. BUG=b:153763236, b:157216597 BRANCH=none TEST=verify SLP_S3 entry and exit Signed-off-by: Sooraj Govindan <sooraj.govindan@intel.com> Change-Id: Iaf85b9ff6d4cb420dd330d5852b11e05e4401b54 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2217600 Tested-by: Sooraj Govindan <sooraj.govindan@intel.corp-partner.google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* Waddledee: configure ECH1_PACKET_MODEDiana Z2020-05-211-0/+1
| | | | | | | | | | | | | | This GPIO will be used for communication with the cr50 when EFS2 is enabled. BRANCH=None BUG=b:156785198 TEST=make -j buildall, waddledee boots Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ia1193bf61995ec0f1892a753570f28eaba64ab26 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2210863 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Remove unused CONFIG macrosDaisuke Nojiri2020-05-081-1/+0
| | | | | | | | | | | | | | CONFIG_GPU, CONFIG_USB_SM_FRAMEWORK, CONFIG_BOARD_HAS_AFTER_RSMRST are no longer used. This patch removes them. BUG=b/155996358 BRANCH=none TEST=buildall Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: Ia407850398c07b7cdb01cddb0288ae977b9dca82 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2189171 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* dedede: Pull VCCST_PWRGD low within 200us of SLP_S3_LWill Arthur2020-05-071-2/+5
| | | | | | | | | | | | | | | | Early protos have a hardware bug where VCCST_PWRGD may not get pulled below VIL with hardware logic. This patch ensures that VCCST_PWRGD gets pulled low strongly. BUG=b:153763236 BRANCH=none TEST=During shutdown, measured time from SLP_S3_L assertion to VCCST_PWRGD de-assertion should be <200us Signed-off-by: Will Arthur <wda@google.com> Change-Id: I29c42f29f9172c1ef083012d66b1fb3417bb790b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2182040 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* dedede: Add support for S0ixAseda Aboagye2020-04-301-0/+3
| | | | | | | | | | | | | | | | | | Dedede will support S0ix, therefore this commit adds support such that the EC can track those sleep states. BUG=None BRANCH=None TEST=`make -j buildall` TEST=Flash waddledee, verify DUT still boots. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I4dd60bfb91af1f1b257440fbd640b8667225d6da Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2171562 Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
* dedede: Add board_vbus_presence_change()Aseda Aboagye2020-04-231-0/+24
| | | | | | | | | | | | | | | | | | | Dedede doesn't have a dedicated interrupt for ACOK, however we can use the charger or TCPC to inform us when AC is OK through other means. This commit uses the board_vbus_presence_change() trigger to trigger the HOOK_AC_CHANGE hook. BUG=b:154113446,b:154113465 BRANCH=None TEST=Build and flash waddledoo, plug in AC, verify that "AC on" prints are seen. Unplug AC, verify that "AC off" prints are seen. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I1621135499bb65d13aef4f7fec76bd366def3bdc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2159942 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* Dedede: Move waddledee chips out of baseboardDiana Z2020-04-212-258/+0
| | | | | | | | | | | | | | Moves chip specifics (ex. charger, TCPC) from baseboard out to the waddledee board files in anticipation of Wheelie. BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I99bf33d683cc89e6508fbbe305cd0b4c05a53090 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2157949 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* waddledoo/waddledee: Deassert ALL_SYS_PGOOD quicklyAseda Aboagye2020-04-212-0/+17
| | | | | | | | | | | | | | | | | | | | | | | According to tPLT17 in the PDG, the time from SLP_S3_L assertion to VCCIN_EN de-assertion should be less than 200us, but this was not occurring on waddledoo. This commit adds a special interrupt handler in order to meet that timing requirement by immediately deasserting ALL_SYS_PGOOD once SLP_S3_L is asserted. BUG=b:152552074 BRANCH=None TEST=Build and flash waddledoo, boot and shut AP down, verify that the time between SLP_S3_L asserting and ALL_SYS_PGOOD deasserting is less than 200us. TEST=`make -j buildall` Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: Ib34016d5bdfa956f410dde3e3b3074bd306a18f9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2142744 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Auto-Submit: Aseda Aboagye <aaboagye@chromium.org>
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