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* ish: Trim down the release branchstabilize-wristpin-14469.59.B-ishstabilize-voshyr-14637.B-ishstabilize-quickfix-14695.187.B-ishstabilize-quickfix-14695.124.B-ishstabilize-quickfix-14526.91.B-ishstabilize-14695.85.B-ishstabilize-14695.107.B-ishstabilize-14682.B-ishstabilize-14633.B-ishstabilize-14616.B-ishstabilize-14589.B-ishstabilize-14588.98.B-ishstabilize-14588.14.B-ishstabilize-14588.123.B-ishstabilize-14536.B-ishstabilize-14532.B-ishstabilize-14528.B-ishstabilize-14526.89.B-ishstabilize-14526.84.B-ishstabilize-14526.73.B-ishstabilize-14526.67.B-ishstabilize-14526.57.B-ishstabilize-14498.B-ishstabilize-14496.B-ishstabilize-14477.B-ishstabilize-14469.9.B-ishstabilize-14469.8.B-ishstabilize-14469.58.B-ishstabilize-14469.41.B-ishstabilize-14442.B-ishstabilize-14438.B-ishstabilize-14411.B-ishstabilize-14396.B-ishstabilize-14395.B-ishstabilize-14388.62.B-ishstabilize-14388.61.B-ishstabilize-14388.52.B-ishstabilize-14385.B-ishstabilize-14345.B-ishstabilize-14336.B-ishstabilize-14333.B-ishrelease-R99-14469.B-ishrelease-R98-14388.B-ishrelease-R102-14695.B-ishrelease-R101-14588.B-ishrelease-R100-14526.B-ishfirmware-cherry-14454.B-ishfirmware-brya-14505.B-ishfirmware-brya-14505.71.B-ishfactory-kukui-14374.B-ishfactory-guybrush-14600.B-ishfactory-cherry-14455.B-ishfactory-brya-14517.B-ishJack Rosenthal2021-11-051-373/+0
| | | | | | | | | | | | | | | | | | | | | | In the interest of making long-term branch maintenance incur as little technical debt on us as possible, we should not maintain any files on the branch we are not actually using. This has the added effect of making it extremely clear when merging CLs from the main branch when changes have the possibility to affect us. The follow-on CL adds a convenience script to actually pull updates from the main branch and generate a CL for the update. BUG=b:204206272 BRANCH=ish TEST=make BOARD=arcada_ish && make BOARD=drallion_ish Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I17e4694c38219b5a0823e0a3e55a28d1348f4b18 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262038 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org>
* board/guybrush-dewat: Minor cleanupGwendal Grignou2021-09-231-1/+2
| | | | | | | | | | | | | | | Remove g_bmi323 static variable, use same structure as bmi160. Fill motion_sensors array with index in order. BUG=b:195264765 BRANCH=none TEST=compile Change-Id: I2c16fa64db7786bf5ff977cd6626c3d9de9b66b4 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3172268 Reviewed-by: Rob Barnes <robbarnes@google.com> Reviewed-by: Diana Z <dzigterman@chromium.org>
* guybrush: move thermal sensor/setting to variantZick Wei2021-09-071-20/+0
| | | | | | | | | | | | | | | | | This patch move thermal sensor and setting to variant, let variant have their own setting. BUG=none BRANCH=none TEST=make BOARD=dewatt, make BOARD=guybrush, make BOARD=nipperkin Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com> Change-Id: Ibf37a0a45d1a728abc5ed88dde230f0561698bbc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3132547 Reviewed-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-by: Rob Barnes <robbarnes@google.com> Commit-Queue: Rob Barnes <robbarnes@google.com>
* guybrush: Enable AMD STTRob Barnes2021-08-251-1/+3
| | | | | | | | | | | | | | | | Enable AMD STT driver. The AMD STT driver will read the SOC and ambient temperature sensors every second and send the result to the SOC via SB RMI on the i2c bus. BUG=b:176994331 TEST=stt debug BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: I45157acf172dcce00c24971be70c5ec609d460dd Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3082326 Commit-Queue: Diana Z <dzigterman@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* guybrush: Move Motion and ANX CONFIG flags to guybrushBhanu Prakash Maiya2021-08-121-2/+0
| | | | | | | | | | | | | | | | Motion sensor are only supported in guybrush convertible designs. Parade retimer is currently used by guybrush reference and OEM board. ANX flags are only required in guybrush reference board. BUG=b:194031783 BRANCH=None TEST=make BOARD=nipperkin make BOARD=guybrush Signed-off-by: Bhanu Prakash Maiya <bhanumaiya@google.com> Change-Id: Ia84f8396510ad833d033bb6743e22bbbdc4d5204 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3088587 Reviewed-by: Diana Z <dzigterman@chromium.org>
* keyboard: Use __override for keyboard_scan_configDaisuke Nojiri2021-07-231-1/+1
| | | | | | | | | | | | | | | | | Currently keyboard_scan_config is defined by each board using CONFIG_KEYBOARD_BOARD_CONFIG. This patch makes it defined as __override hence removes CONFIG_KEYBOARD_BOARD_CONFIG. BUG=None BRANCH=None TEST=buildall Change-Id: I53a356741ba4d00e829ca59b74ee6dc704188728 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3044403 Tested-by: Gwendal Grignou <gwendal@chromium.org> Commit-Queue: Gwendal Grignou <gwendal@chromium.org> Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
* Guybrush: Enable CONFIG_BACKLIGHT_LIDDiana Z2021-07-211-0/+5
| | | | | | | | | | | | | | | | | Guybrush has the GPIO set up for backlight disable, but doesn't have the config set and so we're not compiling in the code to actually disable backlight on lid close. BRANCH=None BUG=b:194326578 TEST=on guybrush, open and boot to confirm backlight is on. Close with the system in S0 and confirm it goes off Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: If707525d9f4bb98a577f75e7017beae03638726c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3044410 Reviewed-by: Rob Barnes <robbarnes@google.com> Commit-Queue: Rob Barnes <robbarnes@google.com>
* Guybrush: Add EC_ENTERING_RW signalDiana Z2021-07-211-0/+1
| | | | | | | | | | | | | | | | | Add this signal as it is present on more recent board versions. This should be fine on older board versions since it was a TP pin previously. BRANCH=None BUG=b:194320972 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I839027fecaac8d47992ae262f334c88c8a7311a7 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3044406 Reviewed-by: Rob Barnes <robbarnes@google.com> Reviewed-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Commit-Queue: Rob Barnes <robbarnes@google.com> Commit-Queue: Karthikeyan Ramasubramanian <kramasub@chromium.org>
* guybrush: Use correct index for tmp112 SOCRob Barnes2021-07-211-1/+1
| | | | | | | | | | | | | | | This change fixes a bug where ADC_TEMP_SENSOR_SOC index was used in for the TMP112 SOC instead of TMP112_SOC BUG=b:176994331 BRANCH=None TEST=Check output of temps Change-Id: Ic27e38f5d4dfee3b270fe8490787575cf4cc7568 Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3002883 Commit-Queue: Diana Z <dzigterman@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* guybrush: Fix sensor_id for screen rotation to work on deviceBhanu Prakash Maiya2021-07-171-3/+3
| | | | | | | | | | | | | | | | | | | Looks like the iio:devices are mapped to fixed sensor_id in EC. Aligning sensor_id with other projects in ChromeOS EC. BRANCH=none BUG=b:178400750 TEST=Motion task implementation tested on Guybrush Rotate device and rotation works. Signed-off-by: Bhanu Prakash Maiya <bhanumaiya@chromium.org> Signed-off-by: Latchiamaran Senram <latchiamaran.senram@bosch.corp-partner.google.com> Change-Id: Id2134c8d31471c8900cd7f6b3397d20dc2e64744 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3035799 Tested-by: Bhanu Prakash Maiya <bhanumaiya@google.com> Auto-Submit: Bhanu Prakash Maiya <bhanumaiya@google.com> Reviewed-by: Bhanu Prakash Maiya <bhanumaiya@google.com> Commit-Queue: Bhanu Prakash Maiya <bhanumaiya@google.com>
* guybrush: Enable LID ANGLE config on boardBhanu Prakash Maiya2021-07-171-2/+6
| | | | | | | | | | | | | | | | | | This patch implements lid_angle_peripheral_enable function. BRANCH=none BUG=b:178400750 TEST=Accel implementation tested on Guybrush $ ectool motionsense lid_angle Signed-off-by: Bhanu Prakash Maiya <bhanumaiya@chromium.org> Signed-off-by: Latchiamaran Senram <latchiamaran.senram@bosch.corp-partner.google.com> Change-Id: I0ece0c23350fd870c5fa696ae77dc221ef60dc4e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3029667 Commit-Queue: Bhanu Prakash Maiya <bhanumaiya@google.com> Tested-by: Bhanu Prakash Maiya <bhanumaiya@google.com> Auto-Submit: Bhanu Prakash Maiya <bhanumaiya@google.com> Reviewed-by: Diana Z <dzigterman@chromium.org>
* guybrush: Configure LID_ACCEL hardware without FIFOBhanu Prakash Maiya2021-07-131-0/+12
| | | | | | | | | | | | | | | | | | | | | | 1. This patch puts LID_ACCEL in forced mode. 2. This patch moves ACCEL_FIFO defines to baseboard BRANCH=none BUG=b:178213305 TEST=1. ectool motionsense Motion sensing active Sensor 0: 0 0 0 Sensor 1: 0 0 0 Sensor 2: -336 -1360 -16288 2. Lid accel data is showing up on ectool. Signed-off-by: Bhanu Prakash Maiya <bhanumaiya@chromium.org> Change-Id: If0eaa106478777a6266a77af2b47e91e354229ff Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3021753 Tested-by: Bhanu Prakash Maiya <bhanumaiya@google.com> Auto-Submit: Bhanu Prakash Maiya <bhanumaiya@google.com> Commit-Queue: Diana Z <dzigterman@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* guybrush: Remove CONFIG_SYSTEM_UNLOCKEDRob Barnes2021-07-121-1/+0
| | | | | | | | | | | | | | | We should no longer rely on the system being hard-coded to be unlocked. This should be determined at runtime from the write-protect status of flash. So, remove CONFIG_SYSTEM_UNLOCKED. BRANCH=none BUG=b:191333062 TEST=guybrush boots Change-Id: I57f281a8d2682b94aacabafc8258cf4da634551f Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3001393 Reviewed-by: Diana Z <dzigterman@chromium.org>
* guybrush: enable BMI323 sensor on guybrushBhanu Prakash Maiya2021-07-091-0/+1
| | | | | | | | | | | | | | | | | | | Enable BMI323 sensor as BASE ACCEL and BASE GYRO on guybrush board. BRANCH=none BUG=b:178398789 TEST=Accel implementation tested on Guybrush EC commands: > accelinfo > acceldata Signed-off-by: Bhanu Prakash Maiya <bhanumaiya@chromium.org> Change-Id: I1bda8d0836dcb62b0d4a33750246a15931c77389 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2984744 Commit-Queue: Bhanu Prakash Maiya <bhanumaiya@google.com> Tested-by: Bhanu Prakash Maiya <bhanumaiya@google.com> Auto-Submit: Bhanu Prakash Maiya <bhanumaiya@google.com> Reviewed-by: Diana Z <dzigterman@chromium.org>
* Guybrush: Set up custom Vbus source detectionDiana Z2021-06-291-0/+1
| | | | | | | | | | | | | | | | | | In the USB common code, PPCs will always be given priority over TCPCs for detecting whether sourcing is enabled. However, with FRS enabled the PPC cached flags no longer accurately reflect whether we're sourcing. Therefore, set up a custom board function which may query the most appropriate chip, though for now set it up for the same component used by the Vbus discharge code. BRANCH=None BUG=b:183586640 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I4acf65930e944990e7770252de4ff47c671382a6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2987596 Reviewed-by: Rob Barnes <robbarnes@google.com>
* guybrush: enable BMA422 sensor on guybrushBhanu Prakash Maiya2021-06-291-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable BMA422 sensor as LID ACCEL on guybrush board. BRANCH=none BUG=b:178400750 TEST=1. Flash ec.bin on Guybrush SKUA1 with BMA422 sensor 2. EC console commands > accelread 2 Current data 2: 6576 -464 14752 Last calib. data 2: 0 0 0 > accelinfo on sensor 2 name: Lid Accel active mask: 28 chip: 27 type: 0 location: 1 port: 8 addr: 24 range: 2 min_freq: 12500 max_freq: 200000 config: 0 - odr: 0mHz, ec_rate: 0us 1 - odr: 10000mHz, ec_rate: 100000us 2 - odr: 10000mHz, ec_rate: 0us 3 - odr: 0mHz, ec_rate: 0us > accelrate 2 <val> > accelres 2 Resolution for sensor 2: 12 Signed-off-by: Bhanu Prakash Maiya <bhanumaiya@chromium.org> Change-Id: I01aea418e426e546de9733b56dc465c70c704436 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2981466 Tested-by: Bhanu Prakash Maiya <bhanumaiya@google.com> Auto-Submit: Bhanu Prakash Maiya <bhanumaiya@google.com> Reviewed-by: Rob Barnes <robbarnes@google.com> Commit-Queue: Bhanu Prakash Maiya <bhanumaiya@google.com>
* chgstv2: Unify power-on and shutdown battery thresholdsDaisuke Nojiri2021-06-231-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, power-on battery SoC and shutdown battery SoC are independently configured by each board. This patch will unify the setting as follows: CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON = 2 (don't boot if soc < 2%) CONFIG_BATT_HOST_SHUTDOWN_PERCENTAGE = 2 (shutdown if soc <= 2%) BATTERY_LEVEL_SHUTDOWN = 3 (shutdown if soc < 3%) CONFIG_BATTERY_EXPORT_DISPLAY_SOC = Y (removed) CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON_WITH_AC = 1 This allows us to show the low battery alert whenever we can because EC doesn't inhibit power-on even if it knows the host would immediately shut down. With CONFIG_BATTERY_EXPORT_DISPLAY_SOC, boards will start using the CONFIG_BATT_HOST_SHUTDOWN_PERCENTAGE = 2% as the low battery threshold (and the SoC will be agreed between the EC and Powerd). Boards with CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON = 1 will keep the same threshold. This is for avoiding degrading the UX by increasing the power-on threshold (even though a question that 1% may not be enough for soft sync to finish consistently remains to be answered). Boards with CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON > 2 will have a lower threshold but we think 2% is enough to finish the software sync. A lower threshold also improves the UX by showing the low battery alert in the situation where otherwise the system would leave the user uninformed by not responding to a power button press. BUG=b:191837893 BRANCH=None TEST=buildall Change-Id: If6ff733bc181f929561a3fffb8a84e760668ce37 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2981468 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* config: Rename CONFIG_CROS_BOARD_INFOPhilip Chen2021-06-161-1/+1
| | | | | | | | | | | | | | | | | | Rename CONFIG_CROS_BOARD_INFO to CONFIG_CBI_EEPROM to make it clear that the information comes from on-board EEPROM. It sets up the groundwork for adding more options of CBI sources later. BRANCH=None BUG=b:186264627 TEST=make buildall -j Signed-off-by: Philip Chen <philipchen@google.com> Change-Id: I9a6feee0a8b35bbf29e445544243485507767ad8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2945792 Reviewed-by: Philip Chen <philipchen@chromium.org> Commit-Queue: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org>
* guybrush: Add PS8811 driverRob Barnes2021-06-141-0/+1
| | | | | | | | | | | | | | | Add PS8811 USB A retimer driver. Reusing USB mux structure even though the retimer does not have a mux. BUG=b:176987937 TEST=Build and run BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: Ie11a105f344e6acc1312cda517fdfe54ecb8c8ea Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2946307 Commit-Queue: Diana Z <dzigterman@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* guybrush: Remove CONFIG_KEYBOARD_DEBUGRob Barnes2021-06-101-1/+0
| | | | | | | | | | | | | | Keyboard is stable, this debug config is no longer needed. BUG=b:186679368 TEST=Boot guybrush, no keyboard debug messages BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: Id6c42a1adca2af88dbea155583239ab5a85e9065 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2954319 Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* Guybrush: Remove Try.SRC configstabilize-14023.B-mainDiana Z2021-06-081-1/+0
| | | | | | | | | | | | | | | | | Remove the Try.SRC configuration, as it more closely matches the behaviors of most released PD DRP products and should represent an improvement to interoperability. BRANCH=None BUG=b:189862847 TEST=on guybrush, successfully connect TBT dock, powered Woohubs, and powered HooToo Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Iac7cd0dec612d5c9090562eea5a0422ceeba01e8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2947497 Reviewed-by: Rob Barnes <robbarnes@google.com> Commit-Queue: Rob Barnes <robbarnes@google.com>
* Guybrush: Add ambient temperature sensorDiana Z2021-06-071-0/+1
| | | | | | | | | | | | | | | Add the ambient temperature sensor which is being placed on the board in version 2. Note this will return an error on version 1 boards. BRANCH=None BUG=b:188539950 TEST=make -j buildall; load on version 1 and observe temps reports 0 for ambient temperature and nothing is spewing errors Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I5c1abffc716c758334cb923c0a34a7ec467ff565 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2938046 Reviewed-by: Rob Barnes <robbarnes@google.com>
* Gyubrush: Add TMP112 SOC sensor for board version 2Diana Z2021-06-071-0/+8
| | | | | | | | | | | | | | | | Add the TMP112 sensor which will be placed by the SOC and replaces the SOC ADC temperature input. BRANCH=None BUG=b:188539950 TEST=make -j buildall; load onto guybrush version 1 and verify temps read correctly Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ic70d3c56e22f4e1f4343ab3f41191b46f66d2e65 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2938045 Reviewed-by: Rob Barnes <robbarnes@google.com> Commit-Queue: Rob Barnes <robbarnes@google.com>
* Revert "Guybrush: Increase LPM exit debounce"Diana Z2021-06-011-2/+0
| | | | | | | | | | | | | | | This reverts commit 687a7e55d6e79aa83aeb98fff0ddcebb39a27872. It is no longer necessary with the new changes in the NCT TCPC driver to make the debug accessory set conditional. BRANCH=None BUG=b:186799392 TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Id4d5056d800f768dfe4ce91f1b0f6ded9c48b8cf Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2919943 Reviewed-by: Rob Barnes <robbarnes@google.com>
* usb_common: Assert CCD_MODE when DTS connectedRob Barnes2021-05-261-0/+1
| | | | | | | | | | | | | | | | | | Drive CCD_MODE_ODL from EC when EC sees DTS connected to CCD port. This will fix some cases where the Cr50 is not able to detect that a CCD debug cable has been connected. BUG=b:175056327 TEST=Connect/disconnect SuzyQ cable, see assert/unassert in log Check gpioget on CR50 and ec, confirm CCD_MODE_ODL is correct Connect/disconnect charger, do not see assert/unassert in log Repeat with ServoV4 BRANCH=None Change-Id: I411e75a47f2e1303ddbd9caa63a9417630c99b46 Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2659282 Reviewed-by: Denis Brockus <dbrockus@chromium.org>
* guybrush: Disable SOC_TEMP for board_version > 1Rob Barnes2021-05-241-0/+2
| | | | | | | | | | | | | | | | SOC_TEMP is being replaced with i2c temp sensor in board version 2. Disable SOC_TEMP so it doesn't cause thermal trips on board version 2. Move board_get_soc_temp to board level since variants will not need this logic. BUG=b:188540408 TEST=Boot guybrush, see SOC temp is correct BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: I8880b74993d0a942894f1c06346c534d1f39466d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2906314 Reviewed-by: Diana Z <dzigterman@chromium.org>
* guybrush: Add CBI utility functionsRob Barnes2021-05-211-0/+7
| | | | | | | | | | | | | | | | | Add CBI utility functions. All values are cached. cbi_init prints the values and initializes the cache. Each function will also opportunistically initialize the cache in case it's accessed before cbi_init. BUG=None TEST=Boot guybrush, see CBI values printed BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: I3e21a6792f4f0897019872201b2392f634c134ef Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2906313 Commit-Queue: Diana Z <dzigterman@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* config: Populate CONFIG_SUPPRESSED_HOST_COMMANDSGwendal Grignou2021-05-191-2/+0
| | | | | | | | | | | | | | | | | | | | | Commands that are send peridically or in high number are not reported on the console through CONFIG_SUPPRESSED_HOST_COMMANDS variable. Use the same set of commands throughout to avoid misses like newer command EC_CMD_GET_UPTIME_INFO. BUG=none BRANCH=none TEST=buildall Signed-off-by: Gwendal Grignou <gwendal@google.com> Change-Id: I0041576538a8cc659c262118b1503777b9ea8578 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2851452 Reviewed-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Craig Hesling <hesling@chromium.org> Tested-by: Gwendal Grignou <gwendal@chromium.org> Commit-Queue: Gwendal Grignou <gwendal@chromium.org>
* guybrush: Alias kb backlight gpioRob Barnes2021-05-191-1/+2
| | | | | | | | | | | | | | | | When keyboard backlight is 0%, the backlight led driver should be disabled to save power. By aliasing this GPIO, the common keyboard_backlight handler will toggle this GPIO on kblight_enable. BUG=b:187757151 TEST=Set backlight to 0, 50, 0 and observe the enable gpio is 0, 1, 0 BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: I22b0bb31720e9e17e9d896759be6b2ccf8c69d42 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2887551 Commit-Queue: Diana Z <dzigterman@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* guybrush: Increase PD max power to 100WRob Barnes2021-05-171-2/+3
| | | | | | | | | | | | | | | | | Increase the max power PD can sink to 100W. Components are rated to support the load. BUG=b:176988382 TEST=96W charger + charge phone + run aquarium test: no brownout $ ectool usbpdpower 1 Port 1: SNK Charger PD 19968mV / 4700mA, max 20000mV / 4700mA / 94000mW BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: I03e5a8b84debf26245377da8e009178e3d2fe6f7 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2895803 Commit-Queue: Diana Z <dzigterman@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* guybrush: Enable 4 byte port80 codesRob Barnes2021-05-101-0/+1
| | | | | | | | | | | | | | | | AMD SOCs send 4 byte port80 codes. This will allow these codes to be properly displayed. BUG=b:181598456 TEST=4 bytes port 80 codes seen during boot BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: Id9dab36e8fe5741fe43705e12caca35a111f269c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2881031 Reviewed-by: Eric Peers <epeers@google.com> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* Guybrush: Increase LPM exit debounceDiana Z2021-05-041-0/+2
| | | | | | | | | | | | | | | | With the default exit LPM debounce of 25 ms, the NCT3807 may not correctly register a new connection. Make the debounce longer to ensure our initial connection state is more reliable. BRANCH=None BUG=b:183182447 TEST=on guybrush, confirm system is able to detect chargers in time reliably in order to auto power on Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Id53d1278425cf6ffea3476f6623eff388f3a9c09 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2785195 Reviewed-by: Edward Hill <ecgh@chromium.org>
* Guybrush: Move batteries to board levelDiana Z2021-04-301-6/+0
| | | | | | | | | | | | | | | | Move battery information into the board level in anticipation of them probably varying with each board. BRANCH=None BUG=b:186577625 TEST=make -j buildall, load on guybrush with trembyle battery and ensure it's identified Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I1780949746cd30c3033b2c9f36d1ba8f5d331166 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2861055 Reviewed-by: Rob Barnes <robbarnes@google.com> Commit-Queue: Rob Barnes <robbarnes@google.com>
* guybrush: Set G3_TO_PWRBTN_DELAY_MS to 16msRob Barnes2021-04-271-1/+1
| | | | | | | | | | | | | | G3->S0 timing requires atleast 16 ms between RSMRST_L deasserting and PWRBTN asserting. BUG=b:183038598 TEST=16ms delay measured in scope. Boots normally. BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: Ic025445ec18f01cc3447014c4a5a5c8f8c2b4ba3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2855214 Reviewed-by: Diana Z <dzigterman@chromium.org>
* Guybrush: Remove pause in S5 configDiana Z2021-04-121-1/+0
| | | | | | | | | | | | | This config is a no-op in AMD power sequencing. BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I195d98f57d392db9886a3a544b4707c1aff19b9a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2818528 Reviewed-by: Rob Barnes <robbarnes@google.com>
* Guybrush: initial BMI160 sensorMatt_Wang2021-04-121-1/+8
| | | | | | | | | | | | | | | | | Initial base BMI160 sensor. BUG=b:178213305 BRANCH=none TEST=make -j BOARD=guybrush TEST=can read the sensor data in ec console by i2cxfer. Signed-off-by: Matt_Wang <Matt_Wang@compal.corp-partner.google.com> Change-Id: Id49ff98dc921ba173b24f3c389fcfbde337ce77c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2783514 Tested-by: Matt Wang <matt_wang@compal.corp-partner.google.com> Reviewed-by: Bhanu Prakash Maiya <bhanumaiya@google.com> Reviewed-by: Rob Barnes <robbarnes@google.com> Commit-Queue: Rob Barnes <robbarnes@google.com>
* Guybrush: Enable CONFIG_CMD_S5_TIMEOUTDiana Z2021-04-101-0/+1
| | | | | | | | | | | | | | | | While we're in bringup power testing, enable configurable S5 timeout. BRANCH=None BUG=b:184941436 TEST=on guybrush, use s5_timeout to specify 0 and drop straight to G3, 50 and see a 50 second transition, and -1 to see the system stay in S5 until the power button is pressed Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: I39dfad4ac446f13d782ad4f1090de4fd2e3179a0 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2819022 Reviewed-by: Rob Barnes <robbarnes@google.com> Commit-Queue: Rob Barnes <robbarnes@google.com>
* guybrush: Dynamically configure C1 muxRob Barnes2021-04-091-0/+1
| | | | | | | | | | | | | | | | | Two C1 muxes are currently supported for guybrush. Configure the correct C1 mux at runtime based on fw_config. Move board_c1_ps8818_mux_set to guybrush board.c since it's board specific tuning. BUG=b:184548806 TEST=Build and run on guybrush B2 BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: I6ff809a9cbd1ddc2a408d2ce84f75d6723b7844f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2809259 Reviewed-by: Diana Z <dzigterman@chromium.org>
* guybrush: Enable CONFIG_VBOOTRob Barnes2021-03-241-0/+2
| | | | | | | | | | | | | | Enable one slot of secure temporary storage. BUG=None TEST=Boot guybrush, no longer see HC 0x4b err 1 BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: I4d73bd8a55f092276b690118b28f401e524e1250 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2785504 Commit-Queue: Diana Z <dzigterman@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* guybrush: Enable CBI supportRob Barnes2021-03-171-0/+4
| | | | | | | | | | | | | | Enable CBI support in EC. It's not used directly in guybrush EC yet, but this allows ectool cbi commands to function. BUG=b:182900577 TEST=Build BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: I8b91e1fd72889e5e326cb75bf6fe3bd94bd509c8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2766523 Reviewed-by: Bhanu Prakash Maiya <bhanumaiya@google.com>
* guybrush: Remove early bringup flagRob Barnes2021-03-171-1/+0
| | | | | | | | | | | | | | Board power on is going OK. This flag is no longer needed. BUG=None TEST=Build BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: Ib1a951c543b9206ae41992122d2cb648d5262387 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2764976 Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* guybrush: Enable EFS2Rob Barnes2021-03-161-0/+6
| | | | | | | | | | | | | Enable EFS2 for guybrush boards. BUG=b:182795161 TEST=Build BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: Id684723627486d00850f37487b6971eea7258286 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2760803 Reviewed-by: Diana Z <dzigterman@chromium.org>
* guybrush: Add 200ms delay between rsmrst and pwrbtnRob Barnes2021-03-161-1/+1
| | | | | | | | | | | | | | | | | Changing from 80ms to 200ms to allow more time for signals to settle before pwrbtn. This delay is not documented in spec, so this may require further tuning. BUG=b:182802230 TEST=Build BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: I79432b05c11c520fd49cb84c8e575f253b04a836 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2764972 Commit-Queue: Edward Hill <ecgh@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* guybrush: Enable CONFIG_CHIPSET_X86_RSMRST_DELAYRob Barnes2021-03-161-0/+1
| | | | | | | | | | | | | | | | Add a delay of 10ms between S5_PGOOD and RSMRST_L. Needed to meet timing specs. 10ms matches what is used on Intel. This may need to be tuned for AMD chipsets. BUG=b:182802230 TEST=Build BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: I8e2c5a2b47866496a1ae598089e4ac5aa5fa45d3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2764971 Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* guybrush: Add fan supportRob Barnes2021-03-161-1/+16
| | | | | | | | | | | | | | | Add basic fan support. More tuning will be needed. BUG=b:178217015 TEST=Build BRANCH=None Change-Id: I8133bfeb63346a254d0300d99d2b0ade35f74cc6 Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2762804 Reviewed-by: Bhanu Prakash Maiya <bhanumaiya@google.com> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
* kconfig: Alias EN_PWR_A to EN_PWR_S5Rob Barnes2021-03-121-1/+1
| | | | | | | | | | | | | EN_PWR_A should alias to EN_PWR_S5. EN_PWR_Z1 is PSL_OUT. BUG=b:182512084 TEST=Build BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: Iabec65bb573d200a12e727d281f8c97cf1ee0ec4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2753816 Reviewed-by: Diana Z <dzigterman@chromium.org>
* guybrush: add current monitor adc signalsRob Barnes2021-03-091-0/+2
| | | | | | | | | | | | | | Add the two current monitor signals from the PCORE. These will only be used for debugging. BUG=None TEST=Build BRANCH=None Change-Id: I9d25fa263cd4ef9526a8c493a703d020672338c5 Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2740560 Reviewed-by: Diana Z <dzigterman@chromium.org>
* guybrush: Enable debug configsRob Barnes2021-02-231-1/+4
| | | | | | | | | | | | | Enable debug configs to help with debugging. BUG=b:180941655 TEST=Build BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: I509e1fdb585ab9ae871ac2f30216547bffeaa743 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2713424 Reviewed-by: Diana Z <dzigterman@chromium.org>
* guybrush: Add ANX7451 mux/retimer driverRob Barnes2021-02-231-1/+1
| | | | | | | | | | | | | | Add basic support for ANX7451. Datasheets available in bug. Support for tuning can be added later if needed. BUG=b:179065240 BRANCH=None TEST=Build Change-Id: Ifafdec4412b73b0fd3f7de2131a8617bbfde6426 Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2699667 Reviewed-by: Diana Z <dzigterman@chromium.org>
* guybrush: Enable S0ix for amd_x86Rob Barnes2021-02-121-0/+3
| | | | | | | | | | | | | | | | | Enable S0ix for amd_x86. This closely follows the intel_x86.c implementation. b/179294969 tracks merging intel_x86.c and amd_x86.c BUG=b:175234270 BRANCH=None TEST=Build for Guybrush Boot Zork, enter and leave suspend. Note, Zork does not support S0ix Change-Id: I874d2e9019fcc162c7ebfb6091b179ba482a4e47 Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2673905 Reviewed-by: Diana Z <dzigterman@chromium.org>
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