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* Rename CONFIG_CHARGER_INPUT_CURRENT to _CHARGER_DEFAULT_CURRENT_LIMITPeter Marheine2022-11-291-1/+2
| | | | | | | | | | | | | | | | | | | "Default input current" is not a very clear name, so rename this option to better express its use as a default value that is set in the charger. This is made possible by splitting other uses into CHARGER_MIN_INPUT_CURRENT_LIMIT, making the only use for CHARGER_INPUT_CURRENT be as a default. BUG=b:163093572 TEST=make buildall; zmake build -a BRANCH=none LOW_COVERAGE_REASON=isl9241 and sm5803 currently lack emulators Signed-off-by: Peter Marheine <pmarheine@chromium.org> Change-Id: Ia9c1df9061825b15477466e85343afeb2a371288 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4025404 Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com> Reviewed-by: Keith Short <keithshort@chromium.org>
* Add CONFIG_CHARGER_MIN_INPUT_CURRENT_LIMITPeter Marheine2022-11-231-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This splits the dual use of CONFIG_CHARGER_INPUT_CURRENT into two different symbols, changing the uses of that which are used to set a minimum current limit to be CONFIG_CHARGER_MAX_INPUT_CURRENT_LIMIT. Most boards implement this in the same way within either the board or baseboard, so handling of the new option is moved into charge_set_input_current_limit (which is called by every user of the option) and every board which repeated this pattern has the new symbol set to the same value as the old one, with the duplicated code deleted. One functional change to the charge manager is made: when charging stops, the input current limit is set to the default value (CONFIG_CHARGER_INPUT_CURRENT) rather than 0. This captures the intent that the default current is appropriate at any time, which was previously configured by individual boards' implementation of board_set_charge_limit() while still allowing the limit to be set lower as needed. To verify that all changes are appropriate, the following has been manually checked: * All boards with a change to a .c file also have a .h change * All boards without a changed .h file have a changed baseboard.h * For Zephyr projects, those with a changed .c file have config added for the minimum limit and others (only corsola) are unchanged to leave it off. This is intended to verify that each board that duplicated the MAX() logic has its configuration updated to use the shared copy, and that boards with that code in the baseboard also update their configuration. BUG=b:163093572 TEST=make buildall; zmake build -a BRANCH=none LOW_COVERAGE_REASON=added lines will soon be deleted Change-Id: Ia460a16293c1fb82aac3784fd9be57ba0985f2fe Signed-off-by: Peter Marheine <pmarheine@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4019703 Reviewed-by: Keith Short <keithshort@chromium.org> Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com>
* Update license boilerplate text in source code filesMike Frysinger2022-09-121-1/+1
| | | | | | | | | | | | | | | Normally we don't do this, but enough changes have accumulated that we're doing a tree-wide one-off update of the name & style. BRANCH=none BUG=chromium:1098010 TEST=`repo upload` works Change-Id: Icd3a1723c20595356af83d190b2c6a9078b3013b Signed-off-by: Mike Frysinger <vapier@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3891203 Reviewed-by: Jeremy Bettis <jbettis@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* baseboard/hatch/baseboard.h: Format with clang-formatJack Rosenthal2022-07-011-25/+25
| | | | | | | | | | | BUG=b:236386294 BRANCH=none TEST=none Change-Id: Ic030dc6a3c2d35fbccabd593aaf5304c91676964 Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3727522 Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
* cleanup: charger: Add BQ25710 sense resistor configsDeepti Deshatty2021-10-281-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | Defined different sense register configs for BQ25710. All the charger chip driver implementation uses common sense register configs i.e CONFIG_CHARGER_SENSE_RESISTOR and CONFIG_CHARGER_SENSE_RESISTOR_AC. When we enable a charger driver for a platform, it is expected that the platform define these sense register configs. But ADLRVP requires two different charger drivers i.e ISL9241 and BQ25720 to be enabled to support all the variant builds. Hence BQ25710 driver is changed to use different sense register configs so that the configs defined for ISL9241 are not affected. BRANCH=none TEST=make -j buildall has no issues Signed-off-by: Deepti Deshatty <deepti.deshatty@intel.corp-partner.google.com> Change-Id: If1e1422246e2e3a5cb628d9a37c23790502b5ca4 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3211773 Reviewed-by: Poornima Tom <poornima.tom@intel.com> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: caveh jalali <caveh@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org>
* chgstv2: Unify power-on and shutdown battery thresholdsDaisuke Nojiri2021-06-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, power-on battery SoC and shutdown battery SoC are independently configured by each board. This patch will unify the setting as follows: CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON = 2 (don't boot if soc < 2%) CONFIG_BATT_HOST_SHUTDOWN_PERCENTAGE = 2 (shutdown if soc <= 2%) BATTERY_LEVEL_SHUTDOWN = 3 (shutdown if soc < 3%) CONFIG_BATTERY_EXPORT_DISPLAY_SOC = Y (removed) CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON_WITH_AC = 1 This allows us to show the low battery alert whenever we can because EC doesn't inhibit power-on even if it knows the host would immediately shut down. With CONFIG_BATTERY_EXPORT_DISPLAY_SOC, boards will start using the CONFIG_BATT_HOST_SHUTDOWN_PERCENTAGE = 2% as the low battery threshold (and the SoC will be agreed between the EC and Powerd). Boards with CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON = 1 will keep the same threshold. This is for avoiding degrading the UX by increasing the power-on threshold (even though a question that 1% may not be enough for soft sync to finish consistently remains to be answered). Boards with CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON > 2 will have a lower threshold but we think 2% is enough to finish the software sync. A lower threshold also improves the UX by showing the low battery alert in the situation where otherwise the system would leave the user uninformed by not responding to a power button press. BUG=b:191837893 BRANCH=None TEST=buildall Change-Id: If6ff733bc181f929561a3fffb8a84e760668ce37 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2981468 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* config: Rename CONFIG_CROS_BOARD_INFOPhilip Chen2021-06-161-1/+1
| | | | | | | | | | | | | | | | | | Rename CONFIG_CROS_BOARD_INFO to CONFIG_CBI_EEPROM to make it clear that the information comes from on-board EEPROM. It sets up the groundwork for adding more options of CBI sources later. BRANCH=None BUG=b:186264627 TEST=make buildall -j Signed-off-by: Philip Chen <philipchen@google.com> Change-Id: I9a6feee0a8b35bbf29e445544243485507767ad8 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2945792 Reviewed-by: Philip Chen <philipchen@chromium.org> Commit-Queue: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org>
* Specify type for forward-declared enumsTom Hughes2021-05-061-0/+3
| | | | | | | | | | | | | C++ does not allow enums to be forward declared unless they have a type. BRANCH=none BUG=b:144959033 TEST=make buildall Signed-off-by: Tom Hughes <tomhughes@chromium.org> Change-Id: I6fcdedc81f2b60a44b750554939e60552a4c6a77 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2740567 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* bq25710: Consolidate NARROW_VDC definitionCaveh Jalali2021-03-231-1/+0
| | | | | | | | | | | | | | | | | This consolidates the selection of CONFIG_CHARGER_NARROW_VDC to config.h for the bq25710 and bq25720 charger chips. The driver requires NARROW_VDC to be enabled, so move this setting to config.h similar to other chargers. BRANCH=none BUG=b:173575131 TEST=buildall passes Change-Id: I6c1768aff5d581544c4b7182f32ec45851a3a243 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2780831 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
* config: Provide default VCONN Swap delayAbe Levkoy2021-01-221-1/+0
| | | | | | | | | | | | | | | | | Almost every relevant board copy-pastes 5000 us. Make that the default and get rid of the redundant definitions. This is the approximate result of this command: find . -type f -name *.h | xargs sed -i -E \ '/#define CONFIG_USBC_VCONN_SWAP_DELAY_US[[:space:]]+5000[[:space:]]/d' BUG=b:144165680 TEST=make buildall BRANCH=none Change-Id: Ife86f9752971abcd7ab5ad5a5e607eb2ccbde2ba Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2628132 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* config: Make VCONN Swap delay a documented optionAbe Levkoy2021-01-221-1/+1
| | | | | | | | | | | | | | | | | | | | | Replace PD_VCONN_SWAP_DELAY with CONFIG_USBC_VCONN_SWAP_DELAY_US. This is the approximate result of the following command, run from platform/ec: find . -type f -\( -name '*.c' -o -name '*.h' -\) | \ xargs sed -iE 's/PD_VCONN_SWAP_DELAY/CONFIG_USBC_VCONN_SWAP_DELAY/g' Fix some latent formatting errors in usb_pd_protocol.c, because they were preventing pre-upload hooks from passing. BUG=b:144165680 TEST=make buildall BRANCH=none Signed-off-by: Abe Levkoy <alevkoy@chromium.org> Change-Id: Icaf3b309c08fdcd162e960cf5dc88185016b5d2d Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2628131 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* Refactor CONFIG_FLASH_SIZE to CONFIG_FLASH_SIZE_BYTESYuval Peress2021-01-151-1/+1
| | | | | | | | | | | | | | | | | | | | | In Zephyr CONFIG_FLASH_SIZE is a Kconfig value that is used throughout. The issue is that the units don't match. In Zephyr the value is in KiB instead of bytes. This refactor simply renames CONFIG_FLASH_SIZE in platform/ec to include the unit (via _BYTES). BRANCH=none BUG=b:174873770 TEST=make buildall be generated by the build instead of per board Signed-off-by: Yuval Peress <peress@chromium.org> Change-Id: I44bf3c7a20fcf62aaa9ae15715be78db4210f384 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2627638 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org> Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
* COIL: Rename CONFIG_I2C_CONTROLLERDiana Z2020-11-051-1/+1
| | | | | | | | | | | | | Rename CONFIG_I2C_CONTROLLER and related comments. BRANCH=None BUG=None TEST=make -j buildall Signed-off-by: Diana Z <dzigterman@chromium.org> Change-Id: Ied6a1829bf54a5c9a32e6772982a4b8aa31aaf23 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2518659 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* power/intel_x86: Generalize the sleep failure detection, not bound to S0ixWai-Hong Tam2020-08-041-1/+1
| | | | | | | | | | | | | | | | | | | This change prepares to separate the sleep failure detection out of intel_x86, such that other chipset power sequence can reuse the code. It only touches the naming. No logic changes. * Rename to CONFIG_POWER_SLEEP_FAILURE_DETECTION * Modify the function and variable names, to avoid S0ix * Modify the comment to more neutral BRANCH=None BUG=b:162083524 TEST=make buildall -j Change-Id: I6a61c3b0a63af60913ee89e0ca343085fbd22308 Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2321872 Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
* usb_pd: Rename CONFIG_CMD_PD_CONTROL to CONFIG_HOSTCMD_PD_CONTROLVijay Hiremath2020-05-151-1/+1
| | | | | | | | | | | | BUG=none BRANCH=none TEST=make buildall -j Change-Id: I33a63d6ac45bbd46da74db34a21d1bb130476362 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2196946 Reviewed-by: Sooraj Govindan <sooraj.govindan@intel.corp-partner.google.com> Reviewed-by: Keith Short <keithshort@chromium.org>
* hatch: Remove the board keyscan_config definition and use the defaultWai-Hong Tam2020-05-111-1/+0
| | | | | | | | | | | | | | | | | | | The keyscan_config is the same as the default. Don't define the board custom keyscan_config. For the board.h, most of them have duplicated definitions from the baseboard.h. Remove them by the script: $ grep -rl 'BASEBOARD:=hatch' * | cut -f1 -d/ | xargs -IX sed -i \ '/#define CONFIG_KEYBOARD_BOARD_CONFIG/d' X/board.h BRANCH=hatch BUG=b:156007029 TEST=Build all the hatches boards, no error. Change-Id: Ib02550708d533ced77f5fad05b074291b66dd4fc Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2194160 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
* palkia: remove 1 typec port, enable USB A, remove all sensorsZhuohao Lee2020-03-101-0/+10
| | | | | | | | | | | | | | | | | | | | This patch includes the changes as below: 1. Change baseboard setting to adopt the change for the palkia 2. Modify GPIO according to the palkia schematics. 3. Remove all sensors 4. Remove USB typec port 1 5. Enable USB A Battery and keyboard setting are put to the separate CL. BUG=b:147078849 BRANCH=firmware-hatch-12669.B TEST=run on DUT Change-Id: I86a7eb4e9680bf66475d3a5331e870da01526128 Signed-off-by: Zhuohao Lee <zhuohao@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2040759 Reviewed-by: Jett Rink <jettrink@chromium.org>
* hatch: Enable extpwrlimit option in ectoolShelley Chen2020-02-281-0/+1
| | | | | | | | | | | | | BUG=b:149997506 BRANCH=hatch TEST=ectool extpwrlimit 3000 5000 Signed-off-by: Shelley Chen <shchen@google.com> Change-Id: Ie133ac518f1a290ef04610a56c1d104d60254ac2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2079358 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Commit-Queue: Shelley Chen <shchen@chromium.org> Tested-by: Shelley Chen <shchen@chromium.org>
* TCPMV1/2: Make the PD Config Flags more consistentSam Hurst2020-02-221-0/+1
| | | | | | | | | | | | | | | | | | | | The current use of the PD Config Flags are a bit confusing and has been changed to the following: The CONFIG_USB_POWER_DELIVERY flag is used to enable and disable the TCPMv1 and TCPMv2 stacks. And when CONFIG_USB_POWER_DELIVERY is enabled, one of the following must be enabled: CONFIG_USB_PD_TCPMV1 - legacy power delivery state machine CONFIG_USB_PD_TCPMV2 - current power delivery state machine BUG=b:149993808 BRANCH=none TEST=make -j buildall Change-Id: Ie3f8615a75b15b4f1c703f57f3db9e152a471238 Signed-off-by: Sam Hurst <shurst@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2068519 Reviewed-by: Diana Z <dzigterman@chromium.org>
* hatch: Add check for convertible SKUs in lid_angle_peripheral_enableTim Wawrzynczak2020-02-181-0/+1
| | | | | | | | | | | | | | | | Check for a convertible SKU before turning off the keyboard in the switch to tablet mode. See go/hatch-skus for the list. BUG=b:125936966 BRANCH=firmware-hatch-12672.B TEST=On Kohaku, artificially force SKU to both convertible and non-convertible SKUs, switch to tablet mode, and then check whether Alt-Volup-R reboots the EC. Change-Id: Id29644c4e050705203b860324f14b1b87bc4ccf4 Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2047630 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
* hatch: Define CONFIG_MKBP_EVENT_WAKEUP_MASK as 0Tim Wawrzynczak2020-02-061-0/+4
| | | | | | | | | | | | | | | | | | This allows the AP to set MKBP wake masks, which will enable the EC to wake the system from suspend states. The default is 0, which means that the AP gets to choose which events will wake it from suspend. BUG=b:148976961 BRANCH=firmware-hatch-12672.B TEST=Verify 'ectool mkbpwakemask set event 0x400' succeeds. Also verify with corresponding coreboot CL that the system can wake from suspend when a DP-capable monitor is plugged in. Change-Id: I238721b0384699fec74a86002b1e7ca289ee3c8c Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2042112 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Commit-Queue: Paul Fagerburg <pfagerburg@chromium.org>
* hatch: Use GPIO and host event when generating MKBP eventsTim Wawrzynczak2020-01-301-1/+1
| | | | | | | | | | | | | | | | | For waking the system from suspend, the plan is to use the host event (SCI) to perform the wakeup, and use the GPIO for IRQ signalling, following nocturne's example. BUG=b:144122000 BRANCH=firmware-hatch-12672.B TEST=with corresponding coreboot change, verify that the AP will wake on connection of a DisplayPort monitor. Change-Id: Ifcd144777b7e40941327958ccfb931c8a7137887 Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2031264 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Scott Collyer <scollyer@chromium.org>
* Revert "hatch: refactor ↵Josh Tsai2019-12-131-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PD_MAX_VOLTAGE/PD_MAX_CURRENT/PD_MAX_POWER/PD_OPERATING_POWER/" This reverts commit 89197aceaf26ccf33b143c7a5e95eb07ba4c7464. Reason for revert: It is not necessary to change the PD setting, so revert it. Original change's description: > hatch: refactor PD_MAX_VOLTAGE/PD_MAX_CURRENT/PD_MAX_POWER/PD_OPERATING_POWER/ > > 1) The four config is determined by board, move it into board.h. > 2) Update the config variables above for stryke. > > BUG=b:145257655 > BRANCH=hatch > TEST=make buildall > > Change-Id: I1dd6a4f2a78b5196006821bc5d2686f68206c2e1 > Signed-off-by: Josh Tsai <josh_tsai@compal.corp-partner.google.com> > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1950270 > Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Bug: b:145257655 Change-Id: Ib2cb2db51b15f0974d2b22ef8e0e3e6d4e6b60d6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1958299 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Josh Tsai <josh_tsai@compal.corp-partner.google.com> Commit-Queue: Josh Tsai <josh_tsai@compal.corp-partner.google.com> Tested-by: Josh Tsai <josh_tsai@compal.corp-partner.google.com>
* hatch: refactor PD_MAX_VOLTAGE/PD_MAX_CURRENT/PD_MAX_POWER/PD_OPERATING_POWER/Josh Tsai2019-12-061-6/+0
| | | | | | | | | | | | | | 1) The four config is determined by board, move it into board.h. 2) Update the config variables above for stryke. BUG=b:145257655 BRANCH=hatch TEST=make buildall Change-Id: I1dd6a4f2a78b5196006821bc5d2686f68206c2e1 Signed-off-by: Josh Tsai <josh_tsai@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1950270 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
* Rename CONFIG_USB_PD_PORT_COUNT as CONFIG_USB_PD_PORT_MAX_COUNTKarthikeyan Ramasubramanian2019-11-011-1/+1
| | | | | | | | | | | | | | | | | Certain SKUs of certain boards have lesser number of USB PD ports than defined by CONFIG_USB_PD_PORT_COUNT. Hence rename CONFIG_USB_PD_PORT_COUNT as CONFIG_USB_PD_PORT_MAX_COUNT. BUG=b:140816510, b:143196487 BRANCH=octopus TEST=make -j buildall; Boot to ChromeOS Change-Id: I7c33b27150730a1a3b5813b7b4a72fd24ab73c6a Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1879337 Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org>
* cometlake: cleanup power signal namesKeith Short2019-10-311-1/+1
| | | | | | | | | | | | | | | Add X86 prefix to the Comet Lake signals names for consistency with other Intel APs. BUG=none BRANCH=none TEST=make buildall Change-Id: I70b2a261fd6fbc0e6de70e5d4cf3a90b35078d4e Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1888596 Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* akemi: add temperature sensor supportLu Zhang2019-10-251-0/+1
| | | | | | | | | | | | | | | | Akemi board adds a g753 temp sensor on EC i2c port 4. BUG=b:138426009, b:143046086 BRANCH=none CQ-DEPEND=CL:1857978 TEST=use akemi board, add g753 as temp sensor, boot the board and make sure temperature can be read from g753 Change-Id: I2ae663b19e92d2f4d702818ed28004aae98fa045 Signed-off-by: Lu Zhang <lu.zhang@bitland.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1857979 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
* hatch: Add baseboard function for retrieving Board IDTim Wawrzynczak2019-10-091-0/+1
| | | | | | | | | | | | BUG=none BRANCH=none TEST=Verify print output matches CBI dump Change-Id: I7a61179d1ad8a4d3f7e4eea3d2e94b066176bc20 Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1838883 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
* hatch: Enable charger hw ramp featureScott Collyer2019-10-021-0/+1
| | | | | | | | | | | | | | | | | | | This CL enables hw ramp for hatch systems. BRANCH=none BUG=b:126229130 TEST=Tested variaous legacy chargers and verfied that ICO mode completes and gives the expected current limit. Tested that when no battery is present, ICO mode is not enabled. Change-Id: Ice6aa87d116ccd0e673774cfef892ab73403f367 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1827256 Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Commit-Queue: Scott Collyer <scollyer@chromium.org>
* config: Merge CONFIG_CHARGER_V2 into CONFIG_CHARGERKeith Short2019-09-181-1/+0
| | | | | | | | | | | | | | | | For all boards that defined CONFIG_CHARGER, CONFIG_CHARGER_V2 is also defined. Remove references to CONFIG_CHARGER_V2 from board header files. Replace CONFIG_CHARGER_V2 in common C modules with CONFIG_CHARGER when appropriate. BUG=b:139699769 BRANCH=none TEST=make buildall -j Change-Id: I6b54baf4ad2406bbed629b6b272dad9ea6a81280 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1789420 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* hatch: enable link time optimizationKeith Short2019-09-161-0/+1
| | | | | | | | | | | | | | | | The Hatch platforms did not have CONFIG_LTO defined. This option saves over 8 KiB of flash space in RO and RW each. BUG=b:140507221 BRANCH=none TEST=make buildall -j TEST=Verify Hatch platform boots Change-Id: I5f2a4590cfd5522be899795dac70a93fe6889f4e Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1783534 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* config: Refactor CONFIG_ACCEL_FIFO to enable use of IS_ENABLEDYuval Peress2019-09-031-2/+4
| | | | | | | | | | | | | | | This change allows us to use the IS_ENABLED condition to replace the various ifdef guards around the CONFIG_ACCEL_FIFO BUG=b:137758297,chromium:981990 BRANCH=None TEST=buildall and CTS tests on Arcada Change-Id: I65d36bac19855e51c830a33e6f3812575e8d15d9 Signed-off-by: Yuval Peress <peress@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704164 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
* Hatch: add board-specific hook to disable/enable KB backlightben.chen2@quanta.corp-partner.google.com2019-08-231-0/+4
| | | | | | | | | | | | | | | | This patch add enable/disable kb backlight during suspend/resume. BUG=b:138326244 BRANCH=master TEST=None Change-Id: I8c88d63c0d6a5a425e2210b9edca91da174b7429 Signed-off-by: ben.chen2@quanta.corp-partner.google.com Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1730373 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Philip Chen <philipchen@chromium.org> Tested-by: David Huang <David.Huang@quantatw.com>
* Hatch: Enable CBI info of board skuben.chen2@quanta.corp-partner.google.com2019-08-061-1/+0
| | | | | | | | | | | | | | | This patch enables get board sku BUG=b:138326244 BRANCH=master TEST=None Change-Id: I489de71c75804dd460bda98fa1c49b94c91c8a12 Signed-off-by: ben.chen2@quanta.corp-partner.google.com Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1716674 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Tested-by: David Huang <David.Huang@quantatw.com> Commit-Queue: Tim Wawrzynczak <twawrzynczak@chromium.org>
* hatch: Add charger-related configs for low-battery bootingTim Wawrzynczak2019-08-021-0/+7
| | | | | | | | | | | | | | | | | When there is a battery that isn't communicating, the DUT should not boot the AP in order to avoid brown outs after the system jumps to RW and can begin PD negotiation. BUG=b:136970148 BRANCH=none TEST=Disable PD negotiation in RO, cutoff battery, plug in A/C, and verify that the DUT stays in G3, and doesn't attempt to boot the AP, because Hatch's battery is slow to come back from cutoff (>10 s). Change-Id: I6f53ce83e89520369e9761a64133839b3c162b91 Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1731976 Reviewed-by: Scott Collyer <scollyer@chromium.org>
* hatch: add chargen to the set of CLI commandsVadim Bendebury2019-07-231-0/+3
| | | | | | | | | | | | | | | This is needed to support CCD testing of UART to USB bridging. BRANCH=none BUG=b:38448364 TEST=ran 'make BOARD=hatch -j', verified that command is included in the symbol map. Change-Id: I11a9dcf7c3204a4464eb5305d0b6b38f51205575 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1688135 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Namyoon Woo <namyoon@chromium.org>
* hatch: Enable CONFIG_USBC_PPC_DEDICATED_INTTim Wawrzynczak2019-07-231-0/+1
| | | | | | | | | | | | | | | | | The Hatch platform uses dedicated interrupt lines for the SN5S330 PPC. This patch helps to ensure that all PPC interrupts are processed, even when interrupts happen during processing. BUG=b:137783988 BRANCH=none TEST=Verified that charging/discharging are still processed as expected. Change-Id: I5c3b003f60aaa239d3ee7a477006913ce8f83ac5 Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1714137 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Scott Collyer <scollyer@chromium.org>
* Remove __7b, __8b and __7bfDenis Brockus2019-07-201-1/+1
| | | | | | | | | | | | | | | | | | | The extentions were added to make the compiler perform most of the verification that the conversion was being done correctly to remove 8bit addressing as the standard I2C/SPI address type. Now that the compiler has verified the code, the extra extentions are being removed BUG=chromium:971296 BRANCH=none TEST=make buildall -j TEST=verify sensor functionality on arcada_ish Change-Id: I36894f8bb9daefb5b31b5e91577708f6f9af2a4f Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704792 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* Use 7bit I2C/SPI slave addresses in ECDenis Brockus2019-07-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Opt for 7bit slave addresses in EC code. If 8bit is expected by a driver, make it local and show this in the naming. Use __7b, __7bf and __8b as name extensions for i2c/spi addresses used in the EC codebase. __7b indicates a 7bit address by itself. __7bf indicates a 7bit address with optional flags attached. __8b indicates a 8bit address by itself. Allow space for 10bit addresses, even though this is not currently being used by any of our attached devices. These extensions are for verification purposes only and will be removed in the last pass of this ticket. I want to make sure the variable names reflect the type to help eliminate future 7/8/7-flags confusion. BUG=chromium:971296 BRANCH=none TEST=make buildall -j Change-Id: I2fc3d1b52ce76184492b2aaff3060f486ca45f45 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1699893 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* baseboard/hatch: Allow hatch variant to provide battery present infoFurquan Shaikh2019-07-161-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | In case of some hatch variants, there might be a need to identify battery hardware presence using custom method i.e. GPIO_EC_BATT_PRES_ODL might not work correctly. In order to accommodate these variants, this change provides a callback variant_battery_present() that allows variant to provide its own implementation if required. By default, a weak implementation is provided which returns BP_NOT_SURE to use the default GPIO for reading battery present state. BUG=b:135278000 BRANCH=None TEST=None Change-Id: I8504e807cff853dc3276d76a0cd3db1ccb587b9e Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1702869 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: YongBeum Ha <ybha@samsung.com> Reviewed-by: Philip Chen <philipchen@chromium.org> Tested-by: YongBeum Ha <ybha@samsung.com> Tested-by: Furquan Shaikh <furquan@chromium.org> Commit-Queue: Furquan Shaikh <furquan@chromium.org>
* hatch/helios/kindred/kohaku: Enable EC-based display backlight controlPhilip Chen2019-07-021-0/+4
| | | | | | | | | | | | | | | | | | | | | This patch allows EC to override display backlight control for hatch family. Also enable CONFIG_BACKLIGHT_LID so that EC can specifically turn off display backlight when the lid is closed. BUG=b:135511415 BRANCH=none TEST=On hatch rev1 board, turn off/on display backlight by 'ectool backlight 0' and 'ectool backlight 1' TEST='emerge-hatch chromeos-ec' Change-Id: I894ef2879fb584ccf84cd643cc4c0cd5fdcb8525 Signed-off-by: Philip Chen <philipchen@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1679047 Reviewed-by: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> Commit-Queue: Philip Chen <philipchen@chromium.org>
* hatch: move forward led_states to common/led_onoff_statesDevin Lu2019-06-151-0/+1
| | | | | | | | | | | | | | | | This patch follows CL:1556869 to move forward led_states to common. BUG=b:126460269 BRANCH=none TEST=make buildall -j Change-Id: I94f36d20c7c180db0e1cc7c9732711af70002133 Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1564496 Tested-by: Scott Collyer <scollyer@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Commit-Queue: Furquan Shaikh <furquan@chromium.org>
* intel_x86/power: Consolidate chipset specific power signals arrayVijay Hiremath2019-06-131-11/+0
| | | | | | | | | | | | | | | Currently chipset specific power signals are defined at board/baseboard level. These power signals are moved to chipset specific file to minimize the redundant power signals array defined for each board/baseboard. BUG=b:134079574 BRANCH=none TEST=make buildall -j Change-Id: I351904f7cd2e0f27844c0711beb118d390219581 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1636837 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* baseboard: hatch: Limit printf on serial consoleGwendal Grignou2019-05-141-0/+8
| | | | | | | | | | | | | | | | | Once Sensors are enabled, there is a lot of host command traffic. Change chan mask to prevent printf overload. BUG=None BRANCH=master TEST=Less printf on the console. Change-Id: I5462e1220949821034fa4001bb5cd11942d48c70 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1593952 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Enrico Granata <egranata@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Scott Collyer <scollyer@chromium.org>
* hatch: Enable CONFIG_CMD_CHARGER_DUMPScott Collyer2019-05-091-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This CL enables CONFIG_CMD_CHARGER_DUMP which enables the EC console command 'charger_dump'. BUG=b:130209125 BRANCH=none TEST=manual >charger_dump 2019-04-30 17:47:16 25710 REG 12: e70e 2019-04-30 17:47:16 25710 REG 14: dc0 2019-04-30 17:47:16 25710 REG 15: 2260 2019-04-30 17:47:16 25710 REG 20: 8400 2019-04-30 17:47:16 25710 REG 21: a804 2019-04-30 17:47:16 25710 REG 22: 3b00 2019-04-30 17:47:16 25710 REG 23: b700 2019-04-30 17:47:16 25710 REG 24: 0 2019-04-30 17:47:16 25710 REG 25: 0 2019-04-30 17:47:16 25710 REG 26: 0 2019-04-30 17:47:16 25710 REG 30: 210 2019-04-30 17:47:16 25710 REG 31: 40b7 2019-04-30 17:47:16 25710 REG 32: 30 2019-04-30 17:47:16 25710 REG 33: 265 2019-04-30 17:47:16 25710 REG 34: 8124 2019-04-30 17:47:16 25710 REG 35: 40 2019-04-30 17:47:16 25710 REG 3b: 0 2019-04-30 17:47:16 25710 REG 3c: 0 2019-04-30 17:47:16 25710 REG 3d: 1c0 2019-04-30 17:47:16 25710 REG 3e: 1800 2019-04-30 17:47:16 25710 REG 3f: 3b00 2019-04-30 17:47:16 25710 REG fe: 40 2019-04-30 17:47:16 25710 REG ff: 89 Change-Id: I614f5afd78f2d8a3c4e6e28d0cc186616a3e5540 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1580183 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* hatch/kohaku: Account for different bc1.2 chipsScott Collyer2019-04-201-1/+0
| | | | | | | | | | | | | | | | | This CL moves bc1.2 configuration from baseboard.c/.h to the board.c/.h files for hatch and kohaku. BUG=b:130197995 BRANCH=none TEST=make -j BOARD=hatch and make -j BOARD=kohaku both are successful Change-Id: I2aa44d37a7a1d23196a766c95c59737838e9e09f Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1574788 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* hatch/kohaku: Remove Type A USB support for Kohaku.Tim Wawrzynczak2019-04-191-7/+0
| | | | | | | | | | | | | | | | Move USB Type A support from Hatch baseboard to Hatch board because not all Hatch variants support Type A. BUG=b:130577280 BRANCH=none TEST=Kled device still recognizes Type-A USB flash drive. Change-Id: I23b21b069727d57b8fea29de5bbf4e255cf3a3a9 Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1573019 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
* hatch/kohaku: Move TCPC definitions to board from baseboardScott Collyer2019-04-171-2/+3
| | | | | | | | | | | | | | | | | | | | Kohaku uses PS8751 for port 0 TCPC. Therefore, the TCPC config and mux config tables can't be common and must be moved out of baseboard into their respective board.c files. BUG=b:130194031 BRANCH=none TEST=make -j buildall Change-Id: Iea39e60d675a5ea0df346c52e78f5f472768984c Signed-off-by: Scott Collyer <scollyer@google.com> Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1551582 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
* hatch: Enable CONFIG_POWER_S0IX_FAILURE_DETECTIONEvan Green2019-04-031-0/+1
| | | | | | | | | | | | | | | | | | Enable the shiny new S0ix failure detection code that will wake the AP after a specified timeout if the system attempted to go into S0ix but went into a shallower state instead. BUG=b:123716513 BRANCH=None TEST=Test S0ix with a modified EC firmware and kernel changes. Signed-off-by: Evan Green <evgreen@chromium.org> Change-Id: Ia981cdc34a98bcf877dec78067173bf1c0f9e700 Reviewed-on: https://chromium-review.googlesource.com/1509717 Commit-Ready: Evan Green <evgreen@chromium.org> Tested-by: Evan Green <evgreen@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* hatch: Enabling tablet modezack_yang2019-03-191-0/+3
| | | | | | | | | | | | | | | | | | | | | | | EC should send an event to host when the mode change BUG=b:125355874 BRANCH=none TEST= On proto boards, rotate your lid sensor until the lid_angle is 270 degree, you will see the log in ec console. [146.851540 tablet mode enabled] [146.851961 event set 0x0000000010000000] And then rotate it back to 90 degree, you will see the log in ec console. [219.552181 tablet mode disabled] [219.552606 event set 0x0000000010000000] Change-Id: Id0f3b5b18fdfd5117fc5feab4472cd2709cb1705 Signed-off-by: zack_yang <zack_yang@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1523269 Commit-Ready: Zack Yang <zack_yang@compal.corp-partner.google.com> Tested-by: Furquan Shaikh <furquan@chromium.org> Tested-by: Zack Yang <zack_yang@compal.corp-partner.google.com> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Zack Yang <zack_yang@compal.corp-partner.google.com>
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