summaryrefslogtreecommitdiff
path: root/baseboard/hatch
Commit message (Collapse)AuthorAgeFilesLines
* Swap system_jumped_to_this_image with system_jumped_latestabilize-quickfix-13310.91.B-masterstabilize-quickfix-13310.76.B-masterstabilize-quickfix-13310.73.B-masterstabilize-13310.99.B-masterstabilize-13310.94.B-masterstabilize-13310.83.B-masterstabilize-13310.74.B-masterstabilize-13310.72.B-masterrelease-R85-13310.B-masterDaisuke Nojiri2020-06-261-1/+1
| | | | | | | | | | | | | | | | | | | | EFS2 boards need to call system_jumped_late in HOOK_INIT to avoid running init code twice per boot. system_jumped_to_this_image and system_jumped_late are functionally equivalent for non EFS2 boards. This patch will prevent system_jumped_to_this_image from being used for EFS2 boards when code is copied from a past project. BUG=chromium:1072743 BRANCH=none TEST=buildall Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: I73fb5cedc5325d1c80825f9346954013046ee1df Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2267685 Reviewed-by: Keith Short <keithshort@chromium.org>
* mushu: Bring up F75303 temp sensorPuthikorn Voravootivat2020-06-161-1/+2
| | | | | | | | | | | | | | | | | | | | BRANCH=None BUG=b:158676970 TEST=Force fan off/run heavy workload Use temps command in ec console, see temp > temps CHARGER : 318 K = 45 C 64% 5V : 316 K = 43 C 61% GPU : 343 K = 70 C 100% F75303_Local : 331 K = 58 C F75303_GPU : 340 K = 67 C F75303_GPU_Power : 332 K = 59 C Change-Id: I0af47849cc606eb03eee652bb261fce11896e2ab Signed-off-by: Puthikorn Voravootivat <puthik@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2240512 Reviewed-by: Bob Moragues <moragues@chromium.org> Reviewed-by: Shelley Chen <shchen@chromium.org>
* usb_pd: Rename CONFIG_CMD_PD_CONTROL to CONFIG_HOSTCMD_PD_CONTROLVijay Hiremath2020-05-151-1/+1
| | | | | | | | | | | | BUG=none BRANCH=none TEST=make buildall -j Change-Id: I33a63d6ac45bbd46da74db34a21d1bb130476362 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2196946 Reviewed-by: Sooraj Govindan <sooraj.govindan@intel.corp-partner.google.com> Reviewed-by: Keith Short <keithshort@chromium.org>
* hatch: Remove the board keyscan_config definition and use the defaultWai-Hong Tam2020-05-112-22/+0
| | | | | | | | | | | | | | | | | | | The keyscan_config is the same as the default. Don't define the board custom keyscan_config. For the board.h, most of them have duplicated definitions from the baseboard.h. Remove them by the script: $ grep -rl 'BASEBOARD:=hatch' * | cut -f1 -d/ | xargs -IX sed -i \ '/#define CONFIG_KEYBOARD_BOARD_CONFIG/d' X/board.h BRANCH=hatch BUG=b:156007029 TEST=Build all the hatches boards, no error. Change-Id: Ib02550708d533ced77f5fad05b074291b66dd4fc Signed-off-by: Wai-Hong Tam <waihong@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2194160 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
* hatch/baseboard: Increase TCPC i2c speed to 400KhzDevin Lu2020-03-261-2/+2
| | | | | | | | | | | | | | | Currently TCPC tSenderResponse time is not meet PD specification. This patch increase TCPC i2c speed to 400Khz to improve response time. BUG=b:152008672, b:152306339 BRANCH=firmware-hatch-12672.B TEST=make sure tSenderResponse time is under 24ms while sysjump. Change-Id: I70c1b2a530006923dd1e6a51f1ba8e924e90400f Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2115895 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Mushu : enable GPU temperature sensor driver in Mushuloganliao2020-03-131-0/+3
| | | | | | | | | | | | | | BUG=b:148968367 BRANCH=none TEST=make BOARD=mushu Change-Id: I20e1ebd8714e3d4b3b990d6e2a38f415afd8b5c5 Signed-off-by: loganliao <Logan_Liao@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2082303 Reviewed-by: Logan Liao <logan_liao@compal.corp-partner.google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Commit-Queue: Logan Liao <logan_liao@compal.corp-partner.google.com> Tested-by: Logan Liao <logan_liao@compal.corp-partner.google.com>
* palkia: remove 1 typec port, enable USB A, remove all sensorsZhuohao Lee2020-03-102-7/+35
| | | | | | | | | | | | | | | | | | | | This patch includes the changes as below: 1. Change baseboard setting to adopt the change for the palkia 2. Modify GPIO according to the palkia schematics. 3. Remove all sensors 4. Remove USB typec port 1 5. Enable USB A Battery and keyboard setting are put to the separate CL. BUG=b:147078849 BRANCH=firmware-hatch-12669.B TEST=run on DUT Change-Id: I86a7eb4e9680bf66475d3a5331e870da01526128 Signed-off-by: Zhuohao Lee <zhuohao@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2040759 Reviewed-by: Jett Rink <jettrink@chromium.org>
* hatch/baseboard: Enable the Search key button in maskRajat Jain2020-03-031-1/+1
| | | | | | | | | | | | | Enable the search key located at Row-3, Col-0 BUG=b:146501925,b:148488560 TEST=Check search key while debugging BRANCH=firmware-hatch-12672.B Signed-off-by: Rajat Jain <rajatja@google.com> Change-Id: I3496d6413994f147839fbb29f6d666b5fc6c0914 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2080600 Reviewed-by: Scott Collyer <scollyer@chromium.org>
* hatch: Enable extpwrlimit option in ectoolShelley Chen2020-02-281-0/+1
| | | | | | | | | | | | | BUG=b:149997506 BRANCH=hatch TEST=ectool extpwrlimit 3000 5000 Signed-off-by: Shelley Chen <shchen@google.com> Change-Id: Ie133ac518f1a290ef04610a56c1d104d60254ac2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2079358 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Commit-Queue: Shelley Chen <shchen@chromium.org> Tested-by: Shelley Chen <shchen@chromium.org>
* TCPMV1/2: Make the PD Config Flags more consistentSam Hurst2020-02-221-0/+1
| | | | | | | | | | | | | | | | | | | | The current use of the PD Config Flags are a bit confusing and has been changed to the following: The CONFIG_USB_POWER_DELIVERY flag is used to enable and disable the TCPMv1 and TCPMv2 stacks. And when CONFIG_USB_POWER_DELIVERY is enabled, one of the following must be enabled: CONFIG_USB_PD_TCPMV1 - legacy power delivery state machine CONFIG_USB_PD_TCPMV2 - current power delivery state machine BUG=b:149993808 BRANCH=none TEST=make -j buildall Change-Id: Ie3f8615a75b15b4f1c703f57f3db9e152a471238 Signed-off-by: Sam Hurst <shurst@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2068519 Reviewed-by: Diana Z <dzigterman@chromium.org>
* hatch: Add check for convertible SKUs in lid_angle_peripheral_enableTim Wawrzynczak2020-02-182-4/+6
| | | | | | | | | | | | | | | | Check for a convertible SKU before turning off the keyboard in the switch to tablet mode. See go/hatch-skus for the list. BUG=b:125936966 BRANCH=firmware-hatch-12672.B TEST=On Kohaku, artificially force SKU to both convertible and non-convertible SKUs, switch to tablet mode, and then check whether Alt-Volup-R reboots the EC. Change-Id: Id29644c4e050705203b860324f14b1b87bc4ccf4 Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2047630 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
* hatch: Define CONFIG_MKBP_EVENT_WAKEUP_MASK as 0Tim Wawrzynczak2020-02-061-0/+4
| | | | | | | | | | | | | | | | | | This allows the AP to set MKBP wake masks, which will enable the EC to wake the system from suspend states. The default is 0, which means that the AP gets to choose which events will wake it from suspend. BUG=b:148976961 BRANCH=firmware-hatch-12672.B TEST=Verify 'ectool mkbpwakemask set event 0x400' succeeds. Also verify with corresponding coreboot CL that the system can wake from suspend when a DP-capable monitor is plugged in. Change-Id: I238721b0384699fec74a86002b1e7ca289ee3c8c Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2042112 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Commit-Queue: Paul Fagerburg <pfagerburg@chromium.org>
* Charger: Convert boards to use new driver structureDiana Z2020-02-041-0/+12
| | | | | | | | | | | | | | | This commit removes the temporary common charger chip configuration and instead puts the configuration in each board. BRANCH=none BUG=b:147672225 TEST=builds, runs on waddledoo and octopus Change-Id: If81aef31e48c65999a87e202494f286716114bbb Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2031855 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* hatch: Use GPIO and host event when generating MKBP eventsTim Wawrzynczak2020-01-301-1/+1
| | | | | | | | | | | | | | | | | For waking the system from suspend, the plan is to use the host event (SCI) to perform the wakeup, and use the GPIO for IRQ signalling, following nocturne's example. BUG=b:144122000 BRANCH=firmware-hatch-12672.B TEST=with corresponding coreboot change, verify that the AP will wake on connection of a DisplayPort monitor. Change-Id: Ifcd144777b7e40941327958ccfb931c8a7137887 Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2031264 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Scott Collyer <scollyer@chromium.org>
* hatch: Add board specific override for board_get_pd_port_location()Tim Wawrzynczak2020-01-281-0/+13
| | | | | | | | | | | | | Returns LEFT_BACK for port 0, and RIGHT_BACK for port 1. BUG=b:146506369 BRANCH=firmware-hatch-12672.B TEST=Verified in SSDT that the port-location property is correct Change-Id: Ib21119d8416b36dde242449bb4433e3250dfb130 Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2016918 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
* jinlon: enable OTI502 IR temperature sensorDevin Lu2020-01-221-0/+3
| | | | | | | | | | | BUG=b:141259174 BRANCH=hatch TEST=ec console "temps" to check OTI502 IR temperature sensor can be read. Change-Id: I03254e850809d6968b59ca9d0fbcc45443f097af Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1933789 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
* Revert "hatch: refactor ↵Josh Tsai2019-12-131-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PD_MAX_VOLTAGE/PD_MAX_CURRENT/PD_MAX_POWER/PD_OPERATING_POWER/" This reverts commit 89197aceaf26ccf33b143c7a5e95eb07ba4c7464. Reason for revert: It is not necessary to change the PD setting, so revert it. Original change's description: > hatch: refactor PD_MAX_VOLTAGE/PD_MAX_CURRENT/PD_MAX_POWER/PD_OPERATING_POWER/ > > 1) The four config is determined by board, move it into board.h. > 2) Update the config variables above for stryke. > > BUG=b:145257655 > BRANCH=hatch > TEST=make buildall > > Change-Id: I1dd6a4f2a78b5196006821bc5d2686f68206c2e1 > Signed-off-by: Josh Tsai <josh_tsai@compal.corp-partner.google.com> > Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1950270 > Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Bug: b:145257655 Change-Id: Ib2cb2db51b15f0974d2b22ef8e0e3e6d4e6b60d6 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1958299 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Josh Tsai <josh_tsai@compal.corp-partner.google.com> Commit-Queue: Josh Tsai <josh_tsai@compal.corp-partner.google.com> Tested-by: Josh Tsai <josh_tsai@compal.corp-partner.google.com>
* usb_pd_policy: Make a lot of objects commonAseda Aboagye2019-12-101-324/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is a board specific usb_pd_policy.c file that contains a lot of code for handling DisplayPort Alternate mode, Google Firmware Update Alternate mode, as well as some PD policy functions such as deciding to Accept or Reject a data role swap or a power role swap. Several boards simply copy/paste this code from project to project as a lot of this functionality is not actually board specific. This commit tries to refactor this by pulling the functions that are not mainly board specific into common code. The functions are made overridable such that boards that truly do require a different implementation may do so. Additionally, this consolidation changes the policy behaviour for some boards, but they should be for the better. Some examples include that data swaps are always allowed if we are a UFP (no system image requirement), power swaps are allowed to become a sink if we are no longer dual role (e.g. - in suspend), and DisplayPort Alternate Mode is not entered if the AP is off. In order to facilitate this refactor, a couple CONFIG_* options were introduced: - CONFIG_USB_PD_DP_HPD_GPIO /* HPD is sent to the GPU from the EC via a GPIO */ - CONFIG_USB_PD_CUSTOM_VDO /* * Define this if a board needs custom SNK and/or SRC PDOs. * * The default SRC PDO is a fixed 5V/1.5A with PDO_FIXED_FLAGS indicating * Dual-Role power, USB Communication Capable, and Dual-Role data. * * The default SNK PDOs are: * - Fixed 5V/500mA with the same PDO_FIXED_FLAGS * - Variable (non-battery) min 4.75V, max PD_MAX_VOLTAGE_MV, * operational current PD_MAX_CURRENT_MA, * - Battery min 4.75V, max PD_MAX_VOLTAGE_MV, operational power * PD_OPERATING_POWER_MW */ BUG=chromium:1021724,b:141458448 BRANCH=<as many as we can that are still supported> TEST=`make -j buildall` TEST=Flash a kohaku, verify that DP Alt Mode still works with a variety of DP peripherals TEST=Repeat above with a nocturne TEST=Repeat above with an atlas Change-Id: I18fd7e22dc77fe1dc6c21c38cd7f1bc53cae86cb Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1949052 Tested-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
* hatch: refactor PD_MAX_VOLTAGE/PD_MAX_CURRENT/PD_MAX_POWER/PD_OPERATING_POWER/Josh Tsai2019-12-061-6/+0
| | | | | | | | | | | | | | 1) The four config is determined by board, move it into board.h. 2) Update the config variables above for stryke. BUG=b:145257655 BRANCH=hatch TEST=make buildall Change-Id: I1dd6a4f2a78b5196006821bc5d2686f68206c2e1 Signed-off-by: Josh Tsai <josh_tsai@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1950270 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
* Rename CONFIG_USB_PD_PORT_COUNT as CONFIG_USB_PD_PORT_MAX_COUNTKarthikeyan Ramasubramanian2019-11-013-6/+6
| | | | | | | | | | | | | | | | | Certain SKUs of certain boards have lesser number of USB PD ports than defined by CONFIG_USB_PD_PORT_COUNT. Hence rename CONFIG_USB_PD_PORT_COUNT as CONFIG_USB_PD_PORT_MAX_COUNT. BUG=b:140816510, b:143196487 BRANCH=octopus TEST=make -j buildall; Boot to ChromeOS Change-Id: I7c33b27150730a1a3b5813b7b4a72fd24ab73c6a Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1879337 Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org>
* cometlake: cleanup power signal namesKeith Short2019-10-311-1/+1
| | | | | | | | | | | | | | | Add X86 prefix to the Comet Lake signals names for consistency with other Intel APs. BUG=none BRANCH=none TEST=make buildall Change-Id: I70b2a261fd6fbc0e6de70e5d4cf3a90b35078d4e Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1888596 Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
* usb_pd: use enum tcpc_rp_value instead of intCaveh Jalali2019-10-311-1/+1
| | | | | | | | | | | | | | | this changes the declaration and definitions of typec_set_source_current_limit() to take an enum tcpc_rp_value instead of int. BRANCH=none BUG=none TEST=buildall passes Change-Id: If633641a581eeb6085b94bc727e23fb57f7cd435 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1889117 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* akemi: add temperature sensor supportLu Zhang2019-10-252-0/+4
| | | | | | | | | | | | | | | | Akemi board adds a g753 temp sensor on EC i2c port 4. BUG=b:138426009, b:143046086 BRANCH=none CQ-DEPEND=CL:1857978 TEST=use akemi board, add g753 as temp sensor, boot the board and make sure temperature can be read from g753 Change-Id: I2ae663b19e92d2f4d702818ed28004aae98fa045 Signed-off-by: Lu Zhang <lu.zhang@bitland.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1857979 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
* hatch: Add baseboard function for retrieving Board IDTim Wawrzynczak2019-10-092-0/+17
| | | | | | | | | | | | BUG=none BRANCH=none TEST=Verify print output matches CBI dump Change-Id: I7a61179d1ad8a4d3f7e4eea3d2e94b066176bc20 Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1838883 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
* hatch: Reset TCPCs after boot (HOOK_INIT)Tim Wawrzynczak2019-10-071-0/+5
| | | | | | | | | | | | | | | For Hatch baseboard, reset all TCPCs in the system after boot (RO only), to make sure they're in a known-good state. BUG=b:142215640 BRANCH=none TEST=Ensure both TCPC ports still work after wake from hibernate Change-Id: I13104d4698ccb6905742202f86c6d41fe2b49f84 Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1845312 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* hatch: Enable charger hw ramp featureScott Collyer2019-10-021-0/+1
| | | | | | | | | | | | | | | | | | | This CL enables hw ramp for hatch systems. BRANCH=none BUG=b:126229130 TEST=Tested variaous legacy chargers and verfied that ICO mode completes and gives the expected current limit. Tested that when no battery is present, ICO mode is not enabled. Change-Id: Ice6aa87d116ccd0e673774cfef892ab73403f367 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1827256 Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Commit-Queue: Scott Collyer <scollyer@chromium.org>
* config: Merge CONFIG_CHARGER_V2 into CONFIG_CHARGERKeith Short2019-09-181-1/+0
| | | | | | | | | | | | | | | | For all boards that defined CONFIG_CHARGER, CONFIG_CHARGER_V2 is also defined. Remove references to CONFIG_CHARGER_V2 from board header files. Replace CONFIG_CHARGER_V2 in common C modules with CONFIG_CHARGER when appropriate. BUG=b:139699769 BRANCH=none TEST=make buildall -j Change-Id: I6b54baf4ad2406bbed629b6b272dad9ea6a81280 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1789420 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* hatch: enable link time optimizationKeith Short2019-09-161-0/+1
| | | | | | | | | | | | | | | | The Hatch platforms did not have CONFIG_LTO defined. This option saves over 8 KiB of flash space in RO and RW each. BUG=b:140507221 BRANCH=none TEST=make buildall -j TEST=Verify Hatch platform boots Change-Id: I5f2a4590cfd5522be899795dac70a93fe6889f4e Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1783534 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* config: Refactor CONFIG_ACCEL_FIFO to enable use of IS_ENABLEDYuval Peress2019-09-031-2/+4
| | | | | | | | | | | | | | | This change allows us to use the IS_ENABLED condition to replace the various ifdef guards around the CONFIG_ACCEL_FIFO BUG=b:137758297,chromium:981990 BRANCH=None TEST=buildall and CTS tests on Arcada Change-Id: I65d36bac19855e51c830a33e6f3812575e8d15d9 Signed-off-by: Yuval Peress <peress@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704164 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
* hatch: Remove unused board_set_vconn functionScott Collyer2019-08-241-11/+0
| | | | | | | | | | | | | | | | This function had been incorrectly added to baseboard.c, but was never required to be there. This CL removes this unsed function. BUG=b:139761723 BRANCH=None TEST='make BOARD=hatch' Change-Id: I9025fc6c7a49742186e520fdd09525e4ba256b47 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1764709 Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Scott Collyer <scollyer@chromium.org>
* Hatch: add board-specific hook to disable/enable KB backlightben.chen2@quanta.corp-partner.google.com2019-08-232-7/+16
| | | | | | | | | | | | | | | | This patch add enable/disable kb backlight during suspend/resume. BUG=b:138326244 BRANCH=master TEST=None Change-Id: I8c88d63c0d6a5a425e2210b9edca91da174b7429 Signed-off-by: ben.chen2@quanta.corp-partner.google.com Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1730373 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Philip Chen <philipchen@chromium.org> Tested-by: David Huang <David.Huang@quantatw.com>
* tglrvpu_ite: Adding VCONN supportAyushee2019-08-231-1/+1
| | | | | | | | | | | | | | | Added GPIOs pin config to support VCONN on tglrvp. Also added power switch function to enable/disable VCONN according to the cc lines. BRANCH=None BUG=b:139763031 TEST=Able to get characteristics of an E-marked cable Change-Id: Ib09307aafe68ea955f256d3f35670579072c3040 Signed-off-by: Ayushee <ayushee.shah@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1762591 Reviewed-by: Keith Short <keithshort@chromium.org>
* hatch: Allow data role swaps when EC is in ROScott Collyer2019-08-091-9/+2
| | | | | | | | | | | | | | | | | | | | | | | Data role swap requests were being rejected when the EC was running RO. This can result in our type C ports attaching in the wrong data role in cases such as dead battery. The rationale for this PD policy is no longer valid as data/power roles are perserved during RO to RW sysjumps. This CL removes the check for RO such that data role swaps are allowed. BUG=b:138618816 BRANCH=none TEST=Tested by issuing battery cutoff command, then connected a powered charger though hub. Verfied that data role swap request is no longer reejected and the USB device attached to the hub enumerates as expected. Change-Id: Ic63ecde3336ba4c64492d9f727035c8fea936e8f Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1742870 Tested-by: Scott Collyer <scollyer@chromium.org> Commit-Queue: Scott Collyer <scollyer@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* Hatch: Enable CBI info of board skuben.chen2@quanta.corp-partner.google.com2019-08-062-1/+24
| | | | | | | | | | | | | | | This patch enables get board sku BUG=b:138326244 BRANCH=master TEST=None Change-Id: I489de71c75804dd460bda98fa1c49b94c91c8a12 Signed-off-by: ben.chen2@quanta.corp-partner.google.com Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1716674 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Tested-by: David Huang <David.Huang@quantatw.com> Commit-Queue: Tim Wawrzynczak <twawrzynczak@chromium.org>
* hatch: Add charger-related configs for low-battery bootingTim Wawrzynczak2019-08-021-0/+7
| | | | | | | | | | | | | | | | | When there is a battery that isn't communicating, the DUT should not boot the AP in order to avoid brown outs after the system jumps to RW and can begin PD negotiation. BUG=b:136970148 BRANCH=none TEST=Disable PD negotiation in RO, cutoff battery, plug in A/C, and verify that the DUT stays in G3, and doesn't attempt to boot the AP, because Hatch's battery is slow to come back from cutoff (>10 s). Change-Id: I6f53ce83e89520369e9761a64133839b3c162b91 Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1731976 Reviewed-by: Scott Collyer <scollyer@chromium.org>
* hatch: Override board_hibernateTim Wawrzynczak2019-07-241-0/+29
| | | | | | | | | | | | | | | | | | In the board_hibernate function, shut down the AP, and wait 300ms for the chipset state machine to settle down. This allows the EC to actually hibernate; otherwise, it would simply reboot the device. BUG=b:135073910 BRANCH=none TEST=Verify that EC goes into hibernate with Alt+Volume Up+H, then boots back up from time 0 on PB press. Verified that EC will wake from hibernate on insertion of AC. Change-Id: Ie98333e9ce65778df8d07ce6ae165b5c7140edf1 Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1715907 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
* hatch: add chargen to the set of CLI commandsVadim Bendebury2019-07-231-0/+3
| | | | | | | | | | | | | | | This is needed to support CCD testing of UART to USB bridging. BRANCH=none BUG=b:38448364 TEST=ran 'make BOARD=hatch -j', verified that command is included in the symbol map. Change-Id: I11a9dcf7c3204a4464eb5305d0b6b38f51205575 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1688135 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Namyoon Woo <namyoon@chromium.org>
* hatch: Enable CONFIG_USBC_PPC_DEDICATED_INTTim Wawrzynczak2019-07-232-0/+9
| | | | | | | | | | | | | | | | | The Hatch platform uses dedicated interrupt lines for the SN5S330 PPC. This patch helps to ensure that all PPC interrupts are processed, even when interrupts happen during processing. BUG=b:137783988 BRANCH=none TEST=Verified that charging/discharging are still processed as expected. Change-Id: I5c3b003f60aaa239d3ee7a477006913ce8f83ac5 Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1714137 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Reviewed-by: Scott Collyer <scollyer@chromium.org>
* Remove __7b, __8b and __7bfDenis Brockus2019-07-202-3/+3
| | | | | | | | | | | | | | | | | | | The extentions were added to make the compiler perform most of the verification that the conversion was being done correctly to remove 8bit addressing as the standard I2C/SPI address type. Now that the compiler has verified the code, the extra extentions are being removed BUG=chromium:971296 BRANCH=none TEST=make buildall -j TEST=verify sensor functionality on arcada_ish Change-Id: I36894f8bb9daefb5b31b5e91577708f6f9af2a4f Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704792 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* Use 7bit I2C/SPI slave addresses in ECDenis Brockus2019-07-192-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Opt for 7bit slave addresses in EC code. If 8bit is expected by a driver, make it local and show this in the naming. Use __7b, __7bf and __8b as name extensions for i2c/spi addresses used in the EC codebase. __7b indicates a 7bit address by itself. __7bf indicates a 7bit address with optional flags attached. __8b indicates a 8bit address by itself. Allow space for 10bit addresses, even though this is not currently being used by any of our attached devices. These extensions are for verification purposes only and will be removed in the last pass of this ticket. I want to make sure the variable names reflect the type to help eliminate future 7/8/7-flags confusion. BUG=chromium:971296 BRANCH=none TEST=make buildall -j Change-Id: I2fc3d1b52ce76184492b2aaff3060f486ca45f45 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1699893 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* baseboard/hatch: Allow hatch variant to provide battery present infoFurquan Shaikh2019-07-162-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | In case of some hatch variants, there might be a need to identify battery hardware presence using custom method i.e. GPIO_EC_BATT_PRES_ODL might not work correctly. In order to accommodate these variants, this change provides a callback variant_battery_present() that allows variant to provide its own implementation if required. By default, a weak implementation is provided which returns BP_NOT_SURE to use the default GPIO for reading battery present state. BUG=b:135278000 BRANCH=None TEST=None Change-Id: I8504e807cff853dc3276d76a0cd3db1ccb587b9e Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1702869 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: YongBeum Ha <ybha@samsung.com> Reviewed-by: Philip Chen <philipchen@chromium.org> Tested-by: YongBeum Ha <ybha@samsung.com> Tested-by: Furquan Shaikh <furquan@chromium.org> Commit-Queue: Furquan Shaikh <furquan@chromium.org>
* hatch/helios/kindred/kohaku: Enable EC-based display backlight controlPhilip Chen2019-07-021-0/+4
| | | | | | | | | | | | | | | | | | | | | This patch allows EC to override display backlight control for hatch family. Also enable CONFIG_BACKLIGHT_LID so that EC can specifically turn off display backlight when the lid is closed. BUG=b:135511415 BRANCH=none TEST=On hatch rev1 board, turn off/on display backlight by 'ectool backlight 0' and 'ectool backlight 1' TEST='emerge-hatch chromeos-ec' Change-Id: I894ef2879fb584ccf84cd643cc4c0cd5fdcb8525 Signed-off-by: Philip Chen <philipchen@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1679047 Reviewed-by: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> Commit-Queue: Philip Chen <philipchen@chromium.org>
* hatch: move forward led_states to common/led_onoff_statesDevin Lu2019-06-154-203/+1
| | | | | | | | | | | | | | | | This patch follows CL:1556869 to move forward led_states to common. BUG=b:126460269 BRANCH=none TEST=make buildall -j Change-Id: I94f36d20c7c180db0e1cc7c9732711af70002133 Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1564496 Tested-by: Scott Collyer <scollyer@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Commit-Queue: Furquan Shaikh <furquan@chromium.org>
* hatch: Make MST support optional for subboardsPhilip Chen2019-06-142-6/+8
| | | | | | | | | | | | | | | | | | | | This CL cleans up the dependence on the MST support in hatch baseboard. Subboards can optionally define USB_PD_PORT_TCPC_MST when MST support is needed. BUG=b:133788856 BRANCH=none TEST=make buildall Change-Id: Ia83e31e68881ce419056716df4776e4be6786c45 Signed-off-by: Philip Chen <philipchen@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1657320 Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org> Commit-Queue: Philip Chen <philipchen@chromium.org>
* intel_x86/power: Consolidate chipset specific power signals arrayVijay Hiremath2019-06-132-37/+0
| | | | | | | | | | | | | | | Currently chipset specific power signals are defined at board/baseboard level. These power signals are moved to chipset specific file to minimize the redundant power signals array defined for each board/baseboard. BUG=b:134079574 BRANCH=none TEST=make buildall -j Change-Id: I351904f7cd2e0f27844c0711beb118d390219581 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1636837 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* baseboard: hatch: Limit printf on serial consoleGwendal Grignou2019-05-141-0/+8
| | | | | | | | | | | | | | | | | Once Sensors are enabled, there is a lot of host command traffic. Change chan mask to prevent printf overload. BUG=None BRANCH=master TEST=Less printf on the console. Change-Id: I5462e1220949821034fa4001bb5cd11942d48c70 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1593952 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Enrico Granata <egranata@chromium.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Scott Collyer <scollyer@chromium.org>
* hatch: Enable CONFIG_CMD_CHARGER_DUMPScott Collyer2019-05-091-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This CL enables CONFIG_CMD_CHARGER_DUMP which enables the EC console command 'charger_dump'. BUG=b:130209125 BRANCH=none TEST=manual >charger_dump 2019-04-30 17:47:16 25710 REG 12: e70e 2019-04-30 17:47:16 25710 REG 14: dc0 2019-04-30 17:47:16 25710 REG 15: 2260 2019-04-30 17:47:16 25710 REG 20: 8400 2019-04-30 17:47:16 25710 REG 21: a804 2019-04-30 17:47:16 25710 REG 22: 3b00 2019-04-30 17:47:16 25710 REG 23: b700 2019-04-30 17:47:16 25710 REG 24: 0 2019-04-30 17:47:16 25710 REG 25: 0 2019-04-30 17:47:16 25710 REG 26: 0 2019-04-30 17:47:16 25710 REG 30: 210 2019-04-30 17:47:16 25710 REG 31: 40b7 2019-04-30 17:47:16 25710 REG 32: 30 2019-04-30 17:47:16 25710 REG 33: 265 2019-04-30 17:47:16 25710 REG 34: 8124 2019-04-30 17:47:16 25710 REG 35: 40 2019-04-30 17:47:16 25710 REG 3b: 0 2019-04-30 17:47:16 25710 REG 3c: 0 2019-04-30 17:47:16 25710 REG 3d: 1c0 2019-04-30 17:47:16 25710 REG 3e: 1800 2019-04-30 17:47:16 25710 REG 3f: 3b00 2019-04-30 17:47:16 25710 REG fe: 40 2019-04-30 17:47:16 25710 REG ff: 89 Change-Id: I614f5afd78f2d8a3c4e6e28d0cc186616a3e5540 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1580183 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* hatch/kohaku: Account for TCPC reset polarity in ALERT handlerScott Collyer2019-05-081-5/+9
| | | | | | | | | | | | | | | | | | | | | | Reset polarity was added to tcpc_config so that the reset function could be common across different boards which have different TCPC selections. This was applied to pd_reset_mcu(), however, that CL did not take into account the reset polarity in the tcpc_get_alert_status function. This CL fixes that oversight. In addition, this CL fixes the name for kohaku's port 0 TCPC reset line to match the schematic. BUG=b:130194031 BRANCH=none TEST=verified on Hatch that both ports 0/1 function correctly. Change-Id: I0d75d3655c799d4c74f4a6fb1805c06c1fe99c06 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1582964 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* hatch/kohaku: Account for different bc1.2 chipsScott Collyer2019-04-202-14/+0
| | | | | | | | | | | | | | | | | This CL moves bc1.2 configuration from baseboard.c/.h to the board.c/.h files for hatch and kohaku. BUG=b:130197995 BRANCH=none TEST=make -j BOARD=hatch and make -j BOARD=kohaku both are successful Change-Id: I2aa44d37a7a1d23196a766c95c59737838e9e09f Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1574788 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* hatch/kohaku: Move HDMI support to board-specific.Tim Wawrzynczak2019-04-191-3/+0
| | | | | | | | | | | | | | | | Hatch baseboard contained HDMI support, but Kohaku does not have HDMI support, so that code is moved to Hatch board specific code instead. BUG=b:130577280 BRANCH=none TEST=Kled device still works with HDMI; detects when HDMI is plugged in and correctly uses the extra display. Change-Id: Idfcea36068b441c8ad499c1f42f0f0ecf681f978 Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1574698 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
View Lorry Controller Status