| Commit message (Collapse) | Author | Age | Files | Lines |
|---|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
In the interest of making long-term branch maintenance incur as little
technical debt on us as possible, we should not maintain any files on
the branch we are not actually using.
This has the added effect of making it extremely clear when merging CLs
from the main branch when changes have the possibility to affect us.
The follow-on CL adds a convenience script to actually pull updates from
the main branch and generate a CL for the update.
BUG=b:204206272
BRANCH=ish
TEST=make BOARD=arcada_ish && make BOARD=drallion_ish
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I17e4694c38219b5a0823e0a3e55a28d1348f4b18
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262038
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Intel Reference Validation Platform is designed to test multiple
combinations of hardware thus help enable vendors seamlessly.
Added task based TCPC code enablement so that TCPC vendors can easily
hook their hardware, make the code changes and validate their TCPC.
BUG=none
BRANCH=none
TEST=make buildall -j
Change-Id: I989b6a35c6ff3f96150d09de11458886f9642d1f
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2823167
Reviewed-by: Sooraj Govindan <sooraj.govindan@intel.com>
Reviewed-by: caveh jalali <caveh@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Shuffled the code to cleanup following
1. Moved the temperature sensor code from CONFIG_FANS to
CONFIG_TEMP_SENSOR to avoid build errors when the FAN is disabled.
2. Moved ADC code to respective EC chip code as the ADC structure is
not same for all the EC chip variants.
3. Moved PD reset code from EC chip to MECC files so that PD specific
code can be added if needed.
BUG=none
BRANCH=none
TEST=make buildall -j
Change-Id: I614ce0c011f5080e46cd1095a534884925c13b2c
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2762806
Reviewed-by: caveh jalali <caveh@chromium.org>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This header cannot currently be accessed by Zephyr since it is in a
driver directory, not an include directory. This header has quite a
bit of public stuff in it, so it seems reasonable to consider
everything public.
Move the header file and update all users.
BUG=b:175434113
BRANCH=none
TEST=make buildall -j30
build volteer on zephyr
Signed-off-by: Simon Glass <sjg@chromium.org>
Change-Id: Ibba37f47a06783fafb5095f853f2a68d92b6df87
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2607745
|
| |
|
|
|
|
|
|
|
|
|
|
| |
BUG=none
BRANCH=none
TEST=PPC interrupt is invoked on ADL-RVP
Change-Id: Ib41be079d0d5731627193d15b66bb9949bd2722f
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2508156
Reviewed-by: Sooraj Govindan <sooraj.govindan@intel.corp-partner.google.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
|
|
|
Following features are enabled and verified.
1. Power sequencing
2. Host communication
3. USB TYPE-C - TCPC over PD AIC
4. H1 Close Case Debug
5. LED
6. Keyboard
BRANCH=None
BUG=b:169551130
TEST=Build, flash and boot the Alderlake RVP platform to OS
make BOARD=adlrvpp_ite -j;
sudo util/flash_ec --board=adlrvpp_ite --image=<path>
Signed-off-by: Poornima Tom <poornima.tom@intel.com>
Change-Id: I9d85e0cb93bc94f042f902b73ebd96a354d0f365
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2435177
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Sooraj Govindan <sooraj.govindan@intel.corp-partner.google.com>
Reviewed-by: caveh jalali <caveh@chromium.org>
|
