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* drop unnecessary boards, chips and cts testsVadim Bendebury2020-01-071-306/+0
| | | | | | | | | | | | | | | | | | | | The only board which would be built from this branch is Cr50. bds, fizz and host boards are necessary for proper make infrastructure operation and tests. lm4 and npcx are chips used by the bds and fizz boards, so they are also kept around. BRANCH=cr50, cr50-mp BUG=b:145912698 TEST='make buildall -j' succeeds Change-Id: I937b2b8642c1fe91578fc9615438ae22c165b20f Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1986942 Reviewed-by: Namyoon Woo <namyoon@chromium.org> Reviewed-by: Mary Ruthven <mruthven@chromium.org> Reviewed-by: Andrey Pronin <apronin@chromium.org>
* Rename CONFIG_USB_PD_PORT_COUNT as CONFIG_USB_PD_PORT_MAX_COUNTKarthikeyan Ramasubramanian2019-11-011-1/+1
| | | | | | | | | | | | | | | | | Certain SKUs of certain boards have lesser number of USB PD ports than defined by CONFIG_USB_PD_PORT_COUNT. Hence rename CONFIG_USB_PD_PORT_COUNT as CONFIG_USB_PD_PORT_MAX_COUNT. BUG=b:140816510, b:143196487 BRANCH=octopus TEST=make -j buildall; Boot to ChromeOS Change-Id: I7c33b27150730a1a3b5813b7b4a72fd24ab73c6a Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1879337 Tested-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Commit-Queue: Jett Rink <jettrink@chromium.org>
* tablet_mode: Renaming for GMR sensorPhilip Chen2019-09-191-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GMR sensors can be used to (1) detect clamshell/tablet mode (2) detect lid open/closed But hall sensors can only do (2). Therefore the naming related to "hall sensor" for tablet mode application is incorrect. This patch performs the following renaming to better reflect the reality: config: CONFIG_HALL_SENSOR -> CONFIG_GMR_TABLET_MODE CONFIG_HALL_SENSOR_CUSTOM -> CONFIG_GMR_TABLET_MODE_CUSTOM CONFIG_DPTF_MOTION_LID_NO_HALL_SENSOR -> CONFIG_DPTF_MOTION_LID_NO_GMR_SENSOR GPIO: HALL_SENSOR_GPIO_L -> GMR_TABLET_MODE_GPIO_L functions: hall_sensor_disable() -> gmr_tablet_switch_disable() hall_sensor_isr() -> gmr_tablet_switch_isr() hall_sensor_int() -> gmr_tablet_switch_init() variable: hall_sensor_at_360 -> gmr_sensor_at_360 BUG=b:139378190 BRANCH=none TEST=make buildall Change-Id: I28393d056ddd128d8ffafc16a1f9fefee5455ccc Signed-off-by: Philip Chen <philipchen@google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1757275 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Philip Chen <philipchen@chromium.org> Tested-by: Philip Chen <philipchen@chromium.org>
* config: Merge CONFIG_CHARGER_V2 into CONFIG_CHARGERKeith Short2019-09-181-1/+0
| | | | | | | | | | | | | | | | For all boards that defined CONFIG_CHARGER, CONFIG_CHARGER_V2 is also defined. Remove references to CONFIG_CHARGER_V2 from board header files. Replace CONFIG_CHARGER_V2 in common C modules with CONFIG_CHARGER when appropriate. BUG=b:139699769 BRANCH=none TEST=make buildall -j Change-Id: I6b54baf4ad2406bbed629b6b272dad9ea6a81280 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1789420 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* config: Refactor CONFIG_ACCEL_FIFO to enable use of IS_ENABLEDYuval Peress2019-09-031-2/+4
| | | | | | | | | | | | | | | This change allows us to use the IS_ENABLED condition to replace the various ifdef guards around the CONFIG_ACCEL_FIFO BUG=b:137758297,chromium:981990 BRANCH=None TEST=buildall and CTS tests on Arcada Change-Id: I65d36bac19855e51c830a33e6f3812575e8d15d9 Signed-off-by: Yuval Peress <peress@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704164 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
* driver/tcpm/it83xx: Enable TCPC receive SOP'Ruibin Chang2019-08-211-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | Enable TCPC receive SOP' for communication with cable, when we are Vconn source role. BUG=None BRANCH=None TEST=test on board: ampton and reef_it8320 1.SRC connects to SNK via E-mark cable, sources Vconn successfully, and receives cable's ack of discover id request. 2.SRC connects to SNK via E-mark cable, but not source Vconn to cable, and receives nothing of discover id request (this isn't effect on request SNK flow). 3.console cmd pdcable 0 2019-07-30 11:43:40 > pdcable 0 2019-07-30 11:43:45 Cable Type: Passive 2019-07-30 11:43:45 Connector Type: Type C 2019-07-30 11:43:45 Cable Current: 5A 2019-07-30 11:43:45 USB Superspeed Signaling support: Gen 1 Change-Id: Icd2e6f8481bb7a4e0b922460d46b831f36112738 Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw> Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1728669 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* octopus: reduce USB-C source current to 1.5Alu.zhang2019-08-131-1/+0
| | | | | | | | | | | | | | | | octopus hardware does not support sourcing 3A over USB-C and 1.5A over USB-A at the same time for any daughter board. Reduce what we advertise to 1.5A. BRANCH=none BUG=b:139110010,b:139201733 TEST=connect a sink device with a pd analyzer to see if source capabilities is 5V/1.5A Change-Id: Idad7a11b28cefda1aabbca540864a6248d826a47 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1741597 Reviewed-by: Edward Hill <ecgh@chromium.org>
* Remove __7b, __8b and __7bfDenis Brockus2019-07-201-2/+2
| | | | | | | | | | | | | | | | | | | The extentions were added to make the compiler perform most of the verification that the conversion was being done correctly to remove 8bit addressing as the standard I2C/SPI address type. Now that the compiler has verified the code, the extra extentions are being removed BUG=chromium:971296 BRANCH=none TEST=make buildall -j TEST=verify sensor functionality on arcada_ish Change-Id: I36894f8bb9daefb5b31b5e91577708f6f9af2a4f Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1704792 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* baseboard: octopus: Guard sensor configurations with variantYuval Peress2019-07-201-0/+2
| | | | | | | | | | | | | | The octopus baseboard should only declare the sensor CONFIG_ values if we didn't define the NO_SENSORS variant BUG=b:137758297 BRANCH=None TEST=buildall Change-Id: I32443f08ee7d1412b425bd55c8c40d67f22ef089 Signed-off-by: Yuval Peress <peress@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1706687 Reviewed-by: Enrico Granata <egranata@chromium.org>
* Use 7bit I2C/SPI slave addresses in ECDenis Brockus2019-07-191-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Opt for 7bit slave addresses in EC code. If 8bit is expected by a driver, make it local and show this in the naming. Use __7b, __7bf and __8b as name extensions for i2c/spi addresses used in the EC codebase. __7b indicates a 7bit address by itself. __7bf indicates a 7bit address with optional flags attached. __8b indicates a 8bit address by itself. Allow space for 10bit addresses, even though this is not currently being used by any of our attached devices. These extensions are for verification purposes only and will be removed in the last pass of this ticket. I want to make sure the variable names reflect the type to help eliminate future 7/8/7-flags confusion. BUG=chromium:971296 BRANCH=none TEST=make buildall -j Change-Id: I2fc3d1b52ce76184492b2aaff3060f486ca45f45 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1699893 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
* intel_x86/power: Consolidate chipset specific power signals arrayVijay Hiremath2019-06-131-17/+0
| | | | | | | | | | | | | | | Currently chipset specific power signals are defined at board/baseboard level. These power signals are moved to chipset specific file to minimize the redundant power signals array defined for each board/baseboard. BUG=b:134079574 BRANCH=none TEST=make buildall -j Change-Id: I351904f7cd2e0f27844c0711beb118d390219581 Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1636837 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* common: led_onoff_states: move forward baseboard led_state to common codeDevin Lu2019-04-201-0/+1
| | | | | | | | | | | | | | | | | Now we have led_onoff_states instead of led_state of baseboard, to avoid duplicate file so move forward to common code. BUG=b:126460269 BRANCH=none TEST=make buildall -j, make sure led behavior on meep intended as well. Change-Id: I3adf20ebf2efd2f02b1ae101faf1c36f2f5ed454 Signed-off-by: Devin Lu <Devin.Lu@quantatw.com> Reviewed-on: https://chromium-review.googlesource.com/1556869 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Marco Chen <marcochen@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* bip: Delete boardEvan Green2019-04-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | bip has an it8320bx with 256kB of flash space. After dividing by two and subtracting 0x800, this means the RO section of bip is 126kB. This is very tight. We've already removed a few commands to free up space, but this board hasn't been worked on since summer 2018. Delete it to avoid excessive maintenance burden. BUG=b:129283539 BRANCH=none TEST=make -j buildall CQ-DEPEND=CL:1538819,CL:*1086038 Signed-off-by: Evan Green <evgreen@chromium.org> Change-Id: Iac903397dd653c8e012c8b3956807ba1bacf681e Reviewed-on: https://chromium-review.googlesource.com/1536490 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* mkbp_event,include/config.h: Clarify MKBP delivery method.Yilun Lin2019-03-071-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now we have two MKBP delivery methods: 1. define CONFIG_MKBP_USE_HOST_EVENT to notify via host event 2. undef CONFIG_MKBP_USE_HOST_EVENT to notify via GPIO interrupt It may become more complicated if new notification methods introduced. e.g.: mt_scp uses IPI, rather than host event and GPIO interrupt. This CL does: 1. add CONFIG_MKBP_USE_GPIO to explicilty declare that MKBP event are sent via GPIO interrupt. 2. CONFIG_MKBP_USE_CUSTOM for boards which have custmized methods. 3. Remove weak attribute in mkbp_set_host_active (which can be done with CONFIG_MKBP_USE_CUSTOM now. 4. Removes mkbp_set_host_active function in board Nocturne. It only deliver MKBP events through GPIO interrupt now. BRANCH=None BUG=b:120808999 TEST=grep -rn "CONFIG_MKBP_USE_GPIO\|EC_INT_L" board/ baseboard/ and see the result is reasonable: 1. EC_INT_L must be 1-to-1 mapped to define CONFIG_MKBP_USE_GPIO in every board, except that meep, yorp, ampton which are defined in baseboard octopus. 2. undef CONFIG_MKBP_USE_GPIO in bip and casta, which use host event, but also have baseboard octopus. Change-Id: I4af6110e4fd3c009968075c3623ef2d91cbd770b Signed-off-by: Yilun Lin <yllin@google.com> Reviewed-on: https://chromium-review.googlesource.com/1490794 Commit-Ready: Jett Rink <jettrink@chromium.org> Tested-by: Yilun Lin <yllin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* octopus: convert boards to use hardware intJett Rink2019-01-101-0/+7
| | | | | | | | | | | | | | | | | | Recent kernel changes expect the EC to use a dedicated interrupt pin from the EC to the AP to notify the AP of pending sensor data (instead of using an eSPI "interrupt"). The octopus boards have this hardware support, we just need to enable the EC use it. BRANCH=octopus BUG=b:122552125,b:120679547 TEST=perform sensor tests on various octopus boards Change-Id: I2bd3ffe14947d5f1ec71acbb53fcac962b007cf9 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1403103 Reviewed-by: Enrico Granata <egranata@chromium.org>
* octopus: reduce all octopus sensor fifo sizesJett Rink2019-01-051-0/+10
| | | | | | | | | | | | | | | | Too large of a FIFO causes jitter in the sensor timestamp which can cause issues during batch CTS tests. BRANCH=octopus BUG=b:120508077 TEST=everything builds. Test with smaller fifo were done on bobba. See CL:1387348 Change-Id: If67a46faa6e136006a20ac243b826b7ce06d9868 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1392425 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
* Octopus: remove keyboard backlight enable defaultDiana Z2019-01-031-2/+0
| | | | | | | | | | | | | | | | | | | So far, no octopus boards are actually using the keyboard backlight stuffing option. This change removes the config from being the default, and frees up about 1.8 kB of flash space on the boards. For any future boards wishing to use the backlight, the two configs can be moved into their individual board.h files. BUG=None BRANCH=octopus TEST=builds, bobba360 boots with no issue Change-Id: I0e2184b8decfa2a274569f8e863a2c59b59dbd63 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1383196 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* baseboard/octopus: Enable CONFIG_BOARD_HAS_RTC_RESETKarthikeyan Ramasubramanian2018-12-051-0/+1
| | | | | | | | | | | | | | | | | | | Add a helper function to reset the RTC using EC_PCH_RTCRST GPIO. Enable the config to use the hardware support to reset the RTC. BUG=b:119678692 BRANCH=octopus TEST=make -j buildall && Boot to ChromeOS. Create a forced scenario to trigger an RTC reset and ensure that EC does not get reset while the SoC boots to ChromeOS. Execute warm reboot from AP, cold reboot from EC and wake from ec hibernate (10 iterations each) and suspend_stress_test for 50 iterations successfully. Change-Id: I5eb1025cdaa62098de0250640788921621829cd1 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1354494 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* octopus: remove OCM erase commandJett Rink2018-11-291-1/+0
| | | | | | | | | | | | | | We haven't need the OCM erase command for anlogix TCPCs for a while since they are being shipped with the OCM pre-erased BRANCH=octopus BUG=b:109882250 TEST=buildall Change-Id: Ic4d2fa1e40037e01d5ed03116e8ceb14840f0ea9 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1352057 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
* tablet_mode: Introduce hall sensor specific handlingFurquan Shaikh2018-11-291-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change performs the following renaming: 1. CONFIG_TABLET_SWITCH -> CONFIG_HALL_SENSOR Indicates if a device has hall sensor 2. TABLET_MODE_GPIO_L -> HALL_SENSOR_GPIO_L Provides the interrupt line from hall sensor to EC. 3. tablet_mode_isr -> hall_sensor_isr Interrupt routine that gets control on hall sensor interrupt. 4. tablet_mode_init -> hall_sensor_init Init routine for initializing hall sensor interrupt. 5. tablet_switch_disable -> hall_sensor_disable Disable hall sensor interrupt and tablet mode sub-system. This is done to separate hall sensor interrupt from tablet mode handling. It is another step towards aligning tablet mode detection on EC with Chrome. Hall sensor interrupt occurs when the lid is in 360-degree flipped mode. If tablet mode is not already triggered by lid motion driver, then hall_sensor_isr will set tablet mode and take necessary actions to disable input peripherals. CQ-DEPEND=CL:1351518 BUG=b:120050761 BRANCH=octopus TEST=make -j buildall Change-Id: I5841f6875d538a624cb888bc048f252397ab457c Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1350469 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Casta: initial EC imageDiana Z2018-11-271-0/+2
| | | | | | | | | | | | | Initial image for casta based on the most recent schematics available. BUG=b:119174492 BRANCH=octopus TEST=builds Change-Id: Ie0575476d79fd8f6c5f697499bc8a660880348e3 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1347011 Reviewed-by: Jett Rink <jettrink@chromium.org>
* ocotpus: move VBUS_ADC config to baseJett Rink2018-11-191-1/+1
| | | | | | | | | | | | | | | | All boards but yorp have added the ADC hardware support back for VBUS ADC measurements. Move code to common baseboard BRANCH=none BUG=none TEST=ADC measurements still works on phaser and fleex Change-Id: I36a7ba92df21de4c1188613c6a12da83fdba6eb6 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1337456 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* SN5S330: treat interrupts as level-sensitiveDiana Z2018-11-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | The SN5S330 PPC will pull its /INT pin low until all interrupts are cleared. Since the interrupt pin is treated as edge-sensitive, its handler needs to provide level-checking before exiting. Otherwise, if not all interrupts are cleared before the handler exits, the EC won't see another edge to call the handler again. Boards which share the PPC interrupt pin with other sources may choose to implement their own callback, if they are able to determine which chip was the source of the interrupt. BUG=b:118846062 BRANCH=None TEST=performed several power swaps and unplugs on a pair of Careenas, verifying that in instances where the handler had to loop around we correctly cleared the interrupts and the "ectool usbpdpower" output was normal Change-Id: Iccbe40976a746d109d67b9a91f8fbd81898f9b3f Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1327123 Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* Octopus: fine tune host command debugsDiana Z2018-11-021-2/+4
| | | | | | | | | | | | | | | | | | | This change adjusts the host command printing for octopus boards. Rather than just blocking all host commands, we'll selectively not print some of the most common host commands which don't add much debugging value. BRANCH=None BUG=None TEST=deployed on bobba360, observed a lot of host commands during boot but none printed while the system idled Change-Id: Ib408a6627285988d0bcb203906d89df728942f77 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1312201 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Enrico Granata <egranata@chromium.org> Reviewed-by: Karthikeyan Ramasubramanian <kramasub@chromium.org>
* octopus: disable verbose EC logging of host commandsEnrico Granata2018-10-301-0/+8
| | | | | | | | | | | | | | | | | | Once the sensors are enabled, the default logging mode of the EC is extremely verbose. Tune this down by removing the logging statements at every host command. BRANCH=none TEST=observe fewer log messages coming in BUG=b:118443377, crbug:896347 Change-Id: Ib93f9280b8f70a8ecdc53621c4364173c77efed6 Signed-off-by: Enrico Granata <egranata@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1302293 Reviewed-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-by: Karthikeyan Ramasubramanian <kramasub@chromium.org> Reviewed-by: Justin TerAvest <teravest@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* Octopus: Prevent possible i2c_unwedge watchdog reset in S5Diana Z2018-10-301-0/+1
| | | | | | | | | | | | | | | | | | | | When the system enters S5 and the motion_sensor_task was just about to gather data from its sensors, we can hit a scenario where the attempts to unwedge the I2C bus cause the EC to hit a watchdog reset. This change adds the configuration option to indicate that the sensors are unpowered in S5/G3, and therefore the low SCL line is expected. BRANCH=None BUG=b:116774375 TEST=Added sleep to motion_sensor_task to increase the probability of hitting this timing window, confirmed this change triggered the not powered check instead of attempting an unwedge Change-Id: I126a096afde24d0823e6d4fce7e0da3059b421f5 Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1305121 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Justin TerAvest <teravest@chromium.org>
* dptf: Get rid of CONFIG_DPTF_DEVICE_ORIENTATIONFurquan Shaikh2018-10-301-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_DPTF_DEVICE_ORIENTATION was added to indicate mode change to the host to allow it to read the tablet mode flag from shared EC memory and select the right DPTF table to load (if supported). However, this config seems unnecessary because of the following reasons: 1. Host sets SCI mask to indicate to the EC which events it wants to process. Thus, even if the EC sets mode change flag, it will not be notified to the host unless it supports mode change event. 2. Additionally, if host supports mode change event, but does not support multiple DPTF tables, then EC ACPI code takes care of ensuring that there is a thermal event handler present to reload tables. 3. CONFIG_DPTF_DEVICE_ORIENTATION was defined for almost all new x86 boards. BUG=b:117844490 BRANCH=None TEST=make -j buildall Change-Id: Ic4097ae047e2d559673a321da4df86514f902993 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1292359 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Gwendal Grignou <gwendal@chromium.org>
* octopus: motion_sense: provide option to defer the sensor resume actionsHarry Pan2018-10-031-0/+5
| | | | | | | | | | | | | | | | | | | | | It is observed that the lid accelerator not apprears on the i2c bus which causes the i2c master got NACK in multiple retries during the S5 (and G3) to S0 power sequence. (i.e. [10106.692955 Lid Accel: 0: init failed: 1]) Learnt from the CL:1091211, refer to the CL:433338 as well, the patch is similar to the delay option for suspend actions, provide a delay option for the resume actions as well. BRANCH=master BUG=b:116170194 TEST=Examining EC console for KX022 init succeeds in S5->S3->S0 path on octopus child boards w/ KX022. (i.e. [10039.971601 Lid Accel: MS Done Init type:0x0 range:4]) Change-Id: Iae4f0fd1e6c46c1b7e12a202a517d8f3b3d82c40 Signed-off-by: Harry Pan <harry.pan@intel.com> Reviewed-on: https://chromium-review.googlesource.com/1239974 Reviewed-by: Jett Rink <jettrink@chromium.org>
* bc12: rename bq24392 driver to max14637Scott Collyer2018-10-021-1/+1
| | | | | | | | | | | | | | | | | | | | The MAX14637 BC 1.2 USB charger detection chip is functionally similar to the bq24392 and can use the same driver. Rather than have 2 copies of the same driver, or a generic named driver than can be used for both chips, rename the existing bq24392 driver to max14637 as that's the BC 1.2 chip that our current designs are using. BUG=b:113267982 BRANCH=none TEST=make -j buildall Change-Id: I03cfb4918513d756c2a41341001a8162652a29b6 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1250031 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Edward Hill <ecgh@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* octopus: enable PSL for all NPCX variantsJett Rink2018-09-171-0/+3
| | | | | | | | | | | | | | | | | All NPCX variants support PSL mode in hardware now; enable this at the baseboard level. This is adding support for Bobba; other boards are unaffected BRANCH=none BUG=b:115677776 TEST=bobba goes into PSL Change-Id: I38974371b101c42841e4f11ba72b466415c754d9 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1227050 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Justin TerAvest <teravest@chromium.org>
* octopus: use higher priority TCPC interrupt tasksJett Rink2018-09-071-0/+6
| | | | | | | | | | | | | | See go/usb-pd-slow-response-time for more information BRANCH=none BUG=b:112088135 TEST=CL stack on fleex and bobba consistently meet PD timing spec Change-Id: I9eabf8de8d866f5a0af7d1daba5ab585b418d26c Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1185729 Reviewed-by: Jonathan Brandmeyer <jbrandmeyer@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* ss-mux: update semantics for TCPC/MUX only used as MUXJett Rink2018-09-051-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | This converts the compile time option of CONFIG_USB_PD_TCPM_TCPCI_MUX_ONLY into a runtime option to better support draggon egg designs and reduce CONFIG complexity in general. Introduce new mux_read/write to read from tcpc_config_t or mux driver depending on new flag setting. Audited all mux drivers for any use of tcpc_read/write and updated to mux_read/write. BRANCH=none BUG=b:110937880 TEST=On Bip with CL stack: Verified by connecting DP monitor at boot; Verified plug / unplug of DP cable works; Change-Id: I968893b886ff0ccc4074beae5ec42973814ae77c Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1200062 Commit-Ready: Gaggery Tsai <gaggery.tsai@intel.corp-partner.google.com> Reviewed-by: Scott Collyer <scollyer@chromium.org>
* octopus: consolidate identical definesJett Rink2018-09-041-0/+9
| | | | | | | | | | | | | | All of the octopus board define the table mode option the same, so move them into baseboard. BRANCH=none BUG=none TEST=fleex still works Change-Id: Ibed874a609a2e5947d7aee39f915dc3046a0cc19 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1204700 Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* octopus: enabled DPTF device orientationJett Rink2018-09-041-0/+2
| | | | | | | | | | | | | | | | | | | | | | | All octopus boards should have this enabled by now. We are consolidating this option in octopus baseboard. This turns on DPTF on: - Fleex This turns on DPTP_DEVICE_ORIENTATION on: - Bip - Bobba - Fleex BRANCH=none BUG=b:113348027 TEST=fleex has tablet mode icon Change-Id: I0d25895785c6a8fcce25b3b6bf587b6030119045 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1204699 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Justin TerAvest <teravest@chromium.org>
* Octopus: Enable CONFIG_USB_PORT_POWER_SMART_INVERTEDmatt_wang2018-08-311-0/+1
| | | | | | | | | | | | | | | | | | | | | | | Modify the USB charge mode setting. SDP mode: USB_A0_CHARGE_EN_L=High, USB_A1_CHARGE_EN_L=High CDP mode: USB_A0_CHARGE_EN_L=Low, USB_A1_CHARGE_EN_L=Low BUG=b:112292707 BRANCH=none TEST=Can detect the Pioneer BDR-XD06J-UHD and BDR-XS06T DVD rom via USB port. And use the command "ectool gpioget" to check the GPIO USB_A0_CHARGE_EN_L and USB_A0_CHARGE_EN_L the voltage level is correct. Change-Id: Ica5f3dae726adb82f5062bead3a7a73f566b5987 Signed-off-by: matt_wang <matt_wang@compal.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1193562 Commit-Ready: Jett Rink <jettrink@chromium.org> Tested-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* octopus: Increase port80 history buffer len to 256 bytesFurquan Shaikh2018-08-071-0/+4
| | | | | | | | | | | | | | | | | | This change increases the history buffer len for port80 messages to 256 bytes. It allows viewing all the port80 messages from a single boot of AP. BUG=None BRANCH=None TEST=Verified that all port80 messages from a single boot are present when dumping port80 buffer. Change-Id: I14b7dcd2258b72a4dd1f727cf6e9bcf8a53b3be9 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1164578 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Justin TerAvest <teravest@chromium.org>
* baseboard/octopus: Select flash chip W25Q80Furquan Shaikh2018-07-271-1/+1
| | | | | | | | | | | | | | | | | Octopus uses NPCX part with W25W80 SPI flash chip. This change selects the right config option for the flash chip. BUG=b:111735126 BRANCH=None TEST=None Change-Id: I1ab90ea47605d466b992c62ef13069c0f2422008 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/1152696 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* octopus: Enable auto toggle/low power mode for standalone tcpcsScott Collyer2018-07-201-6/+2
| | | | | | | | | | | | | | | | | | | | | With the changes made to tcpci for alert handling and low power mode entry, the anx7447 can operate with auto toggle and low power config options. BUG=b:77544959 BRANCH=none TEST=Verfied that low power mode is entered when nothing is attached and that when an adapter is attached it connects and when removed returns to low power mode. Change-Id: I8101d31a5271102c34ecc2ef326c36619825c7d4 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1044870 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Venkateswarlu Vinjamuri <venkateswarlu.v.vinjamuri@intel.corp-partner.google.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* octopus: Fix booting to OS from shipmodeVijay Hiremath2018-07-031-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the battery is booting from shipmode, it cannot provide power hence check for the battery revive state and do not disable charge ports instead assume the power source port as dedicated charge port and remain in charge manager safe mode till the battery is initialized and able to provide power. 1. Remove custom battery hardware present logic: In case of booting from battery shipmode, though battery is physically present it cannot provide power hence we need to prevent auto-power on till the negotiated power is >= CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON hence removed the custom h/w present logic 2. Remove custom battery present logic As we are using battery revive logic to remain in charge manager safe mode till the battery is initialized, enabled logic to use the physical battery GPIO for battery detection and removed the custom battery present logic. BUG=b:80299100, b:74427009, b:110438520 BRANCH=none TEST=Manually tested on BIP 1. Battery can revive from shipmode 2. DUT can boot to S0 when no battery connected and from shipmode battery, without pressing the power button 3. Deeply discharged battery is recovered and DUT booted to OS without pressing the power button Change-Id: I75378d5d70d07cea13ec775188ce17cb8fe9d9ae Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com> Reviewed-on: https://chromium-review.googlesource.com/1109443 Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com> Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* octopus npcx: ensure EC enters deep sleep when AP in S0Diana Z2018-06-261-0/+3
| | | | | | | | | | | | | | | | | | This change enables EC deep sleep in S0, which should give a power savings of about 20 mW when the system is idle. BRANCH=none BUG=b:78225493 TEST=with yorp: ran "ectool version" 50k times with feature enabled and saw no errors, plugged board into keyboard, trackpad, and screen to ensure no apparent lag or keystroke loss occurred, ran faft_ec suite and verified pass/fail rate was the same as without feature Change-Id: Ib943ea098acf47d989f6b0d229c72b4982ffc4cb Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1115466 Reviewed-by: Jett Rink <jettrink@chromium.org>
* octopus: Enable smart USB-AShaunak Saha2018-06-081-2/+6
| | | | | | | | | | | | | | BRANCH=none BUG=b:79872754 TEST=On yorp:FAFT test firmware_ECUsbPorts passes Change-Id: Ib1316ebc4716d5fdd24bafda0bb2a84157347da7 Signed-off-by: Shaunak Saha <shaunak.saha@intel.com> Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com> Reviewed-on: https://chromium-review.googlesource.com/1077592 Commit-Ready: Divya Sasidharan <divya.s.sasidharan@intel.corp-partner.google.com> Tested-by: Divya Sasidharan <divya.s.sasidharan@intel.corp-partner.google.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* octopus: remove ADCs for VBUSJett Rink2018-06-071-1/+1
| | | | | | | | | | | | | | | Hardware does not support ADCs for Vbus anymore for all boards except bip. Make bip the same as other octopus boards (i.e. not using ADCs for Vbus measurements). BRANCH=none BUG=b:109747036 TEST=CL stack works with current yorp Change-Id: I96b82b70799e8b70bf5d479a1714524fc1652140 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1089199 Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* battery: Move fuel gauge code to commonEdward Hill2018-06-011-0/+1
| | | | | | | | | | | | | | | | | Move fuel gauge code to common to avoid duplication in octopus and grunt baseboards. BUG=b:79704826,b:74018100 BRANCH=none TEST=make -j buildall Change-Id: I58a615c9ed7906cb19b49c2baa36aaa619838cf1 Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1072637 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Vijay Hiremath <vijay.p.hiremath@intel.corp-partner.google.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* yorp: add keyboard backlight controlJett Rink2018-05-231-0/+2
| | | | | | | | | | | | | | Enable PWM control of backlight in EC for yorp and phaser. Proto build of bip will not have backlight control in EC. BRANCH=none BUG=b:79422226 TEST=none (no hardware to test with) Change-Id: Ib6ed4af4de3145b112ed43b4ca1ec9f931f3875f Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1050785 Reviewed-by: Justin TerAvest <teravest@chromium.org>
* espi: convert all eSPI board to use CONFIG_HOSTCMD_ESPIJett Rink2018-05-221-2/+1
| | | | | | | | | | | | | | Convert all boards that use both CONFIG_ESPI and CONFIG_LPC to only use the CONFIG_HOSTCMD_ESPI option. BRANCH=none BUG=chromium:818804 TEST=entire stack works with lpc and espi Change-Id: Idd1519494a4f880b7b2018d059579d50c5461fcf Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1067499 Reviewed-by: Randall Spangler <rspangler@chromium.org>
* octopus: implement device modeJagadish Krishnamoorthy2018-05-221-1/+0
| | | | | | | | | | | | | | | | | | To enable device mode, set the gpio USB2_OTG_ID in the respective boards to high. Pull the gpio low to disable device mode. BUG=b:79343083 BRANCH=NONE TEST=On Yorp board, for UFP mode gpio USB2_OTG_ID should be high, for DFP mode gpio USB2_OTG_ID should be low. In OS console, lspci should list xdci. (with chromiumos/third_party/coreboot/+/1064592) Change-Id: I70f13a9705626d9bcbe989239f6826d35d8fa536 Signed-off-by: Jagadish Krishnamoorthy <jagadish.krishnamoorthy@intel.com> Reviewed-on: https://chromium-review.googlesource.com/1058832 Reviewed-by: Jett Rink <jettrink@chromium.org>
* octopus: enable trackpad (S3+) and backlight (S0)Jett Rink2018-05-181-0/+5
| | | | | | | | | | | | | | | | Enable trackpad when entering S3, and display backlight when entering S0 and disable them on the opposite transition. Moving common code to baseboard. BRANCH=none BUG=b:79900266 TEST=bip trackpad works in S3 as wake source. backlight turns off in S0ix and S3. Change-Id: I0937771093d87c020b3c0d94a482d108c5a5c180 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1064693 Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* octopus: Add CONFIG_BATTERY_REVIVE_DISCONNECTScott Collyer2018-05-161-0/+1
| | | | | | | | | | | | | | | | | | | | | Adding this config so that battery_get_disconnect_state() is called directly as a condition in prevent_power_on instead of having this be a condition battery_is_present. This change allows precharge current to be sent to the battery when the battery is dead or recovering from battery cutoff condition. BRANCH=none BUG=b:79133101 TEST=tested on Yorp and verfied that in both dead battery and battery cutoff cases, the battery wakes up as expected. Change-Id: Iefec578dd241ddb832630ffa2530ba7c631f9a96 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1053096 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* bip: Undef auto toggle and low power TCPC config optionsScott Collyer2018-05-161-2/+2
| | | | | | | | | | | | | | | | | | | | The ITE TCPC driver does not current support drp_toggle and so can't have these config options defined. The driver method for drp_toggle is set to NULL which causes the EC to reboot when power button is pressed as that calls drp_toggle in the chipset hook. BRANCH=none BUG=b:79637786 TEST=Verfied that with these config options not defined the EC no longer reboots when power button is pressed. Change-Id: I08e27bb2541bac4fac52411d9c01a366b8874379 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1059580 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org>
* octopus: move more implementation to baseboardJett Rink2018-05-041-22/+22
| | | | | | | | | | | | | | Move driver configuration to baseboard in preparation for phaser board BRANCH=none BUG=none TEST=yorp still works Change-Id: Ifeb434d2d4103160acd6eb9f784533d1ae0ae35a Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1042729 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
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